coreboot-gerrit December 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: driver/intel/fsp2_0/hand_off_block: rework fsp_display_fvi_version_hob
by Subrata Banik (Code Review) 02 Dec '22

02 Dec '22

Attention is currently required from: Dinesh Gehlot, Alex Levin, Arthur Heymans, Andrey Petrov, Felix Held. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69499 ) Change subject: driver/intel/fsp2_0/hand_off_block: rework fsp_display_fvi_version_hob ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: @Dinesh: can you please check this cl? -- To view, visit https://review.coreboot.org/c/coreboot/+/69499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3398043dbdb3fc618277cefdd349b2c935bbfa52 Gerrit-Change-Number: 69499 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Alex Levin <levinale(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Alex Levin <levinale(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 02 Dec 2022 15:26:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: driver/intel/fsp2_0/hand_off_block: rework fsp_display_fvi_version_hob
by Felix Held (Code Review) 02 Dec '22

02 Dec '22

Attention is currently required from: Subrata Banik, Alex Levin, Arthur Heymans, Andrey Petrov. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69499 ) Change subject: driver/intel/fsp2_0/hand_off_block: rework fsp_display_fvi_version_hob ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69499/comment/fbc998a1_bfed5a23 PS1, Line 12: > i've pushed an updated version that supports multiple uuid_fv_info hobs. […] since i didn't get any reply on this in two weeks, i'll mark this as resolved, since in contrast to the first patch set, the current patch set won't change the behavior of the code -- To view, visit https://review.coreboot.org/c/coreboot/+/69499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3398043dbdb3fc618277cefdd349b2c935bbfa52 Gerrit-Change-Number: 69499 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Alex Levin <levinale(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Alex Levin <levinale(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Dec 2022 15:21:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/herobrine: NVMe id determined by logical (not physical) bit
by Douglas Anderson (Code Review) 02 Dec '22

02 Dec '22

Attention is currently required from: Shelley Chen, Julius Werner. Douglas Anderson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70230 ) Change subject: mb/google/herobrine: NVMe id determined by logical (not physical) bit ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Patchset: PS3: /me is happy now. -- To view, visit https://review.coreboot.org/c/coreboot/+/70230 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa75d2418d6a2351d874842e8678bd6ad3c92526 Gerrit-Change-Number: 70230 Gerrit-PatchSet: 3 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 02 Dec 2022 15:19:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/purism/librem_14: Enable both lanes of left side USB 3.0 port
by Felix Held (Code Review) 02 Dec '22

02 Dec '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69702 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/purism/librem_14: Enable both lanes of left side USB 3.0 port ...................................................................... mb/purism/librem_14: Enable both lanes of left side USB 3.0 port Fixes using USB-C devices in either orientation on left-side USB-C port. Test: Plug USB-C device in both orientations on left-side USB-C port, check speed with lsusb -t. Change-Id: I9fbc53bb51a5225e92b0b6bb9ced87a0ab90c9ce Signed-off-by: Jonathon Hall <jonathon.hall(a)puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69702 Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb index b979740..ef35ac0 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb @@ -127,6 +127,7 @@ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A right register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A left register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-C right + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card Reader end -- To view, visit https://review.coreboot.org/c/coreboot/+/69702 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fbc53bb51a5225e92b0b6bb9ced87a0ab90c9ce Gerrit-Change-Number: 69702 Gerrit-PatchSet: 5 Gerrit-Owner: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/alderlake: skip external buses for D-states list
by Felix Held (Code Review) 02 Dec '22

02 Dec '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/70163 ) Change subject: soc/intel/alderlake: skip external buses for D-states list ...................................................................... soc/intel/alderlake: skip external buses for D-states list The devices in the list that was introduced in commit c66ea985776 ("soc/intel/alderlake: provide a list of D-states to enter LPM") are all internal. This CL skips the external buses (which caused the addition of packages to non-existant paths such as "_SB.PCI0.RP1.MCHC", and warnings from the kernel) BUG=b:231582182 TEST=Built and tested on anahera by verifying SSDT contents Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Signed-off-by: Eran Mitrani <mitrani(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70163 Reviewed-by: Tarun Tuli <taruntuli(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/soc/intel/alderlake/acpi.c 1 file changed, 27 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved Tarun Tuli: Looks good to me, approved diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index c874067..d7405cc 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -251,6 +251,9 @@ return DEFAULT_CPU_D_STATE; case DEVICE_PATH_PCI: + /* skip external buses*/ + if (dev->bus->secondary != 0) + return NONE; for (size_t i = 0; i < ARRAY_SIZE(min_pci_sleep_states); i++) if (min_pci_sleep_states[i].pci_dev == dev->path.pci.devfn) return min_pci_sleep_states[i].min_sleep_state; -- To view, visit https://review.coreboot.org/c/coreboot/+/70163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Gerrit-Change-Number: 70163 Gerrit-PatchSet: 6 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/brya/var/zydron: Add WiFi SAR table
by Felix Held (Code Review) 02 Dec '22

02 Dec '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/70173 ) Change subject: mb/google/brya/var/zydron: Add WiFi SAR table ...................................................................... mb/google/brya/var/zydron: Add WiFi SAR table Add WiFi SAR table for zydron. BUG=b:260770999 TEST=build FW and checked SAR table can load by WiFi driver. Change-Id: I8d5f966c7af3ac6d9923d4f6c851bfb340f31fab Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70173 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/zydron/variant.c 2 files changed, 25 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 71ea005..48e511d 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -294,6 +294,7 @@ select DRIVERS_I2C_NAU8825 select DRIVERS_INTEL_MIPI_CAMERA select SOC_INTEL_COMMON_BLOCK_IPU + select CHROMEOS_WIFI_SAR if CHROMEOS config BOARD_GOOGLE_GLADIOS bool "-> Gladios" diff --git a/src/mainboard/google/brya/variants/zydron/variant.c b/src/mainboard/google/brya/variants/zydron/variant.c index e21ab5a..86c65c7 100644 --- a/src/mainboard/google/brya/variants/zydron/variant.c +++ b/src/mainboard/google/brya/variants/zydron/variant.c @@ -2,8 +2,14 @@ #include <chip.h> #include <fw_config.h> +#include <sar.h> #include <baseboard/variants.h> +const char *get_wifi_sar_cbfs_filename(void) +{ + return "wifi_sar_0.hex"; +} + void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) { config->cnvi_bt_audio_offload = fw_config_probe(FW_CONFIG(AUDIO, -- To view, visit https://review.coreboot.org/c/coreboot/+/70173 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d5f966c7af3ac6d9923d4f6c851bfb340f31fab Gerrit-Change-Number: 70173 Gerrit-PatchSet: 2 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/prodrive/atlas: Enable GPP_B14 buzzer support
by Felix Held (Code Review) 02 Dec '22

02 Dec '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67553 ) ( 12 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/prodrive/atlas: Enable GPP_B14 buzzer support ...................................................................... mb/prodrive/atlas: Enable GPP_B14 buzzer support Per Intel doc 621483, 26.1.1 - NMI_STS_CNT, 8254 timer is required for Speaker Data output (buzzer) at GPP_B14 NF1, as it is using 8254 timer counter 2 output. However when 8254 timer is used, S0ix will not work as 8254 has to be gated instead. For further info on s0ix requirements, refer to Intel doc 610002 (Modern Standby Unified Checklist). This CL also disables s0ix because it is not required by the platform. Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Change-Id: Ib5e7787a47509ed09818d8515d21a80196fb1ec6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67553 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/prodrive/atlas/Kconfig M src/mainboard/prodrive/atlas/devicetree.cb 2 files changed, 35 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig index 814c1e0..3900f4d 100644 --- a/src/mainboard/prodrive/atlas/Kconfig +++ b/src/mainboard/prodrive/atlas/Kconfig @@ -54,6 +54,15 @@ config NO_POST default y +config ENABLE_BUZZER_SUPPORT + bool "Enable Buzzer support" + default y + select USE_LEGACY_8254_TIMER + help + 8254 timer is required for buzzer support on GPP_B14 (based on Intel doc 621483, + 26.1.1 - NMI_STS_CNT). However since 8254 timer clock gating has to be enabled for + S0ix support, enabling buzzer will disable s0ix. + config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS int default 32 diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb index 0d91bb6..c90c69c 100644 --- a/src/mainboard/prodrive/atlas/devicetree.cb +++ b/src/mainboard/prodrive/atlas/devicetree.cb @@ -17,6 +17,9 @@ # SaGv Configuration register "sagv" = "CONFIG(ATLAS_ENABLE_SAGV) ? SaGv_Enabled : SaGv_Disabled" + # Disable S0ix + register "s0ix_enable" = "0" + # Display configuration (4 DPs) register "ddi_ports_config" = "{ [DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, -- To view, visit https://review.coreboot.org/c/coreboot/+/67553 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib5e7787a47509ed09818d8515d21a80196fb1ec6 Gerrit-Change-Number: 67553 Gerrit-PatchSet: 15 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/prodrive/atlas: Add DP++ support
by Felix Held (Code Review) 02 Dec '22

02 Dec '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/70154 ) Change subject: mb/prodrive/atlas: Add DP++ support ...................................................................... mb/prodrive/atlas: Add DP++ support Update VBT configurations for DP++ and DP dongles support. Tested working on customer's side. Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Change-Id: I7aa34297a10bf16b9043140bff91fd3a8c4009d4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70154 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/prodrive/atlas/data.vbt 1 file changed, 17 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/prodrive/atlas/data.vbt b/src/mainboard/prodrive/atlas/data.vbt index d1e0dc9..9c4aa8a 100644 --- a/src/mainboard/prodrive/atlas/data.vbt +++ b/src/mainboard/prodrive/atlas/data.vbt Binary files differ -- To view, visit https://review.coreboot.org/c/coreboot/+/70154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aa34297a10bf16b9043140bff91fd3a8c4009d4 Gerrit-Change-Number: 70154 Gerrit-PatchSet: 3 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: vc/cavium/bdk/libbdk-arch/bdk-numa.c: Fix old-style function definition
by Elyes Haouas (Code Review) 02 Dec '22

02 Dec '22

Elyes Haouas has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/70256 ) Change subject: vc/cavium/bdk/libbdk-arch/bdk-numa.c: Fix old-style function definition ...................................................................... vc/cavium/bdk/libbdk-arch/bdk-numa.c: Fix old-style function definition Change-Id: Ia56f813933143ef69c97f1b7643693c6eade6abe Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/vendorcode/cavium/bdk/libbdk-arch/bdk-numa.c 1 file changed, 11 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/70256/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/70256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia56f813933143ef69c97f1b7643693c6eade6abe Gerrit-Change-Number: 70256 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: vc/cavium/bdk/libbdk-arch/bdk-numa.c: old-style function definition
by Elyes Haouas (Code Review) 02 Dec '22

02 Dec '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70256 ) Change subject: vc/cavium/bdk/libbdk-arch/bdk-numa.c: old-style function definition ...................................................................... vc/cavium/bdk/libbdk-arch/bdk-numa.c: old-style function definition Change-Id: Ia56f813933143ef69c97f1b7643693c6eade6abe Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/vendorcode/cavium/bdk/libbdk-arch/bdk-numa.c 1 file changed, 11 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/70256/1 diff --git a/src/vendorcode/cavium/bdk/libbdk-arch/bdk-numa.c b/src/vendorcode/cavium/bdk/libbdk-arch/bdk-numa.c index ede3b10..fb0af80 100644 --- a/src/vendorcode/cavium/bdk/libbdk-arch/bdk-numa.c +++ b/src/vendorcode/cavium/bdk/libbdk-arch/bdk-numa.c @@ -89,7 +89,7 @@ * * @return */ -extern int bdk_numa_is_only_one() +extern int bdk_numa_is_only_one(void) { /* FIXME(dhendrix): stub */ return 1; -- To view, visit https://review.coreboot.org/c/coreboot/+/70256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia56f813933143ef69c97f1b7643693c6eade6abe Gerrit-Change-Number: 70256 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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coreboot-gerrit December 2022