coreboot-gerrit January 2022

coreboot-gerrit@coreboot.org

1 participants
6716 discussions

Change in coreboot[master]: mb/google/brya: Use PAD config macro to add lock support
by Meera Ravindranath (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, EricR Lai. Hello build bot (Jenkins), Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60320 to look at the new patch set (#6). Change subject: mb/google/brya: Use PAD config macro to add lock support ...................................................................... mb/google/brya: Use PAD config macro to add lock support Use PAD config macro to add lock support for all the gpios used in CB:58352 CB:58353. BUG=b:211573253 TEST=Boot to OS, issue warm reboot and see no issue with any IP enumeration Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I558bab39f935ab31a89541c6498a73af70cbf9ee --- M src/mainboard/google/brya/variants/baseboard/brya/gpio.c 1 file changed, 41 insertions(+), 41 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/60320/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/60320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I558bab39f935ab31a89541c6498a73af70cbf9ee Gerrit-Change-Number: 60320 Gerrit-PatchSet: 6 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/herobrine: Initialize `pins` to fix the compilation issue
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60784 ) Change subject: mb/google/herobrine: Initialize `pins` to fix the compilation issue ...................................................................... mb/google/herobrine: Initialize `pins` to fix the compilation issue Fix compilation issue introduced with commit hash 8b63dac06 (google/herobrine: configure gpio to detect board ID) by initializing the gpio pins. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I084fec777b56f402efb3b04a1d358cd5b0891846 --- M src/mainboard/google/herobrine/boardid.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/60784/1 diff --git a/src/mainboard/google/herobrine/boardid.c b/src/mainboard/google/herobrine/boardid.c index ad90dd9..07ea362 100644 --- a/src/mainboard/google/herobrine/boardid.c +++ b/src/mainboard/google/herobrine/boardid.c @@ -10,7 +10,7 @@ uint32_t board_id(void) { static uint32_t id = UNDEFINED_STRAPPING_ID; - gpio_t pins[3]; + gpio_t pins[3] = { 0 }; if (CONFIG(BOARD_GOOGLE_HEROBRINE)) { pins[2] = GPIO(75); pins[1] = GPIO(74); -- To view, visit https://review.coreboot.org/c/coreboot/+/60784 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I084fec777b56f402efb3b04a1d358cd5b0891846 Gerrit-Change-Number: 60784 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains
by Curtis Chen (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: V Sowmya, Hou-hsun Lee, Tim Wawrzynczak, Kane Chen, Patrick Rudolph. Hello V Sowmya, build bot (Jenkins), Tim Wawrzynczak, Kane Chen, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60322 to look at the new patch set (#3). Change subject: soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains ...................................................................... soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains We support all the ADL-P 15W/28W/45W SKU's and map them with the latest VR configurations. These config values are generated by iPDG application with ADL-P platform package tool. RDC Kit ID for the iPDG tools * Intel(R) Platform Design Studio Installer: 610905 * Intel(R) Platform Design Studio - Libraries: 613643 * Intel(R) Platform Design Studio - Platform ADL-P (Partial): 627345 * Intel(R) Platform Design Studio - Platform ADL-P (Full): 630261 BUG=b:211365920 TEST=Build and check fsp log to confirm the settings are set properly. Signed-off-by: Curtis Chen <curtis.chen(a)intel.com> Change-Id: Ida7a6df0422a9a3972646cb3bdd0112b5efa2755 --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/chipset.cb M src/soc/intel/alderlake/vr_config.c 4 files changed, 52 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/60322/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60322 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida7a6df0422a9a3972646cb3bdd0112b5efa2755 Gerrit-Change-Number: 60322 Gerrit-PatchSet: 3 Gerrit-Owner: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hou-hsun Lee <hou-hsun.lee(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Hou-hsun Lee <hou-hsun.lee(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/alderlake: Add soc_get_cpu_rp_vw_idx() function
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60180 ) Change subject: soc/intel/alderlake: Add soc_get_cpu_rp_vw_idx() function ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60180 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e9710f0d210396f9306b948d9dce8b847300147 Gerrit-Change-Number: 60180 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 06:58:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60179 ) Change subject: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60179/comment/854bb9d4_5f229982 PS2, Line 9: srcclks nit: clk srcs? -- To view, visit https://review.coreboot.org/c/coreboot/+/60179 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aa14a634dcd90c4817009db970fb209ae02c63d Gerrit-Change-Number: 60179 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 06:58:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/guybrush/var/dewatt: Update unused GPIO pins
by Kenneth Chan (Code Review) 05 Jan '22

05 Jan '22

Kenneth Chan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60782 ) Change subject: mb/google/guybrush/var/dewatt: Update unused GPIO pins ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/guybrush/variants/dewatt/gpio.c: https://review.coreboot.org/c/coreboot/+/60782/comment/53df1aa4_6b9ce9d3 PS3, Line 91: } > adding a line without newline at end of file Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/60782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I552fd6af1cd827e4e41be1a954bf95c3afbb6a86 Gerrit-Change-Number: 60782 Gerrit-PatchSet: 3 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 06:48:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/alderlake: Check clkreq overlap
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Kane Chen, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60401 ) Change subject: soc/intel/alderlake: Check clkreq overlap ...................................................................... Patch Set 5: Code-Review+2 (1 comment) File src/soc/intel/alderlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/60401/comment/fea59041_c2b89335 PS5, Line 51: static > the reason is there are 2 pcie_rp_init call. > one is for cpu side and another one is or pch side. > And cpu/pch pcie are using same clkreq group. Yup, missed that too. -- To view, visit https://review.coreboot.org/c/coreboot/+/60401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2f701a19118f4702c227b17e43b6551591d9b344 Gerrit-Change-Number: 60401 Gerrit-PatchSet: 5 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 06:41:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: [WIP] drivers/intel/fsp2_0: Add support for FSP_NON_VOLATILE_STORAGE_...
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Anil Kumar K, Tim Wawrzynczak, Paul Menzel, Andrey Petrov, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59638 ) Change subject: [WIP] drivers/intel/fsp2_0: Add support for FSP_NON_VOLATILE_STORAGE_HOB2 ...................................................................... Patch Set 21: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59638/comment/a772d713_9257fdc1 PS21, Line 7: [WIP] remove [WIP] to fit the commit msg https://review.coreboot.org/c/coreboot/+/59638/comment/3204e63e_8046b2ba PS21, Line 9: FSP 2.3 spec introduced new HOB version for NV data storage. This patch : implements the changes to support this new HOB structure nit: help to write the purpose of this CL and the fall back path with older FSP spec. File src/drivers/intel/fsp2_0/include/fsp/util.h: https://review.coreboot.org/c/coreboot/+/59638/comment/dbed548d_9a4cbc3d PS21, Line 15: #include <efi/efi_datatype.h> order please ? File src/drivers/intel/fsp2_0/include/fsp/util.h: https://review.coreboot.org/c/coreboot/+/59638/comment/5ebf39f7_a685de1f PS19, Line 31: uint64_t > Hi Subrata. Added new CL for EFI_PHYSICAL_ADDRESS typedef […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/59638 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27647e9ac1a4902256b3f1c34b60e1f0b787a06e Gerrit-Change-Number: 59638 Gerrit-PatchSet: 21 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 06:39:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anil Kumar K <anil.kumar.k(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: include/efi/efi_datatype: Add typedef for EFI_PHYSICAL_ADDRESS
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Anil Kumar K, Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60778 ) Change subject: include/efi/efi_datatype: Add typedef for EFI_PHYSICAL_ADDRESS ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60778/comment/8434a681_83acfbbb PS2, Line 7: include/efi/ drop this, efi_datatype looks good -- To view, visit https://review.coreboot.org/c/coreboot/+/60778 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie09e337ee1790a06689681fca087edcfd89d215f Gerrit-Change-Number: 60778 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 06:37:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya/(anahera,primus): Use eNEM for CAR by default
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Felix Singer, David Wu, Tim Wawrzynczak, Angel Pons. Hello Felix Singer, build bot (Jenkins), David Wu, Paul Menzel, Tim Wawrzynczak, Angel Pons, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60739 to look at the new patch set (#2). Change subject: mb/google/brya/(anahera,primus): Use eNEM for CAR by default ...................................................................... mb/google/brya/(anahera,primus): Use eNEM for CAR by default More Brya variants like Anahera and Primus have migrated to use Alder Lake QS SoC which enables eNEM feature by default. Hence, select eNEM for CAR by default for these variants. BUG=b:168820083 TEST=Able to build and boot primus variant using eNEM mode. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I65d12de08adf85140976e1a7659ad7b684aa75c8 --- M src/mainboard/google/brya/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/60739/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65d12de08adf85140976e1a7659ad7b684aa75c8 Gerrit-Change-Number: 60739 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Wu <david_wu(a)quantatw.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: David Wu <david_wu(a)quantatw.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2022