coreboot-gerrit January 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/common/cse: Add config to disable CSE at pre-boot
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Felix Singer, Nico Huber, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60721 ) Change subject: soc/intel/common/cse: Add config to disable CSE at pre-boot ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/cse/Kconfig: https://review.coreboot.org/c/coreboot/+/60721/comment/90596f5c_7e76b7c9 PS2, Line 13: This config decides the state of CSE/Heci1 device at the end of boot. > > I also wouldn't use "CSE" in the name, since for me CSE refers to the firmware, some internals of […] @Felix, I will wait for your alignment prior to addressing the open comments in this CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/60721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e127816c506df3ac0cf973b69021d02d05bef4a Gerrit-Change-Number: 60721 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 05 Jan 2022 10:22:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/storo: Generate SPD ID for Samsung K4U6E3S4AA-MGCR
by Patrick Georgi (Code Review) 05 Jan '22

05 Jan '22

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60337 ) Change subject: mb/google/dedede/var/storo: Generate SPD ID for Samsung K4U6E3S4AA-MGCR ...................................................................... mb/google/dedede/var/storo: Generate SPD ID for Samsung K4U6E3S4AA-MGCR Add supported memory parts in the mem_parts_used.txt and generate the SPD ID for Samsung K4U6E3S4AA-MGCR. BUG=b:211950312 TEST=emerge-dedede coreboot Signed-off-by: Zhi Li <lizhi7(a)huaqin.corp-partner.google.com> Change-Id: Ic436db8fe3ef6fb8379ec629b128c05c691ea6fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/60337 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Reviewed-by: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/dedede/variants/storo/memory/Makefile.inc M src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt 3 files changed, 3 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Karthik Ramasubramanian: Looks good to me, approved zanxi chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc b/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc index 49e9263..2f5ba21 100644 --- a/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc @@ -4,6 +4,6 @@ # util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/storo/memory src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR SPD_SOURCES += spd/lp4x/set-1/spd-4.hex # ID = 1(0b0001) Parts = MT53E1G32D2NP-046 WT:A SPD_SOURCES += spd/lp4x/set-1/spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE diff --git a/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt index f450b73..e627949 100644 --- a/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt @@ -8,3 +8,4 @@ H9HCNNNBKMMLXR-NEE 0 (0000) MT53E1G32D2NP-046 WT:A 1 (0001) H9HCNNNCPMMLXR-NEE 2 (0010) +K4U6E3S4AA-MGCR 0 (0000) diff --git a/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt index 0d11f12..901ff7b 100644 --- a/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt @@ -13,3 +13,4 @@ H9HCNNNBKMMLXR-NEE MT53E1G32D2NP-046 WT:A H9HCNNNCPMMLXR-NEE +K4U6E3S4AA-MGCR 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/60337 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic436db8fe3ef6fb8379ec629b128c05c691ea6fe Gerrit-Change-Number: 60337 Gerrit-PatchSet: 6 Gerrit-Owner: Zhi Li <lizhi7(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya: Create agah variant
by Tony Huang (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Tim Wawrzynczak. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60785 to look at the new patch set (#2). Change subject: mb/google/brya: Create agah variant ...................................................................... mb/google/brya: Create agah variant Create the agah variant of the brya0 reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:210970640 BRANCH=None TEST=util/abuild/abuild -p none -t google/brya -x -a make sure the build includes GOOGLE_AGAH Change-Id: I6adcf4e8010969cf185513d68bb1b76ea08194c7 Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/variants/agah/include/variant/ec.h A src/mainboard/google/brya/variants/agah/include/variant/gpio.h A src/mainboard/google/brya/variants/agah/memory/Makefile.inc A src/mainboard/google/brya/variants/agah/memory/dram_id.generated.txt A src/mainboard/google/brya/variants/agah/memory/mem_parts_used.txt A src/mainboard/google/brya/variants/agah/overridetree.cb 8 files changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/60785/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60785 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6adcf4e8010969cf185513d68bb1b76ea08194c7 Gerrit-Change-Number: 60785 Gerrit-PatchSet: 2 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mainboard/starlabs: Add LabTop Mk IV
by Sean Rhodes (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Angel Pons. Hello build bot (Jenkins), Andy Pont, Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58428 to look at the new patch set (#82). Change subject: mainboard/starlabs: Add LabTop Mk IV ...................................................................... mainboard/starlabs: Add LabTop Mk IV Tested using MrChromeBox's `uefipayload_202107` branch: * Windows 10 * Ubuntu 20.04 * MX Linux 19.4 * Manjaro 21 No known issues. https://starlabs.systems/pages/labtop-mk-iv-specification Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Idbaa907dc38dc521961806132f21b7a90324ec9c --- M Documentation/mainboard/index.md A Documentation/mainboard/starlabs/labtop_cml.md M src/mainboard/starlabs/labtop/Kconfig M src/mainboard/starlabs/labtop/Kconfig.name M src/mainboard/starlabs/labtop/Makefile.inc M src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/devtree.c A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/gpio.c A src/mainboard/starlabs/labtop/variants/cml/hda_verb.c A src/mainboard/starlabs/labtop/variants/cml/romstage.c 19 files changed, 1,295 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/58428/82 -- To view, visit https://review.coreboot.org/c/coreboot/+/58428 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idbaa907dc38dc521961806132f21b7a90324ec9c Gerrit-Change-Number: 58428 Gerrit-PatchSet: 82 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS
by Frank Chu (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Anson Tseng, Frank Chu, Nick Vaccaro, Zhuohao Lee. Hello build bot (Jenkins), Anson Tseng, Tim Wawrzynczak, Nick Vaccaro, Nick Vaccaro, Zhuohao Lee, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59557 to look at the new patch set (#9). Change subject: mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS ...................................................................... mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS ALC5682-VD/ALC5682I-VS load different kernel driver by different hid name. Update hid name depending on the AUDIO_CODEC_SOURCE field of fw_config. Define FW_CONFIG bits 41 - 43 (SSFC bits 9 - 11) for codec selection. ALC5682-VD: _HID = "10EC5682" ALC5682I-VS: _HID = "RTL5682" BUG=b:204523176 BRANCH=volteer TEST=ALC5682-VD/ALC5682I-VS audio codec can work Signed-off-by: FrankChu <frank_chu(a)pegatron.corp-partner.google.com> Change-Id: Ieef638f78edd3428e572a76f06fb9c8757278971 --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/variants/delbin/Makefile.inc M src/mainboard/google/volteer/variants/delbin/overridetree.cb A src/mainboard/google/volteer/variants/delbin/variant.c 4 files changed, 45 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/59557/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/59557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieef638f78edd3428e572a76f06fb9c8757278971 Gerrit-Change-Number: 59557 Gerrit-PatchSet: 9 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Anson Tseng <ansontseng(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Anson Tseng <ansontseng(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common:[TEST] Enable Debug consent for Brya
by Sridhar Siricilla (Code Review) 05 Jan '22

05 Jan '22

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60786 ) Change subject: soc/intel/common:[TEST] Enable Debug consent for Brya ...................................................................... soc/intel/common:[TEST] Enable Debug consent for Brya Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: Ife36ff54f926a49f2d3f092f52e3fb8a15304972 --- M src/mainboard/google/brya/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/60786/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 5169324..639908d 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -34,6 +34,7 @@ select PMC_IPC_ACPI_INTERFACE select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3 select SOC_INTEL_CSE_LITE_SKU + select SOC_INTEL_DEBUG_CONSENT config BOARD_GOOGLE_BASEBOARD_BRYA def_bool n -- To view, visit https://review.coreboot.org/c/coreboot/+/60786 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife36ff54f926a49f2d3f092f52e3fb8a15304972 Gerrit-Change-Number: 60786 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common/gpio: Rework PAD config macro to add lock support
by EricR Lai (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, Angel Pons, Meera Ravindranath, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60774 ) Change subject: soc/intel/common/gpio: Rework PAD config macro to add lock support ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/common/block/include/intelblocks/gpio_defs.h: https://review.coreboot.org/c/coreboot/+/60774/comment/3028d7dd_2edf892a PS4, Line 203: PWROK should we use RSMRST here? -- To view, visit https://review.coreboot.org/c/coreboot/+/60774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf8b0a845005ad545266d995449d0aa711f45a61 Gerrit-Change-Number: 60774 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 09:13:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function
by Subrata Banik (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60179 ) Change subject: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > this is my concerns, what if FSP changed the map? good point, we should ask to document it. -- To view, visit https://review.coreboot.org/c/coreboot/+/60179 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aa14a634dcd90c4817009db970fb209ae02c63d Gerrit-Change-Number: 60179 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 05 Jan 2022 09:03:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function
by EricR Lai (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60179 ) Change subject: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > If I'm not wrong, we have referred the same from ref platform code of FSP. this is my concerns, what if FSP changed the map? -- To view, visit https://review.coreboot.org/c/coreboot/+/60179 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aa14a634dcd90c4817009db970fb209ae02c63d Gerrit-Change-Number: 60179 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 08:48:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Create agah variant
by Tony Huang (Code Review) 05 Jan '22

05 Jan '22

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60785 ) Change subject: mb/google/brya: Create agah variant ...................................................................... mb/google/brya: Create agah variant Create the agah variant of the brya0 reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:210970640 BRANCH=None TEST=util/abuild/abuild -p none -t google/brya -x -a make sure the build includes GOOGLE_AGAH Change-Id: I6adcf4e8010969cf185513d68bb1b76ea08194c7 Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/variants/agah/include/variant/ec.h A src/mainboard/google/brya/variants/agah/include/variant/gpio.h A src/mainboard/google/brya/variants/agah/memory/Makefile.inc A src/mainboard/google/brya/variants/agah/memory/dram_id.generated.txt A src/mainboard/google/brya/variants/agah/memory/mem_parts_used.txt A src/mainboard/google/brya/variants/agah/overridetree.cb 8 files changed, 44 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/60785/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 5169324..297352d 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -145,6 +145,7 @@ default "Taniks" if BOARD_GOOGLE_TANIKS default "Nivviks" if BOARD_GOOGLE_NIVVIKS default "Nereid" if BOARD_GOOGLE_NEREID + default "Agah" if BOARD_GOOGLE_AGAH config VARIANT_DIR default "brya0" if BOARD_GOOGLE_BRYA0 @@ -166,6 +167,7 @@ default "taniks" if BOARD_GOOGLE_TANIKS default "nivviks" if BOARD_GOOGLE_NIVVIKS default "nereid" if BOARD_GOOGLE_NEREID + default "agah" if BOARD_GOOGLE_AGAH config VBOOT select VBOOT_EARLY_EC_SYNC diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index e2a4a9e..2aa96ec 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -143,3 +143,6 @@ config BOARD_GOOGLE_NEREID bool "-> Nereid" select BOARD_GOOGLE_BASEBOARD_NISSA +config BOARD_GOOGLE_AGAH + bool "-> Agah" + select BOARD_GOOGLE_BASEBOARD_BRYA diff --git a/src/mainboard/google/brya/variants/agah/include/variant/ec.h b/src/mainboard/google/brya/variants/agah/include/variant/ec.h new file mode 100644 index 0000000..7a2a6ff --- /dev/null +++ b/src/mainboard/google/brya/variants/agah/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/brya/variants/agah/include/variant/gpio.h b/src/mainboard/google/brya/variants/agah/include/variant/gpio.h new file mode 100644 index 0000000..c4fe342 --- /dev/null +++ b/src/mainboard/google/brya/variants/agah/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +#endif diff --git a/src/mainboard/google/brya/variants/agah/memory/Makefile.inc b/src/mainboard/google/brya/variants/agah/memory/Makefile.inc new file mode 100644 index 0000000..eace2e4 --- /dev/null +++ b/src/mainboard/google/brya/variants/agah/memory/Makefile.inc @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder diff --git a/src/mainboard/google/brya/variants/agah/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/agah/memory/dram_id.generated.txt new file mode 100644 index 0000000..fa24790 --- /dev/null +++ b/src/mainboard/google/brya/variants/agah/memory/dram_id.generated.txt @@ -0,0 +1 @@ +DRAM Part Name ID to assign diff --git a/src/mainboard/google/brya/variants/agah/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/agah/memory/mem_parts_used.txt new file mode 100644 index 0000000..9621137 --- /dev/null +++ b/src/mainboard/google/brya/variants/agah/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.inc and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb new file mode 100644 index 0000000..4f2c04a --- /dev/null +++ b/src/mainboard/google/brya/variants/agah/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/alderlake + + device domain 0 on + end + +end -- To view, visit https://review.coreboot.org/c/coreboot/+/60785 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6adcf4e8010969cf185513d68bb1b76ea08194c7 Gerrit-Change-Number: 60785 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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