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Change subject: soc/mediatek/mt8186: revise wrong setting of devapc
......................................................................
soc/mediatek/mt8186: revise wrong setting of devapc
We need to protect debugsys for firmware image without serial console.
Original settings for protecting debugsys is wrong which will cause some
hardware modules failed to set their registers correctly.
BUG=b:213125558
TEST=all modules work normally using image without serial console.
Signed-off-by: Runyang Chen <runyang.chen(a)mediatek.corp-partner.google.com>
Change-Id: Ibce626386ac1f8de42f8717c4ad9ba403640b3ec
---
M src/soc/mediatek/mt8186/devapc.c
M src/soc/mediatek/mt8186/include/soc/devapc.h
2 files changed, 9 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/60833/3
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek/mt8186: initialize DFD
......................................................................
soc/mediatek/mt8186: initialize DFD
DFD (Design for Debug) is a debugging tool, which scans flip-flops
and dumps to internal RAM on the WDT reset. After system reboots,
those values can be shown for debugging using MTK internal parsing
tools.
BUG=b:202871018
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I7b711755022b5d9767019611151fea65e71edc66
---
M src/soc/mediatek/mt8186/Makefile.inc
A src/soc/mediatek/mt8186/include/soc/dfd.h
M src/soc/mediatek/mt8186/soc.c
3 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/60828/2
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Change subject: soc/intel/common/gpio: Perform GPIO PAD lock outside SMM
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60801/comment/5641d3a0_9b8ff5b4
PS1, Line 9: This patch performs GPIO PAD lock configuration in non-smm
: mode. Typically, coreboot enables SMI at latest boot phase
: post FSP-S, hence, FSP-S might get chance to perform GPP lock
: configuration. With this code changes, coreboot can be able to
: perform GPIO PAD lock configuration early in the boot flow,
: prior to calling FSP-S.
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Change subject: mb/google/dedede/var/boten: Add Wifi SAR for bookem
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60399/comment/ba98e423_cef2cfc3
PS1, Line 9: Add new sku id apply for bookem wifi sar table.
> Sorry, correct as below. […]
Done
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Change subject: mb/google/brya/var/primus4es: reconfig USE_PM_ACPI_TIMER
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60417/comment/c96e68cc_f23582ed
PS2, Line 9: Config USE_PM_ACPI_TIMER to y for primus4es only as
: commit 1ce0f3aab7 (mb/google/brya: Fix S0i3 regression)
: breaks suspend stress test on ES CPU SKU.
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Change subject: mb/google/guybrush/var/dewatt: update USB3 settings for passing SI
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60809/comment/7a4c93ce_23ec3a5c
PS2, Line 7: update
Nit: Could start with capital letter: Update.
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Change subject: soc/mediatek/mt8186: revise wrong setting of devapc
......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60833/comment/12a2ffe7_fb1f8f4d
PS1, Line 9: MP image
What is an MP image?
https://review.coreboot.org/c/coreboot/+/60833/comment/bc94a1e7_4316f1ff
PS1, Line 9: but original setting for
: protecting debugsys is wrong
Is done at the wrong time? Please elaborate.
https://review.coreboot.org/c/coreboot/+/60833/comment/dc5b733e_c8a91070
PS1, Line 10: Therefore, we send this fixup patch
: to fix it.
This sentence is not needed.
https://review.coreboot.org/c/coreboot/+/60833/comment/e19a562e_50e9a42e
PS1, Line 14: TEST=enter kernel without error using no console serial image
Please mention the problematic observation at the beginning of the commit message.
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