coreboot-gerrit August 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/apollolake: add 4Gb and 6Gb dram density
by Jamie Chen (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Furquan Shaikh, Kane Chen. Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55153 ) Change subject: soc/intel/apollolake: add 4Gb and 6Gb dram density ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/55153 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0d5d14f26a30da7a9caf4ef43d7fac88a4d2bf1 Gerrit-Change-Number: 55153 Gerrit-PatchSet: 3 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Comment-Date: Tue, 03 Aug 2021 07:18:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by Yu-Ping Wu (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Hung-Te Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56764 ) Change subject: soc/mediatek/mt8195: Add devapc basic drivers ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Gerrit-Change-Number: 56764 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 03 Aug 2021 06:57:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by Rex-BC Chen (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56764 ) Change subject: soc/mediatek/mt8195: Add devapc basic drivers ...................................................................... Patch Set 3: (19 comments) File src/soc/mediatek/mt8195/devapc.c: https://review.coreboot.org/c/coreboot/+/56764/comment/b82579c3_f0529c7e PS2, Line 44: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/f55a32bd_8081c577 PS2, Line 51: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/bb4f6b77_a85a4764 PS2, Line 63: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/b86c7fe8_86ac1b08 PS2, Line 67: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/638916de_a1692057 PS2, Line 69: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/ebee2eae_02ae62a4 PS2, Line 88: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/67966899_148930e7 PS2, Line 1282: SEC_RW_ONLY, FORBIDDEN15), > code indent should use tabs where possible Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/9744926e_e8ebb465 PS2, Line 1282: SEC_RW_ONLY, FORBIDDEN15), > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/0b724a4b_6be780d6 PS2, Line 1282: SEC_RW_ONLY, FORBIDDEN15), > please, no space before tabs Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/3f3931d3_c8591222 PS2, Line 1439: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/067f28c5_2403790f PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/b3179dd5_007d88a9 PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > code indent should use tabs where possible Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/f4fad10b_d32475cd PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > please, no space before tabs Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/4f78906d_8355005d PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/e21d5a31_42316a65 PS2, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", > code indent should use tabs where possible Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/eca43283_ee5048ef PS2, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", > please, no space before tabs Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/7258da51_acf2ace4 PS2, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/e2b0008b_317c09ce PS2, Line 1508: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/56764/comment/904497eb_ccefe661 PS2, Line 1517: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), > line over 96 characters Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/56764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Gerrit-Change-Number: 56764 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 03 Aug 2021 05:28:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by build bot (Jenkins) (Code Review) 03 Aug '21

03 Aug '21

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Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by Rex-BC Chen (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Hello Hung-Te Lin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56764 to look at the new patch set (#3). Change subject: soc/mediatek/mt8195: Add devapc basic drivers ...................................................................... soc/mediatek/mt8195: Add devapc basic drivers Add basic devapc (device access permission control) drivers. DAPC driver is used to set up bus fabric security and data protection among hardwares. DAPC driver groups the master hardwares into different domains and gives secure and non-secure property. The slave hardware can configure different access permissions for different domains via DAPC driver. 1. Initialize devapc. 2. Set master domain and secure side band. 3. Set domain remap. 4. Set default permission. Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Signed-off-by: Nina Wu <nina-cm.wu(a)mediatek.com> --- M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/devapc.c A src/soc/mediatek/mt8195/include/soc/devapc.h M src/soc/mediatek/mt8195/soc.c 4 files changed, 2,068 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/56764/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Gerrit-Change-Number: 56764 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by build bot (Jenkins) (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56764 ) Change subject: soc/mediatek/mt8195: Add devapc basic drivers ...................................................................... Patch Set 2: (27 comments) File src/soc/mediatek/mt8195/devapc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/196b6ffa_35a81396 PS2, Line 44: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/03fc7d03_5728999a PS2, Line 51: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/d1db8660_d1cde8d4 PS2, Line 63: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/deab8869_92926d02 PS2, Line 67: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/5dc62d58_9370e84b PS2, Line 69: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/76174734_6b9b8c4a PS2, Line 88: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/05f3d71a_2ba2b199 PS2, Line 1282: SEC_RW_ONLY, FORBIDDEN15), code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/2ed01b75_312d8b48 PS2, Line 1282: SEC_RW_ONLY, FORBIDDEN15), please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/99562820_aff62bda PS2, Line 1282: SEC_RW_ONLY, FORBIDDEN15), please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/3f9e5722_f20469bd PS2, Line 1439: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/00aca720_7ddfd33c PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/25d33ae8_7c07db8b PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/f3b0f23c_12bfaf50 PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/413a6aa6_31204684 PS2, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/9ad3d461_31274a37 PS2, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/0fe6383d_5eaee648 PS2, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/425cb8d3_c96db708 PS2, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/28ac38bb_bf1fb2fd PS2, Line 1508: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/b67657f8_790e3d14 PS2, Line 1517: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters File src/soc/mediatek/mt8195/include/soc/devapc.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/0b0736b3_6b09f5a3 PS2, Line 72: #define DAPC_PERM_ATTR_4(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/012e6036_49c42957 PS2, Line 77: #define DAPC_PERM_ATTR_8(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/a28231be_31618d15 PS2, Line 85: #define DAPC_PERM_ATTR_16(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/e0922488_393af304 PS2, Line 99: #define FORBIDDEN3 FORBIDDEN, FORBIDDEN, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/42d2a1d9_0e0b8726 PS2, Line 100: #define FORBIDDEN7 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/4ccd1e1d_c1533f8d PS2, Line 102: #define FORBIDDEN12 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/a10a83b3_98b1b3c1 PS2, Line 105: #define FORBIDDEN13 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125575): https://review.coreboot.org/c/coreboot/+/56764/comment/6dc86d0e_d9d12c18 PS2, Line 108: #define FORBIDDEN15 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/56764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Gerrit-Change-Number: 56764 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Tue, 03 Aug 2021 05:18:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by Rex-BC Chen (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56764 to look at the new patch set (#2). Change subject: soc/mediatek/mt8195: Add devapc basic drivers ...................................................................... soc/mediatek/mt8195: Add devapc basic drivers Add basic devapc (device access permission control) drivers. DAPC driver is used to set up bus fabric security and data protection among hardwares. DAPC driver groups the master hardwares into different domains and gives secure and non-secure property. The slave hardware can configure different access permissions for different domains via DAPC driver. 1. Initialize devapc. 2. Set master domain and secure side band. 3. Set domain remap. 4. Set default permission. Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Signed-off-by: Nina Wu <nina-cm.wu(a)mediatek.com> --- M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/devapc.c A src/soc/mediatek/mt8195/include/soc/devapc.h M src/soc/mediatek/mt8195/soc.c 4 files changed, 2,052 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/56764/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Gerrit-Change-Number: 56764 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by build bot (Jenkins) (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Hung-Te Lin. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56764 ) Change subject: soc/mediatek/mt8195: Add devapc basic drivers ...................................................................... Patch Set 1: (34 comments) File src/soc/mediatek/mt8195/devapc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/62247c2d_dbbcbfbb PS1, Line 44: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/e30e61b9_6974a333 PS1, Line 51: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/fe3155b9_63a8d72b PS1, Line 63: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/31df1a4b_7693aa17 PS1, Line 67: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/f58a67db_00a1bae2 PS1, Line 69: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/b48eb0a0_98756a7a PS1, Line 88: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/6ec09f6d_370ceba3 PS1, Line 1282: SEC_RW_ONLY, FORBIDDEN15), code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/5f8f8cc8_d4646c8c PS1, Line 1282: SEC_RW_ONLY, FORBIDDEN15), please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/474ef746_83124a0a PS1, Line 1282: SEC_RW_ONLY, FORBIDDEN15), please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/c7dfca2e_a2b34871 PS1, Line 1439: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/70adc9e5_75d03514 PS1, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/5effa49a_1fbfcdde PS1, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/52700756_1b367852 PS1, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/d9238040_e09e998c PS1, Line 1477: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/ed8a177c_eaf8349c PS1, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/81e99de1_987903ed PS1, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/05872ff3_5272d58b PS1, Line 1478: DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/71b06870_0de5062b PS1, Line 1508: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/66ba2c37_345434eb PS1, Line 1517: NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), line over 96 characters File src/soc/mediatek/mt8195/include/soc/devapc.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/b1e4b333_09dc2561 PS1, Line 72: #define DAPC_PERM_ATTR_4(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/d6d59b64_d583b7e0 PS1, Line 77: #define DAPC_PERM_ATTR_8(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/e98651f9_9cb62935 PS1, Line 85: #define DAPC_PERM_ATTR_16(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/9ca26ec9_f3a483f3 PS1, Line 99: #define FORBIDDEN3 FORBIDDEN, FORBIDDEN, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/c97b7a8a_ebcd0c67 PS1, Line 100: #define FORBIDDEN7 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/ee801036_69e0540a PS1, Line 102: #define FORBIDDEN12 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/e5eb92b8_ef2a5c5f PS1, Line 105: #define FORBIDDEN13 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/b818c049_61e730cb PS1, Line 108: #define FORBIDDEN15 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/08d31495_613b69fa PS1, Line 127: #define DAPC_INFRA_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} space required after that close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/7595f5be_f65ae955 PS1, Line 128: #define DAPC_INFRA_AO_SYS1_ATTR(...) {{ DAPC_PERM_ATTR_4(__VA_ARGS__) }} space required after that close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/cc6072d5_5265de15 PS1, Line 129: #define DAPC_INFRA_AO_SYS2_ATTR(...) {{ DAPC_PERM_ATTR_4(__VA_ARGS__) }} space required after that close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/a54b57af_8526105a PS1, Line 130: #define DAPC_PERI_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} space required after that close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/aacee78b_d249e187 PS1, Line 131: #define DAPC_PERI_AO_SYS1_ATTR(...) {{ DAPC_PERM_ATTR_8(__VA_ARGS__) }} space required after that close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/57d946ff_4b6bb185 PS1, Line 132: #define DAPC_PERI2_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} space required after that close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125574): https://review.coreboot.org/c/coreboot/+/56764/comment/12393577_be068d00 PS1, Line 133: #define DAPC_PERI_PAR_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} space required after that close brace '}' -- To view, visit https://review.coreboot.org/c/coreboot/+/56764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Gerrit-Change-Number: 56764 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 03 Aug 2021 05:14:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/mt8195: Add devapc basic drivers
by Rex-BC Chen (Code Review) 03 Aug '21

03 Aug '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56764 ) Change subject: soc/mediatek/mt8195: Add devapc basic drivers ...................................................................... soc/mediatek/mt8195: Add devapc basic drivers Add basic devapc (device access permission control) drivers. DAPC driver is used to set up bus fabric security and data protection among hardwares. DAPC driver groups the master hardwares into different domains and gives secure and non-secure property. The slave hardware can configure different access permissions for different domains via DAPC driver. 1. Initialize devapc. 2. Set master domain and secure side band. 3. Set domain remap. 4. Set default permission. Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Signed-off-by: Nina Wu <nina-cm.wu(a)mediatek.com> --- M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/devapc.c A src/soc/mediatek/mt8195/include/soc/devapc.h M src/soc/mediatek/mt8195/soc.c 4 files changed, 2,052 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/56764/1 diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index 78766a9..5cac723 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -51,6 +51,7 @@ ramstage-y += ../common/auxadc.c ramstage-y += ../common/ddp.c ddp.c +ramstage-y += devapc.c ramstage-y += ../common/dpm.c ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += dpm_4ch.c ramstage-y += dp_intf.c dptx.c dptx_hal.c diff --git a/src/soc/mediatek/mt8195/devapc.c b/src/soc/mediatek/mt8195/devapc.c new file mode 100644 index 0000000..18ba701 --- /dev/null +++ b/src/soc/mediatek/mt8195/devapc.c @@ -0,0 +1,1871 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <soc/devapc.h> + +static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = { + /* 0 */ + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-4", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APMIXEDSYS_APB_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("APMIXEDSYS_APB_S-1", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("TOPCKGEN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("INFRACFG_AO_APB_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("INFRACFG_AO_MEM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PERICFG_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 10 */ + DAPC_INFRA_AO_SYS0_ATTR("GPIO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TOPRGU_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DSP_IRQ_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DEVICE_APC_INFRA_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("BCRM_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DEBUG_CTRL_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("AP_CIRQ_EINT_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PMIC_WRAP_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_INFRA_AO_SYS0_ATTR("KP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TOP_MISC_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_INFRA_AO_SYS0_ATTR("DVFSRC_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_INFRA_AO_SYS0_ATTR("MBIST_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("HDMI_CEC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("HDMI_EDID_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("HDMI_SCDC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("IRRX_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SYS_TIMER_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_INFRA_AO_SYS0_ATTR("MODEM_TEMP_SHARE_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PMIF1_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_INFRA_AO_SYS0_ATTR("PMICSPI_MST_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + /* 30 */ + DAPC_INFRA_AO_SYS0_ATTR("TIA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TOPCKGEN_INFRA_CFG_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DRM_DEBUG_TOP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("EFUSE_DEBUG_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APXGPT_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SEJ_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("AES_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SECURITY_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SPMI_MST_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_INFRA_AO_SYS0_ATTR("DEBUG_CTRL_FMEM_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 40 */ + DAPC_INFRA_AO_SYS0_ATTR("BCRM_FMEM_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DEVICE_APC_FMEM_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PWM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PMSR_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SRCLKEN_RC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-3", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-4", + NO_PROTECTION, FORBIDDEN15), + /* 50 */ + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-5", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-6", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-7", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-8", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-3", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-4", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-5", + NO_PROTECTION, FORBIDDEN15), + /* 60 */ + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-1", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-2", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-3", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-4", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_INFRA_AO_SYS0_ATTR("L3C_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("L3C_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("L3C_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("NNA0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("NNA1_S", + NO_PROTECTION, FORBIDDEN15), + /* 70 */ + DAPC_INFRA_AO_SYS0_ATTR("NNA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PCIE0_AXI_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PCIE1_AXI_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB4_S", + NO_PROTECTION, FORBIDDEN15), +}; + +static const struct apc_infra_peri_dom_4 infra_ao_sys1_devices[] = { + /* 0 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-1", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-2", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-3", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-4", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-5", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-6", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-7", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-8", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-9", + NO_PROTECTION, FORBIDDEN3), + /* 10 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-10", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-11", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-12", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-13", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-14", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-15", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-16", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-17", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-18", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-19", + NO_PROTECTION, FORBIDDEN3), + /* 20 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-20", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-21", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-22", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-23", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-24", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-25", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-26", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-27", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-28", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-29", + NO_PROTECTION, FORBIDDEN3), + /* 30 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-30", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-31", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-32", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-33", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-34", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-35", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-36", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-37", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-38", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-39", + NO_PROTECTION, FORBIDDEN3), + /* 40 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-40", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-41", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-42", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-43", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-44", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-45", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-46", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-47", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-48", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-49", + NO_PROTECTION, FORBIDDEN3), + /* 50 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-50", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-51", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-52", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-53", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-54", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-55", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-56", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-57", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-58", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-59", + NO_PROTECTION, FORBIDDEN3), + /* 60 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-60", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-61", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-62", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-63", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-64", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-65", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-66", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-67", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-68", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-69", + NO_PROTECTION, FORBIDDEN3), + /* 70 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-70", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-71", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-72", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-73", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-74", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-75", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-76", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-77", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-78", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-79", + NO_PROTECTION, FORBIDDEN3), + /* 80 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-80", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-81", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-82", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-83", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-84", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-85", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-86", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-87", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-88", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-89", + NO_PROTECTION, FORBIDDEN3), + /* 90 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-90", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-91", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-92", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-93", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-94", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-95", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-96", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-97", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-98", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-99", + NO_PROTECTION, FORBIDDEN3), + /* 100 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-100", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-101", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-102", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-103", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-104", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-105", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-106", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-107", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-108", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-109", + NO_PROTECTION, FORBIDDEN3), + /* 110 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-110", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-111", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-1", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-2", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-3", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-4", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-5", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-6", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-7", + NO_PROTECTION, FORBIDDEN3), + /* 120 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-8", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-9", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-10", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-11", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-12", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-13", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-14", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-15", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-16", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-17", + NO_PROTECTION, FORBIDDEN3), + /* 130 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-18", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-19", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-20", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-21", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-22", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-23", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-24", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-25", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-26", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-27", + NO_PROTECTION, FORBIDDEN3), + /* 140 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-28", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-29", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-30", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-31", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-32", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-33", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-34", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-35", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-36", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-37", + NO_PROTECTION, FORBIDDEN3), + /* 150 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-38", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-39", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-40", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-41", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-42", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-43", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-44", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-45", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-46", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-47", + NO_PROTECTION, FORBIDDEN3), + /* 160 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-48", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-49", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-50", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-51", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-52", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-53", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-54", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-55", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-56", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-57", + NO_PROTECTION, FORBIDDEN3), + /* 170 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-58", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-59", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-60", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-61", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-62", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-63", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-64", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-65", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-66", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-67", + NO_PROTECTION, FORBIDDEN3), + /* 180 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-68", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-69", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-70", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-71", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-72", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-73", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-74", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-75", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-76", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-77", + NO_PROTECTION, FORBIDDEN3), + /* 190 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-78", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-79", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-80", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-81", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-82", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-83", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-84", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-85", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-86", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-87", + NO_PROTECTION, FORBIDDEN3), + /* 200 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-88", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-89", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-90", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-91", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-92", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-93", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-94", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-95", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-96", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-97", + NO_PROTECTION, FORBIDDEN3), + /* 210 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-98", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-99", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-100", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-101", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-102", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-103", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-104", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-105", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-106", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-107", + NO_PROTECTION, FORBIDDEN3), + /* 220 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-108", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-109", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-110", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-111", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-112", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-113", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-114", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-115", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-116", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-117", + NO_PROTECTION, FORBIDDEN3), + /* 230 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-118", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-119", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-120", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-121", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-122", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-123", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-124", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-125", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-126", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-127", + NO_PROTECTION, FORBIDDEN3), + /* 240 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-128", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-129", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-130", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-131", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-132", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-133", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-134", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-135", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-136", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-137", + NO_PROTECTION, FORBIDDEN3), + /* 250 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-138", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-139", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-140", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-141", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-142", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-143", + NO_PROTECTION, FORBIDDEN3), +}; + +static const struct apc_infra_peri_dom_4 infra_ao_sys2_devices[] = { + /* 0 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-144", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-145", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-146", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-147", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-148", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-149", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-150", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-151", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-152", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-153", + NO_PROTECTION, FORBIDDEN3), + /* 10 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-154", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-155", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-156", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-157", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-158", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-159", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-160", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-161", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-162", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-163", + NO_PROTECTION, FORBIDDEN3), + /* 20 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-164", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-165", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-166", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-167", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-168", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-169", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-170", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-171", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-172", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-173", + NO_PROTECTION, FORBIDDEN3), + /* 30 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-174", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-175", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-176", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-177", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-178", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-179", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-180", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-181", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-182", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-183", + NO_PROTECTION, FORBIDDEN3), + /* 40 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-184", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-185", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-186", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-187", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-188", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-189", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-190", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-191", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-192", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-193", + NO_PROTECTION, FORBIDDEN3), + /* 50 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-194", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-195", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-196", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-197", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-198", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-199", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-200", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-201", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-202", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-203", + NO_PROTECTION, FORBIDDEN3), + /* 60 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-204", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-205", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-206", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-207", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-208", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-209", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-210", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-211", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-212", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-213", + NO_PROTECTION, FORBIDDEN3), + /* 70 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-214", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-215", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-216", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-217", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-218", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-219", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-220", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-221", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-222", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-223", + NO_PROTECTION, FORBIDDEN3), + /* 80 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-224", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-225", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-226", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-227", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-228", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-229", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-230", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-231", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-232", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-233", + NO_PROTECTION, FORBIDDEN3), + /* 90 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-234", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-235", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-236", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-237", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-238", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-239", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-240", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-241", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-242", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-243", + NO_PROTECTION, FORBIDDEN3), + /* 100 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-244", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-245", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-246", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-247", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-248", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-249", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-250", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-251", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-252", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-253", + NO_PROTECTION, FORBIDDEN3), + /* 110 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-254", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-255", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-256", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-257", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-258", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-259", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-260", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-261", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-262", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-263", + NO_PROTECTION, FORBIDDEN3), + /* 120 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-264", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-265", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-266", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-267", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-268", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-269", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-270", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-271", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-272", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-273", + NO_PROTECTION, FORBIDDEN3), + /* 130 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-274", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-275", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-276", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-277", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-278", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-279", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-280", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-281", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-282", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-283", + NO_PROTECTION, FORBIDDEN3), + /* 140 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-284", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-285", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-286", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-287", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-288", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-289", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-290", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-291", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-292", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-293", + NO_PROTECTION, FORBIDDEN3), + /* 150 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-294", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-295", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-296", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-297", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-298", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-299", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-300", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-301", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-302", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-303", + NO_PROTECTION, FORBIDDEN3), + /* 160 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-304", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-305", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-306", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-307", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-308", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-309", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-310", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-311", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-312", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-313", + NO_PROTECTION, FORBIDDEN3), + /* 170 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-314", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-315", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-316", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-317", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-318", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-319", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-320", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-321", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-322", + NO_PROTECTION, FORBIDDEN3), +}; + +static const struct apc_infra_peri_dom_16 peri_ao_sys0_devices[] = { + /* 0 */ + DAPC_PERI_AO_SYS0_ATTR("DEVICE_APC_PERI_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("BCRM_PERI_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DEBUG_CTRL_PERI_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-1", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-2", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-3", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-4", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-5", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-6", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + /* 10 */ + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-7", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-8", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-9", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-10", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("SSUSB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("SSUSB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("SSUSB_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DEBUGSYS_APB_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S0_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S1_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("NOR_AXI_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 30 */ + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + /* 40 */ + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + /* 50 */ + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF2_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF2_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF3_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF3_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF4_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF4_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF5_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF5_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("SSC_INFRA_APB0_S", + NO_PROTECTION, FORBIDDEN15), + /* 60 */ + DAPC_PERI_AO_SYS0_ATTR("SSC_INFRA_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DEVICE_MPU_ACP_APB_S", + NO_PROTECTION, FORBIDDEN15), +}; + +static const struct apc_infra_peri_dom_8 peri_ao_sys1_devices[] = { + /* 0 */ + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-1", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-2", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-3", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-4", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-5", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-6", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-7", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-8", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-9", + NO_PROTECTION, FORBIDDEN7), + /* 10 */ + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-10", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-11", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-12", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-13", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-14", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-15", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-16", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-17", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-18", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-19", + NO_PROTECTION, FORBIDDEN7), + /* 20 */ + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-20", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-21", + NO_PROTECTION, FORBIDDEN7), + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-22", + NO_PROTECTION, FORBIDDEN7), +}; + +static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = { + /* 0 */ + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_PERI_AO2_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_PERI_AO2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_CTRL_PERI_AO2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB1_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB6_S", + NO_PROTECTION, FORBIDDEN15), + /* 10 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB10_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB11_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB12_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB13_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB14_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB15_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB0_S", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB6_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB0_S", + NO_PROTECTION, FORBIDDEN15), + /* 30 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB6_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB10_S", + NO_PROTECTION, FORBIDDEN15), + /* 40 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB11_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB12_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB13_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB14_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB15_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB4_S", + NO_PROTECTION, FORBIDDEN15), + /* 50 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB6_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB10_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB11_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB12_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB13_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB14_S", + NO_PROTECTION, FORBIDDEN15), + /* 60 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB15_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SYS_CIRQ_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_INFRA_PDN_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_TRACKER_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 70 */ + DAPC_PERI2_AO_SYS0_ATTR("CCIF0_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CCIF0_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CCIF1_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CCIF1_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("MBIST_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_PDN_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI2_AO_SYS0_ATTR("TRNG_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCPU_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCPU_NS_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CQ_DMA_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 80 */ + DAPC_PERI2_AO_SYS0_ATTR("SRAMROM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_MEM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("ECC_TOP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCE_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCE_M2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SYS_CIRQ1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SYS_CIRQ2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_TRACKER_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB1_S", + NO_PROTECTION, FORBIDDEN15), + /* 90 */ + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("EMI_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_MPU_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("APDMA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_TRACKER_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_INFRA_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_PERI_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 100 */ + DAPC_PERI2_AO_SYS0_ATTR("BCRM_PERI_PDN2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_PERI_PDN_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_PERI_PDN2_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_FMEM_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("FAKE_ENGINE_1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("FAKE_ENGINE_0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("PERI_FAST_M_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("PERI_SLOW_M_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("EMI_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 110 */ + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_MPU_PDN_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("MBIST_PDN_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_MEM_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_SUB_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_CTRL_SUB_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_SUB_INFRA_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SSC_SUB_INFRA_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SSC_SUB_INFRA_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_AO_MEM_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SUB_FAKE_ENGINE_MM_S", + NO_PROTECTION, FORBIDDEN15), + /* 120 */ + DAPC_PERI2_AO_SYS0_ATTR("SUB_FAKE_ENGINE_MDP_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_SUB_INFRA_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), +}; + +static const struct apc_infra_peri_dom_16 peri_par_ao_sys0_devices[] = { + /* 0 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("UFS_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UFS_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UFS_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UFS_S-3", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("MSDC0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("MSDC1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("MSDC2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PCIE0_AHB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PCIE1_AHB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_P1_S", + NO_PROTECTION, FORBIDDEN15), + /* 10 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_P2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_P3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("AUXADC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART0_APB_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART3_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART5_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI0_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("PTP_THERM_CTRL_APB_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_PERI_PAR_AO_SYS0_ATTR("PERI_MBIST_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DISP_PWM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DISP_PWM1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SNPS_MAC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI3_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI5_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 30 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("SPIS0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPIS1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("NFI_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("NFIECC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("I2S_DMA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("I2S_DMA1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("BCRM_PERI_PAR_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DEVICE_APC_PERI_PAR_PDN_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PTP_THERM_CTRL2_APB_S", + NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN), + DAPC_PERI_PAR_AO_SYS0_ATTR("IIC_P2P_REMAP_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 40 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("NOR_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PERICFG2_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DEVICE_APC_PERI_PAR_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DEBUG_CTRL_PERI_PAR_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("BCRM_PERI_PAR_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), +}; + +static const enum domain_id domain_map[] = { + DOMAIN_0, DOMAIN_1, DOMAIN_2, DOMAIN_3, DOMAIN_4, DOMAIN_5, DOMAIN_6, DOMAIN_7, + DOMAIN_8, DOMAIN_9, DOMAIN_10, DOMAIN_11, DOMAIN_12, DOMAIN_13, DOMAIN_14, DOMAIN_15, +}; + +static inline void *getreg_domain(uintptr_t base, unsigned int offset, + enum domain_id domain_id, unsigned int index) +{ + return (void *)(base + offset + domain_id * 0x40 + index * 0x4); +} + +static inline void *getreg(uintptr_t base, unsigned int offset) +{ + return getreg_domain(base, offset, 0, 0); +} + +static void set_module_apc(uintptr_t base, uint32_t module, enum domain_id domain_id, + enum devapc_perm_type perm) +{ + uint32_t apc_register_index; + uint32_t apc_set_index; + + apc_register_index = module / MOD_NO_IN_1_DEVAPC; + apc_set_index = module % MOD_NO_IN_1_DEVAPC; + + clrsetbits32(getreg_domain(base, 0, domain_id, apc_register_index), + 0x3 << (apc_set_index * 2), + perm << (apc_set_index * 2)); +} + +static void set_infra_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(infra_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(infra_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + infra_ao_sys0_devices[i].d_permission[j]); + + for (i = 0; i < ARRAY_SIZE(infra_ao_sys1_devices); i++) + for (j = 0; j < ARRAY_SIZE(infra_ao_sys1_devices[i].d_permission); j++) + set_module_apc(base + SYS1_D0_APC_0, i, domain_map[j], + infra_ao_sys1_devices[i].d_permission[j]); + + for (i = 0; i < ARRAY_SIZE(infra_ao_sys2_devices); i++) + for (j = 0; j < ARRAY_SIZE(infra_ao_sys2_devices[i].d_permission); j++) + set_module_apc(base + SYS2_D0_APC_0, i, domain_map[j], + infra_ao_sys2_devices[i].d_permission[j]); +} + +static void set_peri_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(peri_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + peri_ao_sys0_devices[i].d_permission[j]); + /* + * Extra apc setting. + * Block debugsys to avoid privilege escalation. + */ + if (!CONFIG(CONSOLE_SERIAL)) + set_module_apc(base + SYS0_D0_APC_0, DEVAPC_DEBUGSYS_INDEX, + DOMAIN_0, SEC_RW_NS_R); + + for (i = 0; i < ARRAY_SIZE(peri_ao_sys1_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri_ao_sys1_devices[i].d_permission); j++) + set_module_apc(base + SYS1_D0_APC_0, i, domain_map[j], + peri_ao_sys1_devices[i].d_permission[j]); +} + +static void set_peri2_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(peri2_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri2_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + peri2_ao_sys0_devices[i].d_permission[j]); +} + +static void set_peri_par_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(peri_par_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri_par_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + peri_par_ao_sys0_devices[i].d_permission[j]); +} + +static void dump_infra_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(infra_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_INFRA_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO_SYS0)D%d_APC_%d: %#x\n", d, i, + read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(infra_ao_sys1_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_INFRA_AO_SYS1; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO_SYS1)D%d_APC_%d: %#x\n", d, i, + read32(getreg_domain(base, SYS1_D0_APC_0, d, i))); + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(infra_ao_sys2_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_INFRA_AO_SYS2; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO_SYS2)D%d_APC_%d: %#x\n", d, i, + read32(getreg_domain(base, SYS2_D0_APC_0, d, i))); + + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO)MAS_SEC_0: %#x\n", + read32(getreg(base, MAS_SEC_0))); +} + +static void dump_peri_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI_AO_SYS0)D%d_APC_%d: %#x\n", d, i, + read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri_ao_sys1_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI_AO_SYS1; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI_AO_SYS1)D%d_APC_%d: %#x\n", d, i, + read32(getreg_domain(base, SYS1_D0_APC_0, d, i))); + + printk(BIOS_DEBUG, "[DEVAPC] (PERI_AO)MAS_SEC_0: %#x\n", + read32(getreg(base, MAS_SEC_0))); +} + +static void dump_peri2_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri2_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI2_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI2_AO_SYS0)D%d_APC_%d: %#x\n", d, i, + read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); +} + +static void dump_peri_par_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri_par_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI_PAR_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI_PAR_AO_SYS0)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); + + printk(BIOS_DEBUG, "[DEVAPC] (PERI_PAR_AO)MAS_SEC_0: %#x\n", + read32(getreg(base, MAS_SEC_0))); +} + +static void infra_init(uintptr_t base) +{ + /* Side band */ + SET32_BITFIELDS(getreg(base, MAS_SEC_0), CPU_EB_SEC, SECURE_TRANS); + + /* Default APC Setting */ + set_infra_ao_apc(base); +} + +static void peri_init(uintptr_t base) +{ + /* Default APC Setting */ + set_peri_ao_apc(base); +} + +static void peri2_init(uintptr_t base) +{ + /* Default APC Setting */ + set_peri2_ao_apc(base); +} + +static void peri_par_init(uintptr_t base) +{ + /* Side band */ + SET32_BITFIELDS(getreg(base, MAS_SEC_0), + SSUSB_SEC, SECURE_TRANS, + SSUSB2_SEC, SECURE_TRANS, + SSUSB_P1_0_SEC, SECURE_TRANS, + SSUSB_P1_1_SEC, SECURE_TRANS, + SSUSB_P2_SEC, SECURE_TRANS, + SSUSB_P3_SEC, SECURE_TRANS); + + /* Default APC Setting */ + set_peri_par_ao_apc(base); +} + +struct devapc_init_ops { + uintptr_t base; + void (*init)(uintptr_t base); + void (*dump)(uintptr_t base); +} devapc_init[] = { + { DEVAPC_INFRA_AO_BASE, infra_init, dump_infra_ao_apc }, + { DEVAPC_PERI_AO_BASE, peri_init, dump_peri_ao_apc }, + { DEVAPC_PERI2_AO_BASE, peri2_init, dump_peri2_ao_apc }, + { DEVAPC_PERI_PAR_AO_BASE, peri_par_init, dump_peri_par_ao_apc }, +}; + +void dapc_init(void) +{ + int i; + uintptr_t devapc_ao_base; + + for (i = 0; i < ARRAY_SIZE(devapc_init); i++) { + devapc_ao_base = devapc_init[i].base; + + /* Init dapc */ + write32(getreg(devapc_ao_base, AO_APC_CON), 0x0); + write32(getreg(devapc_ao_base, AO_APC_CON), 0x1); + + /* Initialization */ + if (devapc_init[i].init) + devapc_init[i].init(devapc_ao_base); + + /* Dump Setting */ + if (devapc_init[i].dump) + devapc_init[i].dump(devapc_ao_base); + } +} diff --git a/src/soc/mediatek/mt8195/include/soc/devapc.h b/src/soc/mediatek/mt8195/include/soc/devapc.h new file mode 100644 index 0000000..2ee4332 --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/devapc.h @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8195_DEVAPC_H +#define SOC_MEDIATEK_MT8195_DEVAPC_H + +#include <device/mmio.h> +#include <soc/addressmap.h> + +void dapc_init(void); + +enum devapc_ao_offset { + SYS0_D0_APC_0 = 0x0, + SYS1_D0_APC_0 = 0x1000, + SYS2_D0_APC_0 = 0x2000, + DOM_REMAP_0_0 = 0x800, + DOM_REMAP_1_0 = 0x810, + DOM_REMAP_1_1 = 0x814, + DOM_REMAP_2_0 = 0x820, + MAS_DOM_0 = 0x0900, + MAS_SEC_0 = 0x0A00, + AO_APC_CON = 0x0F00, +}; + +/****************************************************************************** + * STRUCTURE DEFINITION + ******************************************************************************/ +/* Common */ +enum trans_type { + NON_SECURE_TRANS = 0, + SECURE_TRANS, +}; + +enum devapc_perm_type { + NO_PROTECTION = 0, + SEC_RW_ONLY, + SEC_RW_NS_R, + FORBIDDEN, + PERM_NUM, +}; + +enum domain_id { + DOMAIN_0 = 0, + DOMAIN_1, + DOMAIN_2, + DOMAIN_3, + DOMAIN_4, + DOMAIN_5, + DOMAIN_6, + DOMAIN_7, + DOMAIN_8, + DOMAIN_9, + DOMAIN_10, + DOMAIN_11, + DOMAIN_12, + DOMAIN_13, + DOMAIN_14, + DOMAIN_15, +}; + +struct apc_infra_peri_dom_16 { + unsigned char d_permission[16]; +}; + +struct apc_infra_peri_dom_8 { + unsigned char d_permission[8]; +}; + +struct apc_infra_peri_dom_4 { + unsigned char d_permission[4]; +}; + +#define DAPC_PERM_ATTR_4(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ + PERM_ATTR2, PERM_ATTR3) \ + (unsigned char)PERM_ATTR0, (unsigned char)PERM_ATTR1, \ + (unsigned char)PERM_ATTR2, (unsigned char)PERM_ATTR3, + +#define DAPC_PERM_ATTR_8(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ + PERM_ATTR2, PERM_ATTR3, PERM_ATTR4, PERM_ATTR5, \ + PERM_ATTR6, PERM_ATTR7) \ + DAPC_PERM_ATTR_4(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ + PERM_ATTR2, PERM_ATTR3) \ + DAPC_PERM_ATTR_4(DEV_NAME, PERM_ATTR4, PERM_ATTR5, \ + PERM_ATTR6, PERM_ATTR7) + +#define DAPC_PERM_ATTR_16(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ + PERM_ATTR2, PERM_ATTR3, PERM_ATTR4, PERM_ATTR5, \ + PERM_ATTR6, PERM_ATTR7, PERM_ATTR8, PERM_ATTR9, \ + PERM_ATTR10, PERM_ATTR11, PERM_ATTR12, PERM_ATTR13, \ + PERM_ATTR14, PERM_ATTR15) \ + DAPC_PERM_ATTR_8(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ + PERM_ATTR2, PERM_ATTR3, \ + PERM_ATTR4, PERM_ATTR5, \ + PERM_ATTR6, PERM_ATTR7) \ + DAPC_PERM_ATTR_8(DEV_NAME, PERM_ATTR8, PERM_ATTR9, \ + PERM_ATTR10, PERM_ATTR11, \ + PERM_ATTR12, PERM_ATTR13, \ + PERM_ATTR14, PERM_ATTR15) + +#define FORBIDDEN3 FORBIDDEN, FORBIDDEN, FORBIDDEN +#define FORBIDDEN7 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ + FORBIDDEN, FORBIDDEN +#define FORBIDDEN12 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ + FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ + FORBIDDEN, FORBIDDEN +#define FORBIDDEN13 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ + FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ + FORBIDDEN, FORBIDDEN, FORBIDDEN +#define FORBIDDEN15 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ + FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \ + FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN + +enum devapc_sys_dom_num { + DOM_NUM_INFRA_AO_SYS0 = 16, + DOM_NUM_INFRA_AO_SYS1 = 4, + DOM_NUM_INFRA_AO_SYS2 = 4, + DOM_NUM_PERI_AO_SYS0 = 16, + DOM_NUM_PERI_AO_SYS1 = 8, + DOM_NUM_PERI2_AO_SYS0 = 16, + DOM_NUM_PERI_PAR_AO_SYS0 = 16, +}; + +enum devapc_cfg_index { + DEVAPC_DEBUGSYS_INDEX = 17, +}; + +/* PERM_ATTR MACRO */ +#define DAPC_INFRA_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} +#define DAPC_INFRA_AO_SYS1_ATTR(...) {{ DAPC_PERM_ATTR_4(__VA_ARGS__) }} +#define DAPC_INFRA_AO_SYS2_ATTR(...) {{ DAPC_PERM_ATTR_4(__VA_ARGS__) }} +#define DAPC_PERI_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} +#define DAPC_PERI_AO_SYS1_ATTR(...) {{ DAPC_PERM_ATTR_8(__VA_ARGS__) }} +#define DAPC_PERI2_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} +#define DAPC_PERI_PAR_AO_SYS0_ATTR(...) {{ DAPC_PERM_ATTR_16(__VA_ARGS__) }} + +/****************************************************************************** + * Variable DEFINITION + ******************************************************************************/ +#define MOD_NO_IN_1_DEVAPC 16 + +/****************************************************************************** + * Bit Field DEFINITION + ******************************************************************************/ +/* INFRA */ +DEFINE_BIT(CPU_EB_SEC, 1) + +DEFINE_BITFIELD(CPU_EB_DOM, 11, 8) /* 1 */ + +/* PERI_PAR */ +DEFINE_BIT(SSUSB_SEC, 21) +DEFINE_BIT(SSUSB2_SEC, 0) +DEFINE_BIT(SSUSB_P1_0_SEC, 1) +DEFINE_BIT(SSUSB_P1_1_SEC, 2) +DEFINE_BIT(SSUSB_P2_SEC, 3) +DEFINE_BIT(SSUSB_P3_SEC, 4) + +/* Domain Remap */ +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_0, 3, 0) +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_1, 7, 4) +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_2, 11, 8) +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_3, 15, 12) +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_4, 19, 16) +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_5, 23, 20) +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_6, 27, 24) +DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_7, 31, 28) + +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_0, 2, 0) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_1, 5, 3) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_2, 8, 6) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_3, 11, 9) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_4, 14, 12) + +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4, 9, 8) + +#endif /* SOC_MEDIATEK_MT8195_DEVAPC_H */ diff --git a/src/soc/mediatek/mt8195/soc.c b/src/soc/mediatek/mt8195/soc.c index f9f4f99..7421220 100644 --- a/src/soc/mediatek/mt8195/soc.c +++ b/src/soc/mediatek/mt8195/soc.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <device/device.h> +#include <soc/devapc.h> #include <soc/emi.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> @@ -16,6 +17,7 @@ static void soc_init(struct device *dev) { mtk_mmu_disable_l2c_sram(); + dapc_init(); mcupm_init(); sspm_init(); ufs_disable_refclk(); -- To view, visit https://review.coreboot.org/c/coreboot/+/56764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3677657a117caed0d73526f78b0ebe8180148335 Gerrit-Change-Number: 56764 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede: Create bugzzy variant
by Raymond Chung (Code Review) 03 Aug '21

03 Aug '21

Attention is currently required from: Henry Sun, SH Kim, Edward Doan, Karthik Ramasubramanian. Raymond Chung has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56762 ) Change subject: mb/google/dedede: Create bugzzy variant ...................................................................... Patch Set 2: Code-Review+1 (1 comment) File src/mainboard/google/dedede/variants/bugzzy/overridetree.cb: https://review.coreboot.org/c/coreboot/+/56762/comment/00c979aa_8fc4da92 PS1, Line 44: .scl_lcnt = 176, : .scl_hcnt = 95, : .sda_hold = 36, > I understand that. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56762 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I851b9a75c387586d2fb84b762788e962f33472b5 Gerrit-Change-Number: 56762 Gerrit-PatchSet: 2 Gerrit-Owner: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kervin Kang <kervinkang(a)ami.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Edward Doan <edoan(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 03 Aug 2021 03:50:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit August 2021