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Change subject: sb/intel/common/pciehp: Replace HP dummy device with common code
......................................................................
sb/intel/common/pciehp: Replace HP dummy device with common code
Use the common PCIEXP_HOTPLUG code to generate a dummy device for PCIe
ports supporting hotplug. This allows to have control over how much
resources are allocated to hotplug ports.
Tested on thinkpad X220: now hotplugging a dGPU via the expresscard
slot sometimes works.
Change-Id: I3eec5214c9d200ef97d1ccfdc00e8ea0ee7cfbc6
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/southbridge/intel/bd82x6x/Kconfig
M src/southbridge/intel/bd82x6x/pcie.c
M src/southbridge/intel/common/pciehp.c
M src/southbridge/intel/i82801ix/Kconfig
M src/southbridge/intel/i82801ix/pcie.c
M src/southbridge/intel/i82801jx/Kconfig
M src/southbridge/intel/i82801jx/pcie.c
7 files changed, 24 insertions(+), 54 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/51068/2
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Change subject: util/chromeos: Use the same inventory each time and verify checksums
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS4:
> In what way do you think I should split up this commit?
Split up checking the checksum against the recovery.conf file, adding a checksum check for the recovery.conf file itself and the url change to archive.org.
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I'd like you to reexamine a change. Please visit
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Change subject: elog: Support logging CSE Lite info in elog
......................................................................
elog: Support logging CSE Lite info in elog
This patch adds the following updates,
1. Add support for new elog event type to log CSE Lite information in
elog.
2. Add helper functions to get cse firmware sku, manfacturing mode info in cse lib.
3. Add elog event in cse lite driver to log cse info in elog.
BUG=b:174121840
BRANCH=None
TEST=Build, boot image and check for elog entry in logs.
localhost ~ # cbmem -c | grep -i "elog"
...
ELOG: Event(B6) added with size 32 at 2021-01-17 16:01:57 UTC
localhost ~ # mosys eventlog list
...
3 | 2021-01-17 08:01:57 | CSE Info | Lite | 13.50.0.1269 | 13.50.0.1269
| YES | 0x5 | 0x0 | RW
Change-Id: Ib183941d1fa0a9971e30b4092ea3d23daaa29334
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d(a)intel.com>
---
M src/include/elog.h
M src/soc/intel/alderlake/Makefile.inc
M src/soc/intel/alderlake/me.c
M src/soc/intel/cannonlake/Makefile.inc
M src/soc/intel/cannonlake/me.c
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/cse/cse_lite.c
M src/soc/intel/common/block/include/intelblocks/cse.h
M src/soc/intel/jasperlake/Makefile.inc
M src/soc/intel/jasperlake/me.c
M src/soc/intel/tigerlake/Makefile.inc
M src/soc/intel/tigerlake/me.c
12 files changed, 113 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/50472/5
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Change subject: mb/intel/d510mo/devicetree.cb: Indent with tabs
......................................................................
mb/intel/d510mo/devicetree.cb: Indent with tabs
This is a cosmetic change.
Make the formatting consistent with the rest of the tree.
Change-Id: Ic90e5584938592f1c2ab41edfcc773702822070d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/intel/d510mo/devicetree.cb
1 file changed, 94 insertions(+), 94 deletions(-)
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Change subject: mb/{intel/d510mo,foxconn/d14s}/devicetree.cb: Remove PEG device
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/51150/comment/c447a486_76aaef67
PS2, Line 7: d14s
> Says d*14*s, but should be d*41*s (1 and 4 are backwards)
Oh looks my mind read the same twice ^^ My bad.
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Change subject: mb/google/volteer: Fix FPMCU pwr/rst gpio handling
......................................................................
Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/50828/comment/a3c93649_096174aa
PS8, Line 10: 2. Disable power and assert reset in ramstage gpio
> If so, I would remove the assert of FPMCU reset just prior to the enabling of power in ramstage. […]
Duncan, any chance to test this yet?
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Change subject: mb/intel/d510/devicetree.cb: Indent with tabs
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/51149/comment/84108f3f_a1c9e141
PS3, Line 7: d510
Sorry for being nitpicky: d510*mo*
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