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Change in edk2[master]: UefiPayloadPkg: Allow below 4GB memory
by Sean Rhodes (Code Review) 01 Nov '21

01 Nov '21

Sean Rhodes has uploaded this change for review. ( https://review.coreboot.org/c/edk2/+/58802 ) Change subject: UefiPayloadPkg: Allow below 4GB memory ...................................................................... UefiPayloadPkg: Allow below 4GB memory Add function to reserve memory below 4GB for EDKII Modules. This causes the DXE to dispatch everything under 4GB and allows Operating System's that require EFI_LOADED_IMAGE to be under 4GB to start. e.g. Xen hypervisor used in Qubes Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ic600e08c9d46d0a291b8b119a3c268e432267cdf --- M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf M UefiPayloadPkg/UefiPayloadPkg.dec M UefiPayloadPkg/UefiPayloadPkg.dsc 4 files changed, 54 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/edk2 refs/changes/02/58802/1 diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c index ae16f25..4aa3e21 100644 --- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c +++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c @@ -5,11 +5,39 @@ **/ +#include <Guid/MemoryTypeInformation.h> #include "UefiPayloadEntry.h" STATIC UINT32 mTopOfLowerUsableDram = 0; /** + Function to reserve memory below 4GB for EDKII Modules. This causes the + DXE to dispatch everything under 4GB and allows Operating System's that + require EFI_LOADED_IMAGE to be under 4GB to start. + e.g. Xen hypervisor used in Qubes +**/ +VOID ForceModulesBelow4G(VOID) +{ + DEBUG ((DEBUG_INFO, "Building hob to restrict memory resorces to below 4G.\n")); + EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = { + { EfiACPIReclaimMemory, FixedPcdGet32 (PcdMemoryTypeEfiACPIReclaimMemory) }, + { EfiACPIMemoryNVS, FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) }, + { EfiReservedMemoryType, FixedPcdGet32 (PcdMemoryTypeEfiReservedMemoryType) }, + { EfiRuntimeServicesData, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesData) }, + { EfiRuntimeServicesCode, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesCode) }, + { EfiMaxMemoryType, 0 } + }; + // + // Create Memory Type Information HOB + // + BuildGuidDataHob ( + &gEfiMemoryTypeInformationGuid, + mDefaultMemoryTypeInformation, + sizeof(mDefaultMemoryTypeInformation) + ); +} + +/** Callback function to build resource descriptor HOB This function build a HOB based on the memory map entry info. @@ -590,6 +618,12 @@ // Build other HOBs required by DXE BuildGenericHob (); + // Create a HOB to make resources for EDKII modules below 4G + if (FixedPcdGetBool (PcdAbove4GMemory) == FALSE) { + ForceModulesBelow4G (); + } + + // Load the DXE Core Status = LoadDxeCore (&DxeCoreEntryPoint); ASSERT_EFI_ERROR (Status); diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf index 8d42925..852dd80 100644 --- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf +++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf @@ -89,7 +89,15 @@ gUefiPayloadPkgTokenSpaceGuid.PcdPayloadStackTop gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode + gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## SOMETIMES_CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy ## SOMETIMES_CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy ## SOMETIMES_CONSUMES + gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory + diff --git a/UefiPayloadPkg/UefiPayloadPkg.dec b/UefiPayloadPkg/UefiPayloadPkg.dec index 8f0a7e3..2e7af81 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dec +++ b/UefiPayloadPkg/UefiPayloadPkg.dec @@ -76,4 +76,7 @@ # Size of the region used by UEFI in permanent memory gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x02000000|UINT32|0x00000017 +# Above 4G Memory +gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|1|UINT32|0x00000018 + gUefiPayloadPkgTokenSpaceGuid.PcdPcdDriverFile|{ 0x57, 0x72, 0xcf, 0x80, 0xab, 0x87, 0xf9, 0x47, 0xa3, 0xfe, 0xD5, 0x0B, 0x76, 0xd8, 0x95, 0x41 }|VOID*|0x00000018 diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc index 856d5ea..a4d07be 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -30,6 +30,8 @@ DEFINE PS2_KEYBOARD_ENABLE = FALSE DEFINE UNIVERSAL_PAYLOAD = FALSE + DEFINE ABOVE_4G_MEMORY = FALSE + # # SBL: UEFI payload for Slim Bootloader # COREBOOT: UEFI payload for coreboot @@ -321,6 +323,13 @@ gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 !endif + # Above 4G Decode +!if $(ABOVE_4G_MEMORY) == TRUE + gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|TRUE +!else + gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|FALSE +!endif + [PcdsPatchableInModule.common] gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7 -- To view, visit https://review.coreboot.org/c/edk2/+/58802 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: edk2 Gerrit-Branch: master Gerrit-Change-Id: Ic600e08c9d46d0a291b8b119a3c268e432267cdf Gerrit-Change-Number: 58802 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-MessageType: newchange

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Change in coreboot[master]: broadwell boards: Do not set `ddr_refresh_2x` again
by Patrick Georgi (Code Review) 01 Nov '21

01 Nov '21

Attention is currently required from: Nico Huber, Matt DeVillier, Angel Pons, Arthur Heymans, Patrick Rudolph. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55810 ) Change subject: broadwell boards: Do not set `ddr_refresh_2x` again ...................................................................... Patch Set 9: (1 comment) File src/mainboard/google/auron/variants/buddy/spd/spd.c: https://review.coreboot.org/c/coreboot/+/55810/comment/cecaf1ea_8de02925 PS9, Line 13: pei_data->ddr_refresh_2x = 1; > What difference would it make? soc/intel/broadwell/pei_data. […] I looked through the (internal) board's development history. For this family rowhammer mitigations came in time so that there's no RO out there without double refresh. This is good to go in. -- To view, visit https://review.coreboot.org/c/coreboot/+/55810 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I76478689b3aa27c369a0413d9fbde03674d5e528 Gerrit-Change-Number: 55810 Gerrit-PatchSet: 9 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 01 Nov 2021 22:08:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in edk2[coreboot-stable202108]: UefiPayloadPkg: Add build option to disable Above 4G Decode
by Matt DeVillier (Code Review) 01 Nov '21

01 Nov '21

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/edk2/+/58801 ) Change subject: UefiPayloadPkg: Add build option to disable Above 4G Decode ...................................................................... UefiPayloadPkg: Add build option to disable Above 4G Decode Dovetails with coreboot commit 766e481a: "payloads/external/tianocore: Add build argument for 4G Decode" Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I50e9d9052b344519f46419a01b27b2ca43047943 --- M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf M UefiPayloadPkg/UefiPayloadPkg.dec M UefiPayloadPkg/UefiPayloadPkg.dsc 4 files changed, 52 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/edk2 refs/changes/01/58801/1 diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c index ae16f25..b3e06df 100644 --- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c +++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c @@ -5,11 +5,40 @@ **/ +#include <Guid/MemoryTypeInformation.h> #include "UefiPayloadEntry.h" STATIC UINT32 mTopOfLowerUsableDram = 0; /** + Function to reserve memory below 4GB for EDKII Modules. This causes the + DXE to dispatch everything under 4GB and allows Operating System's that + require EFI_LOADED_IMAGE to be under 4GB to start. + + e.g. Xen hypervisor used in Qubes +**/ +VOID ForceModulesBelow4G(VOID) +{ + DEBUG ((DEBUG_INFO, "Building hob to restrict memory resorces to below 4G.\n")); + EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = { + { EfiACPIReclaimMemory, FixedPcdGet32 (PcdMemoryTypeEfiACPIReclaimMemory) }, + { EfiACPIMemoryNVS, FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) }, + { EfiReservedMemoryType, FixedPcdGet32 (PcdMemoryTypeEfiReservedMemoryType) }, + { EfiRuntimeServicesData, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesData) }, + { EfiRuntimeServicesCode, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesCode) }, + { EfiMaxMemoryType, 0 } + }; + // + // Create Memory Type Information HOB + // + BuildGuidDataHob ( + &gEfiMemoryTypeInformationGuid, + mDefaultMemoryTypeInformation, + sizeof(mDefaultMemoryTypeInformation) + ); +} + +/** Callback function to build resource descriptor HOB This function build a HOB based on the memory map entry info. @@ -590,6 +619,11 @@ // Build other HOBs required by DXE BuildGenericHob (); + // Create a HOB to make resources for EDKII modules below 4G + if (FixedPcdGetBool (PcdAbove4GMemory) == FALSE) { + ForceModulesBelow4G (); + } + // Load the DXE Core Status = LoadDxeCore (&DxeCoreEntryPoint); ASSERT_EFI_ERROR (Status); diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf index 8d42925..cf07f0b 100644 --- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf +++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf @@ -88,8 +88,14 @@ gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemSize gUefiPayloadPkgTokenSpaceGuid.PcdPayloadStackTop gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData + gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## SOMETIMES_CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy ## SOMETIMES_CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy ## SOMETIMES_CONSUMES + gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory diff --git a/UefiPayloadPkg/UefiPayloadPkg.dec b/UefiPayloadPkg/UefiPayloadPkg.dec index 8f0a7e3..cb3375a 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dec +++ b/UefiPayloadPkg/UefiPayloadPkg.dec @@ -77,3 +77,6 @@ gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x02000000|UINT32|0x00000017 gUefiPayloadPkgTokenSpaceGuid.PcdPcdDriverFile|{ 0x57, 0x72, 0xcf, 0x80, 0xab, 0x87, 0xf9, 0x47, 0xa3, 0xfe, 0xD5, 0x0B, 0x76, 0xd8, 0x95, 0x41 }|VOID*|0x00000018 + +# Above 4G Decode +gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|1|UINT32|0x00000019 diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc index 856d5ea..abbf4d8 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -30,6 +30,8 @@ DEFINE PS2_KEYBOARD_ENABLE = FALSE DEFINE UNIVERSAL_PAYLOAD = FALSE + DEFINE ABOVE_4G_MEMORY = TRUE + # # SBL: UEFI payload for Slim Bootloader # COREBOOT: UEFI payload for coreboot @@ -321,6 +323,13 @@ gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 !endif + # Above 4G Decode +!if $(ABOVE_4G_DECODE) == TRUE + gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|TRUE +!else + gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|FALSE +!endif + [PcdsPatchableInModule.common] gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7 -- To view, visit https://review.coreboot.org/c/edk2/+/58801 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: edk2 Gerrit-Branch: coreboot-stable202108 Gerrit-Change-Id: I50e9d9052b344519f46419a01b27b2ca43047943 Gerrit-Change-Number: 58801 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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Change in edk2[master]: run-jenkins-tests: build in verbose mode
by Sean Rhodes (Code Review) 01 Nov '21

01 Nov '21

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/edk2/+/58800 ) Change subject: run-jenkins-tests: build in verbose mode ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > wrong branch. […] Happy to help :D -- To view, visit https://review.coreboot.org/c/edk2/+/58800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: edk2 Gerrit-Branch: master Gerrit-Change-Id: I3847da7039d073c1f8ba87cc0ea56fdb3bedc3da Gerrit-Change-Number: 58800 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 01 Nov 2021 22:02:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

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Change in edk2[master]: run-jenkins-tests: build in verbose mode
by Patrick Georgi (Code Review) 01 Nov '21

01 Nov '21

Attention is currently required from: Sean Rhodes, Matt DeVillier. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/edk2/+/58800 ) Change subject: run-jenkins-tests: build in verbose mode ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: wrong branch. I mean, good for me, now I can test why the ACLs even allowed you to push here ;-) -- To view, visit https://review.coreboot.org/c/edk2/+/58800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: edk2 Gerrit-Branch: master Gerrit-Change-Id: I3847da7039d073c1f8ba87cc0ea56fdb3bedc3da Gerrit-Change-Number: 58800 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 01 Nov 2021 22:01:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in edk2[master]: run-jenkins-tests: build in verbose mode
by Sean Rhodes (Code Review) 01 Nov '21

01 Nov '21

Attention is currently required from: Matt DeVillier. Hello build bot (Jenkins), Patrick Georgi, Matt DeVillier, I'd like you to do a code review. Please visit https://review.coreboot.org/c/edk2/+/58800 to review the following change. Change subject: run-jenkins-tests: build in verbose mode ...................................................................... run-jenkins-tests: build in verbose mode Diagnosing build failures when '-q' is used is very difficult, so drop it to get verbose build output info. Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Change-Id: I3847da7039d073c1f8ba87cc0ea56fdb3bedc3da Reviewed-on: https://review.coreboot.org/c/edk2/+/58797 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M .azurepipelines/templates/pr-gate-build-job.yml M .pytool/CISettings.py M ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c M ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c M ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf M ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c M ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c M ArmVirtPkg/ArmVirtCloudHv.dsc M ArmVirtPkg/ArmVirtQemu.dsc M ArmVirtPkg/ArmVirtQemuKernel.dsc M ArmVirtPkg/ArmVirtXen.dsc M ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c M ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf M BaseTools/Bin/gcc_aarch64_linux_ext_dep.yaml M BaseTools/Bin/gcc_arm_linux_ext_dep.yaml M BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py M BaseTools/Source/Python/AutoGen/GenMake.py M BaseTools/Source/Python/AutoGen/ModuleAutoGen.py M BaseTools/Source/Python/GenFds/GenFds.py M BaseTools/Source/Python/GenFds/GenFdsGlobalVariable.py M BaseTools/Source/Python/TargetTool/TargetTool.py M BaseTools/Source/Python/Workspace/BuildClassObject.py M BaseTools/Source/Python/Workspace/DscBuildData.py M BaseTools/Source/Python/build/build.py M DynamicTablesPkg/DynamicTables.dsc.inc M DynamicTablesPkg/DynamicTablesPkg.ci.yaml M DynamicTablesPkg/DynamicTablesPkg.dec M DynamicTablesPkg/DynamicTablesPkg.dsc M DynamicTablesPkg/Include/AcpiTableGenerator.h M DynamicTablesPkg/Include/ArmNameSpaceObjects.h A DynamicTablesPkg/Include/Library/AcpiHelperLib.h M DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h M DynamicTablesPkg/Include/Library/TableHelperLib.h M DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c M DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/GtdtGenerator.c M DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCmn600LibArm/SsdtCmn600Generator.c M DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCmn600LibArm/SsdtCmn600LibArm.inf A DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c A DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h A DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyLibArm.inf M DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtSerialPortLibArm/SsdtSerialPortGenerator.c M DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtSerialPortLibArm/SsdtSerialPortLibArm.inf A DynamicTablesPkg/Library/Common/AcpiHelperLib/AcpiHelper.c A DynamicTablesPkg/Library/Common/AcpiHelperLib/AcpiHelperLib.inf M DynamicTablesPkg/Library/Common/AmlLib/AmlDbgPrint/AmlDbgPrint.c M DynamicTablesPkg/Library/Common/AmlLib/AmlEncoding/Aml.c M DynamicTablesPkg/Library/Common/AmlLib/AmlEncoding/Aml.h M DynamicTablesPkg/Library/Common/AmlLib/AmlLib.inf M DynamicTablesPkg/Library/Common/AmlLib/Api/AmlApi.c M DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlCodeGen.c M DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c M DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.h M DynamicTablesPkg/Library/Common/AmlLib/ResourceData/AmlResourceData.c M DynamicTablesPkg/Library/Common/AmlLib/ResourceData/AmlResourceData.h M DynamicTablesPkg/Library/Common/AmlLib/Tree/AmlClone.c M DynamicTablesPkg/Library/Common/AmlLib/Tree/AmlNode.c M DynamicTablesPkg/Library/Common/AmlLib/Tree/AmlNode.h M DynamicTablesPkg/Library/Common/AmlLib/Tree/AmlNodeInterface.c M DynamicTablesPkg/Library/Common/AmlLib/Tree/AmlTree.c M DynamicTablesPkg/Library/Common/AmlLib/Utils/AmlUtility.c M DynamicTablesPkg/Library/Common/AmlLib/Utils/AmlUtility.h M DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.c M 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RedfishPkg/RedfishHostInterfaceDxe/RedfishHostInterfaceDxe.c M RedfishPkg/RedfishRestExDxe/RedfishRestExImpl.c M RedfishPkg/RedfishRestExDxe/RedfishRestExInternal.h M SecurityPkg/FvReportPei/FvReportPei.c A SecurityPkg/Include/Library/TpmPlatformHierarchyLib.h A SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.c A SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf A SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.c A SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf M SecurityPkg/SecurityPkg.dec M SecurityPkg/SecurityPkg.dsc M SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.c A SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.c A SecurityPkg/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf A SecurityPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.c A SecurityPkg/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf M SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureBootDefaultKeysDxe.c M ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Gtdt/GtdtParser.c M ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Hmat/HmatParser.c M ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Pcct/PcctParser.c M ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.c M ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c M UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c M UefiCpuPkg/Include/AcpiCpuData.h M UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c M UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c M UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c M UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c A UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw D UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw D UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw D UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw M UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf D UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw D UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw D UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf A UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw A UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw M UefiCpuPkg/ResetVector/Vtf0/Build.py A UefiCpuPkg/ResetVector/Vtf0/PageTables.inc M UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt M UefiCpuPkg/ResetVector/Vtf0/Tools/FixupForRawSection.py M UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb A UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm R UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm A UefiCpuPkg/SecCore/SecCoreNative.inf M UefiCpuPkg/UefiCpuPkg.ci.yaml M UefiCpuPkg/UefiCpuPkg.dsc M UefiPayloadPkg/Include/Library/BlParseLib.h M UefiPayloadPkg/Library/CbParseLib/CbParseLib.c M UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf M UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c M UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf M UefiPayloadPkg/Library/SblParseLib/SblParseLib.inf D UefiPayloadPkg/Library/UniversalPayloadPlatformHookLib/PlatformHookLib.c D UefiPayloadPkg/Library/UniversalPayloadPlatformHookLib/PlatformHookLib.inf A UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c D UefiPayloadPkg/UefiPayloadEntry/Ia32/SecEntry.nasm M UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c M UefiPayloadPkg/UefiPayloadEntry/PrintHob.c M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf M UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c M UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.inf D UefiPayloadPkg/UefiPayloadEntry/X64/SecEntry.nasm A UefiPayloadPkg/UefiPayloadPkg.ci.yaml M UefiPayloadPkg/UefiPayloadPkg.dec M UefiPayloadPkg/UefiPayloadPkg.dsc M UefiPayloadPkg/UefiPayloadPkg.fdf A UefiPayloadPkg/UniversalPayloadBuild.py M run-jenkins-tests.sh 230 files changed, 10,395 insertions(+), 1,752 deletions(-) git pull ssh://review.coreboot.org:29418/edk2 refs/changes/00/58800/1 -- To view, visit https://review.coreboot.org/c/edk2/+/58800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: edk2 Gerrit-Branch: master Gerrit-Change-Id: I3847da7039d073c1f8ba87cc0ea56fdb3bedc3da Gerrit-Change-Number: 58800 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/guybrush: Set Gen3 default for all PCIe devices
by Matt Papageorge (Code Review) 01 Nov '21

01 Nov '21

Attention is currently required from: Raul Rangel, Martin Roth, Marshall Dawson, Paul Menzel, Karthik Ramasubramanian, Felix Held. Matt Papageorge has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58799 ) Change subject: mb/google/guybrush: Set Gen3 default for all PCIe devices ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Looking for feedback on these new defaults. They appear to only affect NVME but I think they should be specified in any case. So should we specify gen3 for all descriptors? -- To view, visit https://review.coreboot.org/c/coreboot/+/58799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9 Gerrit-Change-Number: 58799 Gerrit-PatchSet: 3 Gerrit-Owner: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 01 Nov 2021 21:52:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Set Gen3 default for all PCIe devices
by Matt Papageorge (Code Review) 01 Nov '21

01 Nov '21

Matt Papageorge has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/58799 ) Change subject: mb/google/guybrush: Set Gen3 default for all PCIe devices ...................................................................... mb/google/guybrush: Set Gen3 default for all PCIe devices Currently link_speed_capability is not specified within the DXIO descriptors sent to FSP. This value specifies the maximum speed that a PCIe device should train up to. The only device on Monkey Island that is not currently running at full speed is the NVME but this may not always be the case. BUG=b:204791296 TEST=Boot to OS and check link speed with LSPCI to verify NVME link speed goes from 2.5 GT/s to 5 GT/s Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9 Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com> --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/58799/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9 Gerrit-Change-Number: 58799 Gerrit-PatchSet: 3 Gerrit-Owner: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: Set Gen3 default for all PCIe devices
by Matt Papageorge (Code Review) 01 Nov '21

01 Nov '21

Matt Papageorge has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/58799 ) Change subject: mb/google/guybrush: Set Gen3 default for all PCIe devices ...................................................................... mb/google/guybrush: Set Gen3 default for all PCIe devices Currently link_speed_capability is not specified within the DXIO descriptors sent to FSP. This value specifies the maximum speed that a PCIe device should train up to. The only device on Monkey Island that is not running at full speed is the NVME but this may not always be the case. BUG=b:204791296 TEST=Boot to OS and check link speed with LSPCI to verify NVME link speed goes from 2.5 GT/s to 5 GT/s Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9 Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com> --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/58799/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9 Gerrit-Change-Number: 58799 Gerrit-PatchSet: 2 Gerrit-Owner: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/guybrush: Set Gen3 default for all PCIe devices
by Matt Papageorge (Code Review) 01 Nov '21

01 Nov '21

Matt Papageorge has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58799 ) Change subject: mb/google/guybrush: Set Gen3 default for all PCIe devices ...................................................................... mb/google/guybrush: Set Gen3 default for all PCIe devices Currently link_speed_capability is not specified within the DXIO descriptors sent to FSP. This value specifies the maximum speed that a PCIe device should train up to. It appears without specifying this value (left 0) DXIO chooses Gen2 as a default. The only device on Monkey Island that is capable of Gen3 is the NVME but this may not always be the case. BUG=b:204791296 TEST=Boot to OS and check link speed with LSPCI to verify NVME link speed goes from 2.5 GT/s to 5 GT/s Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9 Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com> --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/58799/1 diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index a98983b..af06e7f 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -14,6 +14,7 @@ .port_present = true, .start_logical_lane = 0, .end_logical_lane = 0, + .link_speed_capability = 3, .device_number = PCI_SLOT(WLAN_DEVFN), .function_number = PCI_FUNC(WLAN_DEVFN), .link_aspm = ASPM_L1, @@ -28,6 +29,7 @@ .port_present = true, .start_logical_lane = 1, .end_logical_lane = 1, + .link_speed_capability = 3, .device_number = PCI_SLOT(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN), .link_aspm = ASPM_L1, @@ -43,6 +45,7 @@ .port_present = true, .start_logical_lane = 2, .end_logical_lane = 2, + .link_speed_capability = 3, .device_number = PCI_SLOT(WWAN_DEVFN), .function_number = PCI_FUNC(WWAN_DEVFN), .link_aspm = ASPM_L1, @@ -57,6 +60,7 @@ .port_present = true, .start_logical_lane = 4, .end_logical_lane = 7, + .link_speed_capability = 3, .device_number = PCI_SLOT(NVME_DEVFN), .function_number = PCI_FUNC(NVME_DEVFN), .link_aspm = ASPM_L1, -- To view, visit https://review.coreboot.org/c/coreboot/+/58799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9 Gerrit-Change-Number: 58799 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-MessageType: newchange

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