coreboot-gerrit June 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: add chip operation and PCIe enumeration
by Aaron Durbin (Code Review) 03 Jun '20

03 Jun '20

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40110 ) Change subject: soc/intel/xeon_sp/cpx: add chip operation and PCIe enumeration ...................................................................... Patch Set 18: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/40110 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If461b1dc1f313d98b676dc9e91d08a1dbb9cb388 Gerrit-Change-Number: 40110 Gerrit-PatchSet: 18 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-CC: Morgan Jang Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 02 Jun 2020 22:38:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard(s): drop redundant entries from Makefiles
by Michael Niewöhner (Code Review) 02 Jun '20

02 Jun '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41107 ) Change subject: mainboard(s): drop redundant entries from Makefiles ...................................................................... Patch Set 10: > Patch Set 10: > > > Patch Set 10: > > > > > Patch Set 10: > > > > > > > Patch Set 8: > > > > > > > > Why is hda_verb being removed? > > > > > > Same reason as for the others; it's included implicitly (see src/device/Makefile.inc). It does not work for variants, though -> needs fix > > > > Please handle hda_verb in a separate patchset. > > Er, I meant commit. yup, will rework this as soon as CB41105 and CB41106 are ready -- To view, visit https://review.coreboot.org/c/coreboot/+/41107 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1961646c5ed4ae6a1308ce0e8e15792970da4e0d Gerrit-Change-Number: 41107 Gerrit-PatchSet: 10 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 02 Jun 2020 21:15:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: handle ramstage.c by default in Make
by Michael Niewöhner (Code Review) 02 Jun '20

02 Jun '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41106 ) Change subject: arch/x86: handle ramstage.c by default in Make ...................................................................... Patch Set 7: (1 comment) https://review.coreboot.org/c/coreboot/+/41106/7/src/arch/x86/Makefile.inc File src/arch/x86/Makefile.inc: https://review.coreboot.org/c/coreboot/+/41106/7/src/arch/x86/Makefile.inc@… PS7, Line 272: ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/ramstage.c) > Are the two above intentionally kept under arch/x86? no idea, I added bootblock.c and ramstage.c here because mainboard.c and some others were here already. Probably it'd be a good idea to move them all to some generic location so we don't have to repeat that for multiple platforms. /Makefile.inc maybe? -- To view, visit https://review.coreboot.org/c/coreboot/+/41106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfc7d8eb97b4a98317cf6f76bbf1da56bc0c9afa Gerrit-Change-Number: 41106 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 02 Jun 2020 21:13:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: handle bootblock.c by default in Make
by Michael Niewöhner (Code Review) 02 Jun '20

02 Jun '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41105 ) Change subject: arch/x86: handle bootblock.c by default in Make ...................................................................... Patch Set 9: (1 comment) https://review.coreboot.org/c/coreboot/+/41105/9/src/arch/x86/Makefile.inc File src/arch/x86/Makefile.inc: https://review.coreboot.org/c/coreboot/+/41105/9/src/arch/x86/Makefile.inc@… PS9, Line 117: > Why under arch/x86? because mainboard.c was added here, too. Let's discuss that on CB41106 -- To view, visit https://review.coreboot.org/c/coreboot/+/41105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62648bed633b5d9646bc3b943019191b4918f1dc Gerrit-Change-Number: 41105 Gerrit-PatchSet: 9 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 02 Jun 2020 21:11:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard: drop now undefined option `wait_for_bmc` from devicetrees
by Michael Niewöhner (Code Review) 02 Jun '20

02 Jun '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42021 ) Change subject: src/mainboard: drop now undefined option `wait_for_bmc` from devicetrees ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/42021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb76d6c8abaa506358cd847bea0c776eb61db312 Gerrit-Change-Number: 42021 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 02 Jun 2020 21:07:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/ipmi: drop redundant option `wait_for_bmc`
by Michael Niewöhner (Code Review) 02 Jun '20

02 Jun '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42020 ) Change subject: drivers/ipmi: drop redundant option `wait_for_bmc` ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/42020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id26f85e82a13f53a3731ab88035f2ae4bbffac00 Gerrit-Change-Number: 42020 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 02 Jun 2020 21:06:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Enable TCSS DMA0 and DMA1 for TGL RVP platform
by John Zhao (Code Review) 02 Jun '20

02 Jun '20

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41386 ) Change subject: Enable TCSS DMA0 and DMA1 for TGL RVP platform ...................................................................... Enable TCSS DMA0 and DMA1 for TGL RVP platform This explicitly enables both of TCSS DMA0 and DMA1 controllers from TGL RVP platform devicetree setting. BUG=:b:146624360 TEST=Built and booted on TGL RVP. Signed-off-by: John Zhao <john.zhao(a)intel.com> Change-Id: I0111542eef253f469f679cdc4b81812438dff4ce --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb 2 files changed, 16 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/41386/1 diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index 82f358e..8992722 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb @@ -110,8 +110,14 @@ }" # TCSS USB3 + register "TcssXhciEn" = "1" + register "TcssXdciEn" = "0" register "TcssAuxOri" = "0" + # TCSS DMA + register "TcssDma0En" = "1" + register "TcssDma1En" = "1" + #HD Audio register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHdaEnable" = "0" @@ -158,8 +164,8 @@ device pci 0a.0 off end # Crash-log SRAM 0x9A0D device pci 0d.0 on end # USB xHCI 0x9A13 device pci 0d.1 on end # USB xDCI (OTG) 0x9A15 - device pci 0d.2 off end # TBT DMA0 0x9A1B - device pci 0d.3 off end # TBT DMA1 0x9A1D + device pci 0d.2 on end # TBT DMA0 0x9A1B + device pci 0d.3 on end # TBT DMA1 0x9A1D device pci 0e.0 on end # VMD 0x9A0B # From PCH EDS(576591) diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index fec2fef..6839965 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -106,8 +106,14 @@ }" # TCSS USB3 + register "TcssXhciEn" = "1" + register "TcssXdciEn" = "0" register "TcssAuxOri" = "0" + # TCSS DMA + register "TcssDma0En" = "1" + register "TcssDma1En" = "1" + #HD Audio register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHdaEnable" = "0" @@ -154,8 +160,8 @@ device pci 0a.0 off end # Crash-log SRAM 0x9A0D device pci 0d.0 on end # USB xHCI 0x9A13 device pci 0d.1 on end # USB xDCI (OTG) 0x9A15 - device pci 0d.2 off end # TBT DMA0 0x9A1B - device pci 0d.3 off end # TBT DMA1 0x9A1D + device pci 0d.2 on end # TBT DMA0 0x9A1B + device pci 0d.3 on end # TBT DMA1 0x9A1D device pci 0e.0 on end # VMD 0x9A0B # From PCH EDS(576591) -- To view, visit https://review.coreboot.org/c/coreboot/+/41386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0111542eef253f469f679cdc4b81812438dff4ce Gerrit-Change-Number: 41386 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/volteer/ripto: Add audio devices to the tree
by Duncan Laurie (Code Review) 02 Jun '20

02 Jun '20

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41896 ) Change subject: mb/google/volteer/ripto: Add audio devices to the tree ...................................................................... mb/google/volteer/ripto: Add audio devices to the tree The ripto board is still being used for testing so make sure it supports the same audio config as volteer. BUG=b:147462631 TEST=build ripto variant Change-Id: Iabeb73307418dc16b12fa60ad26923cd9f6e1f3a Signed-off-by: Duncan Laurie <dlaurie(a)google.com> --- M src/mainboard/google/volteer/variants/ripto/overridetree.cb 1 file changed, 67 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/41896/1 diff --git a/src/mainboard/google/volteer/variants/ripto/overridetree.cb b/src/mainboard/google/volteer/variants/ripto/overridetree.cb index 162f93b..f583cdd 100644 --- a/src/mainboard/google/volteer/variants/ripto/overridetree.cb +++ b/src/mainboard/google/volteer/variants/ripto/overridetree.cb @@ -6,6 +6,73 @@ register "PcieRpL1Substates[10]" = "2" device domain 0 on + device pci 15.0 on + chip drivers/i2c/generic + register "hid" = ""10EC5682"" + register "name" = ""RT58"" + register "desc" = ""Headset Codec"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F8)" + # Set the jd_src to RT5668_JD1 for jack detection + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on + probe AUDIO MAX98357_ALC5682I_I2S + probe AUDIO MAX98373_ALC5682I_I2S + end + end + chip drivers/i2c/max98373 + register "vmon_slot_no" = "0" + register "imon_slot_no" = "1" + register "uid" = "0" + register "desc" = ""Right Speaker Amp"" + register "name" = ""MAXR"" + device i2c 31 on + probe AUDIO MAX98373_ALC5682I_I2S + end + end + chip drivers/i2c/max98373 + register "vmon_slot_no" = "2" + register "imon_slot_no" = "3" + register "uid" = "1" + register "desc" = ""Left Speaker Amp"" + register "name" = ""MAXL"" + device i2c 32 on + probe AUDIO MAX98373_ALC5682I_I2S + end + end + end + device pci 1f.3 on + chip drivers/generic/max98357a + register "hid" = ""MX98357A"" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10)" + register "sdmode_delay" = "5" + device generic 0 on + probe AUDIO MAX98357_ALC5682I_I2S + end + end + chip drivers/intel/soundwire + device generic 0 on + probe AUDIO MAX98373_ALC5682_SNDW + chip drivers/soundwire/alc5682 + # SoundWire Link 0 ID 1 + register "desc" = ""Headset Codec"" + device generic 0.1 on end + end + chip drivers/soundwire/max98373 + # SoundWire Link 1 ID 3 + register "desc" = ""Left Speaker Amp"" + device generic 1.3 on end + end + chip drivers/soundwire/max98373 + # SoundWire Link 1 ID 7 + register "desc" = ""Right Speaker Amp"" + device generic 1.7 on end + end + end + end + end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/41896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabeb73307418dc16b12fa60ad26923cd9f6e1f3a Gerrit-Change-Number: 41896 Gerrit-PatchSet: 1 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: sconfig: Add support for firmware configuration
by Duncan Laurie (Code Review) 02 Jun '20

02 Jun '20

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41440 ) Change subject: sconfig: Add support for firmware configuration ...................................................................... sconfig: Add support for firmware configuration This change adds support to sconfig for generating the firmware configuration field and option definitions in devicetree.cb. In addition these fields and options can be used to probe for a device and have that device be disabled if it is not found at boot time. New tokens: fw_config: top level token, table can be defined before chips field: define field in the mask with the start and end bits option: define option in a field with the value of the field probe: indicate that a device should probe by field and option Example: fw_config field FEATURE 0 0 option DISABLE 0 option ENABLE 1 end end chip drivers/generic/feature device generic 0 on probe FEATURE ENABLE end end Variants can add new fields and add new options to existing fields in overridetree.cb but cannot redefine an existing option. Devices can have multiple probe tokens, and the device will be considered to be found if any of them return true. The output from defining this field are: 1) the various fields and options will be added as macro constants to static.h and can be used by fw_config for probing. 2) the probe entries will result in a list of fields/options to probe that is added to the resulting struct device and handled by coreboot. BUG=b:147462631 Signed-off-by: Duncan Laurie <dlaurie(a)google.com> Change-Id: I8aea63e577d933aea09e0d0b09470929cc96e0de --- M util/sconfig/lex.yy.c_shipped M util/sconfig/main.c M util/sconfig/sconfig.h M util/sconfig/sconfig.l M util/sconfig/sconfig.tab.c_shipped M util/sconfig/sconfig.tab.h_shipped M util/sconfig/sconfig.y 7 files changed, 568 insertions(+), 245 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/41440/1 diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped index 61928e6..998505e 100644 --- a/util/sconfig/lex.yy.c_shipped +++ b/util/sconfig/lex.yy.c_shipped @@ -349,8 +349,8 @@ (yy_hold_char) = *yy_cp; \ *yy_cp = '\0'; \ (yy_c_buf_p) = yy_cp; -#define YY_NUM_RULES 41 -#define YY_END_OF_BUFFER 42 +#define YY_NUM_RULES 45 +#define YY_END_OF_BUFFER 46 /* This struct is not used in this scanner, but its presence is necessary. */ struct yy_trans_info @@ -358,27 +358,30 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static const flex_int16_t yy_accept[173] = +static const flex_int16_t yy_accept[195] = { 0, - 0, 0, 42, 40, 1, 3, 40, 40, 40, 35, - 35, 33, 36, 40, 36, 36, 36, 40, 40, 40, - 40, 40, 40, 40, 40, 40, 40, 40, 1, 3, - 40, 0, 40, 40, 0, 2, 35, 36, 40, 40, - 40, 40, 36, 40, 40, 40, 40, 40, 40, 40, - 40, 27, 40, 40, 40, 40, 40, 40, 7, 40, - 40, 40, 40, 40, 40, 40, 39, 39, 40, 0, - 34, 40, 40, 17, 40, 40, 26, 31, 40, 40, - 40, 14, 40, 40, 25, 40, 23, 40, 40, 8, - 11, 13, 40, 40, 21, 40, 22, 40, 0, 37, + 0, 0, 46, 44, 1, 3, 44, 44, 44, 39, + 39, 37, 40, 44, 40, 40, 40, 40, 44, 44, + 44, 44, 44, 44, 44, 44, 44, 44, 44, 1, + 3, 44, 0, 44, 44, 0, 2, 39, 40, 44, + 44, 44, 44, 40, 44, 44, 44, 44, 44, 44, + 44, 44, 44, 44, 31, 44, 44, 44, 44, 44, + 44, 11, 44, 44, 44, 44, 44, 44, 44, 44, + 44, 43, 43, 44, 0, 38, 44, 44, 21, 44, + 44, 30, 35, 44, 44, 44, 44, 44, 18, 44, + 44, 29, 44, 27, 44, 44, 12, 44, 15, 17, - 4, 40, 40, 40, 24, 40, 40, 40, 40, 40, - 40, 20, 40, 40, 40, 38, 38, 40, 40, 40, - 40, 40, 40, 40, 15, 40, 40, 40, 40, 40, - 5, 18, 40, 9, 40, 12, 40, 40, 40, 40, - 40, 19, 29, 40, 40, 40, 40, 40, 40, 40, - 40, 6, 40, 40, 40, 40, 10, 40, 40, 40, - 28, 40, 40, 16, 40, 30, 40, 40, 40, 40, - 32, 0 + 44, 44, 44, 25, 44, 26, 44, 0, 41, 4, + 44, 44, 44, 28, 44, 44, 44, 44, 44, 44, + 44, 44, 24, 44, 44, 44, 44, 44, 42, 42, + 44, 44, 44, 8, 44, 44, 44, 44, 44, 19, + 44, 44, 10, 44, 44, 44, 44, 5, 22, 44, + 44, 13, 44, 16, 44, 9, 44, 44, 44, 44, + 44, 23, 33, 44, 44, 44, 44, 44, 44, 44, + 44, 44, 6, 44, 44, 44, 7, 44, 14, 44, + 44, 44, 32, 44, 44, 20, 44, 34, 44, 44, + 44, 44, 36, 0 + } ; static const YY_CHAR yy_ec[256] = @@ -395,8 +398,8 @@ 1, 1, 1, 1, 16, 1, 17, 18, 19, 20, 21, 22, 23, 24, 25, 1, 1, 26, 27, 28, - 29, 30, 31, 32, 33, 34, 35, 36, 1, 37, - 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, + 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -413,126 +416,142 @@ 1, 1, 1, 1, 1 } ; -static const YY_CHAR yy_meta[39] = +static const YY_CHAR yy_meta[40] = { 0, 1, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1 + 1, 1, 1, 1, 1, 1, 1, 1, 1 } ; -static const flex_int16_t yy_base[180] = +static const flex_int16_t yy_base[202] = { 0, - 0, 0, 240, 0, 237, 241, 235, 37, 41, 38, - 200, 0, 44, 222, 54, 78, 60, 214, 209, 45, - 49, 48, 42, 52, 212, 62, 199, 0, 229, 241, - 93, 225, 98, 79, 226, 241, 0, 97, 104, 213, - 202, 191, 110, 198, 193, 203, 192, 193, 200, 200, - 194, 200, 185, 185, 195, 185, 187, 189, 0, 185, - 179, 185, 189, 181, 187, 186, 0, 241, 125, 198, - 0, 191, 171, 184, 174, 181, 0, 0, 172, 175, - 175, 0, 173, 163, 0, 167, 0, 171, 161, 0, - 0, 0, 164, 163, 0, 154, 0, 181, 180, 0, + 0, 0, 265, 0, 262, 266, 260, 38, 42, 39, + 224, 0, 45, 247, 55, 79, 61, 58, 239, 234, + 46, 54, 55, 68, 73, 237, 46, 224, 0, 254, + 266, 101, 250, 107, 111, 251, 266, 0, 108, 111, + 238, 227, 216, 117, 223, 218, 228, 217, 225, 229, + 216, 223, 223, 217, 223, 208, 208, 218, 208, 210, + 212, 0, 199, 207, 201, 201, 206, 210, 202, 208, + 207, 0, 266, 132, 219, 0, 212, 192, 205, 195, + 202, 0, 0, 193, 191, 197, 194, 194, 0, 192, + 182, 0, 186, 0, 190, 180, 0, 183, 0, 0, - 0, 165, 164, 157, 0, 149, 159, 147, 153, 158, - 159, 0, 142, 145, 135, 0, 241, 146, 150, 142, - 144, 140, 142, 147, 0, 131, 130, 130, 129, 126, - 0, 0, 141, 0, 125, 129, 115, 122, 126, 107, - 107, 0, 0, 114, 106, 105, 103, 114, 100, 101, - 94, 0, 105, 102, 99, 83, 0, 80, 83, 70, - 0, 60, 71, 0, 74, 0, 63, 55, 39, 29, - 0, 241, 40, 146, 148, 150, 152, 154, 156 + 189, 181, 180, 0, 171, 0, 198, 197, 0, 0, + 182, 181, 174, 0, 178, 168, 164, 174, 162, 168, + 173, 174, 0, 161, 168, 155, 158, 147, 0, 266, + 159, 163, 155, 0, 154, 156, 152, 154, 159, 0, + 143, 148, 0, 141, 141, 140, 137, 0, 0, 149, + 151, 0, 135, 152, 138, 0, 145, 136, 117, 117, + 124, 0, 0, 123, 115, 114, 112, 123, 109, 119, + 109, 101, 0, 113, 111, 115, 0, 96, 0, 92, + 82, 70, 0, 65, 77, 0, 77, 0, 71, 59, + 44, 30, 0, 266, 41, 153, 155, 157, 159, 161, + + 163 } ; -static const flex_int16_t yy_def[180] = +static const flex_int16_t yy_def[202] = { 0, - 172, 1, 172, 173, 172, 172, 173, 174, 175, 173, - 10, 173, 10, 173, 10, 10, 10, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 172, 172, - 174, 176, 177, 175, 178, 172, 10, 10, 10, 173, - 173, 173, 10, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 172, 177, 179, - 39, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 172, 173, + 194, 1, 194, 195, 194, 194, 195, 196, 197, 195, + 10, 195, 10, 195, 10, 10, 10, 10, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 194, + 194, 196, 198, 199, 197, 200, 194, 10, 10, 10, + 195, 195, 195, 10, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 194, 199, 201, 40, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 172, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 0, 172, 172, 172, 172, 172, 172, 172 + 195, 195, 195, 195, 195, 195, 195, 194, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 194, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 195, 195, 195, 195, 195, 195, 195, + 195, 195, 195, 0, 194, 194, 194, 194, 194, 194, + + 194 } ; -static const flex_int16_t yy_nxt[280] = +static const flex_int16_t yy_nxt[306] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 10, 12, 13, 13, 14, 4, 4, 4, 13, 13, 15, 16, - 17, 13, 18, 19, 20, 21, 22, 4, 23, 24, - 4, 25, 26, 4, 27, 4, 4, 4, 32, 32, - 28, 33, 35, 36, 37, 37, 37, 171, 38, 38, - 38, 38, 38, 50, 38, 38, 38, 38, 38, 38, - 38, 38, 38, 58, 56, 54, 38, 38, 38, 59, - 60, 170, 51, 52, 57, 169, 53, 41, 55, 61, - 35, 36, 168, 42, 38, 38, 38, 46, 63, 167, - 166, 64, 47, 165, 32, 32, 65, 67, 43, 70, + 17, 18, 19, 20, 21, 22, 23, 4, 24, 25, + 4, 26, 27, 4, 28, 4, 4, 4, 4, 33, + 33, 29, 34, 36, 37, 38, 38, 38, 193, 39, + 39, 39, 39, 39, 53, 39, 39, 39, 39, 39, + 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, + 57, 59, 68, 54, 55, 69, 192, 56, 42, 191, + 70, 60, 49, 58, 43, 39, 39, 39, 47, 61, + 190, 64, 189, 48, 50, 62, 188, 63, 187, 44, - 70, 164, 28, 38, 38, 38, 44, 163, 162, 45, - 71, 71, 71, 161, 71, 71, 38, 38, 38, 160, - 71, 71, 71, 71, 71, 71, 70, 70, 159, 98, - 158, 157, 156, 155, 154, 153, 152, 151, 150, 149, - 148, 147, 146, 145, 144, 75, 31, 31, 34, 34, - 32, 32, 69, 69, 35, 35, 70, 70, 143, 142, + 65, 186, 33, 33, 66, 72, 185, 45, 75, 75, + 46, 29, 36, 37, 39, 39, 39, 76, 76, 76, + 184, 76, 76, 39, 39, 39, 183, 76, 76, 76, + 76, 76, 76, 75, 75, 182, 107, 181, 180, 179, + 178, 177, 176, 175, 174, 173, 172, 171, 170, 169, + 168, 167, 80, 32, 32, 35, 35, 33, 33, 74, + 74, 36, 36, 75, 75, 166, 165, 164, 163, 162, + 161, 160, 159, 158, 157, 156, 155, 154, 153, 152, + 151, 150, 149, 148, 147, 146, 145, 144, 143, 142, 141, 140, 139, 138, 137, 136, 135, 134, 133, 132, + 131, 130, 129, 128, 127, 126, 125, 124, 123, 122, 121, 120, 119, 118, 117, 116, 115, 114, 113, 112, - 111, 110, 109, 108, 107, 106, 105, 104, 103, 102, - - 101, 100, 99, 97, 96, 95, 94, 93, 92, 91, + 111, 110, 109, 108, 106, 105, 104, 103, 102, 101, + 100, 99, 98, 97, 96, 95, 94, 93, 92, 91, 90, 89, 88, 87, 86, 85, 84, 83, 82, 81, - 80, 79, 78, 77, 76, 74, 73, 72, 36, 68, - 29, 66, 62, 49, 48, 40, 39, 30, 29, 172, - 3, 172, 172, 172, 172, 172, 172, 172, 172, 172, - 172, 172, 172, 172, 172, 172, 172, 172, 172, 172, - 172, 172, 172, 172, 172, 172, 172, 172, 172, 172, - 172, 172, 172, 172, 172, 172, 172, 172, 172 + 79, 78, 77, 37, 73, 30, 71, 67, 52, 51, + 41, 40, 31, 30, 194, 3, 194, 194, 194, 194, + 194, 194, 194, 194, 194, 194, 194, 194, 194, 194, + 194, 194, 194, 194, 194, 194, 194, 194, 194, 194, + 194, 194, 194, 194, 194, 194, 194, 194, 194, 194, + + 194, 194, 194, 194, 194 } ; -static const flex_int16_t yy_chk[280] = +static const flex_int16_t yy_chk[306] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 8, 8, - 173, 8, 9, 9, 10, 10, 10, 170, 10, 10, - 13, 13, 13, 20, 10, 10, 10, 10, 10, 10, - 15, 15, 15, 23, 22, 21, 17, 17, 17, 23, - 24, 169, 20, 20, 22, 168, 20, 15, 21, 24, - 34, 34, 167, 15, 16, 16, 16, 17, 26, 165, - 163, 26, 17, 162, 31, 31, 26, 31, 16, 33, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 8, + 8, 195, 8, 9, 9, 10, 10, 10, 192, 10, + 10, 13, 13, 13, 21, 10, 10, 10, 10, 10, + 10, 15, 15, 15, 18, 18, 18, 17, 17, 17, + 22, 23, 27, 21, 21, 27, 191, 21, 15, 190, + 27, 23, 18, 22, 15, 16, 16, 16, 17, 24, + 189, 25, 187, 17, 18, 24, 185, 24, 184, 16, - 33, 160, 33, 38, 38, 38, 16, 159, 158, 16, - 39, 39, 39, 156, 39, 39, 43, 43, 43, 155, - 39, 39, 39, 39, 39, 39, 69, 69, 154, 69, - 153, 151, 150, 149, 148, 147, 146, 145, 144, 141, - 140, 139, 138, 137, 136, 43, 174, 174, 175, 175, - 176, 176, 177, 177, 178, 178, 179, 179, 135, 133, - 130, 129, 128, 127, 126, 124, 123, 122, 121, 120, - 119, 118, 115, 114, 113, 111, 110, 109, 108, 107, - 106, 104, 103, 102, 99, 98, 96, 94, 93, 89, - 88, 86, 84, 83, 81, 80, 79, 76, 75, 74, + 25, 182, 32, 32, 25, 32, 181, 16, 34, 34, + 16, 34, 35, 35, 39, 39, 39, 40, 40, 40, + 180, 40, 40, 44, 44, 44, 178, 40, 40, 40, + 40, 40, 40, 74, 74, 176, 74, 175, 174, 172, + 171, 170, 169, 168, 167, 166, 165, 164, 161, 160, + 159, 158, 44, 196, 196, 197, 197, 198, 198, 199, + 199, 200, 200, 201, 201, 157, 155, 154, 153, 151, + 150, 147, 146, 145, 144, 142, 141, 139, 138, 137, + 136, 135, 133, 132, 131, 128, 127, 126, 125, 124, + 122, 121, 120, 119, 118, 117, 116, 115, 113, 112, - 73, 72, 70, 66, 65, 64, 63, 62, 61, 60, - 58, 57, 56, 55, 54, 53, 52, 51, 50, 49, - 48, 47, 46, 45, 44, 42, 41, 40, 35, 32, - 29, 27, 25, 19, 18, 14, 11, 7, 5, 3, - 172, 172, 172, 172, 172, 172, 172, 172, 172, 172, - 172, 172, 172, 172, 172, 172, 172, 172, 172, 172, - 172, 172, 172, 172, 172, 172, 172, 172, 172, 172, - 172, 172, 172, 172, 172, 172, 172, 172, 172 + 111, 108, 107, 105, 103, 102, 101, 98, 96, 95, + 93, 91, 90, 88, 87, 86, 85, 84, 81, 80, + 79, 78, 77, 75, 71, 70, 69, 68, 67, 66, + 65, 64, 63, 61, 60, 59, 58, 57, 56, 55, + 54, 53, 52, 51, 50, 49, 48, 47, 46, 45, + 43, 42, 41, 36, 33, 30, 28, 26, 20, 19, + 14, 11, 7, 5, 3, 194, 194, 194, 194, 194, + 194, 194, 194, 194, 194, 194, 194, 194, 194, 194, + 194, 194, 194, 194, 194, 194, 194, 194, 194, 194, + 194, 194, 194, 194, 194, 194, 194, 194, 194, 194, + + 194, 194, 194, 194, 194 } ; static yy_state_type yy_last_accepting_state; @@ -549,21 +568,8 @@ #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -/* - * sconfig, coreboot device tree compiler - * - * Copyright (C) 2010 coresystems GmbH - * written by Patrick Georgi <patrick(a)georgi-clan.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* sconfig, coreboot device tree compiler */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include "sconfig.tab.h" @@ -810,13 +816,13 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 173 ) + if ( yy_current_state >= 195 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } - while ( yy_base[yy_current_state] != 241 ); + while ( yy_base[yy_current_state] != 266 ); yy_find_action: yy_act = yy_accept[yy_current_state]; @@ -868,144 +874,160 @@ YY_BREAK case 7: YY_RULE_SETUP -{yylval.number=1; return(BOOL);} +{return(FW_CONFIG_TABLE);} YY_BREAK case 8: YY_RULE_SETUP -{yylval.number=0; return(BOOL);} +{return(FW_CONFIG_FIELD);} YY_BREAK case 9: YY_RULE_SETUP -{yylval.number=3; return(STATUS);} +{return(FW_CONFIG_OPTION);} YY_BREAK case 10: YY_RULE_SETUP -{yylval.number=5; return(STATUS);} +{return(FW_CONFIG_PROBE);} YY_BREAK case 11: YY_RULE_SETUP -{yylval.number=PCI; return(BUS);} +{yylval.number=1; return(BOOL);} YY_BREAK case 12: YY_RULE_SETUP -{yylval.number=IOAPIC; return(BUS);} +{yylval.number=0; return(BOOL);} YY_BREAK case 13: YY_RULE_SETUP -{yylval.number=PNP; return(BUS);} +{yylval.number=3; return(STATUS);} YY_BREAK case 14: YY_RULE_SETUP -{yylval.number=I2C; return(BUS);} +{yylval.number=5; return(STATUS);} YY_BREAK case 15: YY_RULE_SETUP -{yylval.number=APIC; return(BUS);} +{yylval.number=PCI; return(BUS);} YY_BREAK case 16: YY_RULE_SETUP -{yylval.number=CPU_CLUSTER; return(BUS);} +{yylval.number=IOAPIC; return(BUS);} YY_BREAK case 17: YY_RULE_SETUP -{yylval.number=CPU; return(BUS);} +{yylval.number=PNP; return(BUS);} YY_BREAK case 18: YY_RULE_SETUP -{yylval.number=DOMAIN; return(BUS);} +{yylval.number=I2C; return(BUS);} YY_BREAK case 19: YY_RULE_SETUP -{yylval.number=GENERIC; return(BUS);} +{yylval.number=APIC; return(BUS);} YY_BREAK case 20: YY_RULE_SETUP -{yylval.number=MMIO; return(BUS);} +{yylval.number=CPU_CLUSTER; return(BUS);} YY_BREAK case 21: YY_RULE_SETUP -{yylval.number=SPI; return(BUS);} +{yylval.number=CPU; return(BUS);} YY_BREAK case 22: YY_RULE_SETUP -{yylval.number=USB; return(BUS);} +{yylval.number=DOMAIN; return(BUS);} YY_BREAK case 23: YY_RULE_SETUP -{yylval.number=LPC; return(BUS);} +{yylval.number=GENERIC; return(BUS);} YY_BREAK case 24: YY_RULE_SETUP -{yylval.number=ESPI; return(BUS);} +{yylval.number=MMIO; return(BUS);} YY_BREAK case 25: YY_RULE_SETUP -{yylval.number=IRQ; return(RESOURCE);} +{yylval.number=SPI; return(BUS);} YY_BREAK case 26: YY_RULE_SETUP -{yylval.number=DRQ; return(RESOURCE);} +{yylval.number=USB; return(BUS);} YY_BREAK case 27: YY_RULE_SETUP -{yylval.number=IO; return(RESOURCE);} +{yylval.number=LPC; return(BUS);} YY_BREAK case 28: YY_RULE_SETUP -{return(IOAPIC_IRQ);} +{yylval.number=ESPI; return(BUS);} YY_BREAK case 29: YY_RULE_SETUP -{return(INHERIT);} +{yylval.number=IRQ; return(RESOURCE);} YY_BREAK case 30: YY_RULE_SETUP -{return(SUBSYSTEMID);} +{yylval.number=DRQ; return(RESOURCE);} YY_BREAK case 31: YY_RULE_SETUP -{return(END);} +{yylval.number=IO; return(RESOURCE);} YY_BREAK case 32: YY_RULE_SETUP -{return(SLOT_DESC);} +{return(IOAPIC_IRQ);} YY_BREAK case 33: YY_RULE_SETUP -{return(EQUALS);} +{return(INHERIT);} YY_BREAK case 34: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} +{return(SUBSYSTEMID);} YY_BREAK case 35: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} +{return(END);} YY_BREAK case 36: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} +{return(SLOT_DESC);} YY_BREAK case 37: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(PCIINT);} +{return(EQUALS);} YY_BREAK case 38: -/* rule 38 can match eol */ YY_RULE_SETUP -{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 39: -/* rule 39 can match eol */ YY_RULE_SETUP -{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 40: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(STRING);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 41: YY_RULE_SETUP +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(PCIINT);} + YY_BREAK +case 42: +/* rule 42 can match eol */ +YY_RULE_SETUP +{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} + YY_BREAK +case 43: +/* rule 43 can match eol */ +YY_RULE_SETUP +{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} + YY_BREAK +case 44: +YY_RULE_SETUP +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(STRING);} + YY_BREAK +case 45: +YY_RULE_SETUP ECHO; YY_BREAK case YY_STATE_EOF(INITIAL): @@ -1304,7 +1326,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 173 ) + if ( yy_current_state >= 195 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; @@ -1332,11 +1354,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 173 ) + if ( yy_current_state >= 195 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; - yy_is_jam = (yy_current_state == 172); + yy_is_jam = (yy_current_state == 194); return yy_is_jam ? 0 : yy_current_state; } diff --git a/util/sconfig/main.c b/util/sconfig/main.c index 6676bae..c408329 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -5,6 +5,7 @@ /* stat.h needs to be included before commonlib/helpers.h to avoid errors.*/ #include <sys/stat.h> #include <commonlib/helpers.h> +#include <stdint.h> #include "sconfig.h" #include "sconfig.tab.h" @@ -323,6 +324,190 @@ return instance; } +/* List of fw_config fields added during parsing. */ +static struct fw_config_field *fw_config_fields; + +static struct fw_config_option *find_fw_config_option(struct fw_config_field *field, + const char *name) +{ + struct fw_config_option *option = field->options; + + while (option && option->name) { + if (!strncasecmp(option->name, name, strlen(option->name))) + return option; + option = option->next; + } + return NULL; +} + +static struct fw_config_field *find_fw_config_field(const char *name) +{ + struct fw_config_field *field = fw_config_fields; + + while (field && field->name) { + if (!strncasecmp(field->name, name, strlen(field->name))) + return field; + field = field->next; + } + return NULL; +} + +static void append_fw_config_field(struct fw_config_field *add) +{ + struct fw_config_field *field = fw_config_fields; + + if (!fw_config_fields) { + fw_config_fields = add; + } else { + while (field && field->next) + field = field->next; + field->next = add; + } +} + +struct fw_config_field *new_fw_config_field(const char *name, + unsigned int start_bit, unsigned int end_bit) +{ + struct fw_config_field *field = find_fw_config_field(name); + + if (!field) { + field = S_ALLOC(sizeof(*field)); + field->name = name; + field->start_bit = start_bit; + field->end_bit = end_bit; + append_fw_config_field(field); + } + return field; +} + +static void append_fw_config_option_to_field(struct fw_config_field *field, + struct fw_config_option *add) +{ + struct fw_config_option *option = field->options; + + if (!option) { + field->options = add; + } else { + while (option && option->next) + option = option->next; + option->next = add; + } +} + +void add_fw_config_option(struct fw_config_field *field, const char *name, unsigned int value) +{ + struct fw_config_option *option = S_ALLOC(sizeof(*option)); + + option->name = name; + option->value = value; + + /* Add option to the current field. */ + append_fw_config_option_to_field(field, option); +} + +static void append_fw_config_probe_to_dev(struct device *dev, struct fw_config_probe *add) +{ + struct fw_config_probe *probe = dev->probe; + + if (!probe) { + dev->probe = add; + } else { + while (probe && probe->next) + probe = probe->next; + probe->next = add; + } +} + +void add_fw_config_probe(struct bus *bus, const char *field, const char *option) +{ + struct fw_config_probe *probe = S_ALLOC(sizeof(*probe)); + + probe->field = field; + probe->option = option; + + append_fw_config_probe_to_dev(bus->dev, probe); +} + +static void emit_fw_config(FILE *fil) +{ + struct fw_config_field *field = fw_config_fields; + + if (!field) + return; + + fprintf(fil, "\n/* firmware configuration */\n"); + fprintf(fil, "#include <fw_config.h>\n"); + + while (field) { + struct fw_config_option *option = field->options; + uint32_t mask; + + fprintf(fil, "#define FW_CONFIG_FIELD_%s_NAME \"%s\"\n", + field->name, field->name); + + /* Compute mask from start and end bit. */ + mask = ((1 << (1 + field->end_bit - field->start_bit)) - 1); + mask <<= field->start_bit; + + fprintf(fil, "#define FW_CONFIG_FIELD_%s_MASK 0x%08x\n", + field->name, mask); + + while (option) { + fprintf(fil, "#define FW_CONFIG_FIELD_%s_OPTION_%s_NAME \"%s\"\n", + field->name, option->name, option->name); + fprintf(fil, "#define FW_CONFIG_FIELD_%s_OPTION_%s_VALUE 0x%08x\n", + field->name, option->name, option->value << field->start_bit); + + option = option->next; + } + + field = field->next; + } + + fprintf(fil, "\n"); +} + +static void emit_fw_config_probe(FILE *fil, struct device *dev) +{ + struct fw_config_probe *probe = dev->probe; + + fprintf(fil, "DEVTREE_CONST struct fw_config %s_probe_list[] = {\n", dev->name); + + while (probe) { + /* Find matching field. */ + struct fw_config_field *field; + struct fw_config_option *option; + uint32_t mask, value; + + field = find_fw_config_field(probe->field); + if (!field) { + printf("ERROR: fw_config_probe field %s not found\n", probe->field); + exit(1); + } + option = find_fw_config_option(field, probe->option); + if (!option) { + printf("ERROR: fw_config_probe field %s option %s not found\n", + probe->field, probe->option); + exit(1); + } + + /* Fill out the probe structure with values from emit_fw_config(). */ + fprintf(fil, "\t{\n"); + fprintf(fil, "\t\t.field_name = FW_CONFIG_FIELD_%s_NAME,\n", probe->field); + fprintf(fil, "\t\t.option_name = FW_CONFIG_FIELD_%s_OPTION_%s_NAME,\n", + probe->field, probe->option); + fprintf(fil, "\t\t.mask = FW_CONFIG_FIELD_%s_MASK,\n", probe->field); + fprintf(fil, "\t\t.value = FW_CONFIG_FIELD_%s_OPTION_%s_VALUE,\n", + probe->field, probe->option); + fprintf(fil, "\t},\n"); + + probe = probe->next; + } + + /* Add empty entry to mark end of list. */ + fprintf(fil, "\t{ }\n};\n"); +} + /* * Allocate a new bus for the provided device. * - If this is the first bus being allocated under this device, then its id @@ -732,6 +917,10 @@ if (chip_ins->base_chip_instance) chip_ins = chip_ins->base_chip_instance; + /* Emit probe structures. */ + if (ptr->probe) + emit_fw_config_probe(fil, ptr); + if (ptr == &base_root_dev) fprintf(fil, "DEVTREE_CONST struct device %s = {\n", ptr->name); else @@ -779,6 +968,8 @@ else fprintf(fil, "\t.sibling = NULL,\n"); fprintf(fil, "#if !DEVTREE_EARLY\n"); + if (ptr->probe) + fprintf(fil, "\t.probe_list = %s_probe_list,\n", ptr->name); for (pin = 0; pin < 4; pin++) { if (ptr->pci_irq_info[pin].ioapic_irq_pin > 0) fprintf(fil, @@ -1345,7 +1536,9 @@ fprintf(autohead, "#ifndef __STATIC_DEVICE_TREE_H\n"); fprintf(autohead, "#define __STATIC_DEVICE_TREE_H\n\n"); fprintf(autohead, "#include <device/device.h>\n\n"); + emit_fw_config(autohead); + fprintf(autogen, "#include <static.h>\n"); emit_chips(autogen); walk_device_tree(autogen, autohead, &base_root_dev, inherit_subsystem_ids); diff --git a/util/sconfig/sconfig.h b/util/sconfig/sconfig.h index a960b7f..55a2617 100644 --- a/util/sconfig/sconfig.h +++ b/util/sconfig/sconfig.h @@ -8,6 +8,7 @@ #include <unistd.h> #include <errno.h> + struct resource; struct resource { int type; @@ -28,6 +29,27 @@ int ioapic_dst_id; }; +struct fw_config_option; +struct fw_config_option { + const char *name; + unsigned int value; + struct fw_config_option *next; +}; +struct fw_config_field; +struct fw_config_field { + const char *name; + unsigned int start_bit; + unsigned int end_bit; + struct fw_config_field *next; + struct fw_config_option *options; +}; +struct fw_config_probe; +struct fw_config_probe { + const char *field; + const char *option; + struct fw_config_probe *next; +}; + struct chip; struct chip_instance { /* Monotonically increasing ID for each chip instance. */ @@ -141,6 +163,9 @@ /* SMBIOS slot length */ char *smbios_slot_length; + + /* List of field+option to probe. */ + struct fw_config_probe *probe; }; extern struct bus *root_parent; @@ -171,3 +196,11 @@ struct chip_instance *new_chip_instance(char *path); void add_register(struct chip_instance *chip, char *name, char *val); + +struct fw_config_field *new_fw_config_field(const char *name, + unsigned int start_bit, unsigned int end_bit); + +void add_fw_config_option(struct fw_config_field *field, const char *name, + unsigned int value); + +void add_fw_config_probe(struct bus *bus, const char *field, const char *option); diff --git a/util/sconfig/sconfig.l b/util/sconfig/sconfig.l index 5ac5057..10a86a2 100755 --- a/util/sconfig/sconfig.l +++ b/util/sconfig/sconfig.l @@ -14,6 +14,10 @@ chip {return(CHIP);} device {return(DEVICE);} register {return(REGISTER);} +fw_config {return(FW_CONFIG_TABLE);} +field {return(FW_CONFIG_FIELD);} +option {return(FW_CONFIG_OPTION);} +probe {return(FW_CONFIG_PROBE);} on {yylval.number=1; return(BOOL);} off {yylval.number=0; return(BOOL);} hidden {yylval.number=3; return(STATUS);} diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index 2bae43b..5399c77 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -1,4 +1,4 @@ -/* A Bison parser, made by GNU Bison 3.5.4. */ +/* A Bison parser, made by GNU Bison 3.5.1. */ /* Bison implementation for Yacc-like parsers in C @@ -48,7 +48,7 @@ #define YYBISON 1 /* Bison version. */ -#define YYBISON_VERSION "3.5.4" +#define YYBISON_VERSION "3.5.1" /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" @@ -77,6 +77,7 @@ static struct bus *cur_parent; static struct chip_instance *cur_chip_instance; +static struct fw_config_field *cur_field; @@ -111,8 +112,8 @@ /* Use api.header.include to #include this header instead of duplicating it here. */ -#ifndef YY_YY_HOME_ME_REPOS_COREBOOTORG_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED -# define YY_YY_HOME_ME_REPOS_COREBOOTORG_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +#ifndef YY_YY_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +# define YY_YY_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 @@ -160,7 +161,11 @@ USB = 289, MMIO = 290, LPC = 291, - ESPI = 292 + ESPI = 292, + FW_CONFIG_TABLE = 293, + FW_CONFIG_FIELD = 294, + FW_CONFIG_OPTION = 295, + FW_CONFIG_PROBE = 296 }; #endif @@ -186,7 +191,7 @@ int yyparse (void); -#endif /* !YY_YY_HOME_ME_REPOS_COREBOOTORG_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ +#endif /* !YY_YY_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ @@ -490,21 +495,21 @@ #endif /* !YYCOPY_NEEDED */ /* YYFINAL -- State number of the termination state. */ -#define YYFINAL 3 +#define YYFINAL 2 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 45 +#define YYLAST 62 /* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 38 +#define YYNTOKENS 42 /* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 15 +#define YYNNTS 21 /* YYNRULES -- Number of rules. */ -#define YYNRULES 29 +#define YYNRULES 40 /* YYNSTATES -- Number of states. */ -#define YYNSTATES 50 +#define YYNSTATES 69 #define YYUNDEFTOK 2 -#define YYMAXUTOK 292 +#define YYMAXUTOK 296 /* YYTRANSLATE(TOKEN-NUM) -- Symbol number corresponding to TOKEN-NUM @@ -545,16 +550,18 @@ 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37 + 35, 36, 37, 38, 39, 40, 41 }; #if YYDEBUG /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ static const yytype_int8 yyrline[] = { - 0, 36, 36, 36, 38, 38, 38, 38, 40, 40, - 40, 40, 40, 40, 40, 40, 42, 42, 51, 51, - 59, 59, 61, 64, 67, 70, 73, 76, 79, 82 + 0, 24, 24, 24, 24, 26, 26, 26, 26, 28, + 28, 28, 28, 28, 28, 28, 28, 28, 30, 30, + 39, 39, 47, 47, 49, 52, 55, 58, 61, 64, + 67, 70, 73, 75, 75, 77, 77, 79, 79, 84, + 87 }; #endif @@ -568,9 +575,13 @@ "STRING", "PCI", "PNP", "I2C", "APIC", "CPU_CLUSTER", "CPU", "DOMAIN", "IRQ", "DRQ", "SLOT_DESC", "IO", "NUMBER", "SUBSYSTEMID", "INHERIT", "IOAPIC_IRQ", "IOAPIC", "PCIINT", "GENERIC", "SPI", "USB", "MMIO", "LPC", - "ESPI", "$accept", "devtree", "$@1", "chipchildren", "devicechildren", - "chip", "@2", "device", "@3", "status", "resource", "registers", - "subsystemid", "ioapic_irq", "smbios_slot_desc", YY_NULLPTR + "ESPI", "FW_CONFIG_TABLE", "FW_CONFIG_FIELD", "FW_CONFIG_OPTION", + "FW_CONFIG_PROBE", "$accept", "devtree", "chipchildren", + "devicechildren", "chip", "@1", "device", "@2", "status", "resource", + "registers", "subsystemid", "ioapic_irq", "smbios_slot_desc", + "fw_config_table", "fw_config_table_children", + "fw_config_field_children", "fw_config_field", "$@3", "fw_config_option", + "fw_config_probe", YY_NULLPTR }; #endif @@ -582,7 +593,8 @@ 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, - 285, 286, 287, 288, 289, 290, 291, 292 + 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, + 295, 296 }; # endif @@ -600,11 +612,13 @@ STATE-NUM. */ static const yytype_int8 yypact[] = { - -10, 11, 10, -10, 0, -10, -10, -10, 1, 6, - 2, -10, -10, -10, -10, -9, 8, 3, 4, -10, - -10, -10, -10, -10, -3, -4, -10, 9, -1, 5, - -10, -10, -10, -10, -10, -10, -10, 15, 14, 7, - -2, 12, 16, 13, 17, -10, 18, -10, -10, -10 + -10, 3, -10, -1, -10, -10, -10, -10, -2, -10, + -10, 2, -10, 7, -9, 10, 6, -10, -10, -10, + -10, -4, 1, 11, -10, 8, 14, -10, -10, -10, + -10, -10, -7, -10, -10, 16, -10, -3, 5, 9, + -10, 18, 13, 17, 20, -10, -10, -10, -10, -10, + -10, -10, -10, -10, 24, 26, 19, -6, 28, 21, + 30, 22, 23, -10, -10, 32, -10, -10, -10 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. @@ -612,25 +626,29 @@ means the default is an error. */ static const yytype_int8 yydefact[] = { - 2, 0, 0, 1, 0, 3, 16, 7, 0, 0, - 0, 17, 5, 4, 6, 0, 0, 0, 0, 20, - 21, 18, 23, 15, 0, 0, 19, 0, 0, 0, - 9, 8, 10, 14, 11, 12, 13, 0, 0, 0, - 0, 0, 29, 24, 0, 22, 28, 25, 26, 27 + 2, 0, 1, 0, 34, 3, 4, 18, 0, 8, + 32, 0, 33, 0, 0, 0, 0, 19, 6, 5, + 7, 0, 0, 0, 37, 0, 0, 36, 22, 23, + 20, 25, 0, 17, 38, 0, 35, 0, 0, 0, + 21, 0, 0, 0, 0, 10, 9, 11, 15, 12, + 13, 14, 16, 39, 0, 0, 0, 0, 0, 0, + 31, 26, 0, 40, 24, 30, 27, 28, 29 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int8 yypgoto[] = { - -10, -10, -10, -10, -10, -5, -10, 20, -10, -10, - -10, 21, -10, -10, -10 + -10, -10, -10, -10, -8, -10, 15, -10, -10, -10, + 25, -10, -10, -10, -10, -10, -10, -10, -10, -10, + -10 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int8 yydefgoto[] = { - -1, 1, 2, 8, 24, 5, 7, 13, 23, 21, - 32, 14, 34, 35, 36 + -1, 1, 13, 37, 5, 9, 19, 33, 30, 47, + 20, 49, 50, 51, 6, 8, 32, 12, 27, 36, + 52 }; /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If @@ -638,47 +656,57 @@ number is the opposite. If YYTABLE_NINF, syntax error. */ static const yytype_int8 yytable[] = { - 4, 9, 10, 12, 4, 9, 10, 25, 26, 19, - 20, 3, 11, 4, 6, 15, 16, 17, 22, 30, - 18, 27, 37, 38, 28, 39, 29, 41, 42, 44, - 46, 40, 49, 43, 0, 0, 0, 0, 45, 0, - 0, 47, 0, 48, 31, 33 + 3, 15, 16, 2, 34, 18, 3, 39, 40, 10, + 3, 15, 16, 7, 28, 29, 14, 21, 17, 22, + 23, 41, 24, 26, 42, 62, 43, 25, 31, 45, + 38, 53, 55, 35, 58, 54, 59, 11, 44, 56, + 60, 4, 63, 57, 65, 61, 68, 64, 0, 67, + 66, 0, 46, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 48 }; static const yytype_int8 yycheck[] = { - 3, 4, 5, 8, 3, 4, 5, 10, 11, 6, - 7, 0, 11, 3, 14, 9, 14, 26, 14, 24, - 12, 24, 26, 14, 27, 26, 29, 12, 14, 31, - 14, 26, 14, 26, -1, -1, -1, -1, 26, -1, - -1, 28, -1, 26, 24, 24 + 3, 4, 5, 0, 11, 13, 3, 10, 11, 11, + 3, 4, 5, 14, 6, 7, 14, 26, 11, 9, + 14, 24, 26, 12, 27, 31, 29, 26, 14, 37, + 14, 26, 14, 40, 14, 26, 12, 39, 41, 26, + 14, 38, 14, 26, 14, 26, 14, 26, -1, 26, + 28, -1, 37, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 37 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing symbol of state STATE-NUM. */ static const yytype_int8 yystos[] = { - 0, 39, 40, 0, 3, 43, 14, 44, 41, 4, - 5, 11, 43, 45, 49, 9, 14, 26, 12, 6, - 7, 47, 14, 46, 42, 10, 11, 24, 27, 29, - 43, 45, 48, 49, 50, 51, 52, 26, 14, 26, - 26, 12, 14, 26, 31, 26, 14, 28, 26, 14 + 0, 43, 0, 3, 38, 46, 56, 14, 57, 47, + 11, 39, 59, 44, 14, 4, 5, 11, 46, 48, + 52, 26, 9, 14, 26, 26, 12, 60, 6, 7, + 50, 14, 58, 49, 11, 40, 61, 45, 14, 10, + 11, 24, 27, 29, 41, 46, 48, 51, 52, 53, + 54, 55, 62, 26, 26, 14, 26, 26, 14, 12, + 14, 26, 31, 14, 26, 14, 28, 26, 14 }; /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const yytype_int8 yyr1[] = { - 0, 38, 40, 39, 41, 41, 41, 41, 42, 42, - 42, 42, 42, 42, 42, 42, 44, 43, 46, 45, - 47, 47, 48, 49, 50, 50, 51, 52, 52, 52 + 0, 42, 43, 43, 43, 44, 44, 44, 44, 45, + 45, 45, 45, 45, 45, 45, 45, 45, 47, 46, + 49, 48, 50, 50, 51, 52, 53, 53, 54, 55, + 55, 55, 56, 57, 57, 58, 58, 60, 59, 61, + 62 }; /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ static const yytype_int8 yyr2[] = { - 0, 2, 0, 2, 2, 2, 2, 0, 2, 2, - 2, 2, 2, 2, 2, 0, 0, 5, 0, 7, - 1, 1, 4, 4, 3, 4, 4, 5, 4, 3 + 0, 2, 0, 2, 2, 2, 2, 2, 0, 2, + 2, 2, 2, 2, 2, 2, 2, 0, 0, 5, + 0, 7, 1, 1, 4, 4, 3, 4, 4, 5, + 4, 3, 3, 2, 0, 2, 0, 0, 7, 3, + 3 }; @@ -1377,7 +1405,7 @@ { cur_parent = root_parent; } break; - case 16: + case 18: { (yyval.chip_instance) = new_chip_instance((yyvsp[0].string)); chip_enqueue_tail(cur_chip_instance); @@ -1385,57 +1413,79 @@ } break; - case 17: + case 19: { cur_chip_instance = chip_dequeue_tail(); } break; - case 18: + case 20: { (yyval.dev) = new_device(cur_parent, cur_chip_instance, (yyvsp[-2].number), (yyvsp[-1].string), (yyvsp[0].number)); cur_parent = (yyval.dev)->last_bus; } break; - case 19: + case 21: { cur_parent = (yyvsp[-2].dev)->parent; } break; - case 22: + case 24: { add_resource(cur_parent, (yyvsp[-3].number), strtol((yyvsp[-2].string), NULL, 0), strtol((yyvsp[0].string), NULL, 0)); } break; - case 23: + case 25: { add_register(cur_chip_instance, (yyvsp[-2].string), (yyvsp[0].string)); } break; - case 24: + case 26: { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-1].string), NULL, 16), strtol((yyvsp[0].string), NULL, 16), 0); } break; - case 25: + case 27: { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-2].string), NULL, 16), strtol((yyvsp[-1].string), NULL, 16), 1); } break; - case 26: + case 28: { add_ioapic_info(cur_parent, strtol((yyvsp[-2].string), NULL, 16), (yyvsp[-1].string), strtol((yyvsp[0].string), NULL, 16)); } break; - case 27: + case 29: { add_slot_desc(cur_parent, (yyvsp[-3].string), (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string)); } break; - case 28: + case 30: { add_slot_desc(cur_parent, (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string), NULL); } break; - case 29: + case 31: { add_slot_desc(cur_parent, (yyvsp[-1].string), (yyvsp[0].string), NULL, NULL); } break; + case 32: + { } + break; + + case 37: + { + cur_field = new_fw_config_field((yyvsp[-2].string), strtoul((yyvsp[-1].string), NULL, 0), strtoul((yyvsp[0].string), NULL, 0)); +} + break; + + case 38: + { } + break; + + case 39: + { add_fw_config_option(cur_field, (yyvsp[-1].string), strtoul((yyvsp[0].string), NULL, 0)); } + break; + + case 40: + { add_fw_config_probe(cur_parent, (yyvsp[-1].string), (yyvsp[0].string)); } + break; + default: break; diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped index 5fa9d19..cadd847 100644 --- a/util/sconfig/sconfig.tab.h_shipped +++ b/util/sconfig/sconfig.tab.h_shipped @@ -1,4 +1,4 @@ -/* A Bison parser, made by GNU Bison 3.5.4. */ +/* A Bison parser, made by GNU Bison 3.5.1. */ /* Bison interface for Yacc-like parsers in C @@ -34,8 +34,8 @@ /* Undocumented macros, especially those whose name start with YY_, are private implementation details. Do not rely on them. */ -#ifndef YY_YY_HOME_ME_REPOS_COREBOOTORG_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED -# define YY_YY_HOME_ME_REPOS_COREBOOTORG_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +#ifndef YY_YY_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +# define YY_YY_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 @@ -83,7 +83,11 @@ USB = 289, MMIO = 290, LPC = 291, - ESPI = 292 + ESPI = 292, + FW_CONFIG_TABLE = 293, + FW_CONFIG_FIELD = 294, + FW_CONFIG_OPTION = 295, + FW_CONFIG_PROBE = 296 }; #endif @@ -109,4 +113,4 @@ int yyparse (void); -#endif /* !YY_YY_HOME_ME_REPOS_COREBOOTORG_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ +#endif /* !YY_YY_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index 161cf81..d6d6273 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -9,6 +9,7 @@ static struct bus *cur_parent; static struct chip_instance *cur_chip_instance; +static struct fw_config_field *cur_field; %} %union { @@ -18,13 +19,13 @@ int number; } -%token CHIP DEVICE REGISTER BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO LPC ESPI +%token CHIP DEVICE REGISTER BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO LPC ESPI FW_CONFIG_TABLE FW_CONFIG_FIELD FW_CONFIG_OPTION FW_CONFIG_PROBE %% -devtree: { cur_parent = root_parent; } chip; +devtree: { cur_parent = root_parent; } | devtree chip | devtree fw_config_table; chipchildren: chipchildren device | chipchildren chip | chipchildren registers | /* empty */ ; -devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | devicechildren ioapic_irq | devicechildren smbios_slot_desc | devicechildren registers | /* empty */ ; +devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | devicechildren ioapic_irq | devicechildren smbios_slot_desc | devicechildren registers | devicechildren fw_config_probe | /* empty */ ; chip: CHIP STRING /* == path */ { $<chip_instance>$ = new_chip_instance($<string>2); @@ -69,4 +70,20 @@ smbios_slot_desc: SLOT_DESC STRING STRING { add_slot_desc(cur_parent, $<string>2, $<string>3, NULL, NULL); }; +fw_config_table: FW_CONFIG_TABLE fw_config_table_children END { }; + +fw_config_table_children: fw_config_table_children fw_config_field | /* empty */ ; + +fw_config_field_children: fw_config_field_children fw_config_option | /* empty */ ; + +fw_config_field: FW_CONFIG_FIELD STRING NUMBER /* == start bit */ NUMBER /* == end bit */ { + cur_field = new_fw_config_field($<string>2, strtoul($<string>3, NULL, 0), strtoul($<string>4, NULL, 0)); +} + fw_config_field_children END { }; + +fw_config_option: FW_CONFIG_OPTION STRING NUMBER /* == field value */ + { add_fw_config_option(cur_field, $<string>2, strtoul($<string>3, NULL, 0)); }; + +fw_config_probe: FW_CONFIG_PROBE STRING /* == field */ STRING /* == option */ + { add_fw_config_probe(cur_parent, $<string>2, $<string>3); } %% -- To view, visit https://review.coreboot.org/c/coreboot/+/41440 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8aea63e577d933aea09e0d0b09470929cc96e0de Gerrit-Change-Number: 41440 Gerrit-PatchSet: 1 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

4 20

Change in coreboot[master]: amd/microcode: Change equivalant ID width as 16bit
by Bao Zheng (Code Review) 02 Jun '20

02 Jun '20

Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/41869 to review the following change. Change subject: amd/microcode: Change equivalant ID width as 16bit ...................................................................... amd/microcode: Change equivalant ID width as 16bit Change-Id: Iacabee7e571bd37f3aca106d515d755969daf8f3 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> --- M src/cpu/amd/pi/00730F01/microcode_fam16h.c M src/cpu/amd/pi/00730F01/update_microcode.c M src/include/cpu/amd/microcode.h 3 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/41869/1 diff --git a/src/cpu/amd/pi/00730F01/microcode_fam16h.c b/src/cpu/amd/pi/00730F01/microcode_fam16h.c index 496f2ec..7d47258 100644 --- a/src/cpu/amd/pi/00730F01/microcode_fam16h.c +++ b/src/cpu/amd/pi/00730F01/microcode_fam16h.c @@ -88,7 +88,7 @@ } static void amd_update_microcode(const void *ucode, size_t ucode_len, - uint32_t equivalent_processor_rev_id) + uint16_t equivalent_processor_rev_id) { const struct microcode *m; const uint8_t *c = ucode; @@ -99,7 +99,7 @@ apply_microcode_patch(m); } -void amd_update_microcode_from_cbfs(uint32_t equivalent_processor_rev_id) +void amd_update_microcode_from_cbfs(uint16_t equivalent_processor_rev_id) { const void *ucode; size_t ucode_len; diff --git a/src/cpu/amd/pi/00730F01/update_microcode.c b/src/cpu/amd/pi/00730F01/update_microcode.c index 9142681..e3f0c3b 100644 --- a/src/cpu/amd/pi/00730F01/update_microcode.c +++ b/src/cpu/amd/pi/00730F01/update_microcode.c @@ -37,7 +37,7 @@ void update_microcode(u32 cpu_deviceid) { - u32 equivalent_processor_rev_id = + u16 equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid); amd_update_microcode_from_cbfs(equivalent_processor_rev_id); } diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h index 8ebe675..29b5576 100644 --- a/src/include/cpu/amd/microcode.h +++ b/src/include/cpu/amd/microcode.h @@ -2,6 +2,6 @@ #define CPU_AMD_MICROCODE_H void update_microcode(u32 cpu_deviceid); -void amd_update_microcode_from_cbfs(u32 equivalent_processor_rev_id); +void amd_update_microcode_from_cbfs(u16 equivalent_processor_rev_id); #endif /* CPU_AMD_MICROCODE_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/41869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iacabee7e571bd37f3aca106d515d755969daf8f3 Gerrit-Change-Number: 41869 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao <zheng.bao(a)amd.com> Gerrit-MessageType: newchange

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coreboot-gerrit June 2020