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Change in coreboot[master]: mb/google/link: Do not overwrite pei_data
by Angel Pons (Code Review) 07 Feb '21

07 Feb '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43029 ) Change subject: mb/google/link: Do not overwrite pei_data ...................................................................... mb/google/link: Do not overwrite pei_data Most of the values are already set in northbridge code. Change-Id: I90af4afa2fcd103c23acb3a53d657aadc82c0703 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/link/early_init.c 1 file changed, 25 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/43029/1 diff --git a/src/mainboard/google/link/early_init.c b/src/mainboard/google/link/early_init.c index 8360f2a..4ab9438 100644 --- a/src/mainboard/google/link/early_init.c +++ b/src/mainboard/google/link/early_init.c @@ -84,58 +84,34 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data_template = { - .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, - .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, - .ec_present = 1, - .ddr3lv_support = 1, - // 0 = leave channel enabled - // 1 = disable dimm 0 on channel - // 2 = disable dimm 1 on channel - // 3 = disable dimm 0+1 on channel - .dimm_channel0_disabled = 2, - .dimm_channel1_disabled = 2, - .max_ddr3_freq = 1600, - .usb_port_config = { - /* Empty and onboard Ports 0-7, set to un-used pin OC3 */ - { 0, 3, 0x0000 }, /* P0: Empty */ - { 1, 0, 0x0040 }, /* P1: Left USB 1 (OC0) */ - { 1, 1, 0x0040 }, /* P2: Left USB 2 (OC1) */ - { 1, 3, 0x0040 }, /* P3: SDCARD (no OC) */ - { 0, 3, 0x0000 }, /* P4: Empty */ - { 1, 3, 0x0040 }, /* P5: WWAN (no OC) */ - { 0, 3, 0x0000 }, /* P6: Empty */ - { 0, 3, 0x0000 }, /* P7: Empty */ - /* Empty and onboard Ports 8-13, set to un-used pin OC4 */ - { 1, 4, 0x0040 }, /* P8: Camera (no OC) */ - { 1, 4, 0x0040 }, /* P9: Bluetooth (no OC) */ - { 0, 4, 0x0000 }, /* P10: Empty */ - { 0, 4, 0x0000 }, /* P11: Empty */ - { 0, 4, 0x0000 }, /* P12: Empty */ - { 0, 4, 0x0000 }, /* P13: Empty */ - }, + pei_data->system_type = 0; /* 0 Mobile, 1 Desktop/Server */ + pei_data->ec_present = 1; + pei_data->ddr3lv_support = 1; + pei_data->max_ddr3_freq = 1600; + + pei_data->usb_port_config = { + /* Empty and onboard Ports 0-7, set to un-used pin OC3 */ + { 0, 3, 0x0000 }, /* P0: Empty */ + { 1, 0, 0x0040 }, /* P1: Left USB 1 (OC0) */ + { 1, 1, 0x0040 }, /* P2: Left USB 2 (OC1) */ + { 1, 3, 0x0040 }, /* P3: SDCARD (no OC) */ + { 0, 3, 0x0000 }, /* P4: Empty */ + { 1, 3, 0x0040 }, /* P5: WWAN (no OC) */ + { 0, 3, 0x0000 }, /* P6: Empty */ + { 0, 3, 0x0000 }, /* P7: Empty */ + /* Empty and onboard Ports 8-13, set to un-used pin OC4 */ + { 1, 4, 0x0040 }, /* P8: Camera (no OC) */ + { 1, 4, 0x0040 }, /* P9: Bluetooth (no OC) */ + { 0, 4, 0x0000 }, /* P10: Empty */ + { 0, 4, 0x0000 }, /* P11: Empty */ + { 0, 4, 0x0000 }, /* P12: Empty */ + { 0, 4, 0x0000 }, /* P13: Empty */ }; - *pei_data = pei_data_template; + /* LINK has 2 channels of memory down, so spd_data[0] and [2] both need to be populated */ - memcpy(pei_data->spd_data[0], locate_spd(), - sizeof(pei_data->spd_data[0])); - memcpy(pei_data->spd_data[2], pei_data->spd_data[0], - sizeof(pei_data->spd_data[0])); + memcpy(pei_data->spd_data[0], locate_spd(), sizeof(pei_data->spd_data[0])); + memcpy(pei_data->spd_data[2], pei_data->spd_data[0], sizeof(pei_data->spd_data[0])); } const struct southbridge_usb_port mainboard_usb_ports[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/43029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90af4afa2fcd103c23acb3a53d657aadc82c0703 Gerrit-Change-Number: 43029 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/stout: Do not overwrite pei_data
by Angel Pons (Code Review) 07 Feb '21

07 Feb '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43028 ) Change subject: mb/google/stout: Do not overwrite pei_data ...................................................................... mb/google/stout: Do not overwrite pei_data Most of the values are already set in northbridge code. Change-Id: Ic3c8d23958cb821b8c551415ebb95e934de43e0b Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/stout/early_init.c 1 file changed, 28 insertions(+), 50 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/43028/1 diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c index e71d0ee..b9801f2 100644 --- a/src/mainboard/google/stout/early_init.c +++ b/src/mainboard/google/stout/early_init.c @@ -89,57 +89,35 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data_template = { - .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, - .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, - .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, - .ec_present = 1, - // 0 = leave channel enabled - // 1 = disable dimm 0 on channel - // 2 = disable dimm 1 on channel - // 3 = disable dimm 0+1 on channel - .dimm_channel0_disabled = 2, - .dimm_channel1_disabled = 2, - .max_ddr3_freq = 1600, - .usb_port_config = { - /* enabled USB oc pin length */ - { 1, 0, 0x0040 }, /* P0: USB 3.0 1 (OC0) */ - { 1, 0, 0x0040 }, /* P1: USB 3.0 2 (OC0) */ - { 0, 1, 0x0000 }, /* P2: Empty */ - { 1, 1, 0x0040 }, /* P3: Camera (no OC) */ - { 1, 1, 0x0040 }, /* P4: WLAN (no OC) */ - { 1, 1, 0x0040 }, /* P5: WWAN (no OC) */ - { 0, 1, 0x0000 }, /* P6: Empty */ - { 0, 1, 0x0000 }, /* P7: Empty */ - { 0, 5, 0x0000 }, /* P8: Empty */ - { 1, 4, 0x0040 }, /* P9: USB 2.0 (AUO4) (OC4) */ - { 0, 5, 0x0000 }, /* P10: Empty */ - { 0, 5, 0x0000 }, /* P11: Empty */ - { 0, 5, 0x0000 }, /* P12: Empty */ - { 1, 5, 0x0040 }, /* P13: Bluetooth (no OC) */ - }, - .usb3 = { - .mode = XHCI_MODE, - .hs_port_switch_mask = XHCI_PORTS, - .preboot_support = XHCI_PREBOOT, - .xhci_streams = XHCI_STREAMS, - }, + pei_data->system_type = 0; /* 0 Mobile, 1 Desktop/Server */ + pei_data->ec_present = 1; + pei_data->spd_addresses = { 0xA0, 0x00, 0xA4, 0x00 }; + pei_data->max_ddr3_freq = 1600; + + pei_data->usb_port_config = { + /* enabled USB oc pin length */ + { 1, 0, 0x0040 }, /* P0: USB 3.0 1 (OC0) */ + { 1, 0, 0x0040 }, /* P1: USB 3.0 2 (OC0) */ + { 0, 1, 0x0000 }, /* P2: Empty */ + { 1, 1, 0x0040 }, /* P3: Camera (no OC) */ + { 1, 1, 0x0040 }, /* P4: WLAN (no OC) */ + { 1, 1, 0x0040 }, /* P5: WWAN (no OC) */ + { 0, 1, 0x0000 }, /* P6: Empty */ + { 0, 1, 0x0000 }, /* P7: Empty */ + { 0, 5, 0x0000 }, /* P8: Empty */ + { 1, 4, 0x0040 }, /* P9: USB 2.0 (AUO4) (OC4) */ + { 0, 5, 0x0000 }, /* P10: Empty */ + { 0, 5, 0x0000 }, /* P11: Empty */ + { 0, 5, 0x0000 }, /* P12: Empty */ + { 1, 5, 0x0040 }, /* P13: Bluetooth (no OC) */ }; - *pei_data = pei_data_template; + + pei_data->usb3 = { + .mode = XHCI_MODE, + .hs_port_switch_mask = XHCI_PORTS, + .preboot_support = XHCI_PREBOOT, + .xhci_streams = XHCI_STREAMS, + }; } void mainboard_early_init(int s3resume) -- To view, visit https://review.coreboot.org/c/coreboot/+/43028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3c8d23958cb821b8c551415ebb95e934de43e0b Gerrit-Change-Number: 43028 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/parrot: Do not overwrite pei_data
by Angel Pons (Code Review) 07 Feb '21

07 Feb '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43027 ) Change subject: mb/google/parrot: Do not overwrite pei_data ...................................................................... mb/google/parrot: Do not overwrite pei_data Most of the values are already set in northbridge code. Change-Id: Ibad49251b88107d5fed6283d8e2ddd90927358d8 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/parrot/early_init.c 1 file changed, 22 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/43027/1 diff --git a/src/mainboard/google/parrot/early_init.c b/src/mainboard/google/parrot/early_init.c index 3c5c363..1552550 100644 --- a/src/mainboard/google/parrot/early_init.c +++ b/src/mainboard/google/parrot/early_init.c @@ -52,52 +52,29 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data_template = { - .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, - .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, - .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, - .ec_present = 1, - // 0 = leave channel enabled - // 1 = disable dimm 0 on channel - // 2 = disable dimm 1 on channel - // 3 = disable dimm 0+1 on channel - .dimm_channel0_disabled = 2, - .dimm_channel1_disabled = 2, - .max_ddr3_freq = 1600, - .usb_port_config = { - /* Empty and onboard Ports 0-7, set to un-used pin OC3 */ - { 0, 3, 0x0000 }, /* P0: Empty */ - { 1, 0, 0x0040 }, /* P1: Left USB 1 (OC0) */ - { 1, 1, 0x0040 }, /* P2: Left USB 2 (OC1) */ - { 1, 1, 0x0040 }, /* P3: Left USB 3 (OC1) */ - { 0, 3, 0x0000 }, /* P4: Empty */ - { 0, 3, 0x0000 }, /* P5: Empty */ - { 0, 3, 0x0000 }, /* P6: Empty */ - { 0, 3, 0x0000 }, /* P7: Empty */ - /* Empty and onboard Ports 8-13, set to un-used pin OC4 */ - { 1, 4, 0x0040 }, /* P8: MiniPCIe (WLAN) (no OC) */ - { 0, 4, 0x0000 }, /* P9: Empty */ - { 1, 4, 0x0040 }, /* P10: Camera (no OC) */ - { 0, 4, 0x0000 }, /* P11: Empty */ - { 0, 4, 0x0000 }, /* P12: Empty */ - { 0, 4, 0x0000 }, /* P13: Empty */ - }, + pei_data->system_type = 0; /* 0 Mobile, 1 Desktop/Server */ + pei_data->ec_present = 1; + pei_data->spd_addresses = { 0xA0, 0x00, 0xA4, 0x00 }; + pei_data->max_ddr3_freq = 1600; + + pei_data->usb_port_config = { + /* Empty and onboard Ports 0-7, set to un-used pin OC3 */ + { 0, 3, 0x0000 }, /* P0: Empty */ + { 1, 0, 0x0040 }, /* P1: Left USB 1 (OC0) */ + { 1, 1, 0x0040 }, /* P2: Left USB 2 (OC1) */ + { 1, 1, 0x0040 }, /* P3: Left USB 3 (OC1) */ + { 0, 3, 0x0000 }, /* P4: Empty */ + { 0, 3, 0x0000 }, /* P5: Empty */ + { 0, 3, 0x0000 }, /* P6: Empty */ + { 0, 3, 0x0000 }, /* P7: Empty */ + /* Empty and onboard Ports 8-13, set to un-used pin OC4 */ + { 1, 4, 0x0040 }, /* P8: MiniPCIe (WLAN) (no OC) */ + { 0, 4, 0x0000 }, /* P9: Empty */ + { 1, 4, 0x0040 }, /* P10: Camera (no OC) */ + { 0, 4, 0x0000 }, /* P11: Empty */ + { 0, 4, 0x0000 }, /* P12: Empty */ + { 0, 4, 0x0000 }, /* P13: Empty */ }; - *pei_data = pei_data_template; } const struct southbridge_usb_port mainboard_usb_ports[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/43027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibad49251b88107d5fed6283d8e2ddd90927358d8 Gerrit-Change-Number: 43027 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/butterfly: Do not overwrite pei_data
by Angel Pons (Code Review) 07 Feb '21

07 Feb '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43026 ) Change subject: mb/google/butterfly: Do not overwrite pei_data ...................................................................... mb/google/butterfly: Do not overwrite pei_data Most of the values are already set in northbridge code. Change-Id: I6a50c1f38bc412bbb259c6de9fbc1801e9c14519 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/butterfly/early_init.c 1 file changed, 22 insertions(+), 46 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/43026/1 diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c index df51f66..04dd37b 100644 --- a/src/mainboard/google/butterfly/early_init.c +++ b/src/mainboard/google/butterfly/early_init.c @@ -77,53 +77,29 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data_template = { - .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, - .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, - .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, - .ec_present = 1, - .ddr3lv_support = 0, - // 0 = leave channel enabled - // 1 = disable dimm 0 on channel - // 2 = disable dimm 1 on channel - // 3 = disable dimm 0+1 on channel - .dimm_channel0_disabled = 2, - .dimm_channel1_disabled = 2, - .max_ddr3_freq = 1600, - .usb_port_config = { - /* enabled USB oc pin length */ - { 1, 0, 0x0040 }, /* P0: Right USB 3.0 #1 (no OC) */ - { 1, 0, 0x0040 }, /* P1: Right USB 3.0 #2 (no OC) */ - { 1, 0, 0x0040 }, /* P2: Camera (no OC) */ - { 0, 0, 0x0000 }, /* P3: Empty */ - { 0, 0, 0x0000 }, /* P4: Empty */ - { 0, 0, 0x0000 }, /* P5: Empty */ - { 0, 0, 0x0000 }, /* P6: Empty */ - { 0, 0, 0x0000 }, /* P7: Empty */ - { 0, 4, 0x0000 }, /* P8: Empty */ - { 1, 4, 0x0080 }, /* P9: Left USB 1 (no OC) */ - { 1, 4, 0x0040 }, /* P10: Mini PCIe - WLAN / BT (no OC) */ - { 0, 4, 0x0000 }, /* P11: Empty */ - { 0, 4, 0x0000 }, /* P12: Empty */ - { 0, 4, 0x0000 }, /* P13: Empty */ - }, - .ddr_refresh_rate_config = 2, /* Force double refresh rate */ + pei_data->system_type = 0; /* 0 Mobile, 1 Desktop/Server */ + pei_data->ec_present = 1; + pei_data->spd_addresses = { 0xA0, 0x00, 0xA4, 0x00 }; + pei_data->max_ddr3_freq = 1600; + pei_data->ddr_refresh_rate_config = 2; /* Force double refresh rate */ + + pei_data->usb_port_config = { + /* enabled USB oc pin length */ + { 1, 0, 0x0040 }, /* P0: Right USB 3.0 #1 (no OC) */ + { 1, 0, 0x0040 }, /* P1: Right USB 3.0 #2 (no OC) */ + { 1, 0, 0x0040 }, /* P2: Camera (no OC) */ + { 0, 0, 0x0000 }, /* P3: Empty */ + { 0, 0, 0x0000 }, /* P4: Empty */ + { 0, 0, 0x0000 }, /* P5: Empty */ + { 0, 0, 0x0000 }, /* P6: Empty */ + { 0, 0, 0x0000 }, /* P7: Empty */ + { 0, 4, 0x0000 }, /* P8: Empty */ + { 1, 4, 0x0080 }, /* P9: Left USB 1 (no OC) */ + { 1, 4, 0x0040 }, /* P10: Mini PCIe - WLAN / BT (no OC) */ + { 0, 4, 0x0000 }, /* P11: Empty */ + { 0, 4, 0x0000 }, /* P12: Empty */ + { 0, 4, 0x0000 }, /* P13: Empty */ }; - *pei_data = pei_data_template; } int mainboard_should_reset_usb(int s3resume) -- To view, visit https://review.coreboot.org/c/coreboot/+/43026 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a50c1f38bc412bbb259c6de9fbc1801e9c14519 Gerrit-Change-Number: 43026 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/kontron/ktqm77: Do not overwrite pei_data
by Angel Pons (Code Review) 07 Feb '21

07 Feb '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43025 ) Change subject: mb/kontron/ktqm77: Do not overwrite pei_data ...................................................................... mb/kontron/ktqm77: Do not overwrite pei_data Most of the values are already set in northbridge code. Change-Id: I171816ce847bea139afeb0ab56e74144cd006c6b Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/kontron/ktqm77/early_init.c 1 file changed, 29 insertions(+), 55 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/43025/1 diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c index b8f44b5..92f169c 100644 --- a/src/mainboard/kontron/ktqm77/early_init.c +++ b/src/mainboard/kontron/ktqm77/early_init.c @@ -53,62 +53,36 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data_template = { - .pei_version = PEI_VERSION, - .mchbar = (uintptr_t)DEFAULT_MCHBAR, - .dmibar = (uintptr_t)DEFAULT_DMIBAR, - .epbar = DEFAULT_EPBAR, - .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = CONFIG_HPET_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBABASE, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, /* 0 Mobile, 1 Desktop/Server */ - .tseg_size = CONFIG_SMM_TSEG_SIZE, - .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, - .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, - .ec_present = 1, - .gbe_enable = 1, - .ddr3lv_support = 0, - /* - * 0 = leave channel enabled - * 1 = disable dimm 0 on channel - * 2 = disable dimm 1 on channel - * 3 = disable dimm 0+1 on channel - */ - .dimm_channel0_disabled = 2, - .dimm_channel1_disabled = 2, - .max_ddr3_freq = 1600, - .usb_port_config = { - /* enabled USB oc pin length */ - { 1, 0, 0x0040 }, /* P0: lower left USB 3.0 (OC0) */ - { 1, 0, 0x0040 }, /* P1: upper left USB 3.0 (OC0) */ - { 1, 0, 0x0040 }, /* P2: lower right USB 3.0 (OC0) */ - { 1, 0, 0x0040 }, /* P3: upper right USB 3.0 (OC0) */ - { 1, 0, 0x0040 }, /* P4: lower USB 2.0 (OC0) */ - { 1, 0, 0x0040 }, /* P5: upper USB 2.0 (OC0) */ - { 1, 0, 0x0040 }, /* P6: front panel USB 2.0 (OC0) */ - { 1, 0, 0x0040 }, /* P7: front panel USB 2.0 (OC0) */ - { 1, 4, 0x0040 }, /* P8: internal USB 2.0 (OC4) */ - { 1, 4, 0x0040 }, /* P9: internal USB 2.0 (OC4) */ - { 1, 4, 0x0040 }, /* P10: internal USB 2.0 (OC4) */ - { 1, 4, 0x0040 }, /* P11: internal USB 2.0 (OC4) */ - { 1, 4, 0x0040 }, /* P12: internal USB 2.0 (OC4) */ - { 1, 4, 0x0040 }, /* P13: internal USB 2.0 (OC4) */ - }, - .usb3 = { - .mode = 3, /* Smart Auto? */ - .hs_port_switch_mask = 0xf, /* All four ports. */ - .preboot_support = 1, /* preOS driver? */ - .xhci_streams = 1, /* Enable. */ - }, - .pcie_init = 1, + pei_data->system_type = 0; /* 0 Mobile, 1 Desktop/Server */ + pei_data->ec_present = 1; + pei_data->spd_addresses = { 0xA0, 0x00, 0xA4, 0x00 }; + pei_data->max_ddr3_freq = 1600; + pei_data->pcie_init = 1; + + pei_data->usb_port_config = { + /* enabled USB oc pin length */ + { 1, 0, 0x0040 }, /* P0: lower left USB 3.0 (OC0) */ + { 1, 0, 0x0040 }, /* P1: upper left USB 3.0 (OC0) */ + { 1, 0, 0x0040 }, /* P2: lower right USB 3.0 (OC0) */ + { 1, 0, 0x0040 }, /* P3: upper right USB 3.0 (OC0) */ + { 1, 0, 0x0040 }, /* P4: lower USB 2.0 (OC0) */ + { 1, 0, 0x0040 }, /* P5: upper USB 2.0 (OC0) */ + { 1, 0, 0x0040 }, /* P6: front panel USB 2.0 (OC0) */ + { 1, 0, 0x0040 }, /* P7: front panel USB 2.0 (OC0) */ + { 1, 4, 0x0040 }, /* P8: internal USB 2.0 (OC4) */ + { 1, 4, 0x0040 }, /* P9: internal USB 2.0 (OC4) */ + { 1, 4, 0x0040 }, /* P10: internal USB 2.0 (OC4) */ + { 1, 4, 0x0040 }, /* P11: internal USB 2.0 (OC4) */ + { 1, 4, 0x0040 }, /* P12: internal USB 2.0 (OC4) */ + { 1, 4, 0x0040 }, /* P13: internal USB 2.0 (OC4) */ }; - *pei_data = pei_data_template; + + pei_data->usb3 = { + .mode = 3, /* Smart Auto? */ + .hs_port_switch_mask = 0xf, /* All four ports. */ + .preboot_support = 1, /* preOS driver? */ + .xhci_streams = 1, /* Enable. */ + }; } const struct southbridge_usb_port mainboard_usb_ports[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/43025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I171816ce847bea139afeb0ab56e74144cd006c6b Gerrit-Change-Number: 43025 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: payloads: Force sub-make runs for in-tree payloads
by Nico Huber (Code Review) 07 Feb '21

07 Feb '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47638 ) Change subject: payloads: Force sub-make runs for in-tree payloads ...................................................................... payloads: Force sub-make runs for in-tree payloads The sub-process calls break make's dependency tracking, hence we have to always perform the calls if we want to allow automatic, incremental builds. Change-Id: I1bc2406db371e8dddbfdf71f68a6665a5b558f5e Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M payloads/Makefile.inc 1 file changed, 6 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/47638/1 diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc index ec42143..d89b5ba 100644 --- a/payloads/Makefile.inc +++ b/payloads/Makefile.inc @@ -29,12 +29,14 @@ payloads/external/LinuxBoot \ payloads/external/Yabits \ +force-payload: + payloads/coreinfo/build/coreinfo.elf coreinfo: export CCACHE := $(CCACHE) -payloads/coreinfo/build/coreinfo.elf coreinfo: +payloads/coreinfo/build/coreinfo.elf coreinfo: force-payload $(MAKE) -C payloads/coreinfo defaultbuild payloads/nvramcui/build/nvramcui.elf nvramcui: export CCACHE := $(CCACHE) -payloads/nvramcui/build/nvramcui.elf nvramcui: +payloads/nvramcui/build/nvramcui.elf nvramcui: force-payload $(MAKE) -C payloads/nvramcui clean-payloads: @@ -46,4 +48,5 @@ print-repo-info-payloads: -$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; ) -.PHONY: clean-payloads distclean-payloads print-repo-info-payloads nvramcui coreinfo +.PHONY: force-payload coreinfo nvramcui +.PHONY: clean-payloads distclean-payloads print-repo-info-payloads -- To view, visit https://review.coreboot.org/c/coreboot/+/47638 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1bc2406db371e8dddbfdf71f68a6665a5b558f5e Gerrit-Change-Number: 47638 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: payloads: Pass $(CCACHE) on to in-tree payloads
by Nico Huber (Code Review) 07 Feb '21

07 Feb '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47637 ) Change subject: payloads: Pass $(CCACHE) on to in-tree payloads ...................................................................... payloads: Pass $(CCACHE) on to in-tree payloads Change-Id: Ie15aec4059fbeb99f714c3d674df5fabdb7c081c Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M payloads/Makefile.inc 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/47637/1 diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc index a8c0772..ec42143 100644 --- a/payloads/Makefile.inc +++ b/payloads/Makefile.inc @@ -29,9 +29,11 @@ payloads/external/LinuxBoot \ payloads/external/Yabits \ +payloads/coreinfo/build/coreinfo.elf coreinfo: export CCACHE := $(CCACHE) payloads/coreinfo/build/coreinfo.elf coreinfo: $(MAKE) -C payloads/coreinfo defaultbuild +payloads/nvramcui/build/nvramcui.elf nvramcui: export CCACHE := $(CCACHE) payloads/nvramcui/build/nvramcui.elf nvramcui: $(MAKE) -C payloads/nvramcui -- To view, visit https://review.coreboot.org/c/coreboot/+/47637 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie15aec4059fbeb99f714c3d674df5fabdb7c081c Gerrit-Change-Number: 47637 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: nvramcui: Use libpayload's new `Makefile.payload`
by Nico Huber (Code Review) 07 Feb '21

07 Feb '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47636 ) Change subject: nvramcui: Use libpayload's new `Makefile.payload` ...................................................................... nvramcui: Use libpayload's new `Makefile.payload` Change-Id: I34bf659c1a069ccc27ca613bbf86780d4da49259 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M payloads/Makefile.inc M payloads/nvramcui/.gitignore M payloads/nvramcui/Makefile 3 files changed, 7 insertions(+), 37 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/47636/1 diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc index 79e7748..a8c0772 100644 --- a/payloads/Makefile.inc +++ b/payloads/Makefile.inc @@ -10,7 +10,7 @@ img/coreinfo-compression := $(CBFS_SECONDARY_PAYLOAD_COMPRESS_FLAG) cbfs-files-$(CONFIG_NVRAMCUI_SECONDARY_PAYLOAD) += img/nvramcui -img/nvramcui-file := payloads/nvramcui/nvramcui.elf +img/nvramcui-file := payloads/nvramcui/build/nvramcui.elf img/nvramcui-type := payload img/nvramcui-compression := $(CBFS_SECONDARY_PAYLOAD_COMPRESS_FLAG) @@ -32,7 +32,7 @@ payloads/coreinfo/build/coreinfo.elf coreinfo: $(MAKE) -C payloads/coreinfo defaultbuild -payloads/nvramcui/nvramcui.elf nvramcui: +payloads/nvramcui/build/nvramcui.elf nvramcui: $(MAKE) -C payloads/nvramcui clean-payloads: diff --git a/payloads/nvramcui/.gitignore b/payloads/nvramcui/.gitignore index 4885853..19a985b 100644 --- a/payloads/nvramcui/.gitignore +++ b/payloads/nvramcui/.gitignore @@ -1,2 +1,2 @@ -build libpayload +.lp.config* diff --git a/payloads/nvramcui/Makefile b/payloads/nvramcui/Makefile index 269d558..c2c15a7 100644 --- a/payloads/nvramcui/Makefile +++ b/payloads/nvramcui/Makefile @@ -1,34 +1,4 @@ -LIBPAYLOAD_DIR=$(CURDIR)/libpayload -XCOMPILE=$(LIBPAYLOAD_DIR)/libpayload.xcompile -# build libpayload and put .config file in $(CURDIR) instead of ../libpayload -# to avoid pollute the libpayload source directory and possible conflicts -LPOPTS=obj="$(CURDIR)/build" DESTDIR="$(CURDIR)" DOTCONFIG="$(CURDIR)/.config" -CFLAGS += -Wall -Wvla -Werror -Os -ffreestanding -nostdinc -nostdlib - -all: nvramcui.elf - -$(LIBPAYLOAD_DIR): - $(MAKE) -C ../libpayload $(LPOPTS) defconfig - $(MAKE) -C ../libpayload $(LPOPTS) - $(MAKE) -C ../libpayload $(LPOPTS) install - -ifneq ($(strip $(wildcard libpayload)),) -include $(XCOMPILE) -LPGCC = CC="$(GCC_CC_x86_32)" "$(LIBPAYLOAD_DIR)/bin/lpgcc" -%.elf: %.c Makefile - $(LPGCC) $(CFLAGS) -o $*.elf $*.c -else -# If libpayload is not found, first build libpayload, -# then do the make, this time it'll find libpayload -# and generate the nvramcui.elf target -%.elf: $(LIBPAYLOAD_DIR) - $(MAKE) all -endif - -clean: - rm -rf build libpayload nvramcui.elf - -distclean: clean - rm -rf .config .config.old - -.PHONY: all clean distclean +ARCH = x86_32 +OBJS = $(obj)/nvramcui.o +TARGET = $(obj)/nvramcui.elf +include ../libpayload/Makefile.payload -- To view, visit https://review.coreboot.org/c/coreboot/+/47636 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34bf659c1a069ccc27ca613bbf86780d4da49259 Gerrit-Change-Number: 47636 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

2 13

Change in coreboot[master]: coreinfo: Use libpayload's new `Makefile.payload`
by Nico Huber (Code Review) 07 Feb '21

07 Feb '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47634 ) Change subject: coreinfo: Use libpayload's new `Makefile.payload` ...................................................................... coreinfo: Use libpayload's new `Makefile.payload` Change-Id: I388d60e6f3aeb2184966152f0934845d42834de0 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M payloads/coreinfo/.gitignore M payloads/coreinfo/Makefile 2 files changed, 34 insertions(+), 89 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/47634/1 diff --git a/payloads/coreinfo/.gitignore b/payloads/coreinfo/.gitignore index 101045e..868da49 100644 --- a/payloads/coreinfo/.gitignore +++ b/payloads/coreinfo/.gitignore @@ -1,2 +1,2 @@ -lpbuild/ -lp.config* +libpayload/ +.lp.config* diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index cd58f39..0e6bf28 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -1,23 +1,38 @@ ## SPDX-License-Identifier: GPL-2.0-only src := $(CURDIR) +obj := build + srctree := $(src) srck := $(src)/../../util/kconfig -coreinfo_obj := $(src)/build objk := $(src)/build/util/kconfig -ifeq ($(filter %clean,$(MAKECMDGOALS)),) -export KERNELVERSION := 0.1.0 -export KCONFIG_AUTOHEADER := $(coreinfo_obj)/config.h -export KCONFIG_AUTOCONFIG := $(coreinfo_obj)/auto.conf -export KCONFIG_DEPENDENCIES := $(coreinfo_obj)/auto.conf.cmd -export KCONFIG_SPLITCONFIG := $(coreinfo_obj)/config -export KCONFIG_TRISTATE := $(coreinfo_obj)/tristate.conf -export KCONFIG_CONFIG := $(CURDIR)/.config -export KCONFIG_NEGATIVES := 1 -export Kconfig := Kconfig +LIBPAYLOAD_DEFCONFIG ?= $(src)/../libpayload/configs/defconfig-tinycurses -export V := $(V) +PAYLOAD_DEPS := $(obj)/config.h + +OBJECTS = cpuinfo_module.o cpuid.S.o pci_module.o coreboot_module.o \ + nvram_module.o bootlog_module.o ramdump_module.o \ + multiboot_module.o cbfs_module.o timestamps_module.o coreinfo.o +OBJS = $(patsubst %,$(obj)/%,$(OBJECTS)) +TARGET = $(obj)/coreinfo.elf + +ARCH := x86_32 + +all: real-all + +include ../libpayload/Makefile.payload + +ifeq ($(filter %clean,$(MAKECMDGOALS)),) +export KERNELVERSION := 0.1.0 +export KCONFIG_AUTOHEADER := $(obj)/config.h +export KCONFIG_AUTOCONFIG := $(obj)/auto.conf +export KCONFIG_DEPENDENCIES := $(obj)/auto.conf.cmd +export KCONFIG_SPLITCONFIG := $(obj)/config +export KCONFIG_TRISTATE := $(obj)/tristate.conf +export KCONFIG_CONFIG := $(CURDIR)/.config +export KCONFIG_NEGATIVES := 1 +export Kconfig := Kconfig CONFIG_SHELL := sh KBUILD_DEFCONFIG := configs/defconfig @@ -25,52 +40,12 @@ HAVE_DOTCONFIG := $(wildcard .config) MAKEFLAGS += -rR --no-print-directory -# Make is silent per default, but 'make V=1' will show all compiler calls. -ifneq ($(V),1) -.SILENT: -endif - HOSTCC ?= gcc HOSTCXX ?= g++ HOSTCFLAGS := -I$(srck) -I$(objk) HOSTCXXFLAGS := -I$(srck) -I$(objk) -LIBPAYLOAD_PATH := $(realpath ../libpayload) -LIBPAYLOAD_OBJ := $(coreinfo_obj)/libpayload -HAVE_LIBPAYLOAD := $(wildcard $(LIBPAYLOAD_OBJ)/lib/libpayload.a) -LIBPAYLOAD_CONFIG ?= configs/defconfig-tinycurses -OBJCOPY ?= objcopy - -INCLUDES = -I$(coreinfo_obj) -include $(LIBPAYLOAD_OBJ)/include/kconfig.h -I$(src)/../../src/commonlib/include -OBJECTS = cpuinfo_module.o cpuid.S.o pci_module.o coreboot_module.o \ - nvram_module.o bootlog_module.o ramdump_module.o \ - multiboot_module.o cbfs_module.o timestamps_module.o coreinfo.o -OBJS = $(patsubst %,$(coreinfo_obj)/%,$(OBJECTS)) -TARGET = $(coreinfo_obj)/coreinfo.elf - -all: real-all - -# in addition to the dependency below, create the file if it doesn't exist -# to silence warnings about a file that would be generated anyway. -$(if $(wildcard .xcompile),,$(eval $(shell ../../util/xcompile/xcompile $(XGCCPATH) > .xcompile || rm -f .xcompile))) -.xcompile: ../../util/xcompile/xcompile - $< $(XGCCPATH) > $@.tmp - \mv -f $@.tmp $@ 2> /dev/null || rm -f $@.tmp $@ - -CONFIG_COMPILER_GCC := y -ARCH-y := x86_32 - -include .xcompile - -CC := $(CC_$(ARCH-y)) -AS := $(AS_$(ARCH-y)) -OBJCOPY := $(OBJCOPY_$(ARCH-y)) - -LPCC := CC="$(CC)" $(LIBPAYLOAD_OBJ)/bin/lpgcc -LPAS := AS="$(AS)" $(LIBPAYLOAD_OBJ)/bin/lpas - -CFLAGS += -Wall -Wextra -Wmissing-prototypes -Wvla -Werror -CFLAGS += -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) +CFLAGS += -I$(obj) -I../../src/commonlib/include ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config @@ -80,21 +55,6 @@ CFLAGS += -flto endif -$(TARGET): $(src)/.config $(coreinfo_obj)/config.h $(OBJS) libpayload - printf " LPCC $(subst $(CURDIR)/,,$(@)) (LINK)\n" - $(LPCC) $(CFLAGS) -o $@ $(OBJS) - $(OBJCOPY) --only-keep-debug $@ $(TARGET).debug - $(OBJCOPY) --strip-debug $@ - $(OBJCOPY) --add-gnu-debuglink=$(TARGET).debug $@ - -$(coreinfo_obj)/%.S.o: $(src)/%.S libpayload - printf " LPAS $(subst $(CURDIR)/,,$(@))\n" - $(LPAS) -o $@ $< - -$(coreinfo_obj)/%.o: $(src)/%.c libpayload - printf " LPCC $(subst $(CURDIR)/,,$(@))\n" - $(LPCC) $(CFLAGS) -c -o $@ $< - else real-all: config endif @@ -103,22 +63,10 @@ $(MAKE) olddefconfig $(MAKE) all -ifneq ($(strip $(HAVE_LIBPAYLOAD)),) -libpayload: - printf "Found Libpayload $(LIBPAYLOAD_OBJ).\n" -else -LPOPTS=obj="$(CURDIR)/lpbuild" DOTCONFIG="$(CURDIR)/lp.config" -libpayload: - printf "Building libpayload @ $(LIBPAYLOAD_PATH).\n" - $(MAKE) -C $(LIBPAYLOAD_PATH) $(LPOPTS) distclean coreinfo_obj=$(coreinfo_obj)/libptmp - $(MAKE) -C $(LIBPAYLOAD_PATH) $(LPOPTS) defconfig KBUILD_DEFCONFIG=$(LIBPAYLOAD_CONFIG) - $(MAKE) -C $(LIBPAYLOAD_PATH) $(LPOPTS) install DESTDIR=$(coreinfo_obj) -endif - -$(coreinfo_obj)/config.h: +$(obj)/config.h: $(MAKE) oldconfig -$(shell mkdir -p $(coreinfo_obj) $(objk)/lxdialog $(KCONFIG_SPLITCONFIG)) +$(shell mkdir -p $(objk)/lxdialog $(KCONFIG_SPLITCONFIG)) include $(srck)/Makefile @@ -126,11 +74,8 @@ else -clean: - rm -rf build lpbuild .xcompile - distclean: clean - rm -f .config* lp.config* + rm -f .config* -.PHONY: clean distclean +.PHONY: distclean endif -- To view, visit https://review.coreboot.org/c/coreboot/+/47634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I388d60e6f3aeb2184966152f0934845d42834de0 Gerrit-Change-Number: 47634 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

2 9

Change in coreboot[master]: libpayload: Add a Makefile for in-tree payloads
by Nico Huber (Code Review) 07 Feb '21

07 Feb '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47633 ) Change subject: libpayload: Add a Makefile for in-tree payloads ...................................................................... libpayload: Add a Makefile for in-tree payloads The new `Makefile.payload` can be included by the Makefiles of pay- loads for in-tree builds. The basic idea is to use libpayload's build results without the `make install` step, and to ensure incre- mental builds work. For instance, if libpayload's code changes, a `make` in for the payload would automatically update the libpayload build and rebuild the payload. But if there are no code changes in libpayload, only updated files of the payload will be re-build. The configuration of libpayload is supposed to be automatically generated from a `defconfig` file. If this `defconfig` changes, libpayload and the payload will be re-build. Change-Id: If5319f1bf0bcd09964416237c5cf7f8e59f487a2 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- A payloads/libpayload/Makefile.payload 1 file changed, 123 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/47633/1 diff --git a/payloads/libpayload/Makefile.payload b/payloads/libpayload/Makefile.payload new file mode 100644 index 0000000..1d7a39b --- /dev/null +++ b/payloads/libpayload/Makefile.payload @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: BSD-3-Clause + +# +# This file is meant to be included by in-tree payloads +# to provide default targets for incremental builds. +# +# Variables with file names and directory overrides have +# to be defined in advance for proper dependency tracking. +# Then, include this file. e.g +# +# obj := output +# OBJS := $(obj)/payload.o +# TARGET := $(obj)/payload.elf +# include ../path/to/libpayload/Makefile.payload +# + +# Find relative path to libpayload (where this Makefile resides). +LIBPAYLOAD_SRC := $(dir $(lastword $(MAKEFILE_LIST))) + +# Build dir and config for libpayload. Need absolute +# paths to pass to libpayload's sub-make. +LIBPAYLOAD_OBJ ?= $(CURDIR)/libpayload +LIBPAYLOAD_DOTCONFIG ?= $(CURDIR)/.lp.config +LIBPAYLOAD_DEFCONFIG ?= $(CURDIR)/$(LIBPAYLOAD_SRC)/configs/defconfig + +# Some default dependencies for all targets: +DEFAULT_DEPS := $(LIBPAYLOAD_OBJ)/libpayload.a +DEFAULT_DEPS += Makefile $(lastword $(MAKEFILE_LIST)) +DEFAULT_DEPS += $(PAYLOAD_DEPS) + +obj ?= build + +ARCH ?= +OBJS ?= +CCACHE ?= + +CFLAGS = $(GCC_CFLAGS_$(ARCH)) +CFLAGS += -Os -ffreestanding +CFLAGS += -Wall -Wextra -Wmissing-prototypes -Wvla -Werror + +# Make is silent per default, but `make V=1` will show all calls. +Q:=@ +ifneq ($(V),1) +ifneq ($(Q),) +.SILENT: +MAKEFLAGS += -s +endif +endif +export V + +ifeq ($(filter %clean,$(MAKECMDGOALS)),) + +# In addition to the dependency below, create the file if it doesn't exist +# to silence warnings about a file that would be generated anyway. +$(if $(wildcard .xcompile),,$(eval $(shell \ + $(LIBPAYLOAD_SRC)../../util/xcompile/xcompile $(XGCCPATH) > .xcompile || rm -f .xcompile))) +.xcompile: $(LIBPAYLOAD_SRC)../../util/xcompile/xcompile + $< $(XGCCPATH) > $@.tmp + \mv -f $@.tmp $@ 2> /dev/null || rm -f $@.tmp $@ +include .xcompile + +# `lpgcc` in in-tree mode: +LPGCC = CC="$(CCACHE) $(GCC_CC_$(ARCH))" +LPGCC += _OBJ="$(LIBPAYLOAD_OBJ)" +LPGCC += $(LIBPAYLOAD_SRC)/bin/lpgcc + +LPAS = AS="$(AS_$(ARCH))" +LPAS += $(LIBPAYLOAD_SRC)/bin/lpas + +OBJCOPY = $(OBJCOPY_$(ARCH)) + +$(TARGET): + +$(obj)/%.elf: $(OBJS) $(DEFAULT_DEPS) + @printf " LPGCC $(subst $(obj)/,,$@)\n" + $(LPGCC) $(CFLAGS) -o $@ $(OBJS) + $(OBJCOPY) --only-keep-debug $@ $@.debug + $(OBJCOPY) --strip-debug $@ + $(OBJCOPY) --add-gnu-debuglink=$@.debug $@ + +$(obj)/%.o: %.c $(DEFAULT_DEPS) + @printf " LPGCC $(subst $(obj)/,,$@)\n" + $(LPGCC) $(CFLAGS) -c $< -o $@ + +$(obj)/%.S.o: %.S $(DEFAULT_DEPS) + @printf " LPAS $(subst $(obj)/,,$@)\n" + $(LPAS) $< -o $@ + +LIBPAYLOAD_OPTS := obj="$(LIBPAYLOAD_OBJ)" +LIBPAYLOAD_OPTS += DOTCONFIG="$(LIBPAYLOAD_DOTCONFIG)" +LIBPAYLOAD_OPTS += $(if $(CCACHE),CONFIG_LP_CCACHE=y) + +defconfig: lp-defconfig +lp-defconfig: $(LIBPAYLOAD_DOTCONFIG) +$(LIBPAYLOAD_DOTCONFIG): $(LIBPAYLOAD_DEFCONFIG) | $(PAYLOAD_DEPS) + $(MAKE) -C $(LIBPAYLOAD_SRC) $(LIBPAYLOAD_OPTS) \ + KBUILD_DEFCONFIG=$(LIBPAYLOAD_DEFCONFIG) defconfig + +oldconfig: lp-oldconfig +lp-oldconfig: + [ ! -f $(LIBPAYLOAD_DOTCONFIG) ] || \ + $(MAKE) -C $(LIBPAYLOAD_SRC) $(LIBPAYLOAD_OPTS) oldconfig + +$(LIBPAYLOAD_OBJ)/libpayload.a: lp-defconfig + $(MAKE) -C $(LIBPAYLOAD_SRC) $(LIBPAYLOAD_OPTS) + +$(shell mkdir -p $(sort $(dir $(OBJS)))) + +.PHONY: oldconfig lp-oldconfig defconfig lp-defconfig + +else # %clean,$(MAKECMDGOALS) + +default-payload-clean: + rm -rf $(obj) $(LIBPAYLOAD_OBJ) .xcompile +clean: default-payload-clean + +default-payload-distclean: clean + rm -f $(LIBPAYLOAD_DOTCONFIG) $(LIBPAYLOAD_DOTCONFIG).old +distclean: default-payload-distclean + +.PHONY: default-payload-clean clean default-payload-distclean distclean + +endif -- To view, visit https://review.coreboot.org/c/coreboot/+/47633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5319f1bf0bcd09964416237c5cf7f8e59f487a2 Gerrit-Change-Number: 47633 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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coreboot-gerrit November 2020