coreboot-gerrit January 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: soc/intel/common: Add SSID header
by Nico Huber (Code Review) 11 Jan '19

11 Jan '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29490 ) Change subject: soc/intel/common: Add SSID header ...................................................................... Patch Set 13: >>> Even it is not fit for this situation, there's possibility that it >>> may use internal register that expose the programming into >>> coreboot? Overall we still want to protect vendor's IP? >> >> Yes, but not primarily. I would say the primary objective is to >> make customers happy. This is best done with sane, maintainable >> code which may conflict vendor-IP protection. > > That's against the training I have got, sorry I disagree with that. What training? Intel training? OSS development training? coreboot training? ;) Also, it depends much on the definition of IP. If you call it IP when Intel uses a lock or a non-standard register location, that would be against my training and I would have to disagree. -- To view, visit https://review.coreboot.org/c/coreboot/+/29490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bdabdd927fa477821f400e49c5787f405d0a9ea Gerrit-Change-Number: 29490 Gerrit-PatchSet: 13 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Fri, 11 Jan 2019 17:46:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/common: Add SSID header
by Lijian Zhao (Code Review) 11 Jan '19

11 Jan '19

Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29490 ) Change subject: soc/intel/common: Add SSID header ...................................................................... Patch Set 13: > >> Patch Set 13: > >> > >>> Why FSP want to program that? > >>> Cause some internal devices may not follow the same programming > >>> sequence like regular PCI devices, have an option open to let > FSP > >>> did the programming for internal devices in case of some hacks > may > >>> needed. > >> > >> Did you ever look at `struct pci_operations`? `set_subsystem` is > a > >> function pointer for a reason. You can easily implement your > "hacks" > >> in coreboot. > > > > Yes I did look at that, in theory the situation caused by the > > "lock" in FSP that make the function pointer won't be working for > > PCH internal devices. > > > > Even it is not fit for this situation, there's possibility that > it > > may use internal register that expose the programming into > > coreboot? Overall we still want to protect vendor's IP? > > Yes, but not primarily. I would say the primary objective is to > make customers happy. This is best done with sane, maintainable > code which may conflict vendor-IP protection. That's against the training I have got, sorry I disagree with that. -- To view, visit https://review.coreboot.org/c/coreboot/+/29490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bdabdd927fa477821f400e49c5787f405d0a9ea Gerrit-Change-Number: 29490 Gerrit-PatchSet: 13 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Fri, 11 Jan 2019 17:15:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src: Fix unused variables
by build bot (Jenkins) (Code Review) 11 Jan '19

11 Jan '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29917 ) Change subject: src: Fix unused variables ...................................................................... Patch Set 20: (1 comment) https://review.coreboot.org/#/c/29917/20/src/cpu/amd/family_10h-family_15h/… File src/cpu/amd/family_10h-family_15h/init_cpus.c: https://review.coreboot.org/#/c/29917/20/src/cpu/amd/family_10h-family_15h/… PS20, Line 1061: if ((get_option(&nvram, "cpu_c_states") == CB_SUCCESS) && line over 80 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/29917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Gerrit-Change-Number: 29917 Gerrit-PatchSet: 20 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 11 Jan 2019 16:54:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src: Fix unused variables
by HAOUAS Elyes (Code Review) 11 Jan '19

11 Jan '19

Hello Patrick Rudolph, Angel Pons, Huang Jin, Julius Werner, York Yang, Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi, Damien Zammit, David Guckian, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29917 to look at the new patch set (#20). Change subject: src: Fix unused variables ...................................................................... src: Fix unused variables Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/quadcore/quadcore.c M src/device/dram/ddr3.c M src/drivers/spi/sst.c M src/lib/selfboot.c M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/intel/haswell/raminit.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/raminit.c M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/intel/x4x/early_init.c M src/northbridge/via/vx900/raminit_ddr3.c M src/soc/cavium/common/bootblock.c M src/soc/intel/fsp_baytrail/romstage/romstage.c M src/soc/intel/fsp_broadwell_de/acpi.c M src/soc/intel/fsp_broadwell_de/romstage/romstage.c M src/southbridge/amd/common/amd_pci_util.c M src/southbridge/intel/fsp_rangeley/romstage.c M src/southbridge/intel/i82371eb/fadt.c 21 files changed, 51 insertions(+), 87 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/29917/20 -- To view, visit https://review.coreboot.org/c/coreboot/+/29917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Gerrit-Change-Number: 29917 Gerrit-PatchSet: 20 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: src/cpu/intel: Set get_ia32_fsb function common
by build bot (Jenkins) (Code Review) 11 Jan '19

11 Jan '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30103 ) Change subject: src/cpu/intel: Set get_ia32_fsb function common ...................................................................... Patch Set 23: (1 comment) https://review.coreboot.org/#/c/30103/23/src/cpu/intel/common/fsb.c File src/cpu/intel/common/fsb.c: https://review.coreboot.org/#/c/30103/23/src/cpu/intel/common/fsb.c@25 PS23, Line 25: static const short core2_fsb[8] = { 266, 133, 200, 166, 333, 100, 400, -1 }; line over 80 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/30103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I232bf88de7ebba6ac5865db046ce79e9b2f3ed28 Gerrit-Change-Number: 30103 Gerrit-PatchSet: 23 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 11 Jan 2019 16:15:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/cpu/intel: Set get_ia32_fsb function common
by HAOUAS Elyes (Code Review) 11 Jan '19

11 Jan '19

Hello Patrick Rudolph, Arthur Heymans, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30103 to look at the new patch set (#23). Change subject: src/cpu/intel: Set get_ia32_fsb function common ...................................................................... src/cpu/intel: Set get_ia32_fsb function common Add get_ia32_fsb returns FSB values in MHz of intel's CPUs. Also add get_ia32_fsb_x3 function. It returns round up 3 * get_ia32_fsb. Change-Id: I232bf88de7ebba6ac5865db046ce79e9b2f3ed28 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/common/Makefile.inc A src/cpu/intel/common/fsb.c M src/cpu/x86/lapic/apic_timer.c A src/include/cpu/intel/fsb.h 4 files changed, 125 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/30103/23 -- To view, visit https://review.coreboot.org/c/coreboot/+/30103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I232bf88de7ebba6ac5865db046ce79e9b2f3ed28 Gerrit-Change-Number: 30103 Gerrit-PatchSet: 23 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/*/*: Use libgfxinit on sandy and ivy bridge boards
by Nico Huber (Code Review) 11 Jan '19

11 Jan '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27531 ) Change subject: mb/*/*: Use libgfxinit on sandy and ivy bridge boards ...................................................................... Patch Set 10: Code-Review+2 +2 I guess -- To view, visit https://review.coreboot.org/c/coreboot/+/27531 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41ad1ce06d9afcc99941affa232fa76ffa6631fb Gerrit-Change-Number: 27531 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Evgeny Zinoviev <me(a)ch1p.com> Gerrit-Comment-Date: Fri, 11 Jan 2019 15:54:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/*/*: Use libgfxinit on sandy and ivy bridge boards
by Nico Huber (Code Review) 11 Jan '19

11 Jan '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27531 ) Change subject: mb/*/*: Use libgfxinit on sandy and ivy bridge boards ...................................................................... Patch Set 10: >>> $ for k in $(git grep -l SANDYBRIDGE_IVYBRIDGE_LVDS src/mainboard/); do grep -q GFX_GMA_INTERNAL_IS_LVDS $k || echo $k; done >>> src/mainboard/compulab/intense_pc/Kconfig >>> src/mainboard/google/stout/Kconfig >>> src/mainboard/lenovo/t520/Kconfig >> >> intense_pc does not have LVDS so that's weird and l520 likely >> doesn't work due to improper panel timing and backlight setting in >> the devicetree. > > Should increase the font size. I read l520 instead of t520... Likely corrected subconsciously because you didn't touch T520 here? Odd anyway, is somebody running it w/o internal panel? -- To view, visit https://review.coreboot.org/c/coreboot/+/27531 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41ad1ce06d9afcc99941affa232fa76ffa6631fb Gerrit-Change-Number: 27531 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Evgeny Zinoviev <me(a)ch1p.com> Gerrit-Comment-Date: Fri, 11 Jan 2019 15:53:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/cpu/intel: Set get_ia32_fsb function common
by Nico Huber (Code Review) 11 Jan '19

11 Jan '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30103 ) Change subject: src/cpu/intel: Set get_ia32_fsb function common ...................................................................... Patch Set 22: (2 comments) https://review.coreboot.org/#/c/30103/22/src/cpu/x86/lapic/apic_timer.c File src/cpu/x86/lapic/apic_timer.c: https://review.coreboot.org/#/c/30103/22/src/cpu/x86/lapic/apic_timer.c@50 PS22, Line 50: != -1 should be `>= 0` now (or `> 0`) https://review.coreboot.org/#/c/30103/22/src/include/cpu/intel/fsb.h File src/include/cpu/intel/fsb.h: https://review.coreboot.org/#/c/30103/22/src/include/cpu/intel/fsb.h@23 PS22, Line 23: spurious empty line -- To view, visit https://review.coreboot.org/c/coreboot/+/30103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I232bf88de7ebba6ac5865db046ce79e9b2f3ed28 Gerrit-Change-Number: 30103 Gerrit-PatchSet: 22 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 11 Jan 2019 15:45:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support
by Arthur Heymans (Code Review) 11 Jan '19

11 Jan '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 ) Change subject: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 7: > Patch Set 7: > > > Patch Set 7: Code-Review-2 > > > > (1 comment) > > > > select C_ENVIRONMENT_BOOTBLOCK is the braswell Kconfig and drop the romcc bootblock option and add console init in the bootblock. > > Also drop things that get unused in drivers/intel/fsp1_1 > > This patch is not even build tested... > > This patch is to support C_ENVIRONMENT_BOOTBLOCK for Braswell. To be backward compatible this support has made optional. Please don't make it optional and remove the 'backwards compatibility', there is really no reason to keep that around. > This patch has been build and tested. I will check if I made mistake by uploading. > No gerrit has not build-tested it. > Can you clarify your comment? -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 7 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 11 Jan 2019 15:17:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit January 2019