coreboot-gerrit August 2018

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Change in coreboot[master]: exception: Fix segment error code mask
by Raul Rangel (Code Review) 02 Aug '18

02 Aug '18

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/27812 Change subject: exception: Fix segment error code mask ...................................................................... exception: Fix segment error code mask The segment error descriptor is actually 13 bits long. BUG=b:109749762 TEST=Verified by causing a segment error Change-Id: I3439f9ce1e8cf0c472c4eb82d74a787718c9609f Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> --- M payloads/libpayload/arch/x86/exception.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/27812/1 diff --git a/payloads/libpayload/arch/x86/exception.c b/payloads/libpayload/arch/x86/exception.c index f6bb8c9..b562660 100644 --- a/payloads/libpayload/arch/x86/exception.c +++ b/payloads/libpayload/arch/x86/exception.c @@ -59,7 +59,7 @@ static void print_segment_error_code(u32 code) { - printf("%#x - descriptor %#x in the ", code, (code >> 3) & 0x1f); + printf("%#x - descriptor %#x in the ", code, (code >> 3) & 0x1FFF); if (code & (0x1 << 1)) { printf("IDT"); } else { -- To view, visit https://review.coreboot.org/27812 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3439f9ce1e8cf0c472c4eb82d74a787718c9609f Gerrit-Change-Number: 27812 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>

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Change in coreboot[master]: mp_init: fix typo
by Raul Rangel (Code Review) 02 Aug '18

02 Aug '18

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/27811 Change subject: mp_init: fix typo ...................................................................... mp_init: fix typo BUG=none TEST=none Change-Id: Ic2d7bf5f5335894ede98dc7e6cc6a65e4897e487 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> --- M src/cpu/x86/mp_init.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/27811/1 diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 515bc67..d124721 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -944,7 +944,7 @@ continue; } - /* Copy to local variable before signalling consumption. */ + /* Copy to local variable before signaling consumption. */ memcpy(&lcb, cb, sizeof(lcb)); mfence(); store_callback(per_cpu_slot, NULL); -- To view, visit https://review.coreboot.org/27811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic2d7bf5f5335894ede98dc7e6cc6a65e4897e487 Gerrit-Change-Number: 27811 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>

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Change in coreboot[master]: util/bincfg: don't use sym_table shared variable
by build bot (Jenkins) (Code Review) 02 Aug '18

02 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27810 ) Change subject: util/bincfg: don't use sym_table shared variable ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/#/c/27810/1/util/bincfg/bincfg.h File util/bincfg/bincfg.h: https://review.coreboot.org/#/c/27810/1/util/bincfg/bincfg.h@30 PS1, Line 30: typedef struct field* field_t; "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/27810/1/util/bincfg/bincfg.h@31 PS1, Line 31: typedef struct field** field_ptr_t; "foo** bar" should be "foo **bar" https://review.coreboot.org/#/c/27810/1/util/bincfg/bincfg.h@44 PS1, Line 44: static void yyerror(FILE* fp, field_ptr_t, char const *); "foo* bar" should be "foo *bar" -- To view, visit https://review.coreboot.org/27810 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I652a8da75498f871a53eb7509f6145c4842e3373 Gerrit-Change-Number: 27810 Gerrit-PatchSet: 1 Gerrit-Owner: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 02 Aug 2018 20:20:28 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: util/bincfg: don't use sym_table shared variable
by Denis 'GNUtoo' Carikli (Code Review) 02 Aug '18

02 Aug '18

Denis 'GNUtoo' Carikli has uploaded this change for review. ( https://review.coreboot.org/27810 Change subject: util/bincfg: don't use sym_table shared variable ...................................................................... util/bincfg: don't use sym_table shared variable Change-Id: I652a8da75498f871a53eb7509f6145c4842e3373 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- M util/bincfg/bincfg.h M util/bincfg/bincfg.y 2 files changed, 82 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/27810/1 diff --git a/util/bincfg/bincfg.h b/util/bincfg/bincfg.h index b8c6688..8e2038a 100644 --- a/util/bincfg/bincfg.h +++ b/util/bincfg/bincfg.h @@ -27,6 +27,8 @@ unsigned int value; struct field *next; }; +typedef struct field* field_t; +typedef struct field** field_ptr_t; /* Bit array intermediary representation */ struct blob { @@ -37,13 +39,12 @@ unsigned int lenactualblob; }; -static struct field *putsym (char const *, unsigned int); -static struct field *getsym (char const *); -static void yyerror (FILE* fp, char const *); -int yylex (void); +static field_t putsym(field_ptr_t sym_table_ptr, char const *, unsigned int); +static field_t getsym(field_ptr_t sym_table_ptr, char const *); +static void yyerror(FILE* fp, field_ptr_t, char const *); +int yylex(void); static struct blob *binary; -static struct field *sym_table; -static struct field *sym_table_tail; +static field_t sym_table_tail; #endif /* __BINCFG_H */ diff --git a/util/bincfg/bincfg.y b/util/bincfg/bincfg.y index 8be11e9..851d9f5 100644 --- a/util/bincfg/bincfg.y +++ b/util/bincfg/bincfg.y @@ -59,10 +59,12 @@ binary->bloblen += w; } -static void set_bitfield(char *name, unsigned int value) +static void set_bitfield(field_ptr_t sym_table_ptr, char *name, + unsigned int value) { unsigned long long i; - struct field *bf = getsym (name); + + struct field *bf = getsym(sym_table_ptr, name); if (bf) { bf->value = value & 0xffffffff; i = (1 << bf->width) - 1; @@ -78,28 +80,30 @@ } } -static void set_bitfield_array(char *name, unsigned int n, unsigned int value) +static void set_bitfield_array(field_ptr_t sym_table_ptr, char *name, + unsigned int n, unsigned int value) { unsigned int i; unsigned long len = strlen (name); char *namen = (char *) malloc ((len + 9) * sizeof (char)); + check_pointer(namen); for (i = 0; i < n; i++) { snprintf (namen, len + 8, "%s%x", name, i); - set_bitfield (namen, value); + set_bitfield (sym_table_ptr, namen, value); } free(namen); } -static void create_new_bitfield(char *name, unsigned int width) +static void create_new_bitfield(field_ptr_t sym_table_ptr, char *name, unsigned int width) { struct field *bf; - if (!(bf = putsym (name, width))) return; + if (!(bf = putsym (sym_table_ptr, name, width))) return; //fprintf(stderr, "Added bitfield `%s` : %d\n", bf->name, width); } -static void create_new_bitfields(char *name, unsigned int n, unsigned int width) +static void create_new_bitfields(field_ptr_t sym_table_ptr, char *name, unsigned int n, unsigned int width) { unsigned int i; unsigned long len = strlen (name); @@ -107,51 +111,56 @@ check_pointer(namen); for (i = 0; i < n; i++) { snprintf (namen, len + 8, "%s%x", name, i); - create_new_bitfield (namen, width); + create_new_bitfield (sym_table_ptr, namen, width); } free(namen); } -static struct field *putsym (char const *sym_name, unsigned int w) +static field_t putsym (field_ptr_t sym_table_ptr, char const *sym_name, + unsigned int w) { - if (getsym(sym_name)) { + if (getsym(sym_table_ptr, sym_name)) { fprintf(stderr, "Cannot add duplicate named bitfield `%s`\n", sym_name); return 0; } - struct field *ptr = (struct field *) malloc (sizeof (struct field)); + field_t ptr = (field_t ) malloc (sizeof (struct field)); check_pointer(ptr); ptr->name = (char *) malloc (strlen (sym_name) + 1); check_pointer(ptr->name); strcpy (ptr->name, sym_name); ptr->width = w; ptr->value = 0; - ptr->next = (struct field *)0; + ptr->next = (field_t)0; if (sym_table_tail) { sym_table_tail->next = ptr; } else { - sym_table = ptr; + *sym_table_ptr = ptr; } sym_table_tail = ptr; return ptr; } -static struct field *getsym (char const *sym_name) +static field_t getsym (field_ptr_t sym_table_ptr, char const *sym_name) { - struct field *ptr; - for (ptr = sym_table; ptr != (struct field *) 0; - ptr = (struct field *)ptr->next) { + field_t ptr; + field_t sym_table = *sym_table_ptr; + + for (ptr = sym_table; ptr != (field_t ) 0; + ptr = (field_t )ptr->next) { if (strcmp (ptr->name, sym_name) == 0) return ptr; } return 0; } -static void dump_all_values (void) +static void dump_all_values (field_ptr_t sym_table_ptr) { - struct field *ptr; - for (ptr = sym_table; ptr != (struct field *) 0; - ptr = (struct field *)ptr->next) { + field_t ptr; + field_t sym_table = *sym_table_ptr; + + for (ptr = sym_table; ptr != (field_t ) 0; + ptr = (field_t )ptr->next) { fprintf(stderr, "%s = %d (%d bits)\n", ptr->name, ptr->value, @@ -159,17 +168,19 @@ } } -static void empty_field_table(void) +static void empty_field_table(field_ptr_t sym_table_ptr) { - struct field *ptr; - struct field *ptrnext; + field_t ptr; + field_t ptrnext; - for (ptr = sym_table; ptr != (struct field *) 0; ptr = ptrnext) { + field_t sym_table = *sym_table_ptr; + + for (ptr = sym_table; ptr != (field_t ) 0; ptr = ptrnext) { if (ptr) { ptrnext = ptr->next; free(ptr); } else { - ptrnext = (struct field *) 0; + ptrnext = (field_t ) 0; } } sym_table = 0; @@ -190,7 +201,7 @@ binary->blb[0] = VALID_BIT; } -static void interpret_next_blob_value (struct field *f) +static void interpret_next_blob_value (field_t f) { unsigned int i; unsigned int v = 0; @@ -208,10 +219,12 @@ } /* {}%BIN -> {} */ -static void generate_setter_bitfields(FILE* fp, unsigned char *bin) +static void generate_setter_bitfields(FILE* fp, field_ptr_t sym_table_ptr, + unsigned char *bin) { unsigned int i; - struct field *ptr; + field_t ptr; + field_t sym_table = *sym_table_ptr; /* Convert bytes to bit array */ for (i = 0; i < binary->lenactualblob; i++) { @@ -224,7 +237,7 @@ fprintf (fp, "# AUTOGENERATED SETTER BY BINCFG\n{\n"); /* Traverse spec and output bitfield setters based on blob values */ - for (ptr = sym_table; ptr != (struct field *) 0; ptr = ptr->next) { + for (ptr = sym_table; ptr != (field_t ) 0; ptr = ptr->next) { interpret_next_blob_value(ptr); fprintf (fp, "\t\"%s\" = 0x%x,\n", ptr->name, ptr->value); @@ -233,15 +246,18 @@ fprintf (fp, "\n}\n"); } -static void generate_binary_with_gbe_checksum(FILE* fp) +static void generate_binary_with_gbe_checksum(FILE* fp, + field_ptr_t sym_table_ptr) { int i; unsigned short checksum; + field_t sym_table = *sym_table_ptr; + /* traverse spec, push to blob and add up for checksum */ - struct field *ptr; + field_t ptr; unsigned int uptochksum = 0; - for (ptr = sym_table; ptr != (struct field *) 0; ptr = ptr->next) { + for (ptr = sym_table; ptr != (field_t ) 0; ptr = ptr->next) { if (strcmp (ptr->name, "checksum_gbe") == 0) { /* Stop traversing because we hit checksum */ ptr = ptr->next; @@ -277,14 +293,14 @@ checksum = (0xbaba - binary->checksum) & 0xffff; /* Now write checksum */ - set_bitfield ("checksum_gbe", checksum); + set_bitfield (sym_table_ptr, "checksum_gbe", checksum); fprintf(fp, "%c", checksum & 0xff); fprintf(fp, "%c", (checksum & 0xff00) >> 8); append_field_to_blob (value_to_bits(checksum, 16), 16); - for (; ptr != (struct field *) 0; ptr = ptr->next) { + for (; ptr != (field_t ) 0; ptr = ptr->next) { append_field_to_blob ( value_to_bits(ptr->value, ptr->width), ptr->width); } @@ -305,10 +321,11 @@ } /* {}{} -> BIN */ -static void generate_binary(FILE* fp) +static void generate_binary(FILE* fp, field_ptr_t sym_table_ptr) { unsigned int i; - struct field *ptr; + field_t ptr; + field_t sym_table = *sym_table_ptr; if (binary->bloblen % 8) { fprintf (stderr, @@ -316,13 +333,13 @@ exit (1); } - if (getsym ("checksum_gbe")) { - generate_binary_with_gbe_checksum(fp); + if (getsym (sym_table_ptr, "checksum_gbe")) { + generate_binary_with_gbe_checksum(fp, sym_table_ptr); return; } /* traverse spec, push to blob */ - for (ptr = sym_table; ptr != (struct field *) 0; ptr = ptr->next) { + for (ptr = sym_table; ptr != (field_t ) 0; ptr = ptr->next) { append_field_to_blob ( value_to_bits(ptr->value, ptr->width), ptr->width); @@ -353,7 +370,7 @@ unsigned char u8; unsigned char *u8array; } -%parse-param {FILE* fp} +%parse-param {FILE* fp} {struct field** sym_table_ptr} %token <str> name %token <u32> val @@ -372,13 +389,13 @@ input: /* empty */ -| input spec setter eof { empty_field_table(); YYACCEPT;} +| input spec setter eof { empty_field_table(sym_table_ptr); YYACCEPT;} | input spec blob { fprintf (stderr, "Parsed all bytes\n"); - empty_field_table(); YYACCEPT;} + empty_field_table(sym_table_ptr); YYACCEPT;} ; blob: - '%' eof { generate_setter_bitfields(fp, + '%' eof { generate_setter_bitfields(fp, sym_table_ptr, binary->actualblob); } ; @@ -394,14 +411,15 @@ ; specpair: - name ':' val { create_new_bitfield($1, $3); } -| name '[' val ']' ':' val { create_new_bitfields($1, $3, $6); } + name ':' val { create_new_bitfield(sym_table_ptr, $1, $3); } +| name '[' val ']' ':' val { create_new_bitfields(sym_table_ptr, $1, $3, + $6); } ; setter: '{' '}' { fprintf (stderr, "No values\n"); } | '{' valuemembers '}' { fprintf (stderr, "Parsed all values\n"); - generate_binary(fp); } + generate_binary(fp, sym_table_ptr); } ; valuemembers: @@ -410,14 +428,15 @@ ; setpair: - name '=' val { set_bitfield($1, $3); } -| name '[' val ']' '=' val { set_bitfield_array($1, $3, $6); } +name '=' val { set_bitfield(sym_table_ptr, $1, $3); } +| name '[' val ']' '=' val { set_bitfield_array(sym_table_ptr, $1, $3, + $6); } ; %% /* Called by yyparse on error. */ -static void yyerror (FILE* fp, char const *s) +static void yyerror (FILE* fp, field_ptr_t sym_table_ptr, char const *s) { fprintf (stderr, "yyerror: %s\n", s); } @@ -426,9 +445,10 @@ void set_input_string(char* in); /* This function parses a string */ -static int parse_string(FILE* fp, unsigned char* in) { +static int parse_string(FILE* fp, field_ptr_t sym_table_ptr, unsigned char* in) +{ set_input_string ((char *)in); - return yyparse (fp); + return yyparse (fp, sym_table_ptr); } static unsigned int loadfile (FILE* fp, char *file, char *filetype, @@ -464,6 +484,7 @@ unsigned int pos = 0; int ret = 0; FILE* fp; + field_t sym_table; #if YYDEBUG == 1 yydebug = 1; @@ -484,7 +505,7 @@ argv[3]); exit(1); } - ret = parse_string(fp, parsestring); + ret = parse_string(fp, &sym_table, parsestring); free(parsestring); } else if (argc == 5 && strcmp (argv[1], "-d") == 0) { /* Decompile mode */ @@ -516,7 +537,7 @@ argv[4]); exit(1); } - ret = parse_string(fp, parsestring); + ret = parse_string(fp, &sym_table, parsestring); free(parsestring); free(binary->actualblob); fclose(fp); -- To view, visit https://review.coreboot.org/27810 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I652a8da75498f871a53eb7509f6145c4842e3373 Gerrit-Change-Number: 27810 Gerrit-PatchSet: 1 Gerrit-Owner: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org>

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Change in coreboot[master]: gpio: Change gpio_baseX_value() function return types to unsigned
by Arthur Heymans (Code Review) 02 Aug '18

02 Aug '18

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/27809 ) Change subject: gpio: Change gpio_baseX_value() function return types to unsigned ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/27809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8fb7e3a7c76cb886aed40d0ada1f545180e43117 Gerrit-Change-Number: 27809 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 02 Aug 2018 19:08:44 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: gpio: Change gpio_baseX_value() function return types to unsigned
by Furquan Shaikh (Code Review) 02 Aug '18

02 Aug '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/27809 ) Change subject: gpio: Change gpio_baseX_value() function return types to unsigned ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/27809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8fb7e3a7c76cb886aed40d0ada1f545180e43117 Gerrit-Change-Number: 27809 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 02 Aug 2018 19:08:23 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: gpio: Change gpio_baseX_value() function return types to unsigned
by Julius Werner (Code Review) 02 Aug '18

02 Aug '18

Julius Werner has uploaded this change for review. ( https://review.coreboot.org/27809 Change subject: gpio: Change gpio_baseX_value() function return types to unsigned ...................................................................... gpio: Change gpio_baseX_value() function return types to unsigned This patch changes the return type of gpio_base2_value() and related functions from int to uint32_t. This makes more sense now that board_id() and related functions (which are the primary use case) also return that type. It's unlikely that we'll ever read a strapping of 32 GPIOs in a row, but if we did, we'd probably want to treat it as unsigned. Change-Id: I8fb7e3a7c76cb886aed40d0ada1f545180e43117 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/include/gpio.h M src/lib/gpio.c 2 files changed, 17 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/27809/1 diff --git a/src/include/gpio.h b/src/include/gpio.h index 3160242..0a37ee7 100644 --- a/src/include/gpio.h +++ b/src/include/gpio.h @@ -29,7 +29,7 @@ void gpio_input_pullup(gpio_t gpio); void gpio_input(gpio_t gpio); void gpio_output(gpio_t gpio, int value); -int _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first); +uint32_t _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first); /* * This function may be implemented by SoC/board code to provide @@ -60,9 +60,9 @@ * There are also pulldown and pullup variants which default each gpio to * be configured with an internal pulldown and pullup, respectively. */ -int gpio_base2_value(const gpio_t gpio[], int num_gpio); -int gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio); -int gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio); +uint32_t gpio_base2_value(const gpio_t gpio[], int num_gpio); +uint32_t gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio); +uint32_t gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio); /* * Read the value presented by the set of GPIOs, when each pin is interpreted @@ -73,7 +73,7 @@ * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1]. * num_gpio: number of pins to read. */ -static inline int gpio_base3_value(const gpio_t gpio[], int num_gpio) +static inline uint32_t gpio_base3_value(const gpio_t gpio[], int num_gpio) { return _gpio_base3_value(gpio, num_gpio, 0); } @@ -103,8 +103,8 @@ * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1]. * num_gpio: number of pins to read. */ -static inline int gpio_binary_first_base3_value(const gpio_t gpio[], - int num_gpio) +static inline uint32_t gpio_binary_first_base3_value(const gpio_t gpio[], + int num_gpio) { return _gpio_base3_value(gpio, num_gpio, 1); } diff --git a/src/lib/gpio.c b/src/lib/gpio.c index b52d7b0..0656dfb 100644 --- a/src/lib/gpio.c +++ b/src/lib/gpio.c @@ -20,9 +20,10 @@ #include <delay.h> #include <gpio.h> -static int _gpio_base2_value(const gpio_t gpio[], int num_gpio) +static uint32_t _gpio_base2_value(const gpio_t gpio[], int num_gpio) { - int i, result = 0; + uint32_t result = 0; + int i; /* Wait until signals become stable */ udelay(10); @@ -33,7 +34,7 @@ return result; } -int gpio_base2_value(const gpio_t gpio[], int num_gpio) +uint32_t gpio_base2_value(const gpio_t gpio[], int num_gpio) { int i; @@ -43,7 +44,7 @@ return _gpio_base2_value(gpio, num_gpio); } -int gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio) +uint32_t gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio) { int i; @@ -53,7 +54,7 @@ return _gpio_base2_value(gpio, num_gpio); } -int gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio) +uint32_t gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio) { int i; @@ -63,7 +64,7 @@ return _gpio_base2_value(gpio, num_gpio); } -int _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first) +uint32_t _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first) { /* * GPIOs which are tied to stronger external pull up or pull down @@ -75,11 +76,11 @@ */ static const char tristate_char[] = {[0] = '0', [1] = '1', [Z] = 'Z'}; - int temp; - int index; - int result = 0; + uint32_t result = 0; int has_z = 0; int binary_below = 0; + int index; + int temp; char value[32]; assert(num_gpio <= 32); -- To view, visit https://review.coreboot.org/27809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I8fb7e3a7c76cb886aed40d0ada1f545180e43117 Gerrit-Change-Number: 27809 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>

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Change in coreboot[master]: mb/google/poppy/variants/rammus: add rammus devicetree.cb
by Furquan Shaikh (Code Review) 02 Aug '18

02 Aug '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/27808 ) Change subject: mb/google/poppy/variants/rammus: add rammus devicetree.cb ...................................................................... Patch Set 1: (4 comments) https://review.coreboot.org/#/c/27808/1/src/mainboard/google/poppy/variants… File src/mainboard/google/poppy/variants/rammus/devicetree.cb: PS1: More of a TODO for myself: It would be good to check if poppy and variants can be converted to use override devicetree. https://review.coreboot.org/#/c/27808/1/src/mainboard/google/poppy/variants… PS1, Line 47: 2 0? https://review.coreboot.org/#/c/27808/1/src/mainboard/google/poppy/variants… PS1, Line 82: #| IccMax | 4A | 28A | 24A | 24A | This is already being set here: https://review.coreboot.org/c/coreboot/+/27610, so setting of IccMax here is not required. https://review.coreboot.org/#/c/27808/1/src/mainboard/google/poppy/variants… PS1, Line 328: on off -- To view, visit https://review.coreboot.org/27808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icabfac04c94b3d480872c243d811509e274ef122 Gerrit-Change-Number: 27808 Gerrit-PatchSet: 1 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 02 Aug 2018 16:41:23 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/poppy/variants/rammus: add gpio setting
by Furquan Shaikh (Code Review) 02 Aug '18

02 Aug '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/27807 ) Change subject: mb/google/poppy/variants/rammus: add gpio setting ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/27807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I20fc081d372b8686f6128a7e85276f9c6798b199 Gerrit-Change-Number: 27807 Gerrit-PatchSet: 1 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 02 Aug 2018 16:35:39 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variants/rammus: add memory configuration
by Furquan Shaikh (Code Review) 02 Aug '18

02 Aug '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/27806 ) Change subject: mb/google/poppy/variants/rammus: add memory configuration ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/27806 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I45efdc7893b5bcbca0de6e932e1452cc1a2ff028 Gerrit-Change-Number: 27806 Gerrit-PatchSet: 1 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 02 Aug 2018 16:34:55 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit August 2018