coreboot-gerrit May 2018

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Change in coreboot[master]: src/device/pnp_device.c: Get rid of device_t
by Elyes HAOUAS (Code Review) 02 May '18

02 May '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26002 Change subject: src/device/pnp_device.c: Get rid of device_t ...................................................................... src/device/pnp_device.c: Get rid of device_t Use of `device_t` has been abandoned in ramstage. Change-Id: Ic25d1eb3c7f0ed5b65aa1cf9e16c39415b7cd3c7 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/device/pnp_device.c 1 file changed, 20 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/26002/1 diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c index e7839de..ba05c82 100644 --- a/src/device/pnp_device.c +++ b/src/device/pnp_device.c @@ -28,13 +28,13 @@ /* PNP config mode wrappers */ -void pnp_enter_conf_mode(device_t dev) +void pnp_enter_conf_mode(struct device *dev) { if (dev->ops->ops_pnp_mode) dev->ops->ops_pnp_mode->enter_conf_mode(dev); } -void pnp_exit_conf_mode(device_t dev) +void pnp_exit_conf_mode(struct device *dev) { if (dev->ops->ops_pnp_mode) dev->ops->ops_pnp_mode->exit_conf_mode(dev); @@ -42,24 +42,24 @@ /* PNP fundamental operations */ -void pnp_write_config(device_t dev, u8 reg, u8 value) +void pnp_write_config(struct device *dev, u8 reg, u8 value) { outb(reg, dev->path.pnp.port); outb(value, dev->path.pnp.port + 1); } -u8 pnp_read_config(device_t dev, u8 reg) +u8 pnp_read_config(struct device *dev, u8 reg) { outb(reg, dev->path.pnp.port); return inb(dev->path.pnp.port + 1); } -void pnp_set_logical_device(device_t dev) +void pnp_set_logical_device(struct device *dev) { pnp_write_config(dev, 0x07, dev->path.pnp.device & 0xff); } -void pnp_set_enable(device_t dev, int enable) +void pnp_set_enable(struct device *dev, int enable) { u8 tmp, bitpos; @@ -76,7 +76,7 @@ pnp_write_config(dev, 0x30, tmp); } -int pnp_read_enable(device_t dev) +int pnp_read_enable(struct device *dev) { u8 tmp, bitpos; @@ -88,20 +88,20 @@ return !!(tmp & (1 << bitpos)); } -void pnp_set_iobase(device_t dev, u8 index, u16 iobase) +void pnp_set_iobase(struct device *dev, u8 index, u16 iobase) { /* Index == 0x60 or 0x62. */ pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff); pnp_write_config(dev, index + 1, iobase & 0xff); } -void pnp_set_irq(device_t dev, u8 index, u8 irq) +void pnp_set_irq(struct device *dev, u8 index, u8 irq) { /* Index == 0x70 or 0x72. */ pnp_write_config(dev, index, irq); } -void pnp_set_drq(device_t dev, u8 index, u8 drq) +void pnp_set_drq(struct device *dev, u8 index, u8 drq) { /* Index == 0x74. */ pnp_write_config(dev, index, drq & 0xff); @@ -109,12 +109,12 @@ /* PNP device operations */ -void pnp_read_resources(device_t dev) +void pnp_read_resources(struct device *dev) { return; } -static void pnp_set_resource(device_t dev, struct resource *resource) +static void pnp_set_resource(struct device *dev, struct resource *resource) { if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx " @@ -140,7 +140,7 @@ report_resource_stored(dev, resource, ""); } -void pnp_set_resources(device_t dev) +void pnp_set_resources(struct device *dev) { struct resource *res; @@ -156,7 +156,7 @@ pnp_exit_conf_mode(dev); } -void pnp_enable_resources(device_t dev) +void pnp_enable_resources(struct device *dev) { pnp_enter_conf_mode(dev); pnp_set_logical_device(dev); @@ -164,7 +164,7 @@ pnp_exit_conf_mode(dev); } -void pnp_enable(device_t dev) +void pnp_enable(struct device *dev) { if (!dev->enabled) { pnp_enter_conf_mode(dev); @@ -174,7 +174,7 @@ } } -void pnp_alt_enable(device_t dev) +void pnp_alt_enable(struct device *dev) { pnp_enter_conf_mode(dev); pnp_set_logical_device(dev); @@ -191,7 +191,7 @@ /* PNP chip operations */ -static void pnp_get_ioresource(device_t dev, u8 index, u16 mask) +static void pnp_get_ioresource(struct device *dev, u8 index, u16 mask) { struct resource *resource; unsigned moving, gran, step; @@ -242,7 +242,7 @@ resource->size = 1 << gran; } -static void get_resources(device_t dev, struct pnp_info *info) +static void get_resources(struct device *dev, struct pnp_info *info) { struct resource *resource; @@ -363,11 +363,11 @@ } } -void pnp_enable_devices(device_t base_dev, struct device_operations *ops, +void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info) { struct device_path path; - device_t dev; + struct device *dev; int i; path.type = DEVICE_PATH_PNP; -- To view, visit https://review.coreboot.org/26002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic25d1eb3c7f0ed5b65aa1cf9e16c39415b7cd3c7 Gerrit-Change-Number: 26002 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: commonlib: Add descriptions for new AGESA timestamps
by build bot (Jenkins) (Code Review) 02 May '18

02 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26001 ) Change subject: commonlib: Add descriptions for new AGESA timestamps ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71233/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25405/ : SUCCESS -- To view, visit https://review.coreboot.org/26001 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iad7bcd53bc6136b74d4d933d1a290feac6a0de56 Gerrit-Change-Number: 26001 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 May 2018 18:48:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: southbridge/broadcom: Remove spaces before/after parenthesis
by build bot (Jenkins) (Code Review) 02 May '18

02 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25875 ) Change subject: southbridge/broadcom: Remove spaces before/after parenthesis ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71232/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25404/ : SUCCESS -- To view, visit https://review.coreboot.org/25875 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic43b5ddaa395658ab7c34cdd004516884a20b005 Gerrit-Change-Number: 25875 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 May 2018 18:46:00 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: commonlib: Add descriptions for new AGESA timestamps
by Martin Roth (Code Review) 02 May '18

02 May '18

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/26001 Change subject: commonlib: Add descriptions for new AGESA timestamps ...................................................................... commonlib: Add descriptions for new AGESA timestamps When the latest AGESA timestamp values were added, the descriptions weren't added along with them. Because of this, the cbmem tool just shows them as "<unknown>". Bug=b:79153552 TEST=None Change-Id: Iad7bcd53bc6136b74d4d933d1a290feac6a0de56 Signed-off-by: Martin Roth <martinroth(a)chromium.org> --- M src/commonlib/include/commonlib/timestamp_serialized.h 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/26001/1 diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index 11baf16..42b55bc 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -224,6 +224,12 @@ { TS_AGESA_INIT_LATE_DONE, "back from AmdInitLate" }, { TS_AGESA_INIT_RTB_START, "calling AmdInitRtb/AmdS3Save" }, { TS_AGESA_INIT_RTB_DONE, "back from AmdInitRtb/AmdS3Save" }, + { TS_AGESA_INIT_RESUME_START, "calling AmdInitResume" }, + { TS_AGESA_INIT_RESUME_DONE, "back from AmdInitResume" }, + { TS_AGESA_S3_LATE_START, "calling AmdS3LateRestore" }, + { TS_AGESA_S3_LATE_DONE, "back from AmdS3LateRestore" }, + { TS_AGESA_S3_FINAL_START, "calling AmdS3FinalRestore" }, + { TS_AGESA_S3_FINAL_DONE, "back from AmdS3FinalRestore" }, /* Intel ME related timestamps */ { TS_ME_INFORM_DRAM_WAIT, "waiting for ME acknowledgement of raminit"}, -- To view, visit https://review.coreboot.org/26001 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Iad7bcd53bc6136b74d4d933d1a290feac6a0de56 Gerrit-Change-Number: 26001 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: [WIP]acpigen: Always return buffer with requested size
by build bot (Jenkins) (Code Review) 02 May '18

02 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25999 ) Change subject: [WIP]acpigen: Always return buffer with requested size ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71229/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25401/ : SUCCESS -- To view, visit https://review.coreboot.org/25999 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3f0ecc42a21945f66eb67f73e511bd516acf0fa9 Gerrit-Change-Number: 25999 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 May 2018 18:16:43 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/google/reef: Remove tablet mode switch support
by build bot (Jenkins) (Code Review) 02 May '18

02 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25982 ) Change subject: mainboard/google/reef: Remove tablet mode switch support ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71227/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25400/ : SUCCESS -- To view, visit https://review.coreboot.org/25982 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic10c418ddc708c1aed87ad4a9861f04d32445116 Gerrit-Change-Number: 25982 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 May 2018 18:16:21 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: arch/x86/cpu_common.c: Remove unneeded headers
by build bot (Jenkins) (Code Review) 02 May '18

02 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26000 ) Change subject: arch/x86/cpu_common.c: Remove unneeded headers ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71230/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25402/ : SUCCESS -- To view, visit https://review.coreboot.org/26000 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4f57376138725804133059c785e89e095fd6a759 Gerrit-Change-Number: 26000 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 May 2018 18:04:38 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: arch/x86/cpu_common.c: Remove unneeded headers
by Elyes HAOUAS (Code Review) 02 May '18

02 May '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26000 Change subject: arch/x86/cpu_common.c: Remove unneeded headers ...................................................................... arch/x86/cpu_common.c: Remove unneeded headers Change-Id: I4f57376138725804133059c785e89e095fd6a759 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/cpu_common.c 1 file changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/26000/1 diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c index a6761f2..26cf69f 100644 --- a/src/arch/x86/cpu_common.c +++ b/src/arch/x86/cpu_common.c @@ -15,8 +15,6 @@ #include <cpu/cpu.h> #include <arch/io.h> #include <string.h> -#include <cpu/x86/mtrr.h> -#include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> #include <arch/cpu.h> #include <device/path.h> -- To view, visit https://review.coreboot.org/26000 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4f57376138725804133059c785e89e095fd6a759 Gerrit-Change-Number: 26000 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: mb/superio: Rename global control devices as SUPERIO_DEV
by build bot (Jenkins) (Code Review) 02 May '18

02 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25852 ) Change subject: mb/superio: Rename global control devices as SUPERIO_DEV ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71228/ : SUCCESS -- To view, visit https://review.coreboot.org/25852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If3555906d359695b2eae51209cd97fbaaace7e61 Gerrit-Change-Number: 25852 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 02 May 2018 17:57:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mainboard/msi/ms9185: Fix coding style and remove commented code
by build bot (Jenkins) (Code Review) 02 May '18

02 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23536 ) Change subject: mainboard/msi/ms9185: Fix coding style and remove commented code ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71225/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25398/ : SUCCESS -- To view, visit https://review.coreboot.org/23536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3cca4adbf04edfd88a9b8ae52cf4d62d429e6c45 Gerrit-Change-Number: 23536 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 May 2018 17:52:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit May 2018