coreboot-gerrit May 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/poppy/variants/atlas: update DMIC NHLT configuration
by Sathyanarayana Nujella (Code Review) 03 May '18

03 May '18

Sathyanarayana Nujella has uploaded this change for review. ( https://review.coreboot.org/26019 Change subject: mb/google/poppy/variants/atlas: update DMIC NHLT configuration ...................................................................... mb/google/poppy/variants/atlas: update DMIC NHLT configuration >From coreboot side, include DMIC 4ch NHLT configuration and its DMIC blob. In OS side, cras picks the needed channels using UCM's channel map configuration. So, this patch updates to include DMIC 4ch config. BUG=b:79158926 TEST=verified 4-ch record with arecord TEST=Also verified internal mic record with cras using 'cras_test_client --capture_file dmic.raw --rate 48000 --num_channels 2 --duration 10' Change-Id: Ic6df00c2f26ad9cdf54152ab021c2b10499c429c Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> --- M src/mainboard/google/poppy/Kconfig M src/mainboard/google/poppy/variants/atlas/nhlt.c 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/26019/1 diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 8cd636d..37751f4 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -64,7 +64,7 @@ config INCLUDE_NHLT_BLOBS_ATLAS bool "Include blobs for atlas audio." select NHLT_DA7219 - select NHLT_DMIC_2CH + select NHLT_DMIC_4CH select NHLT_MAX98373 config INCLUDE_NHLT_BLOBS_NAUTILUS diff --git a/src/mainboard/google/poppy/variants/atlas/nhlt.c b/src/mainboard/google/poppy/variants/atlas/nhlt.c index df62112..4d0fd1e 100644 --- a/src/mainboard/google/poppy/variants/atlas/nhlt.c +++ b/src/mainboard/google/poppy/variants/atlas/nhlt.c @@ -20,9 +20,9 @@ void variant_nhlt_init(struct nhlt *nhlt) { - /* 2 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 2)) - printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); + /* 4 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 4)) + printk(BIOS_ERR, "Couldn't add 4CH DMIC arrays.\n"); /* Dialog DA7219 Headset codec. */ if (nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1)) -- To view, visit https://review.coreboot.org/26019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic6df00c2f26ad9cdf54152ab021c2b10499c429c Gerrit-Change-Number: 26019 Gerrit-PatchSet: 1 Gerrit-Owner: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com>

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Change in coreboot[master]: soc/intel: Add KBL-R pci id support
by build bot (Jenkins) (Code Review) 03 May '18

03 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26018 ) Change subject: soc/intel: Add KBL-R pci id support ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71254/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25426/ : SUCCESS -- To view, visit https://review.coreboot.org/26018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0813247624770b70fe8b3ec3825fd17a9878cd0e Gerrit-Change-Number: 26018 Gerrit-PatchSet: 2 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 03 May 2018 00:20:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel: Add KBL-R pci id support
by build bot (Jenkins) (Code Review) 03 May '18

03 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26018 ) Change subject: soc/intel: Add KBL-R pci id support ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/71253/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/25425/ : SUCCESS -- To view, visit https://review.coreboot.org/26018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0813247624770b70fe8b3ec3825fd17a9878cd0e Gerrit-Change-Number: 26018 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 03 May 2018 00:16:24 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel: Add KBL-R pci id support
by Lijian Zhao (Code Review) 03 May '18

03 May '18

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/26018 Change subject: soc/intel: Add KBL-R pci id support ...................................................................... soc/intel: Add KBL-R pci id support Add KBL-R internal graphics device pci ids into coreboot. BUG=N/A TEST=Boot up fine on kabylake-r platform with display on. Change-Id: I0813247624770b70fe8b3ec3825fd17a9878cd0e Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/26018/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 7dc3e00..f8020ec 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2867,6 +2867,7 @@ #define PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM 0x5916 #define PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR 0x5917 #define PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM 0x591B +#define PCI_DEVICE_ID_INTEL_KBL_GT2_ULX_R 0x591C #define PCI_DEVICE_ID_INTEL_APL_IGD_HD_505 0x5a84 #define PCI_DEVICE_ID_INTEL_APL_IGD_HD_500 0x5a85 #define PCI_DEVICE_ID_INTEL_GLK_IGD 0x3184 diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index ddea99f..c754509 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -123,6 +123,7 @@ PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, + PCI_DEVICE_ID_INTEL_KBL_GT2_ULX_R, PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, -- To view, visit https://review.coreboot.org/26018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I0813247624770b70fe8b3ec3825fd17a9878cd0e Gerrit-Change-Number: 26018 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com>

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Change in coreboot[master]: mb/google/poppy/variants/nami: Invert polarity of EMR_GARAGE_DET#
by build bot (Jenkins) (Code Review) 03 May '18

03 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26017 ) Change subject: mb/google/poppy/variants/nami: Invert polarity of EMR_GARAGE_DET# ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71252/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25424/ : SUCCESS -- To view, visit https://review.coreboot.org/26017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic49eea6412c3378dca39a3338b43df12bc27037d Gerrit-Change-Number: 26017 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 May 2018 23:03:58 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variants/nami: Invert polarity of EMR_GARAGE_DET#
by Shelley Chen (Code Review) 03 May '18

03 May '18

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/26017 Change subject: mb/google/poppy/variants/nami: Invert polarity of EMR_GARAGE_DET# ...................................................................... mb/google/poppy/variants/nami: Invert polarity of EMR_GARAGE_DET# This gpio should be active low, but it not currently configured that way. Changing gpio configuration to reflect that. BUG=b:73121017 BRANCH=None TEST=iotools mmio_read32 0xfdae0588 (GPP_E1) Make sure that when pen is ejected, gpio is low and when pen is inserted, gpio is high Change-Id: Ic49eea6412c3378dca39a3338b43df12bc27037d Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/mainboard/google/poppy/variants/nami/gpio.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/26017/1 diff --git a/src/mainboard/google/poppy/variants/nami/gpio.c b/src/mainboard/google/poppy/variants/nami/gpio.c index 927a530..6398d2d 100644 --- a/src/mainboard/google/poppy/variants/nami/gpio.c +++ b/src/mainboard/google/poppy/variants/nami/gpio.c @@ -210,8 +210,8 @@ /* E0 : SATAXPCI0 ==> H1_PCH_INT_ODL */ PAD_CFG_GPI_APIC_INVERT(GPP_E0, NONE, PLTRST), - /* E1 : SATAXPCIE1 ==> PEN_EJECT_ODL - for wake event */ - PAD_CFG_GPI_ACPI_SCI(GPP_E1, NONE, DEEP, NONE), + /* E1 : SATAXPCIE1 ==> EMR_GARAGE_DET# - for wake event */ + PAD_CFG_GPI_ACPI_SCI(GPP_E1, NONE, DEEP, INVERT), /* E2 : SATAXPCIE2 ==> WLAN_OFF# */ PAD_CFG_GPO(GPP_E2, 1, DEEP), /* E3 : CPU_GP0 ==> TRACKPAD_INT# */ @@ -224,7 +224,7 @@ PAD_CFG_NC(GPP_E6), /* E7 : CPU_GP1 ==> TOUCHSCREEN_INT# */ PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST), - /* E8 : SATALED# ==> PEN_EJECT_ODL - for notification */ + /* E8 : SATALED# ==> EMR_GARAGE_DET# - for notification */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E8, NONE, DEEP), /* E9 : USB2_OCO# ==> USB_C0_OC# */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), -- To view, visit https://review.coreboot.org/26017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic49eea6412c3378dca39a3338b43df12bc27037d Gerrit-Change-Number: 26017 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com>

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Change in coreboot[master]: board_status: Remove sudo when checking for cbmem with command
by build bot (Jenkins) (Code Review) 03 May '18

03 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25989 ) Change subject: board_status: Remove sudo when checking for cbmem with command ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71251/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25423/ : SUCCESS -- To view, visit https://review.coreboot.org/25989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8788c190ffebde117e2abd3df924c48d8f6fd05d Gerrit-Change-Number: 25989 Gerrit-PatchSet: 2 Gerrit-Owner: Matthias Gazzari <mail(a)qtux.eu> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matthias Gazzari <mail(a)qtux.eu> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 May 2018 22:48:36 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: arch/x86/acpi_device: Add macros to define gpio with wake flag
by build bot (Jenkins) (Code Review) 03 May '18

03 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25838 ) Change subject: arch/x86/acpi_device: Add macros to define gpio with wake flag ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71249/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25421/ : SUCCESS -- To view, visit https://review.coreboot.org/25838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia71559dcae65112b75e4c789328e4a6153e922b0 Gerrit-Change-Number: 25838 Gerrit-PatchSet: 5 Gerrit-Owner: HARSHAPRIYA N <harshapriya.n(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: HARSHAPRIYA N <harshapriya.n(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Wed, 02 May 2018 22:13:50 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/eve: Change rt5663 audio codec's irq as ExclusiveAndWake
by build bot (Jenkins) (Code Review) 03 May '18

03 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26016 ) Change subject: mb/google/eve: Change rt5663 audio codec's irq as ExclusiveAndWake ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/71250/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/25422/ : SUCCESS -- To view, visit https://review.coreboot.org/26016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icb72337025a8408ed7ea9b6e60e938dcb88eae76 Gerrit-Change-Number: 26016 Gerrit-PatchSet: 1 Gerrit-Owner: HARSHAPRIYA N <harshapriya.n(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 May 2018 22:12:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/eve: Change rt5663 audio codec's irq as ExclusiveAndWake
by HARSHAPRIYA N (Code Review) 03 May '18

03 May '18

HARSHAPRIYA N has uploaded this change for review. ( https://review.coreboot.org/26016 Change subject: mb/google/eve: Change rt5663 audio codec's irq as ExclusiveAndWake ...................................................................... mb/google/eve: Change rt5663 audio codec's irq as ExclusiveAndWake This patch uses GPIO macro to define rt5663 headset codec's irq as ExclusiveAndWake. This change allows jack detection even when device is in D3 state. TEST=Plug in/out jack when the system is in deep sleep and wake up the system to ensure that jack insertion/removal is detected. Change-Id: Icb72337025a8408ed7ea9b6e60e938dcb88eae76 Signed-off-by: Harsha Priya <harshapriya.n(a)intel.com> --- M src/mainboard/google/eve/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/26016/1 diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 2e62f41..0361452 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -304,7 +304,7 @@ device i2c 3a on end end chip drivers/i2c/rt5663 - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH_WAKE(GPP_D9, 1)" register "dc_offset_l_manual" = "0xffd160" register "dc_offset_r_manual" = "0xffd1c0" register "dc_offset_l_manual_mic" = "0xff8a10" -- To view, visit https://review.coreboot.org/26016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Icb72337025a8408ed7ea9b6e60e938dcb88eae76 Gerrit-Change-Number: 26016 Gerrit-PatchSet: 1 Gerrit-Owner: HARSHAPRIYA N <harshapriya.n(a)intel.com>

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coreboot-gerrit May 2018