coreboot-gerrit December 2018

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: mb/google/hatch: Add SoC and EC asl files in DSDT
by Aamir Bohra (Code Review) 21 Dec '18

21 Dec '18

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30282 ) Change subject: mb/google/hatch: Add SoC and EC asl files in DSDT ...................................................................... Patch Set 12: (1 comment) https://review.coreboot.org/#/c/30282/8/src/mainboard/google/hatch/dsdt.asl File src/mainboard/google/hatch/dsdt.asl: https://review.coreboot.org/#/c/30282/8/src/mainboard/google/hatch/dsdt.asl… PS8, Line 46: if IS_ENABLED(CONFIG_CHROMEOS) > start from 0th column Done -- To view, visit https://review.coreboot.org/c/coreboot/+/30282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Gerrit-Change-Number: 30282 Gerrit-PatchSet: 12 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 21 Dec 2018 12:09:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/hatch: Add EC trigger events and acpi configs
by Aamir Bohra (Code Review) 21 Dec '18

21 Dec '18

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30281 ) Change subject: mb/google/hatch: Add EC trigger events and acpi configs ...................................................................... Patch Set 12: (1 comment) https://review.coreboot.org/#/c/30281/7/src/mainboard/google/hatch/variants… File src/mainboard/google/hatch/variants/baseboard/include/baseboard/ec.h: https://review.coreboot.org/#/c/30281/7/src/mainboard/google/hatch/variants… PS7, Line 79: * __BASEBOARD_EC_H > i'm okay, even i'm okay to add tablet related flag if this is 2-in 1 design Ok, I have updated the commit message to include details on ACPI devices added. Will confirm on the TBMC requirement and update. -- To view, visit https://review.coreboot.org/c/coreboot/+/30281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a86f609c269cb59e546fc7ba4ba032e5ea8341a Gerrit-Change-Number: 30281 Gerrit-PatchSet: 12 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 21 Dec 2018 12:08:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/hatch: Add SoC and EC asl files in DSDT
by Aamir Bohra (Code Review) 21 Dec '18

21 Dec '18

Hello Subrata Banik, Rizwan Qureshi, Shelley Chen, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30282 to look at the new patch set (#12). Change subject: mb/google/hatch: Add SoC and EC asl files in DSDT ...................................................................... mb/google/hatch: Add SoC and EC asl files in DSDT BUG=b:120914069 TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/dsdt.asl M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h 3 files changed, 39 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/30282/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/30282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Gerrit-Change-Number: 30282 Gerrit-PatchSet: 12 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/hatch: Fixes to initial hatch mainboard checkin
by Aamir Bohra (Code Review) 21 Dec '18

21 Dec '18

Aamir Bohra has uploaded a new patch set (#9) to the change originally created by Shelley Chen. ( https://review.coreboot.org/c/coreboot/+/30296 ) Change subject: mb/google/hatch: Fixes to initial hatch mainboard checkin ...................................................................... mb/google/hatch: Fixes to initial hatch mainboard checkin Incorporating some feedback to initial hatch mainboard checking (CL:30169) that came in after the CL merged. Updated the chromeos.fmd with the following, * SI_ALL = 3MB * SI_BIOS = 16MB BUG=b:20914069 BRANCH=None TEST=./util/abuild/abuild -p none -t google/hatch -x -a -v Change-Id: I4e311c68873f10f71314e44d3a714639a06dbee8 Signed-off-by: Shelley Chen <shchen(a)google.com> Signed-off-by: V Sowmya <v.sowmya(a)intel.com> --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/chromeos.c M src/mainboard/google/hatch/chromeos.fmd M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h D src/mainboard/google/hatch/variants/hatch/overridetree.cb 6 files changed, 29 insertions(+), 106 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/30296/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/30296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e311c68873f10f71314e44d3a714639a06dbee8 Gerrit-Change-Number: 30296 Gerrit-PatchSet: 9 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/hatch: Add memory init setup for hatch
by Aamir Bohra (Code Review) 21 Dec '18

21 Dec '18

Hello Subrata Banik, Rizwan Qureshi, Shelley Chen, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30248 to look at the new patch set (#13). Change subject: mb/google/hatch: Add memory init setup for hatch ...................................................................... mb/google/hatch: Add memory init setup for hatch This implementation adds below support: 1. Add support to read memory strap. 2. Add support to configure below memory parameters -> rcomp resistor configuration -> dqs mapping -> ect and ca vref config 3. Include SPD configuration BUG=b:120914069 BRANCH=None TEST=USE="-intel_mrc -bmplk" emerge-hatch coreboot Change-Id: I9bda08bd0b9f91ebb96b39291e15473492a6bf19 Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/Makefile.inc M src/mainboard/google/hatch/romstage.c A src/mainboard/google/hatch/spd/Makefile.inc A src/mainboard/google/hatch/spd/empty_ddr4.spd.hex A src/mainboard/google/hatch/spd/hynix_dimm_H5AN8G6NCJR-VKC-8GB.spd.hex A src/mainboard/google/hatch/spd/samsung_dimm_K4A4G165WE-BCRC-4GB.spd.hex M src/mainboard/google/hatch/variants/baseboard/Makefile.inc M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/hatch/variants/baseboard/memory.c 12 files changed, 241 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/30248/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/30248 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9bda08bd0b9f91ebb96b39291e15473492a6bf19 Gerrit-Change-Number: 30248 Gerrit-PatchSet: 13 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/hatch: Add EC trigger events and acpi configs
by Aamir Bohra (Code Review) 21 Dec '18

21 Dec '18

Hello Subrata Banik, Rizwan Qureshi, Shelley Chen, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30281 to look at the new patch set (#12). Change subject: mb/google/hatch: Add EC trigger events and acpi configs ...................................................................... mb/google/hatch: Add EC trigger events and acpi configs This implemetation adds EC SCI, SMI, S5/S3 wake trigger events. Also adds the EC specific ACPI configs to enable support for ALS, EC PD device and PS2 keyboard device. BUG=b:120914069 TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot Change-Id: I3a86f609c269cb59e546fc7ba4ba032e5ea8341a Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- A src/mainboard/google/hatch/variants/baseboard/include/baseboard/ec.h M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h 2 files changed, 83 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/30281/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/30281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a86f609c269cb59e546fc7ba4ba032e5ea8341a Gerrit-Change-Number: 30281 Gerrit-PatchSet: 12 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: {devices, lib, security} Add Eltan vendor code for measured and verifie...
by build bot (Jenkins) (Code Review) 21 Dec '18

21 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30218 ) Change subject: {devices,lib,security} Add Eltan vendor code for measured and verified boot. ...................................................................... Patch Set 5: (2 comments) https://review.coreboot.org/#/c/30218/5/src/security/tpm/tss.h File src/security/tpm/tss.h: https://review.coreboot.org/#/c/30218/5/src/security/tpm/tss.h@131 PS5, Line 131: uint32_t PropertyCount, TPMI_YES_NO *MoreData, need consistent spacing around '*' (ctx:WxV) https://review.coreboot.org/#/c/30218/5/src/security/tpm/tss.h@132 PS5, Line 132: TPMS_CAPABILITY_DATA *CapabilityData); need consistent spacing around '*' (ctx:WxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/30218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1d5a21d40b6a31886777e8e9fe7b28c860f1a80 Gerrit-Change-Number: 30218 Gerrit-PatchSet: 5 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 21 Dec 2018 11:40:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: {devices, lib, security} Add Eltan vendor code for measured and verifie...
by Frans Hendriks (Code Review) 21 Dec '18

21 Dec '18

Hello Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30218 to look at the new patch set (#5). Change subject: {devices,lib,security} Add Eltan vendor code for measured and verified boot. ...................................................................... {devices,lib,security} Add Eltan vendor code for measured and verified boot. coreboot supports verfied boot based on ChromeOS verified boot. No verified boot support without dependency on ChromeOS is available. Create measured boot (vendorcode/eltan/mboot) and verified_boot (vendorcode/eltan/verified_boot) directories. These features use the security/lib which is a 'wrapper' using only sha1, sha256 and sha512 of 3rdparty/vboot/firmware. prog_locate_hook() is added and used to start verified boot. At board level can be specified with parts of SPI must be verified and/or measured. BUG=N/A TEST=Created verified binary and verify logging on Portwell PQ-M107 Change-Id: Ic1d5a21d40b6a31886777e8e9fe7b28c860f1a80 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- A Documentation/vendorcode/eltan/index.md A Documentation/vendorcode/eltan/security.md M Documentation/vendorcode/index.md M src/device/pci_device.c M src/include/device/pci_rom.h M src/include/program_loading.h M src/lib/prog_loaders.c M src/security/tpm/tss.h M src/security/tpm/tss/tcg-2.0/tss.c M src/security/tpm/tss/tcg-2.0/tss_marshaling.c M src/security/tpm/tss/tcg-2.0/tss_structures.h M src/vendorcode/Makefile.inc A src/vendorcode/eltan/Kconfig A src/vendorcode/eltan/Makefile.inc A src/vendorcode/eltan/security/Kconfig A src/vendorcode/eltan/security/Makefile.inc A src/vendorcode/eltan/security/include/cb_sha1.h A src/vendorcode/eltan/security/include/cb_sha256.h A src/vendorcode/eltan/security/include/cb_sha512.h A src/vendorcode/eltan/security/include/cryptolib.h A src/vendorcode/eltan/security/lib/Makefile.inc A src/vendorcode/eltan/security/lib/cb_sha1.c A src/vendorcode/eltan/security/lib/cb_sha256.c A src/vendorcode/eltan/security/lib/cb_sha512.c A src/vendorcode/eltan/security/mboot/Kconfig A src/vendorcode/eltan/security/mboot/Makefile.inc A src/vendorcode/eltan/security/mboot/mboot.c A src/vendorcode/eltan/security/mboot/mboot.h A src/vendorcode/eltan/security/mboot/mboot_func.c A src/vendorcode/eltan/security/verified_boot/Kconfig A src/vendorcode/eltan/security/verified_boot/Makefile.inc A src/vendorcode/eltan/security/verified_boot/vboot_check.c A src/vendorcode/eltan/security/verified_boot/vboot_check.h 33 files changed, 2,197 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/30218/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/30218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1d5a21d40b6a31886777e8e9fe7b28c860f1a80 Gerrit-Change-Number: 30218 Gerrit-PatchSet: 5 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: src/mainboard/libretrend/lt1000: Initial commit
by Michał Żygowski (Code Review) 21 Dec '18

21 Dec '18

Hello Piotr Król, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30360 to look at the new patch set (#3). Change subject: src/mainboard/libretrend/lt1000: Initial commit ...................................................................... src/mainboard/libretrend/lt1000: Initial commit Change-Id: I32fc8a7d3177ba379d04ad8b87adefcfca2b0fab Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- A src/ec/libretrend/lt1000/Kconfig A src/ec/libretrend/lt1000/acpi/battery.asl A src/ec/libretrend/lt1000/acpi/ec.asl A src/mainboard/libretrend/Kconfig A src/mainboard/libretrend/Kconfig.name A src/mainboard/libretrend/lt1000/Kconfig A src/mainboard/libretrend/lt1000/Kconfig.name A src/mainboard/libretrend/lt1000/Makefile.inc A src/mainboard/libretrend/lt1000/acpi/ec.asl A src/mainboard/libretrend/lt1000/acpi/mainboard.asl A src/mainboard/libretrend/lt1000/acpi/superio.asl A src/mainboard/libretrend/lt1000/acpi_tables.c A src/mainboard/libretrend/lt1000/board_info.txt A src/mainboard/libretrend/lt1000/devicetree.cb A src/mainboard/libretrend/lt1000/dsdt.asl A src/mainboard/libretrend/lt1000/hda_verb.c A src/mainboard/libretrend/lt1000/hda_verb.h A src/mainboard/libretrend/lt1000/mainboard.c A src/mainboard/libretrend/lt1000/mainboard_gpio.h A src/mainboard/libretrend/lt1000/pei_data.c A src/mainboard/libretrend/lt1000/pei_data.h A src/mainboard/libretrend/lt1000/ramstage.c A src/mainboard/libretrend/lt1000/romstage.c 23 files changed, 1,299 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/30360/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/30360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32fc8a7d3177ba379d04ad8b87adefcfca2b0fab Gerrit-Change-Number: 30360 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: src/mainboard/libretrend/lt1000: Initial commit
by build bot (Jenkins) (Code Review) 21 Dec '18

21 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30360 ) Change subject: src/mainboard/libretrend/lt1000: Initial commit ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/30360/2/src/mainboard/libretrend/lt1000/dev… File src/mainboard/libretrend/lt1000/devicetree.cb: https://review.coreboot.org/#/c/30360/2/src/mainboard/libretrend/lt1000/dev… PS2, Line 298: irq 0xf0 = 0x01 trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/30360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32fc8a7d3177ba379d04ad8b87adefcfca2b0fab Gerrit-Change-Number: 30360 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 21 Dec 2018 11:28:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2018