coreboot-gerrit January 2018

coreboot-gerrit@coreboot.org

1 participants
2315 discussions

Change in coreboot[master]: nb/intel/x4x: Use postcar stage to tear down CAR
by Arthur Heymans (Code Review) 29 Jan '18

29 Jan '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/23495 Change subject: nb/intel/x4x: Use postcar stage to tear down CAR ...................................................................... nb/intel/x4x: Use postcar stage to tear down CAR This allows to cleanly migrate car globals Change-Id: I5cebabe80da98744e33d29b22650d708c747ebde Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/x4x/Kconfig M src/northbridge/intel/x4x/Makefile.inc M src/northbridge/intel/x4x/ram_calc.c 3 files changed, 8 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/23495/1 diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 9239637..5859398 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -28,6 +28,8 @@ select RELOCATABLE_RAMSTAGE select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT + select POSTCAR_STAGE + select POSTCAR_CONSOLE config CBFS_SIZE hex diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc index 5c64ca7..92ed04a 100644 --- a/src/northbridge/intel/x4x/Makefile.inc +++ b/src/northbridge/intel/x4x/Makefile.inc @@ -27,4 +27,6 @@ ramstage-y += gma.c ramstage-y += northbridge.c +postcar-y += ram_calc.c + endif diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/ram_calc.c index 1009372..dd28951 100644 --- a/src/northbridge/intel/x4x/ram_calc.c +++ b/src/northbridge/intel/x4x/ram_calc.c @@ -103,8 +103,6 @@ return (void *) top_of_ram; } -#define ROMSTAGE_RAM_STACK_SIZE 0x5000 - /* setup_stack_and_mtrrs() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use. */ void *setup_stack_and_mtrrs(void) @@ -112,7 +110,7 @@ struct postcar_frame pcf; uintptr_t top_of_ram; - if (postcar_frame_init(&pcf, ROMSTAGE_RAM_STACK_SIZE)) + if (postcar_frame_init(&pcf, 1*KiB)) die("Unable to initialize postcar frame.\n"); /* Cache the ROM as WP just below 4GiB. */ @@ -131,8 +129,7 @@ postcar_frame_add_mtrr(&pcf, top_of_ram - 4*MiB, 4*MiB, MTRR_TYPE_WRBACK); postcar_frame_add_mtrr(&pcf, top_of_ram - 8*MiB, 4*MiB, MTRR_TYPE_WRBACK); - /* Save the number of MTRRs to setup. Return the stack location - * pointing to the number of MTRRs. - */ - return postcar_commit_mtrrs(&pcf); + run_postcar_phase(&pcf); + /* We don't return here */ + return NULL; } -- To view, visit https://review.coreboot.org/23495 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I5cebabe80da98744e33d29b22650d708c747ebde Gerrit-Change-Number: 23495 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

1 0

Change in coreboot[master]: autoport: Don't do writes to FD in romstage
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23486 ) Change subject: autoport: Don't do writes to FD in romstage ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/66735/ : SUCCESS -- To view, visit https://review.coreboot.org/23486 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4edb75569ceec2d2f1308755a66d286202ca0ae6 Gerrit-Change-Number: 23486 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 20:58:58 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mb/google/poppy/variants/soraka: Enable mode-aware DPTF
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23463 ) Change subject: mb/google/poppy/variants/soraka: Enable mode-aware DPTF ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/21329/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/66732/ : SUCCESS -- To view, visit https://review.coreboot.org/23463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I071868982fa87821550b870a6d8050cf2a030b49 Gerrit-Change-Number: 23463 Gerrit-PatchSet: 6 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 20:57:20 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23490 ) Change subject: nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/66734/ : SUCCESS -- To view, visit https://review.coreboot.org/23490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1d0648fe36c88bd9279ac19e5c710055327599fd Gerrit-Change-Number: 23490 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 20:56:57 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23490 ) Change subject: nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS ...................................................................... Patch Set 2: Build Failed https://qa.coreboot.org/job/coreboot-gerrit/66733/ : ABORTED -- To view, visit https://review.coreboot.org/23490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1d0648fe36c88bd9279ac19e5c710055327599fd Gerrit-Change-Number: 23490 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 20:47:08 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mb/google/poppy/variants/soraka: Update _PSV for TCPU
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23494 ) Change subject: mb/google/poppy/variants/soraka: Update _PSV for TCPU ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/21331/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/66724/ : SUCCESS -- To view, visit https://review.coreboot.org/23494 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I081f63bdf811ff021c398f60efec9e6cccf462d5 Gerrit-Change-Number: 23494 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 20:14:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: soc/intel/skylake: Add support for mode-aware DPTF
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23462 ) Change subject: soc/intel/skylake: Add support for mode-aware DPTF ...................................................................... Patch Set 5: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/21330/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/66725/ : SUCCESS -- To view, visit https://review.coreboot.org/23462 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ife48af76ceb7a39abd1fac8ef1f77db7e65ab43e Gerrit-Change-Number: 23462 Gerrit-PatchSet: 5 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 20:11:00 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: chromeec: Decouple EC tablet event and TBMC device
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23461 ) Change subject: chromeec: Decouple EC tablet event and TBMC device ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/21328/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/66723/ : SUCCESS -- To view, visit https://review.coreboot.org/23461 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie38b6d68486e8e644dd0d6d406def3ae7fdb5152 Gerrit-Change-Number: 23461 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 20:06:21 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mb/google/poppy/variants/soraka: Enable mode-aware DPTF
by build bot (Jenkins) (Code Review) 29 Jan '18

29 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23463 ) Change subject: mb/google/poppy/variants/soraka: Enable mode-aware DPTF ...................................................................... Patch Set 6: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/66726/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/21329/ : SUCCESS -- To view, visit https://review.coreboot.org/23463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I071868982fa87821550b870a6d8050cf2a030b49 Gerrit-Change-Number: 23463 Gerrit-PatchSet: 6 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 29 Jan 2018 19:58:23 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mb/google/poppy/variants/soraka: Update _PSV for TCPU
by Furquan Shaikh (Code Review) 29 Jan '18

29 Jan '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/23494 Change subject: mb/google/poppy/variants/soraka: Update _PSV for TCPU ...................................................................... mb/google/poppy/variants/soraka: Update _PSV for TCPU This change updates the passive setting for TCPU as per factory team recommendation. BUG=b:65467566 Change-Id: I081f63bdf811ff021c398f60efec9e6cccf462d5 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/23494/1 diff --git a/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl index 736bd13..e42c8ea 100644 --- a/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/dptf.asl @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#define DPTF_CPU_PASSIVE 85 +#define DPTF_CPU_PASSIVE 82 #define DPTF_CPU_CRITICAL 100 #define DPTF_TSR0_SENSOR_ID 1 -- To view, visit https://review.coreboot.org/23494 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I081f63bdf811ff021c398f60efec9e6cccf462d5 Gerrit-Change-Number: 23494 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2018