coreboot-gerrit June 2017

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Change in coreboot[master]: soc/amd/common: Fix most checkpatch errors
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20249 ) Change subject: soc/amd/common: Fix most checkpatch errors ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/56320/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/11913/ : SUCCESS -- To view, visit https://review.coreboot.org/20249 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0464f0cafac4ee67edc95d377dcf7aab9a90c66b Gerrit-Change-Number: 20249 Gerrit-PatchSet: 6 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 19:27:14 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/stoneyridge: Remove IDE controller
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20320 ) Change subject: soc/stoneyridge: Remove IDE controller ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/56323/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/11916/ : SUCCESS -- To view, visit https://review.coreboot.org/20320 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7316c113a7464089ccfbea6b6cf69787940b9e97 Gerrit-Change-Number: 20320 Gerrit-PatchSet: 3 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 19:24:54 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/stoneyridge: Fix most checkpatch errors
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19986 ) Change subject: soc/amd/stoneyridge: Fix most checkpatch errors ...................................................................... Patch Set 10: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/56319/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/11912/ : SUCCESS -- To view, visit https://review.coreboot.org/19986 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I768884a4c4b9505e77f5d6bfde37797520878912 Gerrit-Change-Number: 19986 Gerrit-PatchSet: 10 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 19:24:12 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/stoneyridge: Remove PCIe-PCI bridge
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20198 ) Change subject: soc/amd/stoneyridge: Remove PCIe-PCI bridge ...................................................................... Patch Set 8: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/56321/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/11914/ : SUCCESS -- To view, visit https://review.coreboot.org/20198 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8f974ba76b8c20f4335dd8872eaf4b8172188ee2 Gerrit-Change-Number: 20198 Gerrit-PatchSet: 8 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 19:19:07 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: payloads: Add whitespace around '<<'
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20396 ) Change subject: payloads: Add whitespace around '<<' ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/56318/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/11911/ : SUCCESS -- To view, visit https://review.coreboot.org/20396 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0659f6ec59fb808b4cedf57d60d737c13c250042 Gerrit-Change-Number: 20396 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 19:13:43 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: payloads: Add whitespace around '<<'
by HAOUAS Elyes (Code Review) 27 Jun '17

27 Jun '17

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/20396 Change subject: payloads: Add whitespace around '<<' ...................................................................... payloads: Add whitespace around '<<' Change-Id: I0659f6ec59fb808b4cedf57d60d737c13c250042 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M payloads/libpayload/drivers/udc/dwc2.c M payloads/libpayload/drivers/usb/ehci_private.h M payloads/libpayload/drivers/usb/ohci.c M payloads/libpayload/drivers/usb/ohci_private.h M payloads/libpayload/drivers/usb/uhci_private.h M payloads/libpayload/drivers/usb/xhci_private.h M payloads/libpayload/drivers/video/corebootfb.c M payloads/libpayload/include/arm64/arch/lib_helpers.h M payloads/libpayload/include/stddef.h M payloads/libpayload/liblz4/lz4.c.inc 10 files changed, 117 insertions(+), 117 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/20396/1 diff --git a/payloads/libpayload/drivers/udc/dwc2.c b/payloads/libpayload/drivers/udc/dwc2.c index b67740b..e95eb79 100644 --- a/payloads/libpayload/drivers/udc/dwc2.c +++ b/payloads/libpayload/drivers/udc/dwc2.c @@ -317,7 +317,7 @@ int i, val; for (i = 1; i < MAX_EPS_CHANNELS - 1; i++) { - if (p->fifo_map & (1<<i)) + if (p->fifo_map & (1 << i)) continue; gtxfsiz.d32 = readl(&p->regs->core.dptxfsiz_dieptxf[i]); val = gtxfsiz.txfdep * 4; diff --git a/payloads/libpayload/drivers/usb/ehci_private.h b/payloads/libpayload/drivers/usb/ehci_private.h index 8519c0f..fa8aaac 100644 --- a/payloads/libpayload/drivers/usb/ehci_private.h +++ b/payloads/libpayload/drivers/usb/ehci_private.h @@ -101,7 +101,7 @@ #define QTD_CPAGE_SHIFT 12 #define QTD_CPAGE_MASK (7 << QTD_CPAGE_SHIFT) #define QTD_TOTAL_LEN_SHIFT 16 -#define QTD_TOTAL_LEN_MASK (((1<<15)-1) << QTD_TOTAL_LEN_SHIFT) +#define QTD_TOTAL_LEN_MASK (((1 << 15)-1) << QTD_TOTAL_LEN_SHIFT) #define QTD_TOGGLE_SHIFT 31 #define QTD_TOGGLE_MASK (1 << 31) #define QTD_TOGGLE_DATA0 0 @@ -113,10 +113,10 @@ typedef volatile struct { u32 horiz_link_ptr; #define QH_TERMINATE 1 -#define QH_iTD (0<<1) -#define QH_QH (1<<1) -#define QH_siTD (2<<1) -#define QH_FSTN (3<<1) +#define QH_iTD (0 << 1) +#define QH_QH (1 << 1) +#define QH_siTD (2 << 1) +#define QH_FSTN (3 << 1) u32 epchar; #define QH_EP_SHIFT 8 #define QH_EPS_SHIFT 12 diff --git a/payloads/libpayload/drivers/usb/ohci.c b/payloads/libpayload/drivers/usb/ohci.c index a5388cb..1d7d830 100644 --- a/payloads/libpayload/drivers/usb/ohci.c +++ b/payloads/libpayload/drivers/usb/ohci.c @@ -232,8 +232,8 @@ OHCI_INST (controller)->opreg->HcControl |= PeriodicListEnable; OHCI_INST (controller)->opreg->HcControl &= ~IsochronousEnable; // unused by this driver // disable everything, contrary to what OHCI spec says in 5.1.1.4, as we don't need IRQs - OHCI_INST (controller)->opreg->HcInterruptEnable = 1<<31; - OHCI_INST (controller)->opreg->HcInterruptDisable = ~(1<<31); + OHCI_INST (controller)->opreg->HcInterruptEnable = 1 << 31; + OHCI_INST (controller)->opreg->HcInterruptDisable = ~(1 << 31); OHCI_INST (controller)->opreg->HcInterruptStatus = ~0; OHCI_INST (controller)->opreg->HcPeriodicStart = (((OHCI_INST (controller)->opreg->HcFmInterval & FrameIntervalMask) / 10) * 9); OHCI_INST (controller)->opreg->HcControl = (OHCI_INST (controller)->opreg->HcControl & ~HostControllerFunctionalStateMask) | USBOperational; diff --git a/payloads/libpayload/drivers/usb/ohci_private.h b/payloads/libpayload/drivers/usb/ohci_private.h index 07bb20d..58be5fa 100644 --- a/payloads/libpayload/drivers/usb/ohci_private.h +++ b/payloads/libpayload/drivers/usb/ohci_private.h @@ -38,13 +38,13 @@ typedef enum { CMD} reg; enum { - NumberDownstreamPorts = 1<<0, - PowerSwitchingMode = 1<<8, - NoPowerSwitching = 1<<9, - DeviceType = 1<<10, - OverCurrentProtectionMode = 1<<11, - NoOverCurrentProtection = 1<<12, - PowerOnToPowerGoodTime = 1<<24 + NumberDownstreamPorts = 1 << 0, + PowerSwitchingMode = 1 << 8, + NoPowerSwitching = 1 << 9, + DeviceType = 1 << 10, + OverCurrentProtectionMode = 1 << 11, + NoOverCurrentProtection = 1 << 12, + PowerOnToPowerGoodTime = 1 << 24 } HcRhDescriptorAReg; enum { @@ -53,47 +53,47 @@ } HcRhDescriptorAMask; enum { - DeviceRemovable = 1<<0, - PortPowerControlMask = 1<<16 + DeviceRemovable = 1 << 0, + PortPowerControlMask = 1 << 16 } HcRhDescriptorBReg; enum { - CurrentConnectStatus = 1<<0, - PortEnableStatus = 1<<1, - PortSuspendStatus = 1<<2, - PortOverCurrentIndicator = 1<<3, - PortResetStatus = 1<<4, - PortPowerStatus = 1<<8, - LowSpeedDeviceAttached = 1<<9, - ConnectStatusChange = 1<<16, - PortEnableStatusChange = 1<<17, - PortSuspendStatusChange = 1<<18, - PortOverCurrentIndicatorChange = 1<<19, - PortResetStatusChange = 1<<20 + CurrentConnectStatus = 1 << 0, + PortEnableStatus = 1 << 1, + PortSuspendStatus = 1 << 2, + PortOverCurrentIndicator = 1 << 3, + PortResetStatus = 1 << 4, + PortPowerStatus = 1 << 8, + LowSpeedDeviceAttached = 1 << 9, + ConnectStatusChange = 1 << 16, + PortEnableStatusChange = 1 << 17, + PortSuspendStatusChange = 1 << 18, + PortOverCurrentIndicatorChange = 1 << 19, + PortResetStatusChange = 1 << 20 } HcRhPortStatusRead; enum { - ClearPortEnable = 1<<0, - SetPortEnable = 1<<1, - SetPortSuspend = 1<<2, - ClearSuspendStatus = 1<<3, - SetPortReset = 1<<4, - SetPortPower = 1<<8, - ClearPortPower = 1<<9, + ClearPortEnable = 1 << 0, + SetPortEnable = 1 << 1, + SetPortSuspend = 1 << 2, + ClearSuspendStatus = 1 << 3, + SetPortReset = 1 << 4, + SetPortPower = 1 << 8, + ClearPortPower = 1 << 9, } HcRhPortStatusSet; enum { - LocalPowerStatus = 1<<0, - OverCurrentIndicator = 1<<1, - DeviceRemoteWakeupEnable = 1<<15, - LocalPowerStatusChange = 1<<16, - OverCurrentIndicatorChange = 1<<17, - ClearRemoteWakeupEnable = 1<<31 + LocalPowerStatus = 1 << 0, + OverCurrentIndicator = 1 << 1, + DeviceRemoteWakeupEnable = 1 << 15, + LocalPowerStatusChange = 1 << 16, + OverCurrentIndicatorChange = 1 << 17, + ClearRemoteWakeupEnable = 1 << 31 } HcRhStatusReg; enum { - FrameInterval = 1<<0, - FSLargestDataPacket = 1<<16, - FrameIntervalToggle = 1<<31 + FrameInterval = 1 << 0, + FSLargestDataPacket = 1 << 16, + FrameIntervalToggle = 1 << 31 } HcFmIntervalOffset; enum { FrameIntervalMask = MASK(0, 14), @@ -102,15 +102,15 @@ } HcFmIntervalMask; enum { - ControlBulkServiceRatio = 1<<0, - PeriodicListEnable = 1<<2, - IsochronousEnable = 1<<3, - ControlListEnable = 1<<4, - BulkListEnable = 1<<5, - HostControllerFunctionalState = 1<<6, - InterruptRouting = 1<<8, - RemoteWakeupConnected = 1<<9, - RemoteWakeupEnable = 1<<10 + ControlBulkServiceRatio = 1 << 0, + PeriodicListEnable = 1 << 2, + IsochronousEnable = 1 << 3, + ControlListEnable = 1 << 4, + BulkListEnable = 1 << 5, + HostControllerFunctionalState = 1 << 6, + InterruptRouting = 1 << 8, + RemoteWakeupConnected = 1 << 9, + RemoteWakeupEnable = 1 << 10 } HcControlReg; enum { @@ -126,11 +126,11 @@ }; enum { - HostControllerReset = 1<<0, - ControlListFilled = 1<<1, - BulkListFilled = 1<<2, - OwnershipChangeRequest = 1<<3, - SchedulingOverrunCount = 1<<16 + HostControllerReset = 1 << 0, + ControlListFilled = 1 << 1, + BulkListFilled = 1 << 2, + OwnershipChangeRequest = 1 << 3, + SchedulingOverrunCount = 1 << 16 } HcCommandStatusReg; enum { @@ -138,19 +138,19 @@ } HcCommandStatusMask; enum { - FrameRemaining = 1<<0, - FrameRemainingToggle = 1<<31 + FrameRemaining = 1 << 0, + FrameRemainingToggle = 1 << 31 } HcFmRemainingReg; enum { - SchedulingOverrung = 1<<0, - WritebackDoneHead = 1<<1, - StartofFrame = 1<<2, - ResumeDetected = 1<<3, - UnrecoverableError = 1<<4, - FrameNumberOverflow = 1<<5, - RootHubStatusChange = 1<<6, - OwnershipChange = 1<<30 + SchedulingOverrung = 1 << 0, + WritebackDoneHead = 1 << 1, + StartofFrame = 1 << 2, + ResumeDetected = 1 << 3, + UnrecoverableError = 1 << 4, + FrameNumberOverflow = 1 << 5, + RootHubStatusChange = 1 << 6, + OwnershipChange = 1 << 30 } HcInterruptStatusReg; typedef struct { diff --git a/payloads/libpayload/drivers/usb/uhci_private.h b/payloads/libpayload/drivers/usb/uhci_private.h index f650c4a..3d796cf 100644 --- a/payloads/libpayload/drivers/usb/uhci_private.h +++ b/payloads/libpayload/drivers/usb/uhci_private.h @@ -57,7 +57,7 @@ u32 token; #define TD_PID_MASK 0xff #define TD_DEVADDR_SHIFT 8 -#define TD_DEVADDR_MASK (((1<<7)-1) << TD_DEVADDR_SHIFT) +#define TD_DEVADDR_MASK (((1 << 7)-1) << TD_DEVADDR_SHIFT) #define TD_EP_SHIFT 15 #define TD_EP_MASK (0xf << TD_EP_SHIFT) #define TD_TOGGLE_SHIFT 19 diff --git a/payloads/libpayload/drivers/usb/xhci_private.h b/payloads/libpayload/drivers/usb/xhci_private.h index 47a464f..6146955 100644 --- a/payloads/libpayload/drivers/usb/xhci_private.h +++ b/payloads/libpayload/drivers/usb/xhci_private.h @@ -387,25 +387,25 @@ making bitfields unusable for MMIO register blocks. Yay C :-( */ volatile struct opreg { u32 usbcmd; -#define USBCMD_RS 1<<0 -#define USBCMD_HCRST 1<<1 -#define USBCMD_INTE 1<<2 +#define USBCMD_RS 1 << 0 +#define USBCMD_HCRST 1 << 1 +#define USBCMD_INTE 1 << 2 u32 usbsts; -#define USBSTS_HCH 1<<0 -#define USBSTS_HSE 1<<2 -#define USBSTS_EINT 1<<3 -#define USBSTS_PCD 1<<4 -#define USBSTS_CNR 1<<11 +#define USBSTS_HCH 1 << 0 +#define USBSTS_HSE 1 << 2 +#define USBSTS_EINT 1 << 3 +#define USBSTS_PCD 1 << 4 +#define USBSTS_CNR 1 << 11 #define USBSTS_PRSRV_MASK ((1 << 1) | 0xffffe000) u32 pagesize; u8 res1[0x13-0x0c+1]; u32 dnctrl; u32 crcr_lo; u32 crcr_hi; -#define CRCR_RCS 1<<0 -#define CRCR_CS 1<<1 -#define CRCR_CA 1<<2 -#define CRCR_CRR 1<<3 +#define CRCR_RCS 1 << 0 +#define CRCR_CS 1 << 1 +#define CRCR_CA 1 << 2 +#define CRCR_CRR 1 << 3 u8 res2[0x2f-0x20+1]; u32 dcbaap_lo; u32 dcbaap_hi; @@ -414,34 +414,34 @@ u8 res3[0x3ff-0x3c+1]; struct { u32 portsc; -#define PORTSC_CCS (1<<0) -#define PORTSC_PED (1<<1) +#define PORTSC_CCS (1 << 0) +#define PORTSC_PED (1 << 1) // BIT 2 rsvdZ -#define PORTSC_OCA (1<<3) -#define PORTSC_PR (1<<4) -#define PORTSC_PLS (1<<5) +#define PORTSC_OCA (1 << 3) +#define PORTSC_PR (1 << 4) +#define PORTSC_PLS (1 << 5) #define PORTSC_PLS_MASK MASK(5, 4) -#define PORTSC_PP (1<<9) +#define PORTSC_PP (1 << 9) #define PORTSC_PORT_SPEED_START 10 -#define PORTSC_PORT_SPEED (1<<PORTSC_PORT_SPEED_START) +#define PORTSC_PORT_SPEED (1 << PORTSC_PORT_SPEED_START) #define PORTSC_PORT_SPEED_MASK MASK(PORTSC_PORT_SPEED_START, 4) -#define PORTSC_PIC (1<<14) +#define PORTSC_PIC (1 << 14) #define PORTSC_PIC_MASK MASK(14, 2) -#define PORTSC_LWS (1<<16) -#define PORTSC_CSC (1<<17) -#define PORTSC_PEC (1<<18) -#define PORTSC_WRC (1<<19) -#define PORTSC_OCC (1<<20) -#define PORTSC_PRC (1<<21) -#define PORTSC_PLC (1<<22) -#define PORTSC_CEC (1<<23) -#define PORTSC_CAS (1<<24) -#define PORTSC_WCE (1<<25) -#define PORTSC_WDE (1<<26) -#define PORTSC_WOE (1<<27) +#define PORTSC_LWS (1 << 16) +#define PORTSC_CSC (1 << 17) +#define PORTSC_PEC (1 << 18) +#define PORTSC_WRC (1 << 19) +#define PORTSC_OCC (1 << 20) +#define PORTSC_PRC (1 << 21) +#define PORTSC_PLC (1 << 22) +#define PORTSC_CEC (1 << 23) +#define PORTSC_CAS (1 << 24) +#define PORTSC_WCE (1 << 25) +#define PORTSC_WDE (1 << 26) +#define PORTSC_WOE (1 << 27) // BIT 29:28 rsvdZ -#define PORTSC_DR (1<<30) -#define PORTSC_WPR (1<<31) +#define PORTSC_DR (1 << 30) +#define PORTSC_WPR (1 << 31) #define PORTSC_RW_MASK (PORTSC_PR | PORTSC_PLS_MASK | PORTSC_PP | PORTSC_PIC_MASK | PORTSC_LWS | PORTSC_WCE | PORTSC_WDE | PORTSC_WOE) u32 portpmsc; u32 portli; diff --git a/payloads/libpayload/drivers/video/corebootfb.c b/payloads/libpayload/drivers/video/corebootfb.c index 1aeac12..572a02b 100644 --- a/payloads/libpayload/drivers/video/corebootfb.c +++ b/payloads/libpayload/drivers/video/corebootfb.c @@ -192,7 +192,7 @@ int ch, paint; if(cursor_en) { ch = CHARS[cursor_y * coreboot_video_console.columns + cursor_x]; - paint = (ch & 0xff) | ((ch<<4) & 0xf000) | ((ch >> 4) & 0x0f00); + paint = (ch & 0xff) | ((ch << 4) & 0xf000) | ((ch >> 4) & 0x0f00); } else { paint = CHARS[cursor_y * coreboot_video_console.columns + cursor_x]; } diff --git a/payloads/libpayload/include/arm64/arch/lib_helpers.h b/payloads/libpayload/include/arm64/arch/lib_helpers.h index ca68435..2b346c4 100644 --- a/payloads/libpayload/include/arm64/arch/lib_helpers.h +++ b/payloads/libpayload/include/arm64/arch/lib_helpers.h @@ -98,10 +98,10 @@ #include <stdint.h> -#define DAIF_DBG_BIT (1<<3) -#define DAIF_ABT_BIT (1<<2) -#define DAIF_IRQ_BIT (1<<1) -#define DAIF_FIQ_BIT (1<<0) +#define DAIF_DBG_BIT (1 << 3) +#define DAIF_ABT_BIT (1 << 2) +#define DAIF_IRQ_BIT (1 << 1) +#define DAIF_FIQ_BIT (1 << 0) #define SWITCH_CASE_READ(func, var, type, el) do { \ type var = -1; \ diff --git a/payloads/libpayload/include/stddef.h b/payloads/libpayload/include/stddef.h index fe455b8..3288487 100644 --- a/payloads/libpayload/include/stddef.h +++ b/payloads/libpayload/include/stddef.h @@ -21,9 +21,9 @@ "`struct " #structure "` offset for `" #member "` is not " #offset) /* Standard units. */ -#define KiB (1<<10) -#define MiB (1<<20) -#define GiB (1<<30) +#define KiB (1 << 10) +#define MiB (1 << 20) +#define GiB (1 << 30) #define KHz (1000) #define MHz (1000*KHz) diff --git a/payloads/libpayload/liblz4/lz4.c.inc b/payloads/libpayload/liblz4/lz4.c.inc index b3be4e5..baa9110 100644 --- a/payloads/libpayload/liblz4/lz4.c.inc +++ b/payloads/libpayload/liblz4/lz4.c.inc @@ -64,17 +64,17 @@ #define MFLIMIT (WILDCOPYLENGTH+MINMATCH) static const int LZ4_minLength = (MFLIMIT+1); -#define KB *(1 <<10) -#define MB *(1 <<20) -#define GB *(1U<<30) +#define KB *(1 << 10) +#define MB *(1 << 20) +#define GB *(1U << 30) #define MAXD_LOG 16 #define MAX_DISTANCE ((1 << MAXD_LOG) - 1) #define ML_BITS 4 -#define ML_MASK ((1U<<ML_BITS)-1) +#define ML_MASK ((1U << ML_BITS)-1) #define RUN_BITS (8-ML_BITS) -#define RUN_MASK ((1U<<RUN_BITS)-1) +#define RUN_MASK ((1U << RUN_BITS)-1) /************************************** -- To view, visit https://review.coreboot.org/20396 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I0659f6ec59fb808b4cedf57d60d737c13c250042 Gerrit-Change-Number: 20396 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>

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Change in coreboot[master]: util/lint: Add check to make sure 'coreboot' is lowercase
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20032 ) Change subject: util/lint: Add check to make sure 'coreboot' is lowercase ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/56317/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/11910/ : SUCCESS -- To view, visit https://review.coreboot.org/20032 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6b52342488dacc56ef6083db5503507af35d41ac Gerrit-Change-Number: 20032 Gerrit-PatchSet: 3 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ronald G. Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 18:44:47 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: [WIP] nb/haswell: use GMA common OpRegion
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20395 ) Change subject: [WIP] nb/haswell: use GMA common OpRegion ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/56316/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/11909/ : SUCCESS -- To view, visit https://review.coreboot.org/20395 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id1d8829d8e8542a165d5eb57725f211c4ae56cf8 Gerrit-Change-Number: 20395 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 18:36:28 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: [WIP] drv/intel/gma/opregion: Add common init_idg_opregion()
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20394 ) Change subject: [WIP] drv/intel/gma/opregion: Add common init_idg_opregion() ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/56315/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/11908/ : SUCCESS -- To view, visit https://review.coreboot.org/20394 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2378043a82bdf785df10a702afef1123662e04d9 Gerrit-Change-Number: 20394 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 18:35:25 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: drv/intel/gma/opregion: Add function to set ASLS register
by build bot (Jenkins) (Code Review) 27 Jun '17

27 Jun '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20281 ) Change subject: drv/intel/gma/opregion: Add function to set ASLS register ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/56313/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/11905/ : SUCCESS -- To view, visit https://review.coreboot.org/20281 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4850500ac6d58f80b0eddc81514053c87774405c Gerrit-Change-Number: 20281 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Jun 2017 18:34:52 +0000 Gerrit-HasComments: No

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