coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: google/kahlee: Setup the I2S audio codec
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19841 to look at the new patch set (#3). Change subject: google/kahlee: Setup the I2S audio codec ...................................................................... google/kahlee: Setup the I2S audio codec Inform AGESA to setup an I2S codec instead of an Azalia codec. This is step one for audio to work. ASL to connect the driver and the hardware is in a follow-on patch. Change-Id: I7ece5d8c317ddc76e0e6b2a005256bc384fe51e2 Signed-off-by: Marc Jones <marc.jones(a)scarletltd.com> --- M src/mainboard/google/kahlee/bootblock/OemCustomize.c 1 file changed, 2 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/19841/3 -- To view, visit https://review.coreboot.org/19841 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I7ece5d8c317ddc76e0e6b2a005256bc384fe51e2 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: google/kahlee: Pass GPIO setting in amdinitenv
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19839 to look at the new patch set (#3). Change subject: google/kahlee: Pass GPIO setting in amdinitenv ...................................................................... google/kahlee: Pass GPIO setting in amdinitenv GPIOs for I2C3 were being unset in amdinitmid if the GPIO enable table wasn't passed. It had been initialy set in amdinitreset. Pull the GPIO settings into their own file that can be used in bootblock and later stages. Change-Id: I41cd7873f8c8543c95ad8653e0a3887f7d0487a2 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- M src/mainboard/google/kahlee/BiosCallOuts.c M src/mainboard/google/kahlee/Makefile.inc M src/mainboard/google/kahlee/bootblock/BiosCallOuts.c A src/mainboard/google/kahlee/gpio.c 4 files changed, 101 insertions(+), 74 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/19839/3 -- To view, visit https://review.coreboot.org/19839 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I41cd7873f8c8543c95ad8653e0a3887f7d0487a2 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: google/kahlee: Update PCIe link/lane configuration
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19838 to look at the new patch set (#3). Change subject: google/kahlee: Update PCIe link/lane configuration ...................................................................... google/kahlee: Update PCIe link/lane configuration Enable: GPP0 x1 - WLan GPP1 x1 - Card Reader Change-Id: Idbfc2a3260b85949810bdd8dc904e59f8a779e48 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- M src/mainboard/google/kahlee/bootblock/OemCustomize.c 1 file changed, 18 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/19838/3 -- To view, visit https://review.coreboot.org/19838 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Idbfc2a3260b85949810bdd8dc904e59f8a779e48 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: google/kahlee: Update GPIO table
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19834 to look at the new patch set (#2). Change subject: google/kahlee: Update GPIO table ...................................................................... google/kahlee: Update GPIO table Update GPIO settings based on the schematic. Change-Id: Ic8a876198a3ba9029d1aabb273418923e40bfcc6 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- M src/mainboard/google/kahlee/bootblock/BiosCallOuts.c 1 file changed, 64 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/19834/2 -- To view, visit https://review.coreboot.org/19834 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ic8a876198a3ba9029d1aabb273418923e40bfcc6 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: google/kahlee: Start Kahlee mainboard
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19830 to look at the new patch set (#2). Change subject: google/kahlee: Start Kahlee mainboard ...................................................................... google/kahlee: Start Kahlee mainboard Copied from amd/gardenia. Update the appropriate board name strings. Uses the soc/ structure. Change-Id: Ia68b16969518f4d63d5d2dea7658a472b2daca05 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- A src/mainboard/google/kahlee/BiosCallOuts.c A src/mainboard/google/kahlee/Kconfig A src/mainboard/google/kahlee/Kconfig.name A src/mainboard/google/kahlee/Makefile.inc A src/mainboard/google/kahlee/OemCustomize.c A src/mainboard/google/kahlee/acpi/AmdImc.asl A src/mainboard/google/kahlee/acpi/carrizo_fch.asl A src/mainboard/google/kahlee/acpi/gpe.asl A src/mainboard/google/kahlee/acpi/mainboard.asl A src/mainboard/google/kahlee/acpi/routing.asl A src/mainboard/google/kahlee/acpi/sleep.asl A src/mainboard/google/kahlee/acpi/usb_oc.asl A src/mainboard/google/kahlee/acpi_tables.c A src/mainboard/google/kahlee/board_info.txt A src/mainboard/google/kahlee/bootblock/BiosCallOuts.c A src/mainboard/google/kahlee/bootblock/OemCustomize.c A src/mainboard/google/kahlee/cmos.layout A src/mainboard/google/kahlee/devicetree.cb A src/mainboard/google/kahlee/dsdt.asl A src/mainboard/google/kahlee/fchec.c A src/mainboard/google/kahlee/fchec.h A src/mainboard/google/kahlee/irq_tables.c A src/mainboard/google/kahlee/mainboard.c A src/mainboard/google/kahlee/mptable.c A src/mainboard/google/kahlee/romstage.c 25 files changed, 1,812 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/19830/2 -- To view, visit https://review.coreboot.org/19830 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ia68b16969518f4d63d5d2dea7658a472b2daca05 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/amd/stoneyridge: Enable verstage support
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19756 to look at the new patch set (#3). Change subject: soc/amd/stoneyridge: Enable verstage support ...................................................................... soc/amd/stoneyridge: Enable verstage support Add Kconfig selects for vboot and update the makefile to pick up files to be used in verstage. Change-Id: If5c439a330d687156006aec2ebaea18ff2c96b3e Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/Makefile.inc 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/19756/3 -- To view, visit https://review.coreboot.org/19756 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If5c439a330d687156006aec2ebaea18ff2c96b3e Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19755 to look at the new patch set (#3). Change subject: WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK ...................................................................... WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK Add dedicated CAR setup and teardown functions and, Kconfig options to force their inclusion into the build. The .S files are effectively duplicated code from the cache_as_ram.inc file. The .S files use global proc names in anticipation for use with the Kconfig symbols C_ENVIRONMENT_BOOTBLOCK and POSTCAR_STAGE. Move the mainboard romstage functionality into the soc directory and change the function name to be compatible with the call from assembly_entry.S. Move InitReset and InitEarly to bootblock. These AGESA entry points set some default settings, and release/recapture the AP cores. todo: * preserve BIST Change-Id: I811c7ef875b980874f3c4b1f234f969ae5618c44 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/cpu/x86/lapic/Makefile.inc M src/mainboard/amd/gardenia/BiosCallOuts.c M src/mainboard/amd/gardenia/Makefile.inc M src/mainboard/amd/gardenia/OemCustomize.c A src/mainboard/amd/gardenia/bootblock/BiosCallOuts.c A src/mainboard/amd/gardenia/bootblock/OemCustomize.c M src/mainboard/amd/gardenia/romstage.c M src/soc/amd/common/Makefile.inc A src/soc/amd/common/block/cpu/Kconfig A src/soc/amd/common/block/cpu/Makefile.inc A src/soc/amd/common/block/cpu/car/cache_as_ram.S A src/soc/amd/common/block/cpu/car/exit_car.S M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/amd/stoneyridge/bootblock/bootblock.c A src/soc/amd/stoneyridge/bootblock/fch.c M src/soc/amd/stoneyridge/early_setup.c M src/soc/amd/stoneyridge/include/soc/hudson.h M src/soc/amd/stoneyridge/include/soc/northbridge.h A src/soc/amd/stoneyridge/romstage.c M src/vendorcode/amd/pi/Makefile.inc 21 files changed, 954 insertions(+), 326 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/19755/3 -- To view, visit https://review.coreboot.org/19755 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I811c7ef875b980874f3c4b1f234f969ae5618c44 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/amd/stoneyridge: Enable early cbmem
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19751 to look at the new patch set (#3). Change subject: soc/amd/stoneyridge: Enable early cbmem ...................................................................... soc/amd/stoneyridge: Enable early cbmem Add a memmap file with a cbmem_top() function. Remove the LATE_CBMEM_INIT, allowing the default of EARLY. Remove calls to the late-only set_top_of_ram() function. Change-Id: I11ad7190031c912642a7312f2fc6f792866288b7 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc A src/soc/amd/stoneyridge/memmap.c A src/soc/amd/stoneyridge/memmap.h M src/soc/amd/stoneyridge/northbridge.c 5 files changed, 236 insertions(+), 149 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/19751/3 -- To view, visit https://review.coreboot.org/19751 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I11ad7190031c912642a7312f2fc6f792866288b7 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: amd/gardenia: Switch to soc/amd/stoneyridge
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19725 to look at the new patch set (#4). Change subject: amd/gardenia: Switch to soc/amd/stoneyridge ...................................................................... amd/gardenia: Switch to soc/amd/stoneyridge Switch Garnenia mainboard to single soc/ directory structure. Change-Id: I095804d603bcccf324d3244965081a9dccba62ae Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- M src/mainboard/amd/gardenia/BiosCallOuts.c D src/mainboard/amd/gardenia/BiosCallOuts.h M src/mainboard/amd/gardenia/Kconfig M src/mainboard/amd/gardenia/Makefile.inc M src/mainboard/amd/gardenia/OemCustomize.c M src/mainboard/amd/gardenia/acpi_tables.c M src/mainboard/amd/gardenia/devicetree.cb M src/mainboard/amd/gardenia/dsdt.asl M src/mainboard/amd/gardenia/fchec.h M src/mainboard/amd/gardenia/mainboard.c M src/mainboard/amd/gardenia/mptable.c M src/mainboard/amd/gardenia/romstage.c 12 files changed, 75 insertions(+), 134 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/19725/4 -- To view, visit https://review.coreboot.org/19725 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I095804d603bcccf324d3244965081a9dccba62ae Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/amd/stoneyridge: Add northbridge support
by Marshall Dawson (Code Review) 30 May '17

30 May '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19724 to look at the new patch set (#4). Change subject: soc/amd/stoneyridge: Add northbridge support ...................................................................... soc/amd/stoneyridge: Add northbridge support Copy northbridge files from northbridge/amd/pi/00670F00 to soc/amd/stoneyridge and soc/amd/common. Changes: - update chip_ops and device_ops - remove multi-node support - clean up Kconfig and Makefile Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- M src/northbridge/amd/pi/Kconfig A src/soc/amd/common/BiosCallOuts.h M src/soc/amd/common/Makefile.inc A src/soc/amd/common/agesawrapper.c A src/soc/amd/common/agesawrapper.h A src/soc/amd/common/agesawrapper_call.h M src/soc/amd/common/amd_late_init.c A src/soc/amd/common/def_callouts.c A src/soc/amd/common/dimmSpd.h M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc A src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/amd/stoneyridge/chip.c M src/soc/amd/stoneyridge/chip.h A src/soc/amd/stoneyridge/dimmSpd.c M src/soc/amd/stoneyridge/fixme.c M src/soc/amd/stoneyridge/include/soc/gpio.h A src/soc/amd/stoneyridge/include/soc/northbridge.h A src/soc/amd/stoneyridge/northbridge.c M src/soc/amd/stoneyridge/smbus_spd.c M src/vendorcode/amd/pi/Makefile.inc 21 files changed, 1,814 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/19724/4 -- To view, visit https://review.coreboot.org/19724 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993 Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit May 2017