coreboot-gerrit October 2017

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Change in coreboot[master]: soc/amd/stoneyridge: Pass firmware dir location to amdfwtool
by build bot (Jenkins) (Code Review) 04 Oct '17

04 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21866 ) Change subject: soc/amd/stoneyridge: Pass firmware dir location to amdfwtool ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/61529/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/16646/ : SUCCESS -- To view, visit https://review.coreboot.org/21866 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ifa2e99ea031fc0d9f165ae44ff6b1afef369eb28 Gerrit-Change-Number: 21866 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Oct 2017 22:06:32 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: util/amdfwtool: Add option for directory location
by build bot (Jenkins) (Code Review) 04 Oct '17

04 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21865 ) Change subject: util/amdfwtool: Add option for directory location ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61528/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16644/ : SUCCESS -- To view, visit https://review.coreboot.org/21865 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ief32e5e37d56088946b623d305c6e93bfd6abeaf Gerrit-Change-Number: 21865 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Oct 2017 22:00:41 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Stoney: Don't force the AMD firmware outside cbfs
by Martin Roth (Code Review) 03 Oct '17

03 Oct '17

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21867 Change subject: Stoney: Don't force the AMD firmware outside cbfs ...................................................................... Stoney: Don't force the AMD firmware outside cbfs We want to be able to have the AMD firmware inside CBFS. BUG=b:65484600 TEST=Assign PSP firmware location, build & test. Firmware shows up inside CBFS. Change-Id: Ia8258b5c2ecfaaa42d623e3376ec3233115aed58 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/soc/amd/stoneyridge/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/21867/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 4bf1e57..d05d83a 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -60,7 +60,6 @@ select SSE2 config VBOOT - select AMDFW_OUTSIDE_CBFS select VBOOT_SEPARATE_VERSTAGE select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT -- To view, visit https://review.coreboot.org/21867 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia8258b5c2ecfaaa42d623e3376ec3233115aed58 Gerrit-Change-Number: 21867 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: soc/amd/stoneyridge: Pass firmware dir location to amdfwtool
by Martin Roth (Code Review) 03 Oct '17

03 Oct '17

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21866 Change subject: soc/amd/stoneyridge: Pass firmware dir location to amdfwtool ...................................................................... soc/amd/stoneyridge: Pass firmware dir location to amdfwtool The amdfwtool now outputs firmware that is correctly built for the new location. BUG=b:65484600 TEST=Assign PSP firmware location, build & test. Change-Id: Ifa2e99ea031fc0d9f165ae44ff6b1afef369eb28 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/soc/amd/stoneyridge/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/21866/1 diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 763f4df..2b4d1ed 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -241,6 +241,7 @@ $(OPT_2SMUFIRMWARE2_FN_FILE) \ $(OPT_2SMUSCS_FILE) \ --flashsize $(CONFIG_ROM_SIZE) \ + --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \ --output $@ ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) -- To view, visit https://review.coreboot.org/21866 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ifa2e99ea031fc0d9f165ae44ff6b1afef369eb28 Gerrit-Change-Number: 21866 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: util/amdfwtool: Add option for directory location
by Martin Roth (Code Review) 03 Oct '17

03 Oct '17

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21865 Change subject: util/amdfwtool: Add option for directory location ...................................................................... util/amdfwtool: Add option for directory location The AMD firmware directory can go in a number of different locations. This patch allows amdfwtool to write the directory correctly for those different locations. If the --location switch is not added to the command line, the default location at ROM base address + 0x20000 is used as before. BUG=b:65484600 TEST=Set PSP firmware location, compare amdfw.rom to previously built version. Verify new location pointers. Change-Id: Ief32e5e37d56088946b623d305c6e93bfd6abeaf Signed-off-by: Martin Roth <martinroth(a)google.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 45 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/21865/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 0c1bde5..1ecb80d 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -190,6 +190,7 @@ printf(" size must be larger than %dKB\n", MIN_ROM_KB); printf(" and must a multiple of 1024\n"); + printf("-l | --location Location of Directory\n"); printf("-h | --help show this help\n"); } @@ -377,9 +378,9 @@ #if PSP2 static const char *optstring = - "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:P:B:S:L:R:K:C:N:D:T:U:W:E:M:o:f:h"; + "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:P:B:S:L:R:K:C:N:D:T:U:W:E:M:o:f:l:h"; #else -static const char *optstring = "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:o:f:h"; +static const char *optstring = "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:o:f:l:h"; #endif static struct option long_options[] = { @@ -420,6 +421,7 @@ {"output", required_argument, 0, 'o' }, {"flashsize", required_argument, 0, 'f' }, + {"location", required_argument, 0, 'l' }, {"help", no_argument, 0, 'h' }, {NULL, 0, 0, 0 } @@ -479,6 +481,8 @@ int targetfd; char *output = NULL; uint32_t rom_size = CONFIG_ROM_SIZE; + uint32_t dir_location = 0; + uint32_t romsig_offset; uint32_t rom_base_address; while (1) { @@ -624,6 +628,15 @@ retval = 1; } break; + case 'l': + dir_location = (uint32_t)strtoul(optarg, &tmp, 16); + if (*tmp != '\0') { + printf("Error: Directory Location specified" + " incorrectly (%s)\n\n", optarg); + retval = 1; + } + break; + case 'h': usage(); return 0; @@ -662,13 +675,40 @@ printf(" AMDFWTOOL Using ROM size of %dKB\n", rom_size / 1024); rom_base_address = 0xFFFFFFFF - rom_size + 1; + if ((dir_location) && (dir_location < rom_base_address)) { + printf("Error: Directory location outside of ROM.\n\n"); + return 1; + } + + switch (dir_location) { + case 0: /* Fall through */ + case 0xFFFA0000: /* Fall through */ + case 0xFFF20000: /* Fall through */ + case 0xFFE20000: /* Fall through */ + case 0xFFC20000: /* Fall through */ + case 0xFF820000: /* Fall through */ + case 0xFF020000: /* Fall through */ + break; + default: + printf("Error: Invalid Directory location.\n"); + printf(" Valid locations are 0xFFFA0000, 0xFFF20000,\n"); + printf(" 0xFFE20000, 0xFFC20000, 0xFF820000, 0xFF020000\n"); + return 1; + } + rom = malloc(rom_size); if (!rom) return 1; memset(rom, 0xFF, rom_size); - current = AMD_ROMSIG_OFFSET; - amd_romsig = (void *)(rom + AMD_ROMSIG_OFFSET); + if (dir_location) + romsig_offset = current = dir_location - rom_base_address; + else + romsig_offset = current = AMD_ROMSIG_OFFSET; + printf(" AMDFWTOOL Using firmware directory location of %08lx\n", + (unsigned long)rom_base_address + current); + + amd_romsig = (void *)(rom + romsig_offset); amd_romsig[0] = 0x55AA55AA; /* romsig */ amd_romsig[1] = 0; amd_romsig[2] = 0; @@ -731,7 +771,7 @@ targetfd = open(output, O_RDWR | O_CREAT | O_TRUNC, 0666); if (targetfd >= 0) { - write(targetfd, amd_romsig, current - AMD_ROMSIG_OFFSET); + write(targetfd, amd_romsig, current - romsig_offset); close(targetfd); } else { printf("Error: could not open file: %s\n", output); -- To view, visit https://review.coreboot.org/21865 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ief32e5e37d56088946b623d305c6e93bfd6abeaf Gerrit-Change-Number: 21865 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: soc/intel/cannonlake: Add all the SOC level DSDT tables
by build bot (Jenkins) (Code Review) 03 Oct '17

03 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21860 ) Change subject: soc/intel/cannonlake: Add all the SOC level DSDT tables ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61527/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16643/ : SUCCESS -- To view, visit https://review.coreboot.org/21860 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia72bbe87b32d37db01f8768bd8447cb6ee1567a9 Gerrit-Change-Number: 21860 Gerrit-PatchSet: 6 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Oct 2017 21:52:08 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Update Flex Ratio from MSR
by build bot (Jenkins) (Code Review) 03 Oct '17

03 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21864 ) Change subject: soc/intel/cannonlake: Update Flex Ratio from MSR ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61526/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16642/ : SUCCESS -- To view, visit https://review.coreboot.org/21864 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iadd4068bd7076b2f097ffe2e2ed87520b9c4c809 Gerrit-Change-Number: 21864 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Andrex Andraos <andrex.andraos(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Oct 2017 21:38:09 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Update Flex Ratio from MSR
by Lijian Zhao (Code Review) 03 Oct '17

03 Oct '17

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21864 Change subject: soc/intel/cannonlake: Update Flex Ratio from MSR ...................................................................... soc/intel/cannonlake: Update Flex Ratio from MSR Read back from MSR to apply Flex Ratio into FSP. TEST=Apply the patch and test to be able to boot up into OS. Change-Id: Iadd4068bd7076b2f097ffe2e2ed87520b9c4c809 Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/soc/intel/cannonlake/romstage/romstage.c 1 file changed, 14 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/21864/1 diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 1775cae..466885a 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -18,11 +18,13 @@ #include <assert.h> #include <chip.h> #include <cpu/x86/mtrr.h> +#include <cpu/x86/msr.h> #include <cbmem.h> #include <console/console.h> #include <fsp/util.h> #include <intelblocks/pmclib.h> #include <memory_info.h> +#include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/romstage.h> @@ -66,6 +68,16 @@ run_postcar_phase(&pcf); } +static void cpu_flex_override(FSP_M_CONFIG *m_cfg) +{ + msr_t flex_ratio; + /* + * Set cpuratio to that value to intended flex ratio. + */ + flex_ratio = rdmsr(MSR_FLEX_RATIO); + m_cfg->CpuRatio = (flex_ratio.lo >> 8) & 0xff; +} + static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config) { unsigned int i; @@ -86,8 +98,8 @@ m_cfg->PcieRpEnableMask = mask; m_cfg->PrmrrSize = config->PrmrrSize; m_cfg->EnableC6Dram = config->enable_c6dram; - /* Disable Cpu Ratio Override temporary. */ - m_cfg->CpuRatio = 0; + + cpu_flex_override(m_cfg); } void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) -- To view, visit https://review.coreboot.org/21864 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Iadd4068bd7076b2f097ffe2e2ed87520b9c4c809 Gerrit-Change-Number: 21864 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com>

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Change in coreboot[master]: google/cyan: fix variant memory/silicon init params override
by build bot (Jenkins) (Code Review) 03 Oct '17

03 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21704 ) Change subject: google/cyan: fix variant memory/silicon init params override ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61525/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16641/ : SUCCESS -- To view, visit https://review.coreboot.org/21704 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1c76cb5838ef1e65e72c7341d951f9baf2ddd41b Gerrit-Change-Number: 21704 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Oct 2017 20:59:46 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: change gpio device name
by build bot (Jenkins) (Code Review) 03 Oct '17

03 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21758 ) Change subject: soc/intel/cannonlake: change gpio device name ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61524/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16640/ : SUCCESS -- To view, visit https://review.coreboot.org/21758 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iace5dc748435b48b50faae6f60a10f1f7ae058ff Gerrit-Change-Number: 21758 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 03 Oct 2017 20:34:19 +0000 Gerrit-HasComments: No

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coreboot-gerrit October 2017