coreboot-gerrit July 2016

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Patch set updated for coreboot: bootmode: Get rid of CONFIG_BOOTMODE_STRAPS
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15868 -gerrit commit 2e72f2bff8aabc6c0d3de30f0015356573a9649b Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Jul 25 13:02:36 2016 -0700 bootmode: Get rid of CONFIG_BOOTMODE_STRAPS With VBOOT_VERIFY_FIRMWARE separated from CHROMEOS, move recovery and developer mode check functions to vboot. Thus, get rid of the BOOTMODE_STRAPS option which controlled these functions under src/lib. BUG=chrome-os-partner:55639 Change-Id: Ia2571026ce8976856add01095cc6be415d2be22e Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile.inc | 2 +- src/Kconfig | 4 - src/device/pci_device.c | 3 +- src/drivers/intel/fsp1_1/raminit.c | 4 +- src/drivers/intel/fsp1_1/romstage.c | 2 +- src/drivers/intel/fsp2_0/memory_init.c | 6 +- src/ec/google/chromeec/ec.c | 33 ++--- src/ec/google/chromeec/ec.h | 1 - src/include/bootmode.h | 9 -- src/lib/bootmode.c | 18 --- src/mainboard/google/cyan/chromeos.c | 2 +- src/mainboard/google/rambi/chromeos.c | 5 +- src/mainboard/google/stout/ec.c | 3 +- src/mainboard/google/stout/romstage.c | 3 +- src/mainboard/google/veyron_rialto/mainboard.c | 3 +- src/mainboard/intel/strago/chromeos.c | 2 +- src/northbridge/intel/haswell/gma.c | 2 +- src/northbridge/intel/haswell/raminit.c | 4 +- src/northbridge/intel/sandybridge/raminit_mrc.c | 2 +- src/soc/intel/baytrail/romstage/raminit.c | 4 +- src/soc/intel/broadwell/igd.c | 3 +- src/soc/intel/broadwell/romstage/raminit.c | 2 +- src/soc/intel/common/mrc_cache.c | 2 + src/soc/intel/skylake/igd.c | 3 +- src/soc/intel/skylake/romstage/romstage.c | 2 +- src/southbridge/intel/bd82x6x/me_8.x.c | 2 +- src/southbridge/intel/fsp_bd82x6x/me_8.x.c | 2 +- src/vboot/Makefile.inc | 16 ++- src/vboot/bootmode.c | 177 ++++++++++++++++++++++++ src/vboot/recovery.c | 152 -------------------- src/vboot/vboot_common.h | 4 + src/vendorcode/google/chromeos/Kconfig | 1 - src/vendorcode/google/chromeos/elog.c | 4 +- src/vendorcode/google/chromeos/gnvs.c | 6 +- 34 files changed, 239 insertions(+), 249 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 0ac4219..1c15ae0 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -82,7 +82,7 @@ subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom subdirs-y += util/futility util/marvell subdirs-y += $(wildcard src/arch/*) subdirs-y += src/mainboard/$(MAINBOARDDIR) -subdirs-$(CONFIG_VBOOT) += src/vboot +subdirs-y += src/vboot subdirs-y += payloads payloads/external subdirs-y += site-local diff --git a/src/Kconfig b/src/Kconfig index 1694805..6911f93 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -513,10 +513,6 @@ config MMCONF_SUPPORT bool default n -config BOOTMODE_STRAPS - bool - default n - source "src/console/Kconfig" config HAVE_ACPI_RESUME diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 73558db..05d4051 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -669,8 +669,7 @@ static int should_run_oprom(struct device *dev) /* Don't run VGA option ROMs, unless we have to print * something on the screen before the kernel is loaded. */ - should_run = !IS_ENABLED(CONFIG_BOOTMODE_STRAPS) || - developer_mode_enabled() || recovery_mode_enabled(); + should_run = display_init_required(); #if CONFIG_CHROMEOS if (!should_run) diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index 3eee2da..eca8934 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -24,7 +24,7 @@ #include <soc/intel/common/mma.h> #include <string.h> #include <timestamp.h> -#include <bootmode.h> +#include <vboot/vboot_common.h> void raminit(struct romstage_params *params) { @@ -288,7 +288,7 @@ void raminit(struct romstage_params *params) if (mrc_hob == NULL) printk(BIOS_DEBUG, "Memory Configuration Data Hob not present\n"); - else if (!recovery_mode_enabled()) { + else if (!vboot_recovery_mode_enabled()) { /* Do not save MRC data in recovery path */ pei_ptr->data_to_save = GET_GUID_HOB_DATA(mrc_hob); pei_ptr->data_to_save_size = ALIGN( diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index c1b1ca5..b5d90c3 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -122,7 +122,7 @@ void romstage_common(struct romstage_params *params) params->pei_data->saved_data_size = 0; params->pei_data->saved_data = NULL; if (!params->pei_data->disable_saved_data) { - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { /* Recovery mode does not use MRC cache */ printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 004d7a8..de99d83 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -14,7 +14,6 @@ #include <arch/io.h> #include <arch/cpu.h> #include <arch/symbols.h> -#include <bootmode.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -28,6 +27,7 @@ #include <string.h> #include <symbols.h> #include <timestamp.h> +#include <vboot/vboot_common.h> typedef asmlinkage enum fsp_status (*fsp_memory_init_fn) (void *raminit_upd, void **hob_list); @@ -93,7 +93,7 @@ static enum fsp_status do_fsp_post_memory_init(void *hob_list_ptr, bool s3wake, /* Now that CBMEM is up, save the list so ramstage can use it */ fsp_save_hob_list(hob_list_ptr); - if (recovery_mode_enabled()) + if (vboot_recovery_mode_enabled()) fsp_version = MRC_DEAD_VERSION; save_memory_training_data(s3wake, fsp_version); @@ -119,7 +119,7 @@ static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake, return; /* Don't use saved training data when recovery mode is enabled. */ - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { printk(BIOS_DEBUG, "Recovery mode. Not using MRC cache.\n"); return; } diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 1a381d7..c8b6e7e 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <console/console.h> -#include <bootmode.h> #include <arch/io.h> #include <delay.h> #include <halt.h> @@ -24,6 +23,7 @@ #include <elog.h> #include <rtc.h> #include <stdlib.h> +#include <vboot/vboot_common.h> #include "chip.h" #include "ec.h" @@ -198,18 +198,18 @@ void google_chromeec_check_ec_image(int expected_type) } } -/* Check for recovery mode and ensure EC is in RO */ +/* Check for recovery mode and ensure PD/EC is in RO */ void google_chromeec_early_init(void) { - if (IS_ENABLED(CONFIG_CHROMEOS)) { - /* Check USB PD chip state first */ - if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_PD)) - google_chromeec_early_pd_init(); - - /* If in recovery ensure EC is running RO firmware. */ - if (recovery_mode_enabled()) - google_chromeec_check_ec_image(EC_IMAGE_RO); - } + if (!IS_ENABLED(CONFIG_CHROMEOS) || !vboot_recovery_mode_enabled()) + return; + + /* Check USB PD chip state first */ + if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_PD)) + google_chromeec_check_pd_image(EC_IMAGE_RO); + + /* If in recovery ensure EC is running RO firmware. */ + google_chromeec_check_ec_image(EC_IMAGE_RO); } void google_chromeec_check_pd_image(int expected_type) @@ -241,15 +241,6 @@ void google_chromeec_check_pd_image(int expected_type) udelay(1000); } } - -/* Check for recovery mode and ensure PD is in RO */ -void google_chromeec_early_pd_init(void) -{ - /* If in recovery ensure PD is running RO firmware. */ - if (recovery_mode_enabled()) { - google_chromeec_check_pd_image(EC_IMAGE_RO); - } -} #endif u16 google_chromeec_get_board_version(void) @@ -521,7 +512,7 @@ void google_chromeec_init(void) } if (cec_cmd.cmd_code || - (recovery_mode_enabled() && + (vboot_recovery_mode_enabled() && (cec_resp.current_image != EC_IMAGE_RO))) { struct ec_params_reboot_ec reboot_ec; /* Reboot the EC and make it come back in RO mode */ diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index d3e6d78..f765fe4 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -36,7 +36,6 @@ void google_chromeec_init(void); /* If recovery mode is enabled and EC is not running RO firmware reboot. */ void google_chromeec_early_init(void); -void google_chromeec_early_pd_init(void); /* Reboot if EC firmware is not expected type. */ void google_chromeec_check_ec_image(int expected_type); void google_chromeec_check_pd_image(int expected_type); diff --git a/src/include/bootmode.h b/src/include/bootmode.h index 9feb5af..21aa386 100644 --- a/src/include/bootmode.h +++ b/src/include/bootmode.h @@ -26,18 +26,9 @@ int clear_recovery_mode_switch(void); int get_wipeout_mode_switch(void); int get_lid_switch(void); - /* Return 1 if display initialization is required. 0 if not. */ int display_init_required(void); int gfx_get_init_done(void); void gfx_set_init_done(int done); -#if CONFIG_BOOTMODE_STRAPS -int developer_mode_enabled(void); -int recovery_mode_enabled(void); -#else -static inline int recovery_mode_enabled(void) { return 0; } -static inline int developer_mode_enabled(void) { return 0; } -#endif - #endif /* __BOOTMODE_H__ */ diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c index 824edfb..dcee2d1 100644 --- a/src/lib/bootmode.c +++ b/src/lib/bootmode.c @@ -17,24 +17,6 @@ #include <bootmode.h> #include <vendorcode/google/chromeos/chromeos.h> -#if CONFIG_BOOTMODE_STRAPS -int developer_mode_enabled(void) -{ - if (get_developer_mode_switch()) - return 1; -#if CONFIG_VBOOT - if (vboot_handoff_check_developer_flag()) - return 1; -#endif - return 0; -} - -int recovery_mode_enabled(void) -{ - return !!vboot_check_recovery_request(); -} -#endif /* CONFIG_BOOTMODE_STRAPS */ - #if ENV_RAMSTAGE static int gfx_init_done = -1; diff --git a/src/mainboard/google/cyan/chromeos.c b/src/mainboard/google/cyan/chromeos.c index a038d1f..757db5f 100644 --- a/src/mainboard/google/cyan/chromeos.c +++ b/src/mainboard/google/cyan/chromeos.c @@ -40,7 +40,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, recovery_mode_enabled(), "recovery"}, + {-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"}, {-1, ACTIVE_HIGH, get_developer_mode_switch(), "developer"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/rambi/chromeos.c b/src/mainboard/google/rambi/chromeos.c index f2a2ab7..1006484 100644 --- a/src/mainboard/google/rambi/chromeos.c +++ b/src/mainboard/google/rambi/chromeos.c @@ -14,11 +14,12 @@ */ #include <string.h> -#include <bootmode.h> #include <arch/io.h> +#include <bootmode.h> #include <device/device.h> #include <device/pci.h> #include <soc/gpio.h> +#include <vboot/vboot_common.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include "ec.h" @@ -35,7 +36,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, recovery_mode_enabled(), "recovery"}, + {-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"}, {-1, ACTIVE_HIGH, get_developer_mode_switch(), "developer"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c index 019f046..004c492 100644 --- a/src/mainboard/google/stout/ec.c +++ b/src/mainboard/google/stout/ec.c @@ -39,8 +39,7 @@ void stout_ec_init(void) /* * Important: get_recovery_mode_switch() must be called in EC init. */ - if (IS_ENABLED(CONFIG_BOOTMODE_STRAPS)) - get_recovery_mode_switch(); + get_recovery_mode_switch(); /* Unmute */ ec_kbc_write_cmd(EC_KBD_CMD_UNMUTE); diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 8348e4f..7264323 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -119,8 +119,7 @@ void rcba_config(void) static void early_ec_init(void) { u8 ec_status = ec_read(EC_STATUS_REG); - int rec_mode = IS_ENABLED(CONFIG_BOOTMODE_STRAPS) && - get_recovery_mode_switch(); + int rec_mode = get_recovery_mode_switch(); if (((ec_status & 0x3) == EC_IN_RO_MODE) || ((ec_status & 0x3) == EC_IN_RECOVERY_MODE)) { diff --git a/src/mainboard/google/veyron_rialto/mainboard.c b/src/mainboard/google/veyron_rialto/mainboard.c index ebcaa2a..b4f7685 100644 --- a/src/mainboard/google/veyron_rialto/mainboard.c +++ b/src/mainboard/google/veyron_rialto/mainboard.c @@ -34,6 +34,7 @@ #include <symbols.h> #include <vbe.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <vboot/vboot_common.h> #include "board.h" @@ -90,7 +91,7 @@ static void mainboard_init(device_t dev) /* If recovery mode is detected, reduce frequency and voltage to reduce * heat in case machine is left unattended. chrome-os-partner:41201. */ - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { printk(BIOS_DEBUG, "Reducing APLL freq for recovery mode.\n"); rkclk_configure_cpu(APLL_600_MHZ); rk808_configure_buck(1, 900); diff --git a/src/mainboard/intel/strago/chromeos.c b/src/mainboard/intel/strago/chromeos.c index 2cc092d..0e072f0 100644 --- a/src/mainboard/intel/strago/chromeos.c +++ b/src/mainboard/intel/strago/chromeos.c @@ -39,7 +39,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {-1, ACTIVE_HIGH, recovery_mode_enabled(), "recovery"}, + {-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"}, {-1, ACTIVE_HIGH, get_developer_mode_switch(), "developer"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 4449ffc..20779e7 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -457,7 +457,7 @@ static void gma_func0_init(struct device *dev) dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay; #if IS_ENABLED(CONFIG_CHROMEOS) - init_fb = developer_mode_enabled() || recovery_mode_enabled(); + init_fb = display_init_required(); #endif lightup_ok = panel_lightup(&dp, init_fb); gfx_set_init_done(1); diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 464f7c8..469c4f2 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -14,7 +14,6 @@ */ #include <console/console.h> -#include <bootmode.h> #include <string.h> #include <arch/io.h> #include <cbmem.h> @@ -25,6 +24,7 @@ #include <northbridge/intel/common/mrc_cache.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> +#include <vboot/vboot_common.h> #include "raminit.h" #include "pei_data.h" #include "haswell.h" @@ -121,7 +121,7 @@ void sdram_initialize(struct pei_data *pei_data) * Do not pass MRC data in for recovery mode boot, * Always pass it in for S3 resume. */ - if (!recovery_mode_enabled() || pei_data->boot_mode == 2) + if (!vboot_recovery_mode_enabled() || pei_data->boot_mode == 2) prepare_mrc_cache(pei_data); /* If MRC data is not found we cannot continue S3 resume. */ diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 8754e42..9d131e6 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -200,7 +200,7 @@ void sdram_initialize(struct pei_data *pei_data) * Do not pass MRC data in for recovery mode boot, * Always pass it in for S3 resume. */ - if (!recovery_mode_enabled() || pei_data->boot_mode == 2) + if (!vboot_recovery_mode_enabled() || pei_data->boot_mode == 2) prepare_mrc_cache(pei_data); /* If MRC data is not found we cannot continue S3 resume. */ diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index d45b9ea..a79fe95 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -16,7 +16,6 @@ #include <stddef.h> #include <arch/acpi.h> #include <arch/io.h> -#include <bootmode.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -31,6 +30,7 @@ #include <soc/romstage.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> +#include <vboot/vboot_common.h> static void reset_system(void) { @@ -123,7 +123,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) if (!mp->io_hole_mb) mp->io_hole_mb = 2048; - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); } else if (!mrc_cache_get_current(&cache)) { mp->saved_data_size = cache->size; diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index d25ddcc..ccb1e93 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -487,8 +487,7 @@ static void igd_init(struct device *dev) /* Wait for any configured pre-graphics delay */ if (!acpi_is_wakeup_s3()) { #if IS_ENABLED(CONFIG_CHROMEOS) - if (developer_mode_enabled() || recovery_mode_enabled() || - vboot_wants_oprom()) + if (display_init_required() || vboot_wants_oprom()) mdelay(CONFIG_PRE_GRAPHICS_DELAY); #else mdelay(CONFIG_PRE_GRAPHICS_DELAY); diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index 488b231..61b1bc9 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -48,7 +48,7 @@ void raminit(struct pei_data *pei_data) broadwell_fill_pei_data(pei_data); - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { /* Recovery mode does not use MRC cache */ printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); } else if (!mrc_cache_get_current(&cache)) { diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c index cf819cf..c123da9 100644 --- a/src/soc/intel/common/mrc_cache.c +++ b/src/soc/intel/common/mrc_cache.c @@ -19,6 +19,8 @@ #include <cbmem.h> #include <fmap.h> #include <ip_checksum.h> +#include <vboot/vboot_common.h> + #include "mrc_cache.h" #include "nvm.h" diff --git a/src/soc/intel/skylake/igd.c b/src/soc/intel/skylake/igd.c index 209d22c..3e29ab0 100644 --- a/src/soc/intel/skylake/igd.c +++ b/src/soc/intel/skylake/igd.c @@ -91,8 +91,7 @@ static void igd_init(struct device *dev) /* Wait for any configured pre-graphics delay */ if (!acpi_is_wakeup_s3()) { #if IS_ENABLED(CONFIG_CHROMEOS) - if (developer_mode_enabled() || recovery_mode_enabled() || - vboot_wants_oprom()) + if (display_init_required() || vboot_wants_oprom()) mdelay(CONFIG_PRE_GRAPHICS_DELAY); #else mdelay(CONFIG_PRE_GRAPHICS_DELAY); diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 8375ccd..b16e5aa 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -100,7 +100,7 @@ void soc_memory_init_params(struct romstage_params *params, upd->IedSize = CONFIG_IED_REGION_SIZE; upd->ProbelessTrace = config->ProbelessTrace; upd->EnableTraceHub = config->EnableTraceHub; - if (recovery_mode_enabled()) + if (vboot_recovery_mode_enabled()) upd->SaGv = 0; /* Disable SaGv in recovery mode. */ else upd->SaGv = config->SaGv; diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 410e6b8..4dbe8ed 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -710,7 +710,7 @@ static void intel_me_init(device_t dev) /* * Unlock ME in recovery mode. */ - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { /* Unlock ME flash region */ mkhi_hmrfpo_enable(); diff --git a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c index 522858b..e29d86b 100644 --- a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c +++ b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c @@ -709,7 +709,7 @@ static void intel_me_init(device_t dev) /* * Unlock ME in recovery mode. */ - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { /* Unlock ME flash region */ mkhi_hmrfpo_enable(); diff --git a/src/vboot/Makefile.inc b/src/vboot/Makefile.inc index d4f4f85..894e68e 100644 --- a/src/vboot/Makefile.inc +++ b/src/vboot/Makefile.inc @@ -13,6 +13,14 @@ ## GNU General Public License for more details. ## +bootblock-y += bootmode.c +romstage-y += bootmode.c +ramstage-y += bootmode.c +verstage-y += bootmode.c +postcar-y += bootmode.c + +ifeq ($(CONFIG_VBOOT),y) + libverstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__ verstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__ @@ -53,12 +61,6 @@ romstage-y += vboot_common.c ramstage-y += vboot_common.c postcar-y += vboot_common.c -bootblock-y += recovery.c -romstage-y += recovery.c -ramstage-y += recovery.c -verstage-y += recovery.c -postcar-y += recovery.c - bootblock-y += common.c libverstage-y += vboot_logic.c verstage-y += common.c @@ -141,3 +143,5 @@ regions-for-file = $(subst $(spc),$(comma),$(sort \ font.bin \ vbgfx.bin \ ,$(1)),COREBOOT,COREBOOT FW_MAIN_A FW_MAIN_B))) + +endif # CONFIG_VBOOT diff --git a/src/vboot/bootmode.c b/src/vboot/bootmode.c new file mode 100644 index 0000000..12a4dc0 --- /dev/null +++ b/src/vboot/bootmode.c @@ -0,0 +1,177 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <assert.h> +#include <bootmode.h> +#include <bootstate.h> +#include <rules.h> +#include <string.h> +#include <vb2_api.h> +#include <vboot/misc.h> +#include <vboot/vbnv.h> +#include <vboot/vboot_common.h> + +static int vb2_get_recovery_reason_shared_data(void) +{ + /* Shared data does not exist for Ramstage and Post-CAR stage. */ + if (ENV_RAMSTAGE || ENV_POSTCAR) + return 0; + + struct vb2_shared_data *sd = vb2_get_shared_data(); + assert(sd); + return sd->recovery_reason; +} + +void vb2_save_recovery_reason_vbnv(void) +{ + if (!IS_ENABLED(CONFIG_VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT)) + return; + + int reason = vb2_get_recovery_reason_shared_data(); + if (!reason) + return; + + set_recovery_mode_into_vbnv(reason); +} + +static void vb2_clear_recovery_reason_vbnv(void *unused) +{ + if (!IS_ENABLED(CONFIG_VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT)) + return; + + set_recovery_mode_into_vbnv(0); +} + +/* + * Recovery reason stored in VBNV needs to be cleared before the state of VBNV + * is backed-up anywhere or jumping to the payload (whichever occurs + * first). Currently, vbnv_cmos.c backs up VBNV on POST_DEVICE. Thus, we need to + * make sure that the stored recovery reason is cleared off before that + * happens. + * IMPORTANT: Any reboot occurring after BS_DEV_INIT state will cause loss of + * recovery reason on reboot. Until now, we have seen reboots occuring on x86 + * only in FSP stages which run before BS_DEV_INIT. + */ +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, + vb2_clear_recovery_reason_vbnv, NULL); + +/* + * Returns 0 for the stages where we know that cbmem does not come online. + * Even if this function returns 1 for romstage, depending upon the point in + * bootup, cbmem might not actually be online. + */ +static int cbmem_possibly_online(void) +{ + if (ENV_BOOTBLOCK) + return 0; + + if (ENV_VERSTAGE && IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) + return 0; + + return 1; +} + +/* + * Returns 1 if vboot is being used and currently in a stage which might have + * already executed vboot verification. + */ +static int vboot_possibly_executed(void) +{ + if (!IS_ENABLED(CONFIG_VBOOT)) + return 0; + + if (IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) { + if (ENV_BOOTBLOCK && IS_ENABLED(CONFIG_SEPARATE_VERSTAGE)) + return 0; + return 1; + } + + if (IS_ENABLED(CONFIG_VBOOT_STARTS_IN_ROMSTAGE)) { + if (ENV_BOOTBLOCK) + return 0; + return 1; + } + + return 0; +} + +/* + * vb2_check_recovery_request looks up different components to identify if there + * is a recovery request and returns appropriate reason code: + * 1. Checks if recovery mode is initiated by EC. If yes, returns + * VB2_RECOVERY_RO_MANUAL. + * 2. Checks if recovery request is present in VBNV and returns the code read + * from it. + * 3. Checks recovery request in handoff for stages post-cbmem. + * 4. For non-CBMEM stages, check if vboot verification is done and look-up + * selected region to identify if vboot_refence library has requested recovery + * path. If yes, return the reason code from shared data. + * 5. If nothing applies, return 0 indicating no recovery request. + */ +int vboot_check_recovery_request(void) +{ + int reason = 0; + + /* EC-initiated recovery. */ + if (get_recovery_mode_switch()) + return VB2_RECOVERY_RO_MANUAL; + + /* Recovery request in VBNV. */ + if ((reason = get_recovery_mode_from_vbnv()) != 0) + return reason; + + /* + * Check recovery flag in vboot_handoff for stages post CBMEM coming + * online. Since for some stages there is no way to know if cbmem has + * already come online, try looking up handoff anyways. If it fails, + * flow will fallback to looking up shared data. + */ + if (cbmem_possibly_online() && + ((reason = vboot_handoff_get_recovery_reason()) != 0)) + return reason; + + /* + * For stages where CBMEM might not be online, identify if vboot + * verification is already complete and no slot was selected + * i.e. recovery path was requested. + */ + if (vboot_possibly_executed() && vb2_logic_executed() && + !vb2_is_slot_selected()) + return vb2_get_recovery_reason_shared_data(); + + return 0; +} + +int vboot_recovery_mode_enabled(void) +{ + if (!IS_ENABLED(CONFIG_VBOOT)) + return 0; + + return !!vboot_check_recovery_request(); +} + +int vboot_developer_mode_enabled(void) +{ + if (!IS_ENABLED(CONFIG_VBOOT)) + return 0; + + if (get_developer_mode_switch()) + return 1; + + if (cbmem_possibly_online() && vboot_handoff_check_developer_flag()) + return 1; + + return 0; +} diff --git a/src/vboot/recovery.c b/src/vboot/recovery.c deleted file mode 100644 index 6e6eb0e..0000000 --- a/src/vboot/recovery.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <assert.h> -#include <bootmode.h> -#include <bootstate.h> -#include <rules.h> -#include <string.h> -#include <vb2_api.h> -#include <vboot/misc.h> -#include <vboot/vbnv.h> -#include <vboot/vboot_common.h> - -static int vb2_get_recovery_reason_shared_data(void) -{ - /* Shared data does not exist for Ramstage and Post-CAR stage. */ - if (ENV_RAMSTAGE || ENV_POSTCAR) - return 0; - - struct vb2_shared_data *sd = vb2_get_shared_data(); - assert(sd); - return sd->recovery_reason; -} - -void vb2_save_recovery_reason_vbnv(void) -{ - if (!IS_ENABLED(CONFIG_VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT)) - return; - - int reason = vb2_get_recovery_reason_shared_data(); - if (!reason) - return; - - set_recovery_mode_into_vbnv(reason); -} - -static void vb2_clear_recovery_reason_vbnv(void *unused) -{ - if (!IS_ENABLED(CONFIG_VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT)) - return; - - set_recovery_mode_into_vbnv(0); -} - -/* - * Recovery reason stored in VBNV needs to be cleared before the state of VBNV - * is backed-up anywhere or jumping to the payload (whichever occurs - * first). Currently, vbnv_cmos.c backs up VBNV on POST_DEVICE. Thus, we need to - * make sure that the stored recovery reason is cleared off before that - * happens. - * IMPORTANT: Any reboot occurring after BS_DEV_INIT state will cause loss of - * recovery reason on reboot. Until now, we have seen reboots occuring on x86 - * only in FSP stages which run before BS_DEV_INIT. - */ -BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, - vb2_clear_recovery_reason_vbnv, NULL); - -/* - * Returns 0 for the stages where we know that cbmem does not come online. - * Even if this function returns 1 for romstage, depending upon the point in - * bootup, cbmem might not actually be online. - */ -static int cbmem_possibly_online(void) -{ - if (ENV_BOOTBLOCK) - return 0; - - if (ENV_VERSTAGE && IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) - return 0; - - return 1; -} - -/* - * Returns 1 if vboot is being used and currently in a stage which might have - * already executed vboot verification. - */ -static int vboot_possibly_executed(void) -{ - if (IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) { - if (ENV_BOOTBLOCK && IS_ENABLED(CONFIG_SEPARATE_VERSTAGE)) - return 0; - return 1; - } - - if (IS_ENABLED(CONFIG_VBOOT_STARTS_IN_ROMSTAGE)) { - if (ENV_BOOTBLOCK) - return 0; - return 1; - } - - return 0; -} - -/* - * vb2_check_recovery_request looks up different components to identify if there - * is a recovery request and returns appropriate reason code: - * 1. Checks if recovery mode is initiated by EC. If yes, returns - * VB2_RECOVERY_RO_MANUAL. - * 2. Checks if recovery request is present in VBNV and returns the code read - * from it. - * 3. Checks recovery request in handoff for stages post-cbmem. - * 4. For non-CBMEM stages, check if vboot verification is done and look-up - * selected region to identify if vboot_refence library has requested recovery - * path. If yes, return the reason code from shared data. - * 5. If nothing applies, return 0 indicating no recovery request. - */ -int vboot_check_recovery_request(void) -{ - int reason = 0; - - /* EC-initiated recovery. */ - if (get_recovery_mode_switch()) - return VB2_RECOVERY_RO_MANUAL; - - /* Recovery request in VBNV. */ - if ((reason = get_recovery_mode_from_vbnv()) != 0) - return reason; - - /* - * Check recovery flag in vboot_handoff for stages post CBMEM coming - * online. Since for some stages there is no way to know if cbmem has - * already come online, try looking up handoff anyways. If it fails, - * flow will fallback to looking up shared data. - */ - if (cbmem_possibly_online() && - ((reason = vboot_handoff_get_recovery_reason()) != 0)) - return reason; - - /* - * For stages where CBMEM might not be online, identify if vboot - * verification is already complete and no slot was selected - * i.e. recovery path was requested. - */ - if (vboot_possibly_executed() && vb2_logic_executed() && - !vb2_is_slot_selected()) - return vb2_get_recovery_reason_shared_data(); - - return 0; -} diff --git a/src/vboot/vboot_common.h b/src/vboot/vboot_common.h index 684a66b..d64b5bb 100644 --- a/src/vboot/vboot_common.h +++ b/src/vboot/vboot_common.h @@ -101,4 +101,8 @@ void verstage_main(void); void verstage(void); void verstage_mainboard_init(void); +/* Check boot modes */ +int vboot_developer_mode_enabled(void); +int vboot_recovery_mode_enabled(void); + #endif /* __VBOOT_VBOOT_COMMON_H__ */ diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index 944a706..1b71553 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -25,7 +25,6 @@ config CHROMEOS select TPM2 if MAINBOARD_HAS_TPM2 select TPM_INIT_FAILURE_IS_FATAL if PC80_SYSTEM && LPC_TPM select SKIP_TPM_STARTUP_ON_NORMAL_BOOT if PC80_SYSTEM && LPC_TPM - select BOOTMODE_STRAPS select ELOG if SPI_FLASH select COLLECT_TIMESTAMPS select VBOOT diff --git a/src/vendorcode/google/chromeos/elog.c b/src/vendorcode/google/chromeos/elog.c index 0d835b8..1b36527 100644 --- a/src/vendorcode/google/chromeos/elog.c +++ b/src/vendorcode/google/chromeos/elog.c @@ -25,10 +25,10 @@ void elog_add_boot_reason(void) { - if (developer_mode_enabled()) { + if (vboot_developer_mode_enabled()) { elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE); printk(BIOS_DEBUG, "%s: Logged dev mode boot\n", __func__); - } else if (recovery_mode_enabled()) { + } else if (vboot_recovery_mode_enabled()) { u8 reason = 0; #if CONFIG_VBOOT struct vboot_handoff *vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index f5ccd65..5e14849 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -53,10 +53,10 @@ void chromeos_init_vboot(chromeos_acpi_t *chromeos) #endif #if CONFIG_ELOG - if (developer_mode_enabled() || - (vboot_wants_oprom() && !recovery_mode_enabled())) + if (vboot_developer_mode_enabled() || + (vboot_wants_oprom() && !vboot_recovery_mode_enabled())) elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE); - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { int reason = get_recovery_mode_from_vbnv(); #if CONFIG_VBOOT if (vboot_handoff && !reason) {

1 0

Patch set updated for coreboot: i2c/ww_ring: Add ww_ring files to ramstage
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15893 -gerrit commit 70bf1610b6bf82c0e430350bfe18532a5d85fdd5 Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Jul 25 16:56:44 2016 -0700 i2c/ww_ring: Add ww_ring files to ramstage These files are required by storm and gale boards for enabling elog support in ramstage. BUG=chrome-os-partner:55639 Change-Id: I2bbfee2acf2bfe2f896a8619b1276dcea1b87f16 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/drivers/i2c/ww_ring/Makefile.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/drivers/i2c/ww_ring/Makefile.inc b/src/drivers/i2c/ww_ring/Makefile.inc index eabd3bf..09f2e93 100644 --- a/src/drivers/i2c/ww_ring/Makefile.inc +++ b/src/drivers/i2c/ww_ring/Makefile.inc @@ -1,2 +1,5 @@ libverstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring.c libverstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring_programs.c + +ramstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring.c +ramstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring_programs.c

1 0

Patch set updated for coreboot: google/chromeos: Use vboot bootmode functions for elog add boot reason
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15870 -gerrit commit 1d4ee91bd81b59432c69c3baa764afe1f1fa7693 Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Jul 25 13:26:32 2016 -0700 google/chromeos: Use vboot bootmode functions for elog add boot reason BUG=chrome-os-partner:55639 Change-Id: I3ac2b256862758bb5c9e6c2f1311972af474e8f6 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/vendorcode/google/chromeos/elog.c | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/src/vendorcode/google/chromeos/elog.c b/src/vendorcode/google/chromeos/elog.c index 1b36527..206f9d9 100644 --- a/src/vendorcode/google/chromeos/elog.c +++ b/src/vendorcode/google/chromeos/elog.c @@ -17,11 +17,9 @@ #include <console/console.h> #include <elog.h> #include <vendorcode/google/chromeos/chromeos.h> -#if CONFIG_VBOOT #include <vboot/vbnv.h> #include <vboot/vboot_common.h> #include <vboot_struct.h> -#endif void elog_add_boot_reason(void) { @@ -29,18 +27,7 @@ void elog_add_boot_reason(void) elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE); printk(BIOS_DEBUG, "%s: Logged dev mode boot\n", __func__); } else if (vboot_recovery_mode_enabled()) { - u8 reason = 0; -#if CONFIG_VBOOT - struct vboot_handoff *vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - reason = get_recovery_mode_from_vbnv(); - if (vbho && !reason) { - VbSharedDataHeader *sd = (VbSharedDataHeader *) - vbho->shared_data; - reason = sd->recovery_reason; - } -#endif - + u8 reason = vboot_check_recovery_request(); elog_add_event_byte(ELOG_TYPE_CROS_RECOVERY_MODE, reason ? reason : ELOG_CROS_RECOVERY_MODE_BUTTON); printk(BIOS_DEBUG, "%s: Logged recovery mode boot, "

1 0

Patch set updated for coreboot: qualcomm/gale: Add required files to enable elog in ramstage
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15895 -gerrit commit 2a8ab856e27e9c77ddf1e0e08f0be7e4e65cb45a Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Jul 25 16:58:15 2016 -0700 qualcomm/gale: Add required files to enable elog in ramstage BUG=chrome-os-partner:55639 Change-Id: Idbad4f8763be18002907a62be755b2fdf7e479ec Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/mainboard/google/gale/Makefile.inc | 1 + src/soc/qualcomm/ipq40xx/Makefile.inc | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/src/mainboard/google/gale/Makefile.inc b/src/mainboard/google/gale/Makefile.inc index 6c7e55f..855e712 100644 --- a/src/mainboard/google/gale/Makefile.inc +++ b/src/mainboard/google/gale/Makefile.inc @@ -39,6 +39,7 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += mmu.c ramstage-y += reset.c +ramstage-y += blsp.c bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/soc/qualcomm/ipq40xx/Makefile.inc b/src/soc/qualcomm/ipq40xx/Makefile.inc index 8ea28f0..568b0e3 100644 --- a/src/soc/qualcomm/ipq40xx/Makefile.inc +++ b/src/soc/qualcomm/ipq40xx/Makefile.inc @@ -51,6 +51,11 @@ ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk ramstage-y += usb.c ramstage-y += tz_wrapper.S +ramstage-y += blsp.c +ramstage-y += i2c.c +ramstage-y += qup.c +ramstage-y += spi.c + ifeq ($(CONFIG_USE_BLOBS),y) $(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_ELF)) \

1 0

Patch set updated for coreboot: qualcomm/storm: Add required files to enable elog in ramstage
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15894 -gerrit commit 3a329b3aa26da25c065a6eecc879012c3f9e754c Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Jul 25 16:57:46 2016 -0700 qualcomm/storm: Add required files to enable elog in ramstage BUG=chrome-os-partner:55639 Change-Id: Ie859ec3ff682e91a4d7d38d3c3cd6badf7385431 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/mainboard/google/storm/Makefile.inc | 1 + src/soc/qualcomm/ipq806x/Makefile.inc | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/src/mainboard/google/storm/Makefile.inc b/src/mainboard/google/storm/Makefile.inc index 491b5b5..b603977 100644 --- a/src/mainboard/google/storm/Makefile.inc +++ b/src/mainboard/google/storm/Makefile.inc @@ -37,6 +37,7 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += mmu.c ramstage-y += reset.c +ramstage-y += gsbi.c bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc index ffb8752..42d28e4 100644 --- a/src/soc/qualcomm/ipq806x/Makefile.inc +++ b/src/soc/qualcomm/ipq806x/Makefile.inc @@ -49,6 +49,10 @@ ramstage-y += timer.c ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk ramstage-y += usb.c ramstage-y += tz_wrapper.S +ramstage-y += gsbi.c +ramstage-y += i2c.c +ramstage-y += qup.c +ramstage-y += spi.c ifeq ($(CONFIG_USE_BLOBS),y)

1 0

Patch set updated for coreboot: chromeos: Clean up elog handling
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15897 -gerrit commit f7c1bca7e4567ab0120da140c1eeae373b18e042 Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Jul 25 17:00:07 2016 -0700 chromeos: Clean up elog handling 1. Currenty, boot reason is being added to elog only for some ARM32/ARM64 platforms. Change this so that boot reason is logged by default in elog for all devices which have CHROMEOS selected. 2. Add a new option to select ELOG_WATCHDOG_RESET for the devices that want to add details about watchdog reset in elog. This requires a special region WATCHDOG to be present in the memlayout. 3. Remove calls to elog add boot reason and watchdog reset from mainboards. BUG=chrome-os-partner:55639 Change-Id: I91ff5b158cfd2a0749e7fefc498d8659f7e6aa91 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/mainboard/google/gru/mainboard.c | 3 --- src/mainboard/google/nyan/mainboard.c | 4 ---- src/mainboard/google/nyan_big/mainboard.c | 4 ---- src/mainboard/google/nyan_blaze/mainboard.c | 4 ---- src/mainboard/google/oak/mainboard.c | 4 ---- src/mainboard/google/rush_ryu/mainboard.c | 3 --- src/mainboard/google/veyron/mainboard.c | 4 ---- src/mainboard/google/veyron_brain/mainboard.c | 4 ---- src/mainboard/google/veyron_danger/mainboard.c | 4 ---- src/mainboard/google/veyron_emile/mainboard.c | 4 ---- src/mainboard/google/veyron_mickey/mainboard.c | 4 ---- src/mainboard/google/veyron_rialto/mainboard.c | 4 ---- src/mainboard/google/veyron_romy/mainboard.c | 4 ---- src/vendorcode/google/chromeos/Makefile.inc | 2 +- src/vendorcode/google/chromeos/chromeos.h | 6 ------ src/vendorcode/google/chromeos/elog.c | 30 ++++++++++++++++---------- src/vendorcode/google/chromeos/gnvs.c | 18 ---------------- src/vendorcode/google/chromeos/watchdog.c | 15 ++++++++++++- 18 files changed, 34 insertions(+), 87 deletions(-) diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c index 5a6b82c..7ec377f 100644 --- a/src/mainboard/google/gru/mainboard.c +++ b/src/mainboard/google/gru/mainboard.c @@ -189,9 +189,6 @@ static void mainboard_init(device_t dev) register_reset_to_bl31(); register_poweroff_to_bl31(); setup_rtc(); - - elog_init(); - elog_add_boot_reason(); } static void enable_backlight_booster(void) diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c index 48a0d1c..92bb3e3 100644 --- a/src/mainboard/google/nyan/mainboard.c +++ b/src/mainboard/google/nyan/mainboard.c @@ -242,10 +242,6 @@ static void mainboard_init(device_t dev) setup_kernel_info(); clock_init_arm_generic_timer(); setup_ec_spi(); -#if CONFIG_ELOG - elog_init(); - elog_add_boot_reason(); -#endif } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/nyan_big/mainboard.c b/src/mainboard/google/nyan_big/mainboard.c index a2fef3c..0c0fe5e 100644 --- a/src/mainboard/google/nyan_big/mainboard.c +++ b/src/mainboard/google/nyan_big/mainboard.c @@ -240,10 +240,6 @@ static void mainboard_init(device_t dev) setup_kernel_info(); clock_init_arm_generic_timer(); setup_ec_spi(); -#if CONFIG_ELOG - elog_init(); - elog_add_boot_reason(); -#endif } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/nyan_blaze/mainboard.c b/src/mainboard/google/nyan_blaze/mainboard.c index 7ceb123..c3b936c 100644 --- a/src/mainboard/google/nyan_blaze/mainboard.c +++ b/src/mainboard/google/nyan_blaze/mainboard.c @@ -240,10 +240,6 @@ static void mainboard_init(device_t dev) setup_kernel_info(); clock_init_arm_generic_timer(); setup_ec_spi(); -#if CONFIG_ELOG - elog_init(); - elog_add_boot_reason(); -#endif } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c index e33d08c..ad5ecd4 100644 --- a/src/mainboard/google/oak/mainboard.c +++ b/src/mainboard/google/oak/mainboard.c @@ -267,10 +267,6 @@ static void mainboard_init(device_t dev) configure_usb_hub(); configure_ext_buck(); configure_touchscreen(); - - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/rush_ryu/mainboard.c b/src/mainboard/google/rush_ryu/mainboard.c index b53b0ff..64e01ec 100644 --- a/src/mainboard/google/rush_ryu/mainboard.c +++ b/src/mainboard/google/rush_ryu/mainboard.c @@ -269,9 +269,6 @@ static void mainboard_init(device_t dev) /* Temp hack for P1 board: Enable speaker amp (powerup, etc.) */ enable_ad4567_spkr_amp(); - elog_init(); - elog_add_boot_reason(); - fix_ec_sw_sync(); /* configure panel gpio pads */ diff --git a/src/mainboard/google/veyron/mainboard.c b/src/mainboard/google/veyron/mainboard.c index cbc82e9..a6bbf88 100644 --- a/src/mainboard/google/veyron/mainboard.c +++ b/src/mainboard/google/veyron/mainboard.c @@ -108,10 +108,6 @@ static void mainboard_init(device_t dev) configure_emmc(); configure_codec(); configure_vop(); - - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/veyron_brain/mainboard.c b/src/mainboard/google/veyron_brain/mainboard.c index 22faf64..cc07278 100644 --- a/src/mainboard/google/veyron_brain/mainboard.c +++ b/src/mainboard/google/veyron_brain/mainboard.c @@ -93,10 +93,6 @@ static void mainboard_init(device_t dev) configure_codec(); configure_vop(); configure_hdmi(); - - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/veyron_danger/mainboard.c b/src/mainboard/google/veyron_danger/mainboard.c index f923da9..39f0b2a 100644 --- a/src/mainboard/google/veyron_danger/mainboard.c +++ b/src/mainboard/google/veyron_danger/mainboard.c @@ -149,10 +149,6 @@ static void mainboard_init(device_t dev) configure_codec(); configure_vop(); configure_hdmi(); - - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/veyron_emile/mainboard.c b/src/mainboard/google/veyron_emile/mainboard.c index 5e9c1c1..b264df9 100644 --- a/src/mainboard/google/veyron_emile/mainboard.c +++ b/src/mainboard/google/veyron_emile/mainboard.c @@ -111,10 +111,6 @@ static void mainboard_init(device_t dev) configure_i2s(); configure_vop(); configure_hdmi(); - - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/veyron_mickey/mainboard.c b/src/mainboard/google/veyron_mickey/mainboard.c index 27e9f74..ef085b2 100644 --- a/src/mainboard/google/veyron_mickey/mainboard.c +++ b/src/mainboard/google/veyron_mickey/mainboard.c @@ -87,10 +87,6 @@ static void mainboard_init(device_t dev) configure_i2s(); configure_vop(); configure_hdmi(); - - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); } static void mainboard_enable(device_t dev) diff --git a/src/mainboard/google/veyron_rialto/mainboard.c b/src/mainboard/google/veyron_rialto/mainboard.c index b4f7685..b9b6a22 100644 --- a/src/mainboard/google/veyron_rialto/mainboard.c +++ b/src/mainboard/google/veyron_rialto/mainboard.c @@ -85,10 +85,6 @@ static void mainboard_init(device_t dev) configure_3g(); /* No video. */ - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); - /* If recovery mode is detected, reduce frequency and voltage to reduce * heat in case machine is left unattended. chrome-os-partner:41201. */ if (vboot_recovery_mode_enabled()) { diff --git a/src/mainboard/google/veyron_romy/mainboard.c b/src/mainboard/google/veyron_romy/mainboard.c index c023338..9f68a09 100644 --- a/src/mainboard/google/veyron_romy/mainboard.c +++ b/src/mainboard/google/veyron_romy/mainboard.c @@ -86,10 +86,6 @@ static void mainboard_init(device_t dev) configure_emmc(); configure_codec(); configure_vop(); - - elog_init(); - elog_add_watchdog_reset(); - elog_add_boot_reason(); } static void mainboard_enable(device_t dev) diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 253c30e..dffbcd5 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -24,7 +24,7 @@ ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c romstage-y += vpd_decode.c ramstage-y += vpd_decode.c cros_vpd.c vpd_mac.c vpd_serialno.c vpd_calibration.c ramstage-$(CONFIG_HAVE_REGULATORY_DOMAIN) += wrdd.c -ifeq ($(CONFIG_ARCH_X86)$(CONFIG_ARCH_MIPS),) +ifeq ($(CONFIG_ARCH_MIPS),) bootblock-y += watchdog.c ramstage-y += watchdog.c endif diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index 92c943c..0a93ccd 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -26,16 +26,10 @@ void save_chromeos_gpios(void); #if CONFIG_CHROMEOS -/* functions implemented in elog.c */ -void elog_add_boot_reason(void); - /* functions implemented in watchdog.c */ -void elog_add_watchdog_reset(void); void mark_watchdog_tombstone(void); void reboot_from_watchdog(void); #else -static inline void elog_add_boot_reason(void) { return; } -static inline void elog_add_watchdog_reset(void) { return; } static inline void mark_watchdog_tombstone(void) { return; } static inline void reboot_from_watchdog(void) { return; } #endif /* CONFIG_CHROMEOS */ diff --git a/src/vendorcode/google/chromeos/elog.c b/src/vendorcode/google/chromeos/elog.c index 206f9d9..061c177 100644 --- a/src/vendorcode/google/chromeos/elog.c +++ b/src/vendorcode/google/chromeos/elog.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <bootstate.h> #include <cbmem.h> #include <console/console.h> #include <elog.h> @@ -21,19 +22,26 @@ #include <vboot/vboot_common.h> #include <vboot_struct.h> -void elog_add_boot_reason(void) +static void elog_add_boot_reason(void *unused) { - if (vboot_developer_mode_enabled()) { + int rec = vboot_recovery_mode_enabled(); + int dev = vboot_developer_mode_enabled(); + + if (!rec && !dev) + return; + + if (rec) { + u8 reason = vboot_check_recovery_request(); + elog_add_event_byte(ELOG_TYPE_CROS_RECOVERY_MODE, reason); + printk(BIOS_DEBUG, "%s: Logged recovery mode boot%s, " + "reason: 0x%02x\n", __func__, + dev ? " (Dev-switch on)" : "", reason); + } + + if (dev) { elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE); printk(BIOS_DEBUG, "%s: Logged dev mode boot\n", __func__); - } else if (vboot_recovery_mode_enabled()) { - u8 reason = vboot_check_recovery_request(); - elog_add_event_byte(ELOG_TYPE_CROS_RECOVERY_MODE, - reason ? reason : ELOG_CROS_RECOVERY_MODE_BUTTON); - printk(BIOS_DEBUG, "%s: Logged recovery mode boot, " - "reason: 0x%02x\n", __func__, reason); - } else { - printk(BIOS_DEBUG, "%s: Normal mode boot, nothing " - "interesting to log\n", __func__); } } + +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, elog_add_boot_reason, NULL); diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index 5e14849..1f13d1c 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -52,24 +52,6 @@ void chromeos_init_vboot(chromeos_acpi_t *chromeos) ARRAY_SIZE(chromeos->vdat)); #endif -#if CONFIG_ELOG - if (vboot_developer_mode_enabled() || - (vboot_wants_oprom() && !vboot_recovery_mode_enabled())) - elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE); - if (vboot_recovery_mode_enabled()) { - int reason = get_recovery_mode_from_vbnv(); -#if CONFIG_VBOOT - if (vboot_handoff && !reason) { - VbSharedDataHeader *sd = (VbSharedDataHeader *) - vboot_handoff->shared_data; - reason = sd->recovery_reason; - } -#endif - elog_add_event_byte(ELOG_TYPE_CROS_RECOVERY_MODE, - reason ? reason : ELOG_CROS_RECOVERY_MODE_BUTTON); - } -#endif - chromeos_ram_oops_init(chromeos); } diff --git a/src/vendorcode/google/chromeos/watchdog.c b/src/vendorcode/google/chromeos/watchdog.c index a2b18b7..fdaa177 100644 --- a/src/vendorcode/google/chromeos/watchdog.c +++ b/src/vendorcode/google/chromeos/watchdog.c @@ -14,24 +14,37 @@ */ #include <arch/io.h> +#include <assert.h> +#include <bootstate.h> #include <console/console.h> #include <elog.h> #include <reset.h> +#include <symbols.h> #include "chromeos.h" #include "symbols.h" #define WATCHDOG_TOMBSTONE_MAGIC 0x9d2f41a7 -void elog_add_watchdog_reset(void) +DECLARE_OPTIONAL_REGION(watchdog_tombstone); + +static void elog_handle_watchdog_tombstone(void *unused) { + if (!_watchdog_tombstone_size) + return; + if (read32(_watchdog_tombstone) == WATCHDOG_TOMBSTONE_MAGIC) elog_add_event(ELOG_TYPE_ASYNC_HW_TIMER_EXPIRED); + write32(_watchdog_tombstone, 0); } +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, + elog_handle_watchdog_tombstone, NULL); + void mark_watchdog_tombstone(void) { + assert(_watchdog_tombstone_size); write32(_watchdog_tombstone, WATCHDOG_TOMBSTONE_MAGIC); }

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Patch set updated for coreboot: google/urara: Provide dummy implementations of rec/dev functions
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15896 -gerrit commit 55b526488f95dee2458252e4c3f1e828166e61fc Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Jul 25 16:59:00 2016 -0700 google/urara: Provide dummy implementations of rec/dev functions This is required to enable elog support in ChromeOS by default. BUG=chrome-os-partner:55639 Change-Id: I9c97143d794de4bf220ddf67c0ca2eac2f7a326d Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/mainboard/google/urara/chromeos.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/mainboard/google/urara/chromeos.c b/src/mainboard/google/urara/chromeos.c index 0d5485f..4db06c6 100644 --- a/src/mainboard/google/urara/chromeos.c +++ b/src/mainboard/google/urara/chromeos.c @@ -28,3 +28,15 @@ void fill_lb_gpios(struct lb_gpios *gpios) { printk(BIOS_ERR, "%s unsupported, but called\n", __func__); } + +int get_developer_mode_switch(void) +{ + printk(BIOS_ERR, "%s unsupported, but called\n", __func__); + return 0; +} + +int get_recovery_mode_switch(void) +{ + printk(BIOS_ERR, "%s unsupported, but called\n", __func__); + return 0; +}

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Patch set updated for coreboot: chromeos/gnvs: Clean up use of vboot handoff
by Furquan Shaikh 27 Jul '16

27 Jul '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15903 -gerrit commit 6a055c6560bbe4eaa3898fc4352147084c6c7b9e Author: Furquan Shaikh <furquan(a)google.com> Date: Tue Jul 26 10:13:56 2016 -0700 chromeos/gnvs: Clean up use of vboot handoff BUG=chrome-os-partner:55639 Change-Id: I40a28f921499ddf43d8b423f5192ac93b40254c1 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/vendorcode/google/chromeos/gnvs.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index 1f13d1c..8a5cc64 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -20,14 +20,12 @@ #include <cbmem.h> #include <console/console.h> #include <elog.h> - -#include "chromeos.h" -#include "gnvs.h" -#if CONFIG_VBOOT #include <vboot/vbnv.h> #include <vboot/vboot_common.h> #include <vboot_struct.h> -#endif + +#include "chromeos.h" +#include "gnvs.h" chromeos_acpi_t *vboot_data = NULL; static u32 me_hash_saved[8]; @@ -39,18 +37,11 @@ void chromeos_init_vboot(chromeos_acpi_t *chromeos) /* Copy saved ME hash into NVS */ memcpy(vboot_data->mehh, me_hash_saved, sizeof(vboot_data->mehh)); -#if CONFIG_VBOOT - /* Save the vdat from the vboot handoff structure. Downstream software - * consumes the data located in the ACPI table. Ensure it reflects - * the shared data from VbInit() and VbSelectFirmware(). */ struct vboot_handoff *vboot_handoff; - vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vboot_handoff != NULL) + if (vboot_get_handoff_info((void **)&vboot_handoff, NULL) == 0) memcpy(&chromeos->vdat[0], &vboot_handoff->shared_data[0], ARRAY_SIZE(chromeos->vdat)); -#endif chromeos_ram_oops_init(chromeos); }

1 0

New patch to review for coreboot: .gitignore: Ignore Python object files
by Stefan Reinauer 27 Jul '16

27 Jul '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15923 -gerrit commit 948013db7641d6e6194c9ae416b45f432c72b7b5 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jul 27 13:10:08 2016 -0700 .gitignore: Ignore Python object files Ignore .pyc files, such as util/ipqheader/mbn_tools.pyc Change-Id: Ic539b7ac0b5263b9dc2fa37c03e79303ea92a9da Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index 2061f00..b03736a 100644 --- a/.gitignore +++ b/.gitignore @@ -53,6 +53,7 @@ site-local *.elf *.o *.out +*.pyc *.swp # Development friendly files

1 0

New patch to review for coreboot: util/chromeos: Make scripts executable
by Stefan Reinauer 27 Jul '16

27 Jul '16

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15922 -gerrit commit 6b1f1df583c45b877d40e46eafe50686edf1c427 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jul 27 13:08:25 2016 -0700 util/chromeos: Make scripts executable crosfirmware.sh and extract_blobs.sh are not executable, change that. Change-Id: Ib04df580a9acd4a422aedbdc15013b2ef505459a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- util/chromeos/crosfirmware.sh | 0 util/chromeos/extract_blobs.sh | 0 2 files changed, 0 insertions(+), 0 deletions(-) diff --git a/util/chromeos/crosfirmware.sh b/util/chromeos/crosfirmware.sh old mode 100644 new mode 100755 diff --git a/util/chromeos/extract_blobs.sh b/util/chromeos/extract_blobs.sh old mode 100644 new mode 100755

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coreboot-gerrit July 2016