the following patch was just integrated into master:
commit e2e561d31fcb1a9227a06ed1fb821090815050c7
Author: Jagadish Krishnamoorthy <jagadish.krishnamoorthy(a)intel.com>
Date: Wed May 18 15:18:58 2016 -0700
vendorcode/chromeos/vbnv: Add CMOS init function
Add cmos init helper function.
This function saves the Vboot NV data, calls cmos init
and restores the Vboot NV data.
Change-Id: I8475f23d849fb5b5a2d16738b4d5e99f112883da
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy(a)intel.com>
Reviewed-on: https://review.coreboot.org/14898
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See https://review.coreboot.org/14898 for details.
-gerrit
Zheng Bao (fishbaozi(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14955
-gerrit
commit b7aca4f371004e80ee7d6d2d5f899686a6791746
Author: zbao <fishbaozi(a)gmail.com>
Date: Tue May 24 21:21:26 2016 +0800
AMD/spi: Do not reset fifo after skipping the sent bytes
After we skip the bytes we send, the fifo pointer is at
right position. Reseting the fifo will change it to a
wrong place.
Please view the flashrom code, which tells the same thing.
https://code.coreboot.org/p/flashrom/source/tree/HEAD/trunk/sb600spi.c#L257
Change-Id: I31d487ce32c0d7ca3dead36d2b14611e73b1ad60
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
src/southbridge/amd/agesa/hudson/spi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index e8ab372..31160bd 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -143,7 +143,6 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
cmd = spi_read(SPI_REG_FIFO);
}
- reset_internal_fifo_pointer();
for (count = 0; count < bytesin; count++, din++) {
*(uint8_t *)din = spi_read(SPI_REG_FIFO);
}
Zheng Bao (fishbaozi(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14932
-gerrit
commit 48c81b0ca6267d774149d3c9570bddfdc307f3c5
Author: zbao <fishbaozi(a)gmail.com>
Date: Sat May 21 10:20:58 2016 +0800
splash: Put the suffix of splash file to CBFS name
The previous code harded the suffix of splash file as
"jpg". Actually, SeaBIOS supports both jpg and bmp.
Change-Id: I06c4b14aae7f75be3406652a94612b5f30ce91c2
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
Makefile.inc | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Makefile.inc b/Makefile.inc
index 7b8e79b..574f2fe 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -836,9 +836,10 @@ cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += revision
revision-file := $(obj)/build.h
revision-type := raw
-cbfs-files-$(CONFIG_BOOTSPLASH_IMAGE) += bootsplash.jpg
-bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
-bootsplash.jpg-type := bootsplash
+BOOTSPLASH_SUFFIX=$(suffix $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)))
+cbfs-files-$(CONFIG_BOOTSPLASH_IMAGE) += bootsplash$(BOOTSPLASH_SUFFIX)
+bootsplash$(BOOTSPLASH_SUFFIX)-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
+bootsplash$(BOOTSPLASH_SUFFIX)-type := bootsplash
cbfs-files-$(CONFIG_BOARD_ID_MANUAL) += board_id
board_id-file := $(obj)/board_id
Antonello Dettori (dev(a)dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14952
-gerrit
commit a8de1a8ec880f1eff58408553ce6873f46a5dc95
Author: Antonello Dettori <dettori.an(a)gmail.com>
Date: Mon May 23 22:40:58 2016 +0200
filo: Specify libpayload path
Fix FILO build when selected as a payload from menuconfig.
The "make *conf" commands were pointing to the correct path of libpayload
but "make" wasn't, resulting in a build error.
Change-Id: Ia7592667b1719836d1509e5cbc01d23266fca9fd
Signed-off-by: Antonello Dettori <dettori.an(a)gmail.com>
---
payloads/external/FILO/Makefile | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/payloads/external/FILO/Makefile b/payloads/external/FILO/Makefile
index 13d3e8f..98b42c0 100644
--- a/payloads/external/FILO/Makefile
+++ b/payloads/external/FILO/Makefile
@@ -33,11 +33,10 @@ config: libpayload
#echo "CONFIG_VGAHOOKS=y" >> filo/.config
# This shows how to force a previously set .config option *off*
#echo "# CONFIG_SMBIOS is not set" >> filo/.config
- $(MAKE) -C filo oldconfig LIBCONFIG_PATH=../../../libpayload
filo: config
echo " MAKE FILO $(NAME-y)"
- $(MAKE) -C filo
+ $(MAKE) -C filo LIBCONFIG_PATH=../../../libpayload
libpayload: checkout
cd ../../libpayload && $(MAKE) defconfig && \
Antonello Dettori (dev(a)dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14952
-gerrit
commit a8fee05a216a96141956e0826707d874032e5133
Author: Antonello Dettori <dettori.an(a)gmail.com>
Date: Mon May 23 22:40:58 2016 +0200
filo: Specify libpayload path
Fix FILO build when selected as a payload from menuconfig.
The "make *conf" commands were pointing to the correct path of libpayload
but "make" wasn't, resulting in a build error.
Change-Id: Ia7592667b1719836d1509e5cbc01d23266fca9fd
Signed-off-by: Antonello Dettori <dettori.an(a)gmail.com>
---
payloads/external/FILO/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/payloads/external/FILO/Makefile b/payloads/external/FILO/Makefile
index 13d3e8f..1a03f81 100644
--- a/payloads/external/FILO/Makefile
+++ b/payloads/external/FILO/Makefile
@@ -33,11 +33,11 @@ config: libpayload
#echo "CONFIG_VGAHOOKS=y" >> filo/.config
# This shows how to force a previously set .config option *off*
#echo "# CONFIG_SMBIOS is not set" >> filo/.config
- $(MAKE) -C filo oldconfig LIBCONFIG_PATH=../../../libpayload
+ #$(MAKE) -C filo oldconfig LIBCONFIG_PATH=../../../libpayload
filo: config
echo " MAKE FILO $(NAME-y)"
- $(MAKE) -C filo
+ $(MAKE) -C filo LIBCONFIG_PATH=../../../libpayload
libpayload: checkout
cd ../../libpayload && $(MAKE) defconfig && \
Damien Zammit (damien(a)zamaudio.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14954
-gerrit
commit ae837e942d751aaf9a7f5b9ed5fba687abbd1dde
Author: Damien Zammit <damien(a)zamaudio.com>
Date: Tue May 24 17:26:51 2016 +1000
mb/gigabyte/ga-g41m-es2l: Update board_info.txt and add item to Kconfig
This adds the website URL to the board info and also enables
the realtek nic reset function as per a previous patch.
Change-Id: I2cda120c59b55f0dd2ffa78d397b16beb13d6843
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
---
src/mainboard/gigabyte/ga-g41m-es2l/Kconfig | 1 +
src/mainboard/gigabyte/ga-g41m-es2l/board_info.txt | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig b/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig
index 31b29bb..7dec921 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig
@@ -29,6 +29,7 @@ config BOARD_SPECIFIC_OPTIONS
select PCIEXP_ASPM
select PCIEXP_CLK_PM
select PCIEXP_L1_SUB_STATE
+ select REALTEK_8168_RESET
config MMCONF_BASE_ADDRESS
hex
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/board_info.txt b/src/mainboard/gigabyte/ga-g41m-es2l/board_info.txt
index 44ed73a..170449e 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/board_info.txt
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/board_info.txt
@@ -1,5 +1,5 @@
Category: desktop
-Board URL:
+Board URL: http://www.gigabyte.com/products/product-page.aspx?pid=3024#ov
ROM package: SOIC-8
ROM protocol: SPI
ROM socketed: n
Damien Zammit (damien(a)zamaudio.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14927
-gerrit
commit 8f90ec9634e7eb0a385902fe2d74af4ebc33c7c2
Author: Damien Zammit <damien(a)zamaudio.com>
Date: Sat May 21 02:24:19 2016 +1000
drivers/net/r8168: Add driver for realtek nic
One thing that is vital to this patch is the MAC address setting
in case the EEPROM/efuse is unconfigured.
Linux now recognises the default MAC address on GA-G41M-ES2L which
does rely on the default bios settings for the MAC address.
Change-Id: I32e070b545b4c6369686a7087b7ff838d00764e3
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
---
src/drivers/net/Kconfig | 5 +++
src/drivers/net/Makefile.inc | 1 +
src/drivers/net/r8168.c | 94 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 100 insertions(+)
diff --git a/src/drivers/net/Kconfig b/src/drivers/net/Kconfig
new file mode 100644
index 0000000..b4bafd2
--- /dev/null
+++ b/src/drivers/net/Kconfig
@@ -0,0 +1,5 @@
+config REALTEK_8168_RESET
+ bool "Realtek 8168 reset"
+ help
+ This forces a realtek 10ec:8168 card to reset to ensure power state
+ is correct at boot.
diff --git a/src/drivers/net/Makefile.inc b/src/drivers/net/Makefile.inc
index 9b3008d..e435d48 100644
--- a/src/drivers/net/Makefile.inc
+++ b/src/drivers/net/Makefile.inc
@@ -1,2 +1,3 @@
romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
+ramstage-$(CONFIG_REALTEK_8168_RESET) += r8168.c
diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c
new file mode 100644
index 0000000..4301693
--- /dev/null
+++ b/src/drivers/net/r8168.c
@@ -0,0 +1,94 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Damien Zammit <damien(a)zamaudio.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * This driver forces the 10ec:8168 device to reset so that it goes
+ * into a proper power state, also programs a default MAC address
+ * so that if the EEPROM/efuse is unconfigured it still has a default MAC.
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ops.h>
+#include <device/pci_def.h>
+#include <delay.h>
+#include <console/console.h>
+
+#define NIC_TIMEOUT 1000
+
+#define CMD_REG 0x37
+#define CMD_REG_RESET 0x10
+
+#define CFG_9346 0x50
+#define CFG_9346_LOCK 0x00
+#define CFG_9346_UNLOCK 0xc0
+
+static void r8168_init(struct device *dev)
+{
+ u32 i;
+ const u8 mac[6] = { 0x00, 0xe0, 0x4c, 0x00, 0xc0, 0xb0 };
+
+ /* Get the resource of the NIC mmio */
+ struct resource *nic_res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ u16 nic_port = (u16)nic_res->base;
+
+ /* Set bus master */
+ pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER
+ | PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
+
+ /* Reset NIC */
+ printk(BIOS_DEBUG, "r8168: Resetting NIC...");
+ outb(CMD_REG_RESET, nic_port + CMD_REG);
+
+ i = 0;
+ /* Poll for reset, with 1s timeout */
+ while (i < NIC_TIMEOUT && (inb(nic_port + CMD_REG) & CMD_REG_RESET)) {
+ udelay(1000);
+ if (++i >= NIC_TIMEOUT)
+ printk(BIOS_DEBUG, "timeout waiting for nic to reset\n");
+ }
+ if (i < NIC_TIMEOUT)
+ printk(BIOS_DEBUG, "done\n");
+
+ /* Unlock config regs */
+ outb(CFG_9346_UNLOCK, nic_port + CFG_9346);
+
+ /* Set MAC address 00:e0:4c:00:c0:b0
+ * NB: only 4-byte write accesses allowed
+ */
+ outl(mac[4] | mac[5] << 8, nic_port + 4);
+ inl(nic_port + 4);
+
+ outl(mac[0] | mac[1] << 8 | mac[2] << 16 | mac[3] << 24, nic_port);
+ inl(nic_port);
+
+ /* Lock config regs */
+ outb(CFG_9346_LOCK, nic_port + CFG_9346);
+}
+
+static struct device_operations r8168_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = r8168_init,
+ .scan_bus = 0,
+};
+
+static const struct pci_driver r8168_driver __pci_driver = {
+ .ops = &r8168_ops,
+ .vendor = 0x10ec,
+ .device = 0x8168,
+};