coreboot-gerrit May 2016

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Patch set updated for coreboot: ifwitool: Add new tool for managing IFWI images
by Furquan Shaikh 28 May '16

28 May '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14896 -gerrit commit e24e98e35d0d6a9b74765b31663bdd4fe95989dc Author: Furquan Shaikh <furquan(a)google.com> Date: Thu May 19 16:12:16 2016 -0700 ifwitool: Add new tool for managing IFWI images - Supports following operations: 1. add raw/dir sub-partition 2. extract raw/dir sub-partition 3. print info 4. delete raw sub-partition 5. replace raw/dir sub-partition Change-Id: I683a0ab13cc50eb60eecca34db4a8ffefc8dccbd Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- util/cbfstool/Makefile | 2 + util/cbfstool/Makefile.inc | 8 + util/cbfstool/ifwitool.c | 1943 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1953 insertions(+) diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile index 61a1a63..f49da3e 100644 --- a/util/cbfstool/Makefile +++ b/util/cbfstool/Makefile @@ -10,6 +10,7 @@ OBJCOPY ?= objcopy all: $(objutil)/cbfstool/cbfstool \ $(objutil)/cbfstool/fmaptool \ $(objutil)/cbfstool/rmodtool \ + $(objutil)/cbfstool/ifwitool \ .PHONY: clean clean: @@ -17,6 +18,7 @@ clean: $(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj) $(RM) $(objutil)/cbfstool/fmaptool $(fmapobj) $(RM) $(objutil)/cbfstool/rmodtool $(rmodobj) + $(RM) $(objutil)/cbfstool/ifwitool $(ifwiobj) linux_trampoline.c: linux_trampoline.S rm -f linux_trampoline.c diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index aa42f01..6c2b100 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -58,6 +58,10 @@ rmodobj += common.o rmodobj += elfheaders.o rmodobj += xdr.o +ifwiobj := +ifwiobj += ifwitool.o +ifwiobj += common.o + TOOLCFLAGS ?= -Werror -Wall -Wextra TOOLCFLAGS += -Wcast-qual -Wmissing-prototypes -Wredundant-decls -Wshadow TOOLCFLAGS += -Wstrict-prototypes -Wwrite-strings @@ -132,6 +136,10 @@ $(objutil)/cbfstool/rmodtool: $(addprefix $(objutil)/cbfstool/,$(rmodobj)) printf " HOSTCC $(subst $(objutil)/,,$(@)) (link)\n" $(HOSTCC) $(TOOLLDFLAGS) -o $@ $(addprefix $(objutil)/cbfstool/,$(rmodobj)) +$(objutil)/cbfstool/ifwitool: $(addprefix $(objutil)/cbfstool/,$(ifwiobj)) + printf " HOSTCC $(subst $(objutil)/,,$(@)) (link)\n" + $(HOSTCC) $(TOOLLDFLAGS) -o $@ $(addprefix $(objutil)/cbfstool/,$(ifwiobj)) + # Yacc source is superset of header $(objutil)/cbfstool/fmd.o: TOOLCFLAGS += -Wno-redundant-decls $(objutil)/cbfstool/fmd_parser.o: TOOLCFLAGS += -Wno-redundant-decls diff --git a/util/cbfstool/ifwitool.c b/util/cbfstool/ifwitool.c new file mode 100644 index 0000000..cfd3a7e --- /dev/null +++ b/util/cbfstool/ifwitool.c @@ -0,0 +1,1943 @@ +/* + * ifwitool, CLI utility for IFWI manipulation + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <commonlib/endian.h> +#include <getopt.h> +#include <stdlib.h> +#include <time.h> + +#include "common.h" + +/* + * BPDT is Boot Partition Descriptor Table. It is located at the start of a + * logical boot partition(LBP). It stores information about the critical + * sub-partitions present within the LBP. + * + * S-BPDT is Secondary Boot Partition Descriptor Table. It is located after the + * critical sub-partitions and contains information about the non-critical + * sub-partitions present within the LBP. + * + * Both tables are identified by BPDT_SIGNATURE stored at the start of the + * table. + */ +#define BPDT_SIGNATURE (0x000055AA) + +/* Parameters passed in by caller. */ +static struct param { + const char *file_name; + const char *subpart_name; + const char *image_name; + bool dir_ops; + const char *dentry_name; +} param; + +struct bpdt_header { + /* + * This is used to identify start of BPDT. It should always be + * BPDT_SIGNATURE. + */ + uint32_t signature; + /* Count of BPDT entries present. */ + uint16_t descriptor_count; + /* Version - Currently supported = 1. */ + uint16_t bpdt_version; + /* Unused - Should be 0. */ + uint32_t xor_redundant_block; + /* Version of IFWI build. */ + uint32_t ifwi_version; + /* Version of FIT tool used to create IFWI. */ + uint64_t fit_tool_version; +} __attribute__((packed)); +#define BPDT_HEADER_SIZE (sizeof(struct bpdt_header)) + +struct bpdt_entry { + /* Type of sub-partition. */ + uint16_t type; + /* Attributes of sub-partition. */ + uint16_t flags; + /* Offset of sub-partition from beginning of LBP. */ + uint32_t offset; + /* Size in bytes of sub-partition. */ + uint32_t size; +} __attribute__((packed)); +#define BPDT_ENTRY_SIZE (sizeof(struct bpdt_entry)) + +struct bpdt { + struct bpdt_header h; + /* In practice, this could be an array of 0 to n entries. */ + struct bpdt_entry e[0]; +} __attribute__((packed)); + +static inline size_t bpdt_size(struct bpdt_header *h) +{ + return (sizeof(*h) + BPDT_ENTRY_SIZE * h->descriptor_count); +} + +/* Minimum size in bytes allocated to BPDT in IFWI. */ +#define BPDT_MIN_SIZE (512) + +/* Header to define directory header for sub-partition. */ +struct subpart_dir_header { + /* Should be SUBPART_DIR_MARKER. */ + uint32_t marker; + /* Number of directory entries in the sub-partition. */ + uint32_t num_entries; + /* Currenty supported - 1. */ + uint8_t header_version; + /* Currenty supported - 1. */ + uint8_t entry_version; + /* Length of directory header in bytes. */ + uint8_t header_length; + /* + * 8-bit XOR checksum from first byte of header to last byte of + * directory entry. + */ + uint8_t checksum; + /* ASCII short name of sub-partition. */ + uint8_t name[4]; +} __attribute__((packed)); +#define SUBPART_DIR_HEADER_SIZE \ + (sizeof(struct subpart_dir_header)) +#define SUBPART_DIR_MARKER 0x44504324 +#define SUBPART_DIR_HEADER_VERSION_SUPPORTED 1 +#define SUBPART_DIR_ENTRY_VERSION_SUPPORTED 1 + +/* Structure for each directory entry for sub-partition. */ +struct subpart_dir_entry { + /* Name of directory entry - Not guaranteed to be NULL-terminated. */ + uint8_t name[12]; + /* Offset of entry from beginning of sub-partition. */ + uint32_t offset; + /* Length in bytes of sub-directory entry. */ + uint32_t length; + /* Must be zero. */ + uint32_t rsvd; +} __attribute__((packed)); +#define SUBPART_DIR_ENTRY_SIZE \ + (sizeof(struct subpart_dir_entry)) + +struct subpart_dir { + struct subpart_dir_header h; + /* In practice, this could be an array of 0 to n entries. */ + struct subpart_dir_entry e[0]; +} __attribute__((packed)); + +static inline size_t subpart_dir_size(struct subpart_dir_header *h) +{ + return (sizeof(*h) + SUBPART_DIR_ENTRY_SIZE * h->num_entries); +} + +struct manifest_header { + uint32_t header_type; + uint32_t header_length; + uint32_t header_version; + uint32_t flags; + uint32_t vendor; + uint32_t date; + uint32_t size; + uint32_t id; + uint32_t rsvd; + uint64_t version; + uint32_t svn; + uint64_t rsvd1; + uint8_t rsvd2[64]; + uint32_t modulus_size; + uint32_t exponent_size; + uint8_t public_key[256]; + uint32_t exponent; + uint8_t signature[256]; +} __attribute__((packed)); + +#define DWORD_SIZE 4 +#define MANIFEST_HDR_SIZE (sizeof(struct manifest_header)) +#define MANIFEST_ID_MAGIC (0x324e4d24) + +struct module { + uint8_t name[12]; + uint8_t type; + uint8_t hash_alg; + uint16_t hash_size; + uint32_t metadata_size; + uint8_t metadata_hash[32]; +} __attribute__((packed)); + +#define MODULE_SIZE (sizeof(struct module)) + +struct signed_pkg_info_ext { + uint32_t ext_type; + uint32_t ext_length; + uint8_t name[4]; + uint32_t vcn; + uint8_t bitmap[16]; + uint32_t svn; + uint8_t rsvd[16]; +} __attribute__((packed)); + +#define SIGNED_PKG_INFO_EXT_TYPE 0x15 +#define SIGNED_PKG_INFO_EXT_SIZE \ + (sizeof(struct signed_pkg_info_ext)) + +/* + * Attributes for various IFWI sub-partitions. + * LIES_WITHIN_BPDT_4K = Sub-Partition should lie within the same 4K block as + * BPDT. + * NON_CRITICAL_SUBPART = Sub-Partition entry should be present in S-BPDT. + * CONTAINS_DIR = Sub-Partition contains directory. + * AUTO_GENERATED = Sub-Partition is generated by the tool. + * MANDATORY_BPDT_ENTRY = Even if sub-partition is deleted, BPDT should contain + * an entry for it with size 0 and offset 0. + */ +enum subpart_attributes { + LIES_WITHIN_BPDT_4K = (1 << 0), + NON_CRITICAL_SUBPART = (1 << 1), + CONTAINS_DIR = (1 << 2), + AUTO_GENERATED = (1 << 3), + MANDATORY_BPDT_ENTRY = (1 << 4), +}; + +/* Type value for various IFWI sub-partitions. */ +enum bpdt_entry_type { + SMIP_TYPE = 0, + CSE_RBE_TYPE = 1, + CSE_BUP_TYPE = 2, + UCODE_TYPE = 3, + IBB_TYPE = 4, + S_BPDT_TYPE = 5, + OBB_TYPE = 6, + CSE_MAIN_TYPE = 7, + ISH_TYPE = 8, + CSE_IDLM_TYPE = 9, + IFP_OVERRIDE_TYPE = 10, + DEBUG_TOKENS_TYPE = 11, + UFS_PHY_TYPE = 12, + UFS_GPP_TYPE = 13, + PMC_TYPE = 14, + IUNIT_TYPE = 15, + NVM_CONFIG_TYPE = 16, + UEP_TYPE = 17, + UFS_RATE_B_TYPE = 18, + MAX_SUBPARTS = 19, +}; + +/* + * There are two order requirements for an IFWI image: + * 1. Order in which the sub-partitions lie within the BPDT entries. + * 2. Order in which the sub-partitions lie within the image. + * + * header_order defines #1 i.e. the order in which the sub-partitions should + * appear in the BPDT entries. pack_order defines #2 i.e. the order in which + * sub-partitions appear in the IFWI image. pack_order controls the offset and + * thus sub-partitions would have increasing offsets as we loop over pack_order. + */ +const enum bpdt_entry_type bpdt_header_order[MAX_SUBPARTS] = { + CSE_IDLM_TYPE, + IFP_OVERRIDE_TYPE, + S_BPDT_TYPE, + CSE_RBE_TYPE, + UFS_PHY_TYPE, + UFS_GPP_TYPE, + CSE_BUP_TYPE, + UEP_TYPE, + NVM_CONFIG_TYPE, + SMIP_TYPE, + PMC_TYPE, + UCODE_TYPE, + IBB_TYPE, + DEBUG_TOKENS_TYPE, + UFS_RATE_B_TYPE, + ISH_TYPE, + CSE_MAIN_TYPE, + OBB_TYPE, + IUNIT_TYPE, +}; + +const enum bpdt_entry_type bpdt_pack_order[MAX_SUBPARTS] = { + CSE_IDLM_TYPE, + UFS_PHY_TYPE, + UFS_GPP_TYPE, + IFP_OVERRIDE_TYPE, + UEP_TYPE, + IBB_TYPE, + NVM_CONFIG_TYPE, + SMIP_TYPE, + CSE_RBE_TYPE, + PMC_TYPE, + CSE_BUP_TYPE, + UCODE_TYPE, + DEBUG_TOKENS_TYPE, + UFS_RATE_B_TYPE, + S_BPDT_TYPE, + ISH_TYPE, + CSE_MAIN_TYPE, + OBB_TYPE, + IUNIT_TYPE, +}; + +/* Utility functions. */ +enum ifwi_ret { + COMMAND_ERR = -1, + NO_ACTION_REQUIRED = 0, + REPACK_REQUIRED = 1, +}; + +struct dir_ops { + enum ifwi_ret (*dir_add)(int); +}; + +static enum ifwi_ret ibbp_dir_add(int); + +const struct subpart_info { + const char *name; + const char *readable_name; + uint32_t attr; + struct dir_ops dir_ops; +} subparts[MAX_SUBPARTS] = { + /* OEM SMIP */ + [SMIP_TYPE] = {"SMIP", "SMIP", CONTAINS_DIR, {NULL}}, + /* CSE RBE */ + [CSE_RBE_TYPE] = {"RBEP", "CSE_RBE", CONTAINS_DIR | + MANDATORY_BPDT_ENTRY, {NULL}}, + /* CSE BUP */ + [CSE_BUP_TYPE] = {"FTPR", "CSE_BUP", CONTAINS_DIR | + MANDATORY_BPDT_ENTRY, {NULL}}, + /* uCode */ + [UCODE_TYPE] = {"UCOD", "Microcode", CONTAINS_DIR, {NULL}}, + /* IBB */ + [IBB_TYPE] = {"IBBP", "Bootblock", CONTAINS_DIR, {ibbp_dir_add}}, + /* S-BPDT */ + [S_BPDT_TYPE] = {"S_BPDT", "S-BPDT", AUTO_GENERATED | + MANDATORY_BPDT_ENTRY, {NULL}}, + /* OBB */ + [OBB_TYPE] = {"OBBP", "OEM boot block", CONTAINS_DIR | + NON_CRITICAL_SUBPART, {NULL}}, + /* CSE Main */ + [CSE_MAIN_TYPE] = {"NFTP", "CSE_MAIN", CONTAINS_DIR | + NON_CRITICAL_SUBPART, {NULL}}, + /* ISH */ + [ISH_TYPE] = {"ISHP", "ISH", NON_CRITICAL_SUBPART, {NULL}}, + /* CSE IDLM */ + [CSE_IDLM_TYPE] = {"DLMP", "CSE_IDLM", CONTAINS_DIR | + MANDATORY_BPDT_ENTRY, {NULL}}, + /* IFP Override */ + [IFP_OVERRIDE_TYPE] = {"IFP_OVERRIDE", "IFP_OVERRIDE", + LIES_WITHIN_BPDT_4K | MANDATORY_BPDT_ENTRY, + {NULL}}, + /* Debug Tokens */ + [DEBUG_TOKENS_TYPE] = {"DEBUG_TOKENS", "Debug Tokens", 0, {NULL}}, + /* UFS Phy Configuration */ + [UFS_PHY_TYPE] = {"UFS_PHY", "UFS Phy", LIES_WITHIN_BPDT_4K | + MANDATORY_BPDT_ENTRY, {NULL}}, + /* UFS GPP LUN ID */ + [UFS_GPP_TYPE] = {"UFS_GPP", "UFS GPP", LIES_WITHIN_BPDT_4K | + MANDATORY_BPDT_ENTRY, {NULL}}, + /* PMC */ + [PMC_TYPE] = {"PMCP", "PMC firmware", CONTAINS_DIR, {NULL}}, + /* IUNIT */ + [IUNIT_TYPE] = {"IUNP", "IUNIT", NON_CRITICAL_SUBPART, {NULL}}, + /* NVM Config */ + [NVM_CONFIG_TYPE] = {"NVM_CONFIG", "NVM Config", 0, {NULL}}, + /* UEP */ + [UEP_TYPE] = {"UEP", "UEP", LIES_WITHIN_BPDT_4K | MANDATORY_BPDT_ENTRY, + {NULL}}, + /* UFS Rate B Config */ + [UFS_RATE_B_TYPE] = {"UFS_RATE_B", "UFS Rate B Config", 0, {NULL}}, +}; + +struct ifwi_image { + /* Data read from input file. */ + struct buffer input_buff; + + /* BPDT header and entries. */ + struct buffer bpdt; + size_t input_ifwi_start_offset; + size_t input_ifwi_end_offset; + + /* Subpartition content. */ + struct buffer subpart_buf[MAX_SUBPARTS]; +} ifwi_image; + +static void alloc_buffer(struct buffer *b, size_t s, const char *n) +{ + if (buffer_create(b, s, n) == 0) + return; + + ERROR("Buffer allocation failure for %s (size = %zx).\n", n, s); + exit(-1); +} + +/* + * Read header/entry members in little-endian format. + * Returns the offset upto which the read was performed. +*/ +static size_t read_member(void *src, size_t offset, size_t size_bytes, + void *dst) +{ + switch (size_bytes) { + case 1: + *(uint8_t *)dst = read_at_le8(src, offset); + break; + case 2: + *(uint16_t *)dst = read_at_le16(src, offset); + break; + case 4: + *(uint32_t *)dst = read_at_le32(src, offset); + break; + case 8: + *(uint64_t *)dst = read_at_le64(src, offset); + break; + default: + ERROR("Read size not supported %zd\n", size_bytes); + exit(-1); + } + + return (offset + size_bytes); +} + +/* + * Convert to little endian format. + * Returns the offset upto which the fixup was performed. + */ +static size_t fix_member(void *data, size_t offset, size_t size_bytes) +{ + uint8_t *src = (uint8_t *)data + offset; + + switch (size_bytes) { + case 1: + write_at_le8(data, *(uint8_t *)src, offset); + break; + case 2: + write_at_le16(data, *(uint16_t *)src, offset); + break; + case 4: + write_at_le32(data, *(uint32_t *)src, offset); + break; + case 8: + write_at_le64(data, *(uint64_t *)src, offset); + break; + default: + ERROR("Write size not supported %zd\n", size_bytes); + exit(-1); + } + return (offset + size_bytes); +} + + +static void print_subpart_dir(struct subpart_dir *s) +{ + if (verbose == 0) + return; + + size_t i; + + printf("%-25s 0x%-23.8x\n", "Marker", s->h.marker); + printf("%-25s %-25d\n", "Num entries", s->h.num_entries); + printf("%-25s %-25d\n", "Header Version", s->h.header_version); + printf("%-25s %-25d\n", "Entry Version", s->h.entry_version); + printf("%-25s 0x%-23x\n", "Header Length", s->h.header_length); + printf("%-25s 0x%-23x\n", "Checksum", s->h.checksum); + printf("%-25s ", "Name"); + for (i = 0; i < sizeof(s->h.name); i++) + printf("%c", s->h.name[i]); + + printf("\n"); + + printf("%-25s%-25s%-25s%-25s%-25s\n", "Entry #", "Name", "Offset", + "Length", "Rsvd"); + + printf("==============================================================" + "===========================================================\n"); + + for (i = 0; i < s->h.num_entries; i++) { + printf("%-25zd%-25.12s0x%-23x0x%-23x0x%-23x\n", i+1, + s->e[i].name, s->e[i].offset, s->e[i].length, + s->e[i].rsvd); + } + + printf("==============================================================" + "===========================================================\n"); +} + +static void bpdt_print_header(struct bpdt_header *h, const char *name) +{ + if (verbose == 0) + return; + + printf("%-25s %-25s\n", "Header", name); + printf("%-25s 0x%-23.8x\n", "Signature", h->signature); + printf("%-25s %-25d\n", "Descriptor count", h->descriptor_count); + printf("%-25s %-25d\n", "BPDT Version", h->bpdt_version); + printf("%-25s 0x%-23x\n", "XOR checksum", h->xor_redundant_block); + printf("%-25s 0x%-23x\n", "IFWI Version", h->ifwi_version); + printf("%-25s 0x%-23lx\n", "FIT Tool Version", h->fit_tool_version); +} + +static void bpdt_print_entries(struct bpdt_entry *e, size_t count, + const char *name) +{ + if (verbose == 0) + return; + + printf("%s entries\n", name); + + printf("%-25s%-25s%-25s%-25s%-25s%-25s%-25s%-25s\n", "Entry #", + "Sub-Partition", "Name", "Type", "Flags", "Offset", "Size", + "File Offset"); + + printf("==============================================================" + "==============================================================" + "==============================================================" + "===============\n"); + + + size_t i; + for (i = 0; i < count; i++) { + printf("%-25zd%-25s%-25s%-25d0x%-23.08x0x%-23x0x%-23x0x%-23zx" + "\n", i+1, subparts[e[i].type].name, + subparts[e[i].type].readable_name, e[i].type, e[i].flags, + e[i].offset, e[i].size, + e[i].offset + ifwi_image.input_ifwi_start_offset); + } + + printf("==============================================================" + "==============================================================" + "==============================================================" + "===============\n"); + +} + +static void bpdt_validate_header(struct bpdt_header *h, const char *name) +{ + assert (h->signature == BPDT_SIGNATURE); + + if (h->bpdt_version != 1) { + ERROR("Invalid header : %s\n", name); + exit(-1); + } + + DEBUG("Validated header : %s\n", name); +} + +static void bpdt_read_header(void *data, struct bpdt_header *h, + const char *name) +{ + size_t offset = 0; + + offset = read_member(data, offset, sizeof(h->signature), &h->signature); + offset = read_member(data, offset, sizeof(h->descriptor_count), + &h->descriptor_count); + offset = read_member(data, offset, sizeof(h->bpdt_version), + &h->bpdt_version); + offset = read_member(data, offset, sizeof(h->xor_redundant_block), + &h->xor_redundant_block); + offset = read_member(data, offset, sizeof(h->ifwi_version), + &h->ifwi_version); + offset = read_member(data, offset, sizeof(h->fit_tool_version), + &h->fit_tool_version); + + bpdt_validate_header(h, name); + bpdt_print_header(h, name); +} + +static void bpdt_read_entries(void *data, struct bpdt *bpdt, const char *name) +{ + size_t i, offset = 0; + struct bpdt_entry *e = &bpdt->e[0]; + size_t count = bpdt->h.descriptor_count; + + for (i = 0; i < count; i++) { + offset = read_member(data, offset, sizeof(e[i].type), + &e[i].type); + offset = read_member(data, offset, sizeof(e[i].flags), + &e[i].flags); + offset = read_member(data, offset, sizeof(e[i].offset), + &e[i].offset); + offset = read_member(data, offset, sizeof(e[i].size), + &e[i].size); + } + + bpdt_print_entries(e, count, name); +} + +/* + * Given type of sub-partition, identify BPDT entry for it. + * Sub-Partition could lie either within BPDT or S-BPDT. + */ +static struct bpdt_entry *__find_entry_by_type(struct bpdt_entry *e, + size_t count, int type) +{ + size_t i; + for (i = 0; i < count; i++) { + if (e[i].type == type) + break; + } + + if (i == count) + return NULL; + + return &e[i]; +} + +static struct bpdt_entry *find_entry_by_type(int type) +{ + struct bpdt *b = buffer_get(&ifwi_image.bpdt); + if (b == NULL) + return NULL; + + struct bpdt_entry *curr = __find_entry_by_type(&b->e[0], + b->h.descriptor_count, + type); + + if (curr) + return curr; + + b = buffer_get(&ifwi_image.subpart_buf[S_BPDT_TYPE]); + if (b == NULL) + return NULL; + + return __find_entry_by_type(&b->e[0], b->h.descriptor_count, type); +} + +/* + * Find sub-partition type given its name. If the name does not exist, returns + * -1. + */ +static int find_type_by_name(const char *name) +{ + int i; + + for (i = 0; i < MAX_SUBPARTS; i++) { + if ((strlen(subparts[i].name) == strlen(name)) && + (!strcmp(subparts[i].name, name))) + break; + } + + if (i == MAX_SUBPARTS) { + ERROR("Invalid sub-partition name %s.\n", name); + return -1; + } + + return i; +} + +/* + * Read the content of a sub-partition from input file and store it in + * ifwi_image.subpart_buf[SUB-PARTITION_TYPE]. + * + * Returns the maximum offset occupied by the sub-partitions. + */ +static size_t read_subpart_buf(void *data, size_t size, struct bpdt_entry *e, + size_t count) +{ + size_t i, type; + struct buffer *buf; + size_t max_offset = 0; + + for (i = 0; i < count; i++) { + type = e[i].type; + + if (type >= MAX_SUBPARTS) { + ERROR("Invalid sub-partition type %zd.\n", type); + exit(-1); + } + + if (buffer_size(&ifwi_image.subpart_buf[type])) { + ERROR("Multiple sub-partitions of type %zd(%s).\n", + type, subparts[type].name); + exit(-1); + } + + if (e[i].size == 0) { + INFO("Dummy sub-partition %zd(%s). Skipping.\n", type, + subparts[type].name); + continue; + } + + assert((e[i].offset + e[i].size) <= size); + + /* + * Sub-partitions in IFWI image are not in the same order as + * in BPDT entries. BPDT entires are in header_order whereas + * sub-partition offsets in the image are in pack_order. + */ + if ((e[i].offset + e[i].size) > max_offset) + max_offset = e[i].offset + e[i].size; + + /* + * S-BPDT sub-partition contains information about all the + * non-critical sub-partitions. Thus, size of S-BPDT + * sub-partition equals size of S-BPDT plus size of all the + * non-critical sub-partitions. Thus, reading whole of S-BPDT + * here would be redundant as the non-critical partitions are + * read and allocated buffers separately. Also, S-BPDT requires + * special handling for reading header and entries. + */ + if (type == S_BPDT_TYPE) + continue; + + buf = &ifwi_image.subpart_buf[type]; + + alloc_buffer(buf, e[i].size, subparts[type].name); + memcpy(buffer_get(buf), (uint8_t *)data + e[i].offset, + e[i].size); + } + + assert(max_offset); + return max_offset; +} + +/* + * Allocate buffer for bpdt header, entries and all sub-partition content. + * Returns offset in data where BPDT ends. + */ +static size_t alloc_bpdt_buffer(void *data, size_t size, size_t offset, + struct buffer *b, const char *name) +{ + struct bpdt_header bpdt_header; + assert((offset + BPDT_HEADER_SIZE) < size); + bpdt_read_header((uint8_t *)data + offset, &bpdt_header, name); + + /* Buffer to read BPDT header and entries. */ + alloc_buffer(b, bpdt_size(&bpdt_header), name); + + struct bpdt *bpdt = buffer_get(b); + memcpy(&bpdt->h, &bpdt_header, BPDT_HEADER_SIZE); + + /* + * If no entries are present, maximum offset occupied is (offset + + * BPDT_HEADER_SIZE). + */ + if (bpdt->h.descriptor_count == 0) + return (offset + BPDT_HEADER_SIZE); + + /* Read all entries. */ + assert((offset + bpdt_size(&bpdt->h)) < size); + bpdt_read_entries((uint8_t *)data + offset + BPDT_HEADER_SIZE, bpdt, + name); + + /* Read all sub-partition content in subpart_buf. */ + return read_subpart_buf(data, size, &bpdt->e[0], + bpdt->h.descriptor_count); +} + +static void parse_sbpdt(void *data, size_t size) +{ + struct bpdt_entry *s; + s = find_entry_by_type(S_BPDT_TYPE); + if (!s) + return; + + assert(size > s->offset); + + alloc_bpdt_buffer(data, size, s->offset, + &ifwi_image.subpart_buf[S_BPDT_TYPE], + "S-BPDT"); +} + +static uint8_t calc_checksum(struct subpart_dir *s) +{ + size_t size = subpart_dir_size(&s->h); + uint8_t *data = (uint8_t *)s; + uint8_t checksum = 0; + size_t i; + + uint8_t old_checksum = s->h.checksum; + s->h.checksum = 0; + + for (i = 0; i < size; i++) { + checksum ^= data[i]; + } + + s->h.checksum = old_checksum; + return checksum; +} + +static void validate_subpart_dir(struct subpart_dir *s, const char *name) +{ + if ((s->h.marker != SUBPART_DIR_MARKER) || + (s->h.header_version != SUBPART_DIR_HEADER_VERSION_SUPPORTED) || + (s->h.entry_version != SUBPART_DIR_ENTRY_VERSION_SUPPORTED) || + (s->h.header_length != SUBPART_DIR_HEADER_SIZE)) { + ERROR("Invalid subpart_dir for %s.\n", name); + exit(-1); + } + + uint8_t checksum = calc_checksum(s); + + if (checksum != s->h.checksum) + ERROR("Invalid checksum for %s(Expected=0x%x,Current=0x%x).\n", + name, checksum, s->h.checksum); +} + +static void parse_subpart_dir(struct buffer *subpart_dir_buf, + struct buffer *input_buf, const char *name) +{ + struct subpart_dir_header hdr; + size_t offset = 0; + uint8_t *data = buffer_get(input_buf); + size_t size = buffer_size(input_buf); + + /* Read Subpart_Dir header. */ + assert(size >= SUBPART_DIR_HEADER_SIZE); + offset = read_member(data, offset, sizeof(hdr.marker), &hdr.marker); + offset = read_member(data, offset, sizeof(hdr.num_entries), + &hdr.num_entries); + offset = read_member(data, offset, sizeof(hdr.header_version), + &hdr.header_version); + offset = read_member(data, offset, sizeof(hdr.entry_version), + &hdr.entry_version); + offset = read_member(data, offset, sizeof(hdr.header_length), + &hdr.header_length); + offset = read_member(data, offset, sizeof(hdr.checksum), &hdr.checksum); + memcpy(hdr.name, data + offset, sizeof(hdr.name)); + offset += sizeof(hdr.name); + + assert(size > subpart_dir_size(&hdr)); + alloc_buffer(subpart_dir_buf, subpart_dir_size(&hdr), "Subpart Dir"); + memcpy(buffer_get(subpart_dir_buf), &hdr, SUBPART_DIR_HEADER_SIZE); + + /* Read Subpart Dir entries. */ + struct subpart_dir *subpart_dir = buffer_get(subpart_dir_buf); + struct subpart_dir_entry *e = &subpart_dir->e[0]; + uint32_t i; + for (i = 0; i < hdr.num_entries; i++) { + memcpy(e[i].name, data + offset, sizeof(e[i].name)); + offset += sizeof(e[i].name); + offset = read_member(data, offset, sizeof(e[i].offset), + &e[i].offset); + offset = read_member(data, offset, sizeof(e[i].length), + &e[i].length); + offset = read_member(data, offset, sizeof(e[i].rsvd), + &e[i].rsvd); + } + + validate_subpart_dir(subpart_dir, name); + print_subpart_dir(subpart_dir); +} + +/* Parse input image file to identify different sub-partitions. */ +static int ifwi_parse(void) +{ + DEBUG("Parsing IFWI image...\n"); + const char *image_name = param.image_name; + + /* Read input file. */ + struct buffer *buff = &ifwi_image.input_buff; + if (buffer_from_file(buff, image_name)) { + ERROR("Failed to read input file %s.\n", image_name); + return -1; + } + + INFO("Buffer %p size 0x%zx\n", buff->data, buff->size); + + /* Look for BPDT signature at 4K intervals. */ + size_t offset = 0; + void *data = buffer_get(buff); + + while (offset < buffer_size(buff)) { + if (read_at_le32(data, offset) == BPDT_SIGNATURE) + break; + offset += 4 * KiB; + } + + if (offset >= buffer_size(buff)) { + ERROR("Image does not contain BPDT!!\n"); + return -1; + } + + ifwi_image.input_ifwi_start_offset = offset; + INFO("BPDT starts at offset 0x%zx.\n", offset); + + data = (uint8_t *)data + offset; + size_t ifwi_size = buffer_size(buff) - offset; + + /* Read BPDT and sub-partitions. */ + uintptr_t end_offset; + end_offset = ifwi_image.input_ifwi_start_offset + + alloc_bpdt_buffer(data, ifwi_size, 0, &ifwi_image.bpdt, "BPDT"); + + /* Parse S-BPDT, if any. */ + parse_sbpdt(data, ifwi_size); + + /* + * Store end offset of IFWI. Required for copying any trailing non-IFWI + * part of the image. + * ASSUMPTION: IFWI image always ends on a 4K boundary. + */ + ifwi_image.input_ifwi_end_offset = ALIGN(end_offset, 4 * KiB); + DEBUG("Parsing done.\n"); + + return 0; +} + +/* + * This function is used by repack to count the number of BPDT and S-BPDT + * entries that are present. It frees the current buffers used by the entries + * and allocates fresh buffers that can be used for repacking. Returns BPDT + * entries which are empty and need to be filled in. + */ +static void __bpdt_reset(struct buffer *b, size_t count, size_t size) +{ + size_t bpdt_size = BPDT_HEADER_SIZE + count * BPDT_ENTRY_SIZE; + assert(size >= bpdt_size); + + /* + * If buffer does not have the required size, allocate a fresh buffer. + */ + if (buffer_size(b) != size) { + struct buffer temp; + alloc_buffer(&temp, size, b->name); + memcpy(buffer_get(&temp), buffer_get(b), buffer_size(b)); + buffer_delete(b); + *b = temp; + } + + struct bpdt *bpdt = buffer_get(b); + uint8_t *ptr = (uint8_t *)&bpdt->e[0]; + size_t entries_size = BPDT_ENTRY_SIZE * count; + + /* Zero out BPDT entries. */ + memset(ptr, 0, entries_size); + /* Fill any pad-space with FF. */ + memset(ptr + entries_size, 0xFF, size - bpdt_size); + + bpdt->h.descriptor_count = count; +} + +static void bpdt_reset(void) +{ + size_t i; + size_t bpdt_count = 0, sbpdt_count = 0, dummy_bpdt_count = 0; + + /* Count number of BPDT and S-BPDT entries. */ + for (i = 0; i < MAX_SUBPARTS; i++) { + if (buffer_size(&ifwi_image.subpart_buf[i]) == 0) { + if (subparts[i].attr & MANDATORY_BPDT_ENTRY) { + bpdt_count++; + dummy_bpdt_count++; + } + continue; + } + + if (subparts[i].attr & NON_CRITICAL_SUBPART) + sbpdt_count++; + else + bpdt_count++; + } + + DEBUG("Count: BPDT = %zd, Dummy BPDT = %zd, S-BPDT = %zd\n", bpdt_count, + dummy_bpdt_count, sbpdt_count); + + /* Update BPDT if required. */ + size_t bpdt_size = MAX(BPDT_MIN_SIZE, + BPDT_HEADER_SIZE + bpdt_count * BPDT_ENTRY_SIZE); + __bpdt_reset(&ifwi_image.bpdt, bpdt_count, bpdt_size); + + /* Update S-BPDT if required. */ + bpdt_size = ALIGN(BPDT_HEADER_SIZE + sbpdt_count * BPDT_ENTRY_SIZE, + 4 * KiB); + __bpdt_reset(&ifwi_image.subpart_buf[S_BPDT_TYPE], sbpdt_count, + bpdt_size); +} + +/* Initialize BPDT entries in header order. */ +static void bpdt_entries_init_header_order(void) +{ + int i, type; + size_t size; + + struct bpdt *bpdt, *sbpdt, *curr; + size_t bpdt_curr = 0, sbpdt_curr = 0, *count_ptr; + + bpdt = buffer_get(&ifwi_image.bpdt); + sbpdt = buffer_get(&ifwi_image.subpart_buf[S_BPDT_TYPE]); + + for (i = 0; i < MAX_SUBPARTS; i++) { + type = bpdt_header_order[i]; + size = buffer_size(&ifwi_image.subpart_buf[type]); + + if ((size == 0) && !(subparts[type].attr & + MANDATORY_BPDT_ENTRY)) + continue; + + if (subparts[type].attr & NON_CRITICAL_SUBPART) { + curr = sbpdt; + count_ptr = &sbpdt_curr; + } else { + curr = bpdt; + count_ptr = &bpdt_curr; + } + + assert(*count_ptr < curr->h.descriptor_count); + curr->e[*count_ptr].type = type; + curr->e[*count_ptr].flags = 0; + curr->e[*count_ptr].offset = 0; + curr->e[*count_ptr].size = size; + + (*count_ptr)++; + } +} + +static void pad_buffer(struct buffer *b, size_t size) +{ + size_t buff_size = buffer_size(b); + + assert(buff_size <= size); + + if (buff_size == size) + return; + + struct buffer temp; + alloc_buffer(&temp, size, b->name); + uint8_t *data = buffer_get(&temp); + + memcpy(data, buffer_get(b), buff_size); + memset(data + buff_size, 0xFF, size - buff_size); + + *b = temp; +} + +/* Initialize offsets of entries using pack order. */ +static void bpdt_entries_init_pack_order(void) +{ + int i, type; + struct bpdt_entry *curr; + size_t curr_offset, curr_end; + + curr_offset = MAX(BPDT_MIN_SIZE, buffer_size(&ifwi_image.bpdt)); + + /* + * There are two types of sub-partitions that need to be handled here: + * 1. Sub-partitions that lie within the same 4K as BPDT + * 2. Sub-partitions that lie outside the 4K of BPDT + * + * For sub-partitions of type # 1, there is no requirement on the start + * or end of the sub-partition. They need to be packed in without any + * holes left in between. If there is any empty space left after the end + * of the last sub-partition in 4K of BPDT, then that space needs to be + * padded with FF bytes, but the size of the last sub-partition remains + * unchanged. + * + * For sub-partitions of type # 2, both the start and end should be a + * multiple of 4K. If not, then it needs to be padded with FF bytes and + * size adjusted such that the sub-partition ends on 4K boundary. + */ + + /* #1 Sub-partitions that lie within same 4K as BPDT. */ + struct buffer *last_bpdt_buff = &ifwi_image.bpdt; + + for (i = 0; i < MAX_SUBPARTS; i++) { + type = bpdt_pack_order[i]; + curr = find_entry_by_type(type); + + if ((curr == NULL) || (curr->size == 0)) + continue; + + if (!(subparts[type].attr & LIES_WITHIN_BPDT_4K)) + continue; + + curr->offset = curr_offset; + curr_offset = curr->offset + curr->size; + last_bpdt_buff = &ifwi_image.subpart_buf[type]; + } + + /* Pad ff bytes if there is any empty space left in BPDT 4K. */ + curr_end = ALIGN(curr_offset, 4 * KiB); + printf("type: 1\n"); + pad_buffer(last_bpdt_buff, + buffer_size(last_bpdt_buff) + (curr_end - curr_offset)); + curr_offset = curr_end; + + /* #2 Sub-partitions that lie outside of BPDT 4K. */ + for (i = 0; i < MAX_SUBPARTS; i++) { + type = bpdt_pack_order[i]; + curr = find_entry_by_type(type); + + if ((curr == NULL) || (curr->size == 0)) + continue; + + if (subparts[type].attr & LIES_WITHIN_BPDT_4K) + continue; + + assert(curr_offset == ALIGN(curr_offset, 4 * KiB)); + curr->offset = curr_offset; + curr_end = ALIGN(curr->offset + curr->size, 4 * KiB); + curr->size = curr_end - curr->offset; + + printf("type %d, size %x, buf %zx\n", type, curr->size, buffer_size(&ifwi_image.subpart_buf[type])); + pad_buffer(&ifwi_image.subpart_buf[type], curr->size); + + curr_offset = curr_end; + } + + /* + * Update size of S-BPDT to include size of all non-critical + * sub-partitions. + * + * Assumption: S-BPDT always lies at the end of IFWI image. + */ + curr = find_entry_by_type(S_BPDT_TYPE); + assert(curr); + + assert(curr_offset == ALIGN(curr_offset, 4 * KiB)); + curr->size = curr_offset - curr->offset; +} + +/* Convert all members of BPDT to little-endian format. */ +static void bpdt_fixup_write_buffer(struct buffer *buf) +{ + struct bpdt *s = buffer_get(buf); + + struct bpdt_header *h = &s->h; + struct bpdt_entry *e = &s->e[0]; + + size_t count = h->descriptor_count; + + size_t offset = 0; + + offset = fix_member(&h->signature, offset, sizeof(h->signature)); + offset = fix_member(&h->descriptor_count, offset, + sizeof(h->descriptor_count)); + offset = fix_member(&h->bpdt_version, offset, sizeof(h->bpdt_version)); + offset = fix_member(&h->xor_redundant_block, offset, + sizeof(h->xor_redundant_block)); + offset = fix_member(&h->ifwi_version, offset, sizeof(h->ifwi_version)); + offset = fix_member(&h->fit_tool_version, offset, + sizeof(h->fit_tool_version)); + + uint32_t i; + for (i = 0; i < count; i++) { + offset = fix_member(&e[i].type, offset, sizeof(e[i].type)); + offset = fix_member(&e[i].flags, offset, sizeof(e[i].flags)); + offset = fix_member(&e[i].offset, offset, sizeof(e[i].offset)); + offset = fix_member(&e[i].size, offset, sizeof(e[i].size)); + } +} + +/* Write BPDT to output buffer after fixup. */ +static void bpdt_write(struct buffer *dst, size_t offset, struct buffer *src) +{ + bpdt_fixup_write_buffer(src); + memcpy(buffer_get(dst) + offset, buffer_get(src), buffer_size(src)); +} + +/* + * Follows these steps to re-create image: + * 1. Write any non-IFWI prefix. + * 2. Write out BPDT header and entries. + * 3. Write sub-partition buffers to respective offsets. + * 4. Write any non-IFWI suffix. + * + * While performing the above steps, make sure that any empty holes are filled + * with FF. + */ +static void ifwi_write(const char *image_name) +{ + struct bpdt_entry *s = find_entry_by_type(S_BPDT_TYPE); + assert(s); + + size_t ifwi_start, ifwi_end, file_end; + + ifwi_start = ifwi_image.input_ifwi_start_offset; + ifwi_end = ifwi_start + ALIGN(s->offset + s->size, 4 * KiB); + file_end = ifwi_end + (buffer_size(&ifwi_image.input_buff) - + ifwi_image.input_ifwi_end_offset); + + struct buffer b; + + alloc_buffer(&b, file_end, "Final-IFWI"); + + uint8_t *input_data = buffer_get(&ifwi_image.input_buff); + uint8_t *output_data = buffer_get(&b); + + DEBUG("ifwi_start:0x%zx, ifwi_end:0x%zx, file_end:0x%zx\n", ifwi_start, + ifwi_end, file_end); + + /* Copy non-IFWI prefix, if any. */ + memcpy(output_data, input_data, ifwi_start); + + DEBUG("Copied non-IFWI prefix (offset=0x0, size=0x%zx).\n", ifwi_start); + + struct buffer ifwi; + buffer_splice(&ifwi, &b, ifwi_start, ifwi_end - ifwi_start); + uint8_t *ifwi_data = buffer_get(&ifwi); + + /* Copy sub-partitions using pack_order. */ + struct bpdt_entry *curr; + struct buffer *subpart_buf; + int i, type; + for (i = 0; i < MAX_SUBPARTS; i++) { + type = bpdt_pack_order[i]; + + if (type == S_BPDT_TYPE) + continue; + + curr = find_entry_by_type(type); + + if ((curr == NULL) || (curr->size == 0)) + continue; + + subpart_buf = &ifwi_image.subpart_buf[type]; + + DEBUG("curr->offset=0x%x, curr->size=0x%x, type=%d, " + "write_size=0x%zx\n", curr->offset, curr->size, type, + buffer_size(subpart_buf)); + + assert((curr->offset + buffer_size(subpart_buf)) <= + buffer_size(&ifwi)); + + memcpy(ifwi_data + curr->offset, buffer_get(subpart_buf), + buffer_size(subpart_buf)); + } + + /* Copy non-IFWI suffix, if any. */ + if (ifwi_end != file_end) { + memcpy(output_data + ifwi_end, + input_data + ifwi_image.input_ifwi_end_offset, + file_end - ifwi_end); + DEBUG("Copied non-IFWI suffix (offset=0x%zx,size=0x%zx).\n", + ifwi_end, file_end - ifwi_end); + } + + /* + * Convert BPDT to little-endian format and write it to output buffer. + * S-BPDT is written first and then BPDT. + */ + bpdt_write(&ifwi, s->offset, &ifwi_image.subpart_buf[S_BPDT_TYPE]); + bpdt_write(&ifwi, 0, &ifwi_image.bpdt); + + if (buffer_write_file(&b, image_name)) { + ERROR("File write error\n"); + exit(-1); + } + + buffer_delete(&b); + printf("Image written successfully to %s.\n", image_name); +} + +/* + * Calculate size and offset of each sub-partition again since it might have + * changed because of add/delete operation. Also, re-create BPDT and S-BPDT + * entries and write back the new IFWI image to file. + */ +static void ifwi_repack(void) +{ + bpdt_reset(); + bpdt_entries_init_header_order(); + bpdt_entries_init_pack_order(); + + struct bpdt *b = buffer_get(&ifwi_image.bpdt); + bpdt_print_entries(&b->e[0], b->h.descriptor_count, "BPDT"); + + b = buffer_get(&ifwi_image.subpart_buf[S_BPDT_TYPE]); + bpdt_print_entries(&b->e[0], b->h.descriptor_count, "S-BPDT"); + + DEBUG("Repack done.. writing image.\n"); + ifwi_write(param.image_name); +} + +static void init_subpart_dir_header(struct subpart_dir_header *hdr, + size_t count, const char *name) +{ + memset(hdr, 0, sizeof(*hdr)); + + hdr->marker = SUBPART_DIR_MARKER; + hdr->num_entries = count; + hdr->header_version = SUBPART_DIR_HEADER_VERSION_SUPPORTED; + hdr->entry_version = SUBPART_DIR_ENTRY_VERSION_SUPPORTED; + hdr->header_length = SUBPART_DIR_HEADER_SIZE; + memcpy(hdr->name, name, sizeof(hdr->name)); +} + +static size_t init_subpart_dir_entry(struct subpart_dir_entry *e, + struct buffer *b, size_t offset) +{ + memset(e, 0, sizeof(*e)); + + assert(strlen(b->name) <= sizeof(e->name)); + strncpy((char *)e->name, (char *)b->name, sizeof(e->name)); + e->offset = offset; + e->length = buffer_size(b); + + return (offset + buffer_size(b)); +} + +static void init_manifest_header(struct manifest_header *hdr, size_t size) +{ + memset(hdr, 0, sizeof(*hdr)); + + hdr->header_type = 0x4; + assert((MANIFEST_HDR_SIZE % DWORD_SIZE) == 0); + hdr->header_length = MANIFEST_HDR_SIZE / DWORD_SIZE; + hdr->header_version = 0x10000; + hdr->vendor = 0x8086; + + struct tm *local_time; + time_t curr_time; + char buffer[11]; + + curr_time = time(NULL); + local_time = localtime(&curr_time); + strftime(buffer, sizeof(buffer), "0x%Y%m%d", local_time); + hdr->date = strtoul(buffer, NULL, 16); + + assert((size % DWORD_SIZE) == 0); + hdr->size = size / DWORD_SIZE; + hdr->id = MANIFEST_ID_MAGIC; +} + +static void init_signed_pkg_info_ext(struct signed_pkg_info_ext *ext, + size_t count, const char *name) +{ + memset(ext, 0, sizeof(*ext)); + + ext->ext_type = SIGNED_PKG_INFO_EXT_TYPE; + ext->ext_length = SIGNED_PKG_INFO_EXT_SIZE + count * MODULE_SIZE; + memcpy(ext->name, name, sizeof(ext->name)); +} + +static void subpart_dir_fixup_write_buffer(struct buffer *buf) +{ + struct subpart_dir *s = buffer_get(buf); + struct subpart_dir_header *h = &s->h; + struct subpart_dir_entry *e = &s->e[0]; + + size_t count = h->num_entries; + size_t offset = 0; + + offset = fix_member(&h->marker, offset, sizeof(h->marker)); + offset = fix_member(&h->num_entries, offset, sizeof(h->num_entries)); + offset = fix_member(&h->header_version, offset, + sizeof(h->header_version)); + offset = fix_member(&h->entry_version, offset, + sizeof(h->entry_version)); + offset = fix_member(&h->header_length, offset, + sizeof(h->header_length)); + offset = fix_member(&h->checksum, offset, sizeof(h->checksum)); + offset += sizeof(h->name); + + uint32_t i; + for (i = 0; i < count; i++) { + offset += sizeof(e[i].name); + offset = fix_member(&e[i].offset, offset, sizeof(e[i].offset)); + offset = fix_member(&e[i].length, offset, sizeof(e[i].length)); + offset = fix_member(&e[i].rsvd, offset, sizeof(e[i].rsvd)); + } +} + +static void create_subpart(struct buffer *dst, struct buffer *info[], + size_t count, const char *name) +{ + struct buffer subpart_dir_buff; + size_t size = SUBPART_DIR_HEADER_SIZE + count * SUBPART_DIR_ENTRY_SIZE; + + alloc_buffer(&subpart_dir_buff, size, "subpart-dir"); + + struct subpart_dir_header *h = buffer_get(&subpart_dir_buff); + struct subpart_dir_entry *e = (struct subpart_dir_entry *)(h + 1); + + init_subpart_dir_header(h, count, name); + + size_t curr_offset = size; + size_t i; + + for (i = 0; i < count; i++) { + curr_offset = init_subpart_dir_entry(&e[i], info[i], + curr_offset); + } + + alloc_buffer(dst, curr_offset, name); + uint8_t *data = buffer_get(dst); + + for (i = 0; i < count; i++) { + memcpy(data + e[i].offset, buffer_get(info[i]), + buffer_size(info[i])); + } + + h->checksum = calc_checksum(buffer_get(&subpart_dir_buff)); + + struct subpart_dir *dir = buffer_get(&subpart_dir_buff); + + print_subpart_dir(dir); + + subpart_dir_fixup_write_buffer(&subpart_dir_buff); + memcpy(data, dir, buffer_size(&subpart_dir_buff)); + + buffer_delete(&subpart_dir_buff); +} + +static enum ifwi_ret ibbp_dir_add(int type) +{ +#define DUMMY_IBB_SIZE (4 * KiB) + + assert (type == IBB_TYPE); + + /* + * Entry # 1 - IBBP.man + * Contains manifest header and signed pkg info extension. + */ + struct buffer manifest; + size_t size = MANIFEST_HDR_SIZE + SIGNED_PKG_INFO_EXT_SIZE; + alloc_buffer(&manifest, size, "IBBP.man"); + + struct manifest_header *man_hdr = buffer_get(&manifest); + init_manifest_header(man_hdr, size); + + struct signed_pkg_info_ext *ext; + ext = (struct signed_pkg_info_ext *)(man_hdr + 1); + + init_signed_pkg_info_ext(ext, 0, subparts[type].name); + + /* Entry # 2 - IBBL */ + struct buffer ibbl; + if (buffer_from_file(&ibbl, param.file_name)) + return COMMAND_ERR; + + /* Entry # 3 - IBB */ + struct buffer ibb; + alloc_buffer(&ibb, DUMMY_IBB_SIZE, "IBB"); + memset(buffer_get(&ibb), 0xFF, DUMMY_IBB_SIZE); + + /* Create subpartition. */ + struct buffer *info[] = { + &manifest, &ibbl, &ibb, + }; + create_subpart(&ifwi_image.subpart_buf[type], &info[0], + ARRAY_SIZE(info), subparts[type].name); + + return REPACK_REQUIRED; +} + +static enum ifwi_ret ifwi_raw_add(int type) +{ + if (buffer_from_file(&ifwi_image.subpart_buf[type], param.file_name)) + return COMMAND_ERR; + + return REPACK_REQUIRED; +} + +static enum ifwi_ret ifwi_dir_add(int type) +{ + if (!(subparts[type].attr & CONTAINS_DIR) || + (subparts[type].dir_ops.dir_add == NULL)) { + ERROR("Sub-Partition %s(%d) does not support dir ops.\n", + subparts[type].name, type); + return COMMAND_ERR; + } + + if (!param.dentry_name) { + ERROR("%s: -e option required\n", __func__); + return COMMAND_ERR; + } + + return subparts[type].dir_ops.dir_add(type); +} + +static enum ifwi_ret ifwi_add(void) +{ + if (!param.file_name) { + ERROR("%s: -f option required\n", __func__); + return COMMAND_ERR; + } + + if (!param.subpart_name) { + ERROR("%s: -n option required\n", __func__); + return COMMAND_ERR; + } + + int type = find_type_by_name(param.subpart_name); + if (type == -1) + return COMMAND_ERR; + + const struct subpart_info *curr_subpart = &subparts[type]; + + if (curr_subpart->attr & AUTO_GENERATED) { + ERROR("Cannot add auto-generated sub-partitions.\n"); + return COMMAND_ERR; + } + + if (buffer_size(&ifwi_image.subpart_buf[type])) { + ERROR("Image already contains sub-partition %s(%d).\n", + param.subpart_name, type); + return COMMAND_ERR; + } + + if (param.dir_ops) + return ifwi_dir_add(type); + + return ifwi_raw_add(type); +} + +static enum ifwi_ret ifwi_delete(void) +{ + if (!param.subpart_name) { + ERROR("%s: -n option required\n", __func__); + return COMMAND_ERR; + } + + int type = find_type_by_name(param.subpart_name); + if (type == -1) + return COMMAND_ERR; + + const struct subpart_info *curr_subpart = &subparts[type]; + + if (curr_subpart->attr & AUTO_GENERATED) { + ERROR("Cannot delete auto-generated sub-partitions.\n"); + return COMMAND_ERR; + } + + if (buffer_size(&ifwi_image.subpart_buf[type]) == 0) { + INFO("Image does not contain sub-partition %s(%d).\n", + param.subpart_name, type); + return NO_ACTION_REQUIRED; + } + + buffer_delete(&ifwi_image.subpart_buf[type]); + + INFO("Sub-Partition %s(%d) deleted.\n", subparts[type].name, type); + + return REPACK_REQUIRED; +} + +static enum ifwi_ret ifwi_dir_extract(int type) +{ + if (!(subparts[type].attr & CONTAINS_DIR)) { + ERROR("Sub-Partition %s(%d) does not support dir ops.\n", + subparts[type].name, type); + return COMMAND_ERR; + } + + if (!param.dentry_name) { + ERROR("%s: -e option required.\n", __func__); + return COMMAND_ERR; + } + + struct buffer subpart_dir_buff; + parse_subpart_dir(&subpart_dir_buff, &ifwi_image.subpart_buf[type], + subparts[type].name); + + uint32_t i; + struct subpart_dir *s = buffer_get(&subpart_dir_buff); + + for (i = 0; i < s->h.num_entries; i++) { + if (!strncmp((char *)s->e[i].name, param.dentry_name, + sizeof(s->e[i].name))) + break; + } + + if (i == s->h.num_entries) { + ERROR("File %s not found in subpartition for %s.\n", + param.file_name, param.subpart_name); + exit(-1); + } + + struct buffer dst; + + DEBUG("Splicing buffer at 0x%x size 0x%x\n", s->e[i].offset, + s->e[i].length); + buffer_splice(&dst, &ifwi_image.subpart_buf[type], s->e[i].offset, + s->e[i].length); + + if (buffer_write_file(&dst, param.file_name)) + return COMMAND_ERR; + + INFO("Sub-Partition %s(%d) stored in %s.\n", param.subpart_name, type, + param.file_name); + + return NO_ACTION_REQUIRED; +} + +static enum ifwi_ret ifwi_raw_extract(int type) +{ + if (buffer_write_file(&ifwi_image.subpart_buf[type], param.file_name)) + return COMMAND_ERR; + + INFO("Sub-Partition %s(%d) stored in %s.\n", param.subpart_name, type, + param.file_name); + + return NO_ACTION_REQUIRED; +} + +static enum ifwi_ret ifwi_extract(void) +{ + if (!param.file_name) { + ERROR("%s: -f option required\n", __func__); + return COMMAND_ERR; + } + + if (!param.subpart_name) { + ERROR("%s: -n option required\n", __func__); + return COMMAND_ERR; + } + + int type = find_type_by_name(param.subpart_name); + if (type == -1) + return COMMAND_ERR; + + if (type == S_BPDT_TYPE) { + INFO("Tool does not support raw extract for %s\n", + param.subpart_name); + return NO_ACTION_REQUIRED; + } + + if (buffer_size(&ifwi_image.subpart_buf[type]) == 0) { + ERROR("Image does not contain sub-partition %s(%d).\n", + param.subpart_name, type); + return COMMAND_ERR; + } + + INFO("Extracting sub-partition %s(%d).\n", param.subpart_name, type); + if (param.dir_ops) + return ifwi_dir_extract(type); + + return ifwi_raw_extract(type); +} + +static enum ifwi_ret ifwi_print(void) +{ + verbose += 2; + + struct bpdt *b = buffer_get(&ifwi_image.bpdt); + + bpdt_print_header(&b->h, "BPDT"); + bpdt_print_entries(&b->e[0], b->h.descriptor_count, "BPDT"); + + b = buffer_get(&ifwi_image.subpart_buf[S_BPDT_TYPE]); + bpdt_print_header(&b->h, "S-BPDT"); + bpdt_print_entries(&b->e[0], b->h.descriptor_count, "S-BPDT"); + + if (param.dir_ops == 0) { + verbose -= 2; + return NO_ACTION_REQUIRED; + } + + int i; + struct buffer subpart_dir_buf; + for (i = 0; i < MAX_SUBPARTS ; i++) { + if (!(subparts[i].attr & CONTAINS_DIR) || + (buffer_size(&ifwi_image.subpart_buf[i]) == 0)) + continue; + + parse_subpart_dir(&subpart_dir_buf, &ifwi_image.subpart_buf[i], + subparts[i].name); + buffer_delete(&subpart_dir_buf); + } + + verbose -= 2; + + return NO_ACTION_REQUIRED; +} + +static enum ifwi_ret ifwi_raw_replace(int type) +{ + if (buffer_size(&ifwi_image.subpart_buf[type]) == 0) { + INFO("Image does not contain sub-partition %s(%d).\n", + param.subpart_name, type); + } else + buffer_delete(&ifwi_image.subpart_buf[type]); + + return ifwi_raw_add(type); +} + +static enum ifwi_ret ifwi_dir_replace(int type) +{ + if (buffer_size(&ifwi_image.subpart_buf[type]) == 0) { + ERROR("Image does not contain sub-partition %s(%d).\n", + param.subpart_name, type); + return COMMAND_ERR; + } + + if (!(subparts[type].attr & CONTAINS_DIR)) { + ERROR("Sub-Partition %s(%d) does not support dir ops.\n", + subparts[type].name, type); + return COMMAND_ERR; + } + + if (!param.dentry_name) { + ERROR("%s: -e option required.\n", __func__); + return COMMAND_ERR; + } + + struct buffer subpart_dir_buf; + parse_subpart_dir(&subpart_dir_buf, &ifwi_image.subpart_buf[type], + subparts[type].name); + + uint32_t i; + struct subpart_dir *s = buffer_get(&subpart_dir_buf); + + for (i = 0; i < s->h.num_entries; i++) { + if (!strcmp((char *)s->e[i].name, param.dentry_name)) + break; + } + + if (i == s->h.num_entries) { + ERROR("Entry %s not found in subpartition for %s.\n", + param.dentry_name, param.subpart_name); + exit(-1); + } + + struct buffer b; + if (buffer_from_file(&b, param.file_name)) { + ERROR("Failed to read %s\n", param.file_name); + exit(-1); + } + + struct buffer dst; + size_t dst_size = buffer_size(&ifwi_image.subpart_buf[type] + + buffer_size(&b) - s->e[i].length); + size_t subpart_start = s->e[i].offset; + size_t subpart_end = s->e[i].offset + s->e[i].length; + + alloc_buffer(&dst, dst_size, ifwi_image.subpart_buf[type].name); + + uint8_t *src_data = buffer_get(&ifwi_image.subpart_buf[type]); + uint8_t *dst_data = buffer_get(&dst); + size_t curr_offset = 0; + + /* Copy data before the sub-partition entry. */ + memcpy(dst_data + curr_offset, src_data, subpart_start); + curr_offset += subpart_start; + + /* Copy sub-partition entry. */ + memcpy(dst_data + curr_offset, buffer_get(&b), buffer_size(&b)); + curr_offset += buffer_size(&b); + + /* Copy remaining data. */ + memcpy(dst_data + curr_offset, src_data + subpart_end, + buffer_size(&ifwi_image.subpart_buf[type]) - subpart_end); + + /* Update sub-partition buffer. */ + int offset = s->e[i].offset; + buffer_delete(&ifwi_image.subpart_buf[type]); + ifwi_image.subpart_buf[type] = dst; + + /* Update length of entry in the subpartition. */ + s->e[i].length = buffer_size(&b); + buffer_delete(&b); + + /* Adjust offsets of affected entries in subpartition. */ + offset = s->e[i].offset - offset; + for (; i < s->h.num_entries; i++) { + s->e[i].offset += offset; + } + + /* Re-calculate checksum. */ + s->h.checksum = calc_checksum(s); + + /* Convert members to litte-endian. */ + subpart_dir_fixup_write_buffer(&subpart_dir_buf); + + memcpy(dst_data, buffer_get(&subpart_dir_buf), + buffer_size(&subpart_dir_buf)); + + buffer_delete(&subpart_dir_buf); + + return REPACK_REQUIRED; +} + +static enum ifwi_ret ifwi_replace(void) +{ + if (!param.file_name) { + ERROR("%s: -f option required\n", __func__); + return COMMAND_ERR; + } + + if (!param.subpart_name) { + ERROR("%s: -n option required\n", __func__); + return COMMAND_ERR; + } + + int type = find_type_by_name(param.subpart_name); + if (type == -1) + return COMMAND_ERR; + + const struct subpart_info *curr_subpart = &subparts[type]; + + if (curr_subpart->attr & AUTO_GENERATED) { + ERROR("Cannot replace auto-generated sub-partitions.\n"); + return COMMAND_ERR; + } + + if (param.dir_ops) + return ifwi_dir_replace(type); + + return ifwi_raw_replace(type); +} + +static enum ifwi_ret ifwi_create(void) +{ + /* + * Create peels off any non-IFWI content present in the input buffer and + * creates output file with only the IFWI present. + */ + + if (!param.file_name) { + ERROR("%s: -f option required\n", __func__); + return COMMAND_ERR; + } + + /* Peel off any non-IFWI prefix. */ + buffer_seek(&ifwi_image.input_buff, + ifwi_image.input_ifwi_start_offset); + /* Peel off any non-IFWI suffix. */ + buffer_set_size(&ifwi_image.input_buff, + ifwi_image.input_ifwi_end_offset - + ifwi_image.input_ifwi_start_offset); + + /* + * Adjust start and end offset of IFWI now that non-IFWI prefix is gone. + */ + ifwi_image.input_ifwi_end_offset -= ifwi_image.input_ifwi_start_offset; + ifwi_image.input_ifwi_start_offset = 0; + + param.image_name = param.file_name; + + return REPACK_REQUIRED; +} + +struct command { + const char *name; + const char *optstring; + enum ifwi_ret (*function)(void); +}; + +static const struct command commands[] = { + {"add", "f:n:e:dvh?", ifwi_add}, + {"create", "f:vh?", ifwi_create}, + {"delete", "f:n:vh?", ifwi_delete}, + {"extract", "f:n:e:dvh?", ifwi_extract}, + {"print", "dh?", ifwi_print}, + {"replace", "f:n:e:dvh?", ifwi_replace}, +}; + +static struct option long_options[] = { + {"subpart_dentry", required_argument, 0, 'e'}, + {"file", required_argument, 0, 'f'}, + {"help", required_argument, 0, 'h'}, + {"name", required_argument, 0, 'n'}, + {"dir_ops", no_argument, 0, 'd'}, + {"verbose", no_argument, 0, 'v'}, + {NULL, 0, 0, 0 } +}; + +static void usage(const char *name) +{ + printf("ifwitool: Utility for IFWI manipulation\n\n" + "USAGE:\n" + " %s [-h]\n" + " %s FILE COMMAND [PARAMETERS]\n\n" + "COMMANDs:\n" + " add -f FILE -n NAME [-d -e ENTRY]\n" + " create -f FILE\n" + " delete -n NAME\n" + " extract -f FILE -n NAME [-d -e ENTRY]\n" + " print\n" + " replace -f FILE -n NAME [-d -e ENTRY]\n" + "OPTIONs:\n" + " -f FILE : File to read/write/create/extract\n" + " -d : Perform directory operation\n" + " -e ENTRY: Name of directory entry to operate on\n" + " -v : Verbose level\n" + " -h : Help message\n" + " -n NAME : Name of sub-partition to operate on\n", + name, name + ); + + printf("\nNAME should be one of:\n"); + int i; + for (i = 0; i < MAX_SUBPARTS; i++) + printf("%s(%s)\n", subparts[i].name, subparts[i].readable_name); + printf("\n"); +} + +int main(int argc, char **argv) +{ + if (argc < 3) { + usage(argv[0]); + return 1; + } + + param.image_name = argv[1]; + char *cmd = argv[2]; + optind += 2; + + uint32_t i; + + for (i = 0; i < ARRAY_SIZE(commands); i++) { + if (strcmp(cmd, commands[i].name) != 0) + continue; + + int c; + + while (1) { + int option_index; + + c = getopt_long(argc, argv, commands[i].optstring, + long_options, &option_index); + + if (c == -1) + break; + + /* Filter out illegal long options. */ + if (strchr(commands[i].optstring, c) == NULL) { + ERROR("%s: invalid option -- '%c'\n", argv[0], + c); + c = '?'; + } + + switch(c) { + case 'n': + param.subpart_name = optarg; + break; + case 'f': + param.file_name = optarg; + break; + case 'd': + param.dir_ops = 1; + break; + case 'e': + param.dentry_name = optarg; + case 'v': + verbose++; + break; + case 'h': + case '?': + usage(argv[0]); + return 1; + default: + break; + } + } + + if (ifwi_parse()) { + ERROR("%s: ifwi parsing failed\n", argv[0]); + return 1; + } + + enum ifwi_ret ret = commands[i].function(); + + if (ret == COMMAND_ERR) { + ERROR("%s: failed execution\n", argv[0]); + return 1; + } + + if (ret == REPACK_REQUIRED) + ifwi_repack(); + + return 0; + } + + ERROR("%s: invalid command\n", argv[0]); + return 1; +}

1 0

Patch set updated for coreboot: Revert "mainboard/lenovo/t400: Add initial hybrid graphics support"
by Patrick Rudolph 28 May '16

28 May '16

Patrick Rudolph (siro(a)das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12895 -gerrit commit 6972b9d79615bde730fa9438ecffc6a49fb646ce Author: Patrick Rudolph <siro(a)das-labor.org> Date: Mon Dec 28 13:21:43 2015 +0100 Revert "mainboard/lenovo/t400: Add initial hybrid graphics support" This reverts commit 59597ead1f26d4c18997bda81b2ec33e52973b80. Will be replaced by lenovo common hybrid driver. Change-Id: I994114734fa931926c34ed04305cddfbeb429b62 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- src/mainboard/lenovo/t400/cmos.default | 1 - src/mainboard/lenovo/t400/cmos.layout | 7 -- src/mainboard/lenovo/t400/romstage.c | 143 --------------------------------- 3 files changed, 151 deletions(-) diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default index 98ce970..ac9f96d 100644 --- a/src/mainboard/lenovo/t400/cmos.default +++ b/src/mainboard/lenovo/t400/cmos.default @@ -13,4 +13,3 @@ sticky_fn=Disable power_management_beeps=Enable low_battery_beep=Enable sata_mode=AHCI -hybrid_graphics_mode=Integrated Only \ No newline at end of file diff --git a/src/mainboard/lenovo/t400/cmos.layout b/src/mainboard/lenovo/t400/cmos.layout index 8e642f8..0c12458 100644 --- a/src/mainboard/lenovo/t400/cmos.layout +++ b/src/mainboard/lenovo/t400/cmos.layout @@ -79,10 +79,6 @@ entries # coreboot config options: northbridge 941 3 e 11 gfx_uma_size -# coreboot config options: graphics -944 2 e 12 hybrid_graphics_mode -#946 6 r 0 unused - # coreboot config options: EC 952 8 h 0 volume @@ -136,9 +132,6 @@ enumerations 11 3 128M 11 5 96M 11 6 160M -12 0 Integrated Only -12 1 Discrete Only -12 2 Switchable # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c index 147131f..486b738 100644 --- a/src/mainboard/lenovo/t400/romstage.c +++ b/src/mainboard/lenovo/t400/romstage.c @@ -1,7 +1,6 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering * Copyright (C) 2012 secunet Security Networks AG * * This program is free software; you can redistribute it and/or @@ -34,118 +33,6 @@ #define LPC_DEV PCI_DEV(0, 0x1f, 0) #define MCH_DEV PCI_DEV(0, 0, 0) -#define HYBRID_GRAPHICS_INTEGRATED_ONLY 0 -#define HYBRID_GRAPHICS_DISCRETE_ONLY 1 -#define HYBRID_GRAPHICS_SWITCHABLE 2 - -#define HYBRID_GRAPHICS_GP_LVL_BITS 0x004a0000 -#define HYBRID_GRAPHICS_GP_LVL2_BITS 0x00020000 - -#define HYBRID_GRAPHICS_DETECT_GP_BITS 0x00000010 - -#define HYBRID_GRAPHICS_INT_CLAIM_VGA 0x2 -#define HYBRID_GRAPHICS_SEC_VGA_EN 0x2 - -static void hybrid_graphics_configure_switchable_graphics(bool enable) -{ - uint32_t tmp; - - if (enable) { - /* Disable integrated graphics legacy VGA cycles */ - tmp = pci_read_config16(MCH_DEV, D0F0_GGC); - pci_write_config16(MCH_DEV, D0F0_GGC, tmp | HYBRID_GRAPHICS_INT_CLAIM_VGA); - - /* Enable secondary VGA controller */ - tmp = pci_read_config16(MCH_DEV, D0F0_DEVEN); - pci_write_config16(MCH_DEV, D0F0_DEVEN, tmp | HYBRID_GRAPHICS_SEC_VGA_EN); - } - else { - /* Enable integrated graphics legacy VGA cycles */ - tmp = pci_read_config16(MCH_DEV, D0F0_GGC); - pci_write_config16(MCH_DEV, D0F0_GGC, tmp & ~HYBRID_GRAPHICS_INT_CLAIM_VGA); - - /* Disable secondary VGA controller */ - tmp = pci_read_config16(MCH_DEV, D0F0_DEVEN); - pci_write_config16(MCH_DEV, D0F0_DEVEN, tmp & ~HYBRID_GRAPHICS_SEC_VGA_EN); - } -} - -static void hybrid_graphics_set_up_gpio(void) -{ - uint32_t tmp; - - /* Enable hybrid graphics GPIO lines */ - tmp = inl(DEFAULT_GPIOBASE + GP_IO_USE_SEL); - tmp = tmp | HYBRID_GRAPHICS_GP_LVL_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_IO_USE_SEL); - - tmp = inl(DEFAULT_GPIOBASE + GP_IO_USE_SEL2); - tmp = tmp | HYBRID_GRAPHICS_GP_LVL2_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_IO_USE_SEL2); - - /* Set hybrid graphics control GPIO lines to output */ - tmp = inl(DEFAULT_GPIOBASE + GP_IO_SEL); - tmp = tmp & ~HYBRID_GRAPHICS_GP_LVL_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_IO_SEL); - - tmp = inl(DEFAULT_GPIOBASE + GP_IO_SEL2); - tmp = tmp & ~HYBRID_GRAPHICS_GP_LVL2_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_IO_SEL2); - - /* Set hybrid graphics detect GPIO lines to input */ - tmp = inl(DEFAULT_GPIOBASE + GP_IO_SEL); - tmp = tmp | HYBRID_GRAPHICS_DETECT_GP_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_IO_SEL); -} - -static bool hybrid_graphics_installed(void) -{ - if (inl(DEFAULT_GPIOBASE + GP_LVL) & HYBRID_GRAPHICS_DETECT_GP_BITS) - return false; - else - return true; -} - -static void hybrid_graphics_switch_to_integrated_graphics(void) -{ - uint32_t tmp; - - /* Disable switchable graphics */ - hybrid_graphics_configure_switchable_graphics(false); - - /* Configure muxes */ - tmp = inl(DEFAULT_GPIOBASE + GP_LVL); - tmp = tmp & ~HYBRID_GRAPHICS_GP_LVL_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_LVL); - - tmp = inl(DEFAULT_GPIOBASE + GP_LVL2); - tmp = tmp & ~HYBRID_GRAPHICS_GP_LVL2_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_LVL2); -} - -static void hybrid_graphics_switch_to_discrete_graphics(void) -{ - uint32_t tmp; - - /* Disable switchable graphics */ - hybrid_graphics_configure_switchable_graphics(false); - - /* Configure muxes */ - tmp = inl(DEFAULT_GPIOBASE + GP_LVL); - tmp = tmp | HYBRID_GRAPHICS_GP_LVL_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_LVL); - - tmp = inl(DEFAULT_GPIOBASE + GP_LVL2); - tmp = tmp | HYBRID_GRAPHICS_GP_LVL2_BITS; - outl(tmp, DEFAULT_GPIOBASE + GP_LVL2); -} - -static void hybrid_graphics_switch_to_dual_graphics(void) -{ - /* Enable switchable graphics */ - hybrid_graphics_configure_switchable_graphics(true); -} - static void default_southbridge_gpio_setup(void) { outl(0x197e23fe, DEFAULT_GPIOBASE + GP_IO_USE_SEL); @@ -207,31 +94,6 @@ void main(unsigned long bist) default_southbridge_gpio_setup(); - uint8_t hybrid_graphics_mode = HYBRID_GRAPHICS_INTEGRATED_ONLY; - get_option(&hybrid_graphics_mode, "hybrid_graphics_mode"); - - /* Set up hybrid graphics */ - hybrid_graphics_set_up_gpio(); - if (hybrid_graphics_installed()) { - /* Select appropriate hybrid graphics device */ - printk(BIOS_DEBUG, "Hybrid graphics available, setting mode %d\n", hybrid_graphics_mode); - if (hybrid_graphics_mode == HYBRID_GRAPHICS_INTEGRATED_ONLY) - hybrid_graphics_switch_to_integrated_graphics(); - else if (hybrid_graphics_mode == HYBRID_GRAPHICS_DISCRETE_ONLY) - hybrid_graphics_switch_to_discrete_graphics(); - else if (hybrid_graphics_mode == HYBRID_GRAPHICS_SWITCHABLE) - hybrid_graphics_switch_to_integrated_graphics(); - /* Switchable graphics are fully enabled after raminit */ - /* FIXME - * Enabling switchable graphics prevents bootup! - * Debug and fix appropriately... - */ - } - else { - printk(BIOS_DEBUG, "Hybrid graphics not installed\n"); - hybrid_graphics_switch_to_integrated_graphics(); - } - /* ASPM related setting, set early by original BIOS. */ DMIBAR16(0x204) &= ~(3 << 10); @@ -311,11 +173,6 @@ void main(unsigned long bist) outl(inl(DEFAULT_GPIOBASE + 0x38) & ~0x400, DEFAULT_GPIOBASE + 0x38); cbmem_initted = !cbmem_recovery(s3resume); - - if (hybrid_graphics_installed()) - if (hybrid_graphics_mode == HYBRID_GRAPHICS_SWITCHABLE) - hybrid_graphics_switch_to_dual_graphics(); - #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so * this is not a resume. In that case we just create the cbmem toc.

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Patch set updated for coreboot: drivers/lenovo: Add hybrid graphics driver
by Patrick Rudolph 28 May '16

28 May '16

Patrick Rudolph (siro(a)das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12896 -gerrit commit 0a0f76416db9ed9020730d9c5bdf7a7c5cf27c62 Author: Patrick Rudolph <siro(a)das-labor.org> Date: Sat Dec 26 08:35:08 2015 +0100 drivers/lenovo: Add hybrid graphics driver Add a universal hybrid graphics driver compatible with all supported lenovo devices. Hybrid graphics allows to connect the display panel to either of one GPUs. As there are only two GPUs one GPIO needs to be toggled. In case the discrete GPU is activated the panel is routed to it. On deactivation the panel is routed to the integrated GPU. On lenovo laptops the dGPU is always connected to PEG10 and it is save to disable the PEG slot on dGPU deactivation. Use common gpio.c for southbridge I82801IX. Tested on Lenovo T520 using Nvidia NVS 5200m. Removed Lenovo T430s from the list of supported devices, as the T430s only supports "muxless Optimus". Depends on change id: Iccc6d254bafb927b6470704cec7c9dd7528e2c68 Ibb54c03fd83a529d1ceccfb2c33190e7d42224d8 I8bd981c4696c174152cf41caefa6c083650d283a Iaf0c2f941f2625a5547f9cba79da1b173da6f295 I994114734fa931926c34ed04305cddfbeb429b62 Change-Id: I9b80b31a7749bdf893ed3b772a6505c9f29a56d1 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- src/drivers/lenovo/Kconfig | 13 ++++ src/drivers/lenovo/Makefile.inc | 1 + src/drivers/lenovo/hybrid_graphics.c | 125 ++++++++++++++++++++++++++++++++ src/mainboard/lenovo/t400/Kconfig | 1 + src/mainboard/lenovo/t400/cmos.default | 1 + src/mainboard/lenovo/t400/cmos.layout | 3 + src/mainboard/lenovo/t420/cmos.default | 1 + src/mainboard/lenovo/t420/cmos.layout | 5 +- src/mainboard/lenovo/t420s/Kconfig | 1 + src/mainboard/lenovo/t420s/cmos.default | 1 + src/mainboard/lenovo/t420s/cmos.layout | 5 +- src/mainboard/lenovo/t520/Kconfig | 1 + src/mainboard/lenovo/t520/cmos.default | 1 + src/mainboard/lenovo/t520/cmos.layout | 5 +- src/mainboard/lenovo/t530/Kconfig | 1 + src/mainboard/lenovo/t530/cmos.default | 1 + src/mainboard/lenovo/t530/cmos.layout | 6 +- src/southbridge/intel/i82801ix/Kconfig | 1 + 18 files changed, 169 insertions(+), 4 deletions(-) diff --git a/src/drivers/lenovo/Kconfig b/src/drivers/lenovo/Kconfig index f20f3b2..f8eddf2 100644 --- a/src/drivers/lenovo/Kconfig +++ b/src/drivers/lenovo/Kconfig @@ -27,3 +27,16 @@ config DIGITIZER_ABSENT endchoice endif + +config DRIVERS_LENOVO_HYBRID_GRAPHICS + bool + default n + +config HYBRID_GRAPHICS_GPIO_NUM + depends on DRIVERS_LENOVO_HYBRID_GRAPHICS + int + default 52 + help + Set a default GPIO that sets the panel LVDS signal routing to + integrated or discrete GPU. + diff --git a/src/drivers/lenovo/Makefile.inc b/src/drivers/lenovo/Makefile.inc index c50db5b..66f8594 100644 --- a/src/drivers/lenovo/Makefile.inc +++ b/src/drivers/lenovo/Makefile.inc @@ -1 +1,2 @@ ramstage-$(CONFIG_DRIVERS_LENOVO_WACOM) += wacom.c +ramstage-$(CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS) += hybrid_graphics.c diff --git a/src/drivers/lenovo/hybrid_graphics.c b/src/drivers/lenovo/hybrid_graphics.c new file mode 100644 index 0000000..9b46646 --- /dev/null +++ b/src/drivers/lenovo/hybrid_graphics.c @@ -0,0 +1,125 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015-2016 Patrick Rudolph + * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <types.h> +#include <string.h> +#include <option.h> +#include <device/device.h> +#include <device/pci_def.h> +#include <device/pci_ops.h> +#include <device/pci_ids.h> +#include <device/pci.h> +#include <console/console.h> +#include <southbridge/intel/common/gpio.h> + +/* Hybrid graphics allows to connect LVDS interface to either iGPU + * or dGPU depending on GPIO level. + * Nvidia is calling this functionality "muxed Optimus". + * Some devices, like T430s, only support "muxless Optimus" where the + * Intel GPU is always connected to the panel. + * As it is only linked on lenovo and only executed if the GPU exists + * we know for sure that the dGPU is there and connected to first PEG slot. + * + * Note: Once native gfx init is done for AMD or Nvida graphic + * cards, merge this code. + */ + +#define HYBRID_GRAPHICS_INTEGRATED 0 +#define HYBRID_GRAPHICS_DISCRETE 1 + +static void hybrid_graphics_disable_peg(struct device *dev) +{ + struct device *peg_dev; + + /* connect LVDS interface to iGPU */ + set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, GPIO_LEVEL_HIGH); + printk(BIOS_DEBUG, "Hybrid graphics: Switching panel to integrated GPU.\n"); + dev->enabled = 0; + + /* Disable PEG10 */ + peg_dev = dev_find_slot(0, PCI_DEVFN(1, 0)); + if (peg_dev) + peg_dev->enabled = 0; + + printk(BIOS_DEBUG, "Hybrid graphics: Disabled PEG10.\n"); +} + +/* Called before VGA enable bits are set and only if dGPU + * is present. Enable/disable VGA devices here. */ +static void hybrid_graphics_enable_peg(struct device *dev) +{ + u8 hybrid_graphics_mode; + + hybrid_graphics_mode = HYBRID_GRAPHICS_INTEGRATED; + get_option(&hybrid_graphics_mode, "hybrid_graphics_mode"); + + if (hybrid_graphics_mode == HYBRID_GRAPHICS_DISCRETE) { + /* connect LVDS interface to dGPU */ + set_gpio(CONFIG_HYBRID_GRAPHICS_GPIO_NUM, GPIO_LEVEL_LOW); + printk(BIOS_DEBUG, "Hybrid graphics: Switching panel to discrete GPU.\n"); + dev->enabled = 1; + + /* Disable IGD */ + dev = dev_find_slot(0, PCI_DEVFN(2, 0)); + if (dev && dev->ops->disable) + dev->ops->disable(dev); + dev->enabled = 0; + + printk(BIOS_DEBUG, "Hybrid graphics: Disabled IGD.\n"); + } else + hybrid_graphics_disable_peg(dev); +} + +static struct pci_operations pci_dev_ops_pci = { + .set_subsystem = pci_dev_set_subsystem, +}; + +struct device_operations hybrid_graphics_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = pci_dev_init, + .scan_bus = 0, + .enable = hybrid_graphics_enable_peg, + .disable = hybrid_graphics_disable_peg, + .ops_pci = &pci_dev_ops_pci, +}; + +static const unsigned short pci_device_ids_nvidia[] = { + 0x0ffc, /* Nvidia NVS Quadro K1000m Lenovo W530 */ + 0x0def, /* NVidia NVS 5400m Lenovo T430/T530 */ + 0x0dfc, /* NVidia NVS 5200m Lenovo T430s */ + 0x1056, /* NVidia NVS 4200m Lenovo T420/T520 */ + 0x1057, /* NVidia NVS 4200m Lenovo T420/T520 */ + 0x0a6c, /* NVidia NVS 3100m Lenovo T410/T510 */ + 0 }; + +static const struct pci_driver hybrid_peg_nvidia __pci_driver = { + .ops = &hybrid_graphics_ops, + .vendor = PCI_VENDOR_ID_NVIDIA, + .devices = pci_device_ids_nvidia, +}; + +static const unsigned short pci_device_ids_amd[] = { + 0x9591, /* ATI Mobility Radeon HD 3650 Lenovo T500/W500 */ + 0x95c4, /* ATI Mobility Radeon HD 3470 Lenovo T400/R400 */ + 0 }; + +static const struct pci_driver hybrid_peg_amd __pci_driver = { + .ops = &hybrid_graphics_ops, + .vendor = PCI_VENDOR_ID_ATI, + .devices = pci_device_ids_amd, +}; diff --git a/src/mainboard/lenovo/t400/Kconfig b/src/mainboard/lenovo/t400/Kconfig index d74a813..a444bf8 100644 --- a/src/mainboard/lenovo/t400/Kconfig +++ b/src/mainboard/lenovo/t400/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG select INTEL_INT15 select SUPERIO_NSC_PC87382 + select DRIVERS_LENOVO_HYBRID_GRAPHICS config MAINBOARD_DIR string diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default index ac9f96d..98ce970 100644 --- a/src/mainboard/lenovo/t400/cmos.default +++ b/src/mainboard/lenovo/t400/cmos.default @@ -13,3 +13,4 @@ sticky_fn=Disable power_management_beeps=Enable low_battery_beep=Enable sata_mode=AHCI +hybrid_graphics_mode=Integrated Only \ No newline at end of file diff --git a/src/mainboard/lenovo/t400/cmos.layout b/src/mainboard/lenovo/t400/cmos.layout index 0c12458..b0131f6 100644 --- a/src/mainboard/lenovo/t400/cmos.layout +++ b/src/mainboard/lenovo/t400/cmos.layout @@ -78,6 +78,7 @@ entries # coreboot config options: northbridge 941 3 e 11 gfx_uma_size +944 2 e 12 hybrid_graphics_mode # coreboot config options: EC 952 8 h 0 volume @@ -132,6 +133,8 @@ enumerations 11 3 128M 11 5 96M 11 6 160M +12 0 Integrated Only +12 1 Discrete Only # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default index 1b8e212..3a82c97 100644 --- a/src/mainboard/lenovo/t420/cmos.default +++ b/src/mainboard/lenovo/t420/cmos.default @@ -14,3 +14,4 @@ fn_ctrl_swap=Disable sticky_fn=Disable trackpoint=Enable hyper_threading=Enable +hybrid_graphics_mode=Integrated Only \ No newline at end of file diff --git a/src/mainboard/lenovo/t420/cmos.layout b/src/mainboard/lenovo/t420/cmos.layout index bf0f195..58a4abe 100644 --- a/src/mainboard/lenovo/t420/cmos.layout +++ b/src/mainboard/lenovo/t420/cmos.layout @@ -77,7 +77,8 @@ entries # coreboot config options: northbridge 432 3 e 11 gfx_uma_size -#435 5 r 0 unused +435 2 e 12 hybrid_graphics_mode +#437 3 r 0 unused 440 8 h 0 volume @@ -135,6 +136,8 @@ enumerations 11 4 160M 11 5 192M 11 6 224M +12 0 Integrated Only +12 1 Discrete Only # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t420s/Kconfig b/src/mainboard/lenovo/t420s/Kconfig index 935e659..feacb51 100644 --- a/src/mainboard/lenovo/t420s/Kconfig +++ b/src/mainboard/lenovo/t420s/Kconfig @@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_INT15 select SANDYBRIDGE_IVYBRIDGE_LVDS select MAINBOARD_HAS_LPC_TPM + select DRIVERS_LENOVO_HYBRID_GRAPHICS # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default index 1b8e212..3a82c97 100644 --- a/src/mainboard/lenovo/t420s/cmos.default +++ b/src/mainboard/lenovo/t420s/cmos.default @@ -14,3 +14,4 @@ fn_ctrl_swap=Disable sticky_fn=Disable trackpoint=Enable hyper_threading=Enable +hybrid_graphics_mode=Integrated Only \ No newline at end of file diff --git a/src/mainboard/lenovo/t420s/cmos.layout b/src/mainboard/lenovo/t420s/cmos.layout index 4362840..3521849 100644 --- a/src/mainboard/lenovo/t420s/cmos.layout +++ b/src/mainboard/lenovo/t420s/cmos.layout @@ -77,7 +77,8 @@ entries # coreboot config options: northbridge 432 3 e 11 gfx_uma_size -#435 5 r 0 unused +435 2 e 12 hybrid_graphics_mode +#437 3 r 0 unused 440 8 h 0 volume @@ -135,6 +136,8 @@ enumerations 11 4 160M 11 5 192M 11 6 224M +12 0 Integrated Only +12 1 Discrete Only # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t520/Kconfig b/src/mainboard/lenovo/t520/Kconfig index c70581a..ee5dd81 100644 --- a/src/mainboard/lenovo/t520/Kconfig +++ b/src/mainboard/lenovo/t520/Kconfig @@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_INT15 select SANDYBRIDGE_IVYBRIDGE_LVDS select MAINBOARD_HAS_LPC_TPM + select DRIVERS_LENOVO_HYBRID_GRAPHICS # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default index 00e8863..ad7dcf5 100644 --- a/src/mainboard/lenovo/t520/cmos.default +++ b/src/mainboard/lenovo/t520/cmos.default @@ -15,3 +15,4 @@ sticky_fn=Disable trackpoint=Enable hyper_threading=Enable backlight=Both +hybrid_graphics_mode=Integrated Only \ No newline at end of file diff --git a/src/mainboard/lenovo/t520/cmos.layout b/src/mainboard/lenovo/t520/cmos.layout index 2cf3629..044c310 100644 --- a/src/mainboard/lenovo/t520/cmos.layout +++ b/src/mainboard/lenovo/t520/cmos.layout @@ -77,7 +77,8 @@ entries # coreboot config options: northbridge 432 3 e 11 gfx_uma_size -#435 5 r 0 unused +435 2 e 12 hybrid_graphics_mode +#437 3 r 0 unused 440 8 h 0 volume # SandyBridge MRC Scrambler Seed values @@ -134,6 +135,8 @@ enumerations 11 4 160M 11 5 192M 11 6 224M +12 0 Integrated Only +12 1 Discrete Only # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index c1d0625..085711b 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_DO_NATIVE_VGA_INIT # default to native vga init select ENABLE_VMX select MAINBOARD_HAS_LPC_TPM + select DRIVERS_LENOVO_HYBRID_GRAPHICS # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default index 00e8863..ad7dcf5 100644 --- a/src/mainboard/lenovo/t530/cmos.default +++ b/src/mainboard/lenovo/t530/cmos.default @@ -15,3 +15,4 @@ sticky_fn=Disable trackpoint=Enable hyper_threading=Enable backlight=Both +hybrid_graphics_mode=Integrated Only \ No newline at end of file diff --git a/src/mainboard/lenovo/t530/cmos.layout b/src/mainboard/lenovo/t530/cmos.layout index e21c197..0e28bdd 100644 --- a/src/mainboard/lenovo/t530/cmos.layout +++ b/src/mainboard/lenovo/t530/cmos.layout @@ -77,7 +77,8 @@ entries # coreboot config options: northbridge 432 3 e 11 gfx_uma_size -#435 5 r 0 unused +435 2 e 12 hybrid_graphics_mode +#437 3 r 0 unused 440 8 h 0 volume @@ -135,6 +136,9 @@ enumerations 11 4 160M 11 5 192M 11 6 224M +12 0 Integrated Only +12 1 Discrete Only + # ----------------------------------------------------------------- checksums diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index 2822774..b3e5069 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -23,6 +23,7 @@ config SOUTHBRIDGE_INTEL_I82801IX select USE_WATCHDOG_ON_BOOT select HAVE_SMI_HANDLER select HAVE_USBDEBUG_OPTIONS + select SOUTHBRIDGE_INTEL_COMMON_GPIO if SOUTHBRIDGE_INTEL_I82801IX

1 0

Patch set updated for coreboot: [intel/apollolake]: Add support to enable google ChromeEC
by Shaunak Saha 28 May '16

28 May '16

Shaunak Saha (shaunak.saha(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14967 -gerrit commit 0e62ca610b5c684dacf491c12c775228dee14efb Author: Shaunak Saha <shaunak.saha(a)intel.com> Date: Wed May 25 11:34:43 2016 -0700 [intel/apollolake]: Add support to enable google ChromeEC ChromeEC is needed for EC controlled features to work properly. This patch adds neccessary support in soc/intel so that mainboard asl files can include the ChromeEC e.g. PNOT method and LPCB and also the nvs fields. BUG = 53096 TEST = This patch is needed by the mainboard specific ASL change to include src/ec/google/chromeec/acpi/ec.asl Change-Id: Icecc437df05cd3efb41579317a353fd22526e0c9 Signed-off-by: Shaunak Saha <shaunak.saha(a)intel.com> --- src/soc/intel/apollolake/acpi/cpu.asl | 118 ++++++++++++++++++++++++++ src/soc/intel/apollolake/acpi/globalnvs.asl | 7 +- src/soc/intel/apollolake/acpi/lpc.asl | 23 +++++ src/soc/intel/apollolake/acpi/southbridge.asl | 3 + src/soc/intel/apollolake/include/soc/nvs.h | 7 +- 5 files changed, 156 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/apollolake/acpi/cpu.asl b/src/soc/intel/apollolake/acpi/cpu.asl new file mode 100644 index 0000000..a202ceb --- /dev/null +++ b/src/soc/intel/apollolake/acpi/cpu.asl @@ -0,0 +1,118 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* These devices are created at runtime */ +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) +External (\_PR.CP04, DeviceObj) +External (\_PR.CP05, DeviceObj) +External (\_PR.CP06, DeviceObj) +External (\_PR.CP07, DeviceObj) + +/* Notify OS to re-read CPU tables, assuming ^2 CPU count */ +Method (PNOT) +{ + If (LGreaterEqual (\PCNT, 2)) { + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST + } + If (LGreaterEqual (\PCNT, 4)) { + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST + } + If (LGreaterEqual (\PCNT, 8)) { + Notify (\_PR.CP04, 0x81) // _CST + Notify (\_PR.CP05, 0x81) // _CST + Notify (\_PR.CP06, 0x81) // _CST + Notify (\_PR.CP07, 0x81) // _CST + } +} + +/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */ +Method (PPCN) +{ + If (LGreaterEqual (\PCNT, 2)) { + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC + } + If (LGreaterEqual (\PCNT, 4)) { + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC + } + If (LGreaterEqual (\PCNT, 8)) { + Notify (\_PR.CP04, 0x80) // _PPC + Notify (\_PR.CP05, 0x80) // _PPC + Notify (\_PR.CP06, 0x80) // _PPC + Notify (\_PR.CP07, 0x80) // _PPC + } +} + +/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */ +Method (TNOT) +{ + If (LGreaterEqual (\PCNT, 2)) { + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC + } + If (LGreaterEqual (\PCNT, 4)) { + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC + } + If (LGreaterEqual (\PCNT, 8)) { + Notify (\_PR.CP04, 0x82) // _TPC + Notify (\_PR.CP05, 0x82) // _TPC + Notify (\_PR.CP06, 0x82) // _TPC + Notify (\_PR.CP07, 0x82) // _TPC + } +} + +/* Return a package containing enabled processor entries */ +Method (PPKG) +{ + If (LGreaterEqual (\PCNT, 8)) { + Return (Package() + { + \_PR.CP00, + \_PR.CP01, + \_PR.CP02, + \_PR.CP03, + \_PR.CP04, + \_PR.CP05, + \_PR.CP06, + \_PR.CP07 + }) + } ElseIf (LGreaterEqual (\PCNT, 4)) { + Return (Package () + { + \_PR.CP00, + \_PR.CP01, + \_PR.CP02, + \_PR.CP03 + }) + } ElseIf (LGreaterEqual (\PCNT, 2)) { + Return (Package () + { + \_PR.CP00, + \_PR.CP01 + }) + } Else { + Return (Package () + { + \_PR.CP00 + }) + } +} diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index 2ef5031..e081dcb 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -26,8 +26,13 @@ External (NVSA) OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { - /* Nothing here yet, folks */ + /* Miscellaneous */ Offset (0x00), + PCNT, 8, // 0x01 - Processor Count + PPCM, 8, // 0x02 - Max PPC State + LIDS, 8, // 0x03 - LID State + PWRS, 8, // 0x04 - AC Power State + DPTE, 8, // 0x05 - Enable DPTF /* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */ Offset (0x100), diff --git a/src/soc/intel/apollolake/acpi/lpc.asl b/src/soc/intel/apollolake/acpi/lpc.asl new file mode 100644 index 0000000..749daf7 --- /dev/null +++ b/src/soc/intel/apollolake/acpi/lpc.asl @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Intel LPC Bus Device - 0:1f.0 */ + +Device (LPCB) +{ + Name (_ADR, 0x001f0000) +} diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index 9409d5e..44c440e 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -27,3 +27,6 @@ #include "gpio.asl" #include "xhci.asl" + +/* LPC */ +#include "lpc.asl" diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h index 8b3a3af..4768aaa 100644 --- a/src/soc/intel/apollolake/include/soc/nvs.h +++ b/src/soc/intel/apollolake/include/soc/nvs.h @@ -28,7 +28,12 @@ struct global_nvs_t { /* Miscellaneous */ - uint8_t unused[256]; + uint8_t pcnt; /* 0x01 - Processor Count */ + uint8_t ppcm; /* 0x02 - Max PPC State */ + uint8_t lids; /* 0x03 - LID State */ + uint8_t pwrs; /* 0x04 - AC Power State */ + uint8_t dpte; /* 0x05 - Enable DPTF */ + uint8_t unused[251]; /* ChromeOS specific (0x100 - 0xfff) */ chromeos_acpi_t chromeos;

1 0

Patch set updated for coreboot: [intel/apollolake]: Add support to enable google ChromeEC
by Shaunak Saha 28 May '16

28 May '16

Shaunak Saha (shaunak.saha(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14967 -gerrit commit 5a8c7a397fc23b705494ecb8afe7ef570833e859 Author: Shaunak Saha <shaunak.saha(a)intel.com> Date: Wed May 25 11:34:43 2016 -0700 [intel/apollolake]: Add support to enable google ChromeEC ChromeEC is needed for EC controlled features to work properly. This patch adds neccessary support in soc/intel so that mainboard asl files can include the ChromeEC e.g. PNOT method and LPCB and also the nvs fields. BUG = 53096 TEST = This patch is needed by the mainboard specific ASL change to include src/ec/google/chromeec/acpi/ec.asl Change-Id: Icecc437df05cd3efb41579317a353fd22526e0c9 Signed-off-by: Shaunak Saha <shaunak.saha(a)intel.com> --- src/soc/intel/apollolake/acpi/cpu.asl | 118 ++++++++++++++++++++++++++ src/soc/intel/apollolake/acpi/globalnvs.asl | 7 +- src/soc/intel/apollolake/acpi/lpc.asl | 23 +++++ src/soc/intel/apollolake/acpi/southbridge.asl | 3 + src/soc/intel/apollolake/include/soc/nvs.h | 7 +- 5 files changed, 156 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/apollolake/acpi/cpu.asl b/src/soc/intel/apollolake/acpi/cpu.asl new file mode 100644 index 0000000..a202ceb --- /dev/null +++ b/src/soc/intel/apollolake/acpi/cpu.asl @@ -0,0 +1,118 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* These devices are created at runtime */ +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) +External (\_PR.CP04, DeviceObj) +External (\_PR.CP05, DeviceObj) +External (\_PR.CP06, DeviceObj) +External (\_PR.CP07, DeviceObj) + +/* Notify OS to re-read CPU tables, assuming ^2 CPU count */ +Method (PNOT) +{ + If (LGreaterEqual (\PCNT, 2)) { + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST + } + If (LGreaterEqual (\PCNT, 4)) { + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST + } + If (LGreaterEqual (\PCNT, 8)) { + Notify (\_PR.CP04, 0x81) // _CST + Notify (\_PR.CP05, 0x81) // _CST + Notify (\_PR.CP06, 0x81) // _CST + Notify (\_PR.CP07, 0x81) // _CST + } +} + +/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */ +Method (PPCN) +{ + If (LGreaterEqual (\PCNT, 2)) { + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC + } + If (LGreaterEqual (\PCNT, 4)) { + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC + } + If (LGreaterEqual (\PCNT, 8)) { + Notify (\_PR.CP04, 0x80) // _PPC + Notify (\_PR.CP05, 0x80) // _PPC + Notify (\_PR.CP06, 0x80) // _PPC + Notify (\_PR.CP07, 0x80) // _PPC + } +} + +/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */ +Method (TNOT) +{ + If (LGreaterEqual (\PCNT, 2)) { + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC + } + If (LGreaterEqual (\PCNT, 4)) { + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC + } + If (LGreaterEqual (\PCNT, 8)) { + Notify (\_PR.CP04, 0x82) // _TPC + Notify (\_PR.CP05, 0x82) // _TPC + Notify (\_PR.CP06, 0x82) // _TPC + Notify (\_PR.CP07, 0x82) // _TPC + } +} + +/* Return a package containing enabled processor entries */ +Method (PPKG) +{ + If (LGreaterEqual (\PCNT, 8)) { + Return (Package() + { + \_PR.CP00, + \_PR.CP01, + \_PR.CP02, + \_PR.CP03, + \_PR.CP04, + \_PR.CP05, + \_PR.CP06, + \_PR.CP07 + }) + } ElseIf (LGreaterEqual (\PCNT, 4)) { + Return (Package () + { + \_PR.CP00, + \_PR.CP01, + \_PR.CP02, + \_PR.CP03 + }) + } ElseIf (LGreaterEqual (\PCNT, 2)) { + Return (Package () + { + \_PR.CP00, + \_PR.CP01 + }) + } Else { + Return (Package () + { + \_PR.CP00 + }) + } +} diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index 2ef5031..6a8a7dd 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -26,8 +26,13 @@ External (NVSA) OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { - /* Nothing here yet, folks */ + /* Miscellaneous */ Offset (0x00), + PCNT, 8, // 0x01 - Processor Count + PPCM, 8, // 0x02 - Max PPC State + LIDS, 8, // 0x03 - LID State + PWRS, 8, // 0x04 - AC Power State + DPTE, 8, // 0x05 - Enable DPTF /* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */ Offset (0x100), diff --git a/src/soc/intel/apollolake/acpi/lpc.asl b/src/soc/intel/apollolake/acpi/lpc.asl new file mode 100644 index 0000000..749daf7 --- /dev/null +++ b/src/soc/intel/apollolake/acpi/lpc.asl @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Intel LPC Bus Device - 0:1f.0 */ + +Device (LPCB) +{ + Name (_ADR, 0x001f0000) +} diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index 9409d5e..44c440e 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -27,3 +27,6 @@ #include "gpio.asl" #include "xhci.asl" + +/* LPC */ +#include "lpc.asl" diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h index 8b3a3af..4768aaa 100644 --- a/src/soc/intel/apollolake/include/soc/nvs.h +++ b/src/soc/intel/apollolake/include/soc/nvs.h @@ -28,7 +28,12 @@ struct global_nvs_t { /* Miscellaneous */ - uint8_t unused[256]; + uint8_t pcnt; /* 0x01 - Processor Count */ + uint8_t ppcm; /* 0x02 - Max PPC State */ + uint8_t lids; /* 0x03 - LID State */ + uint8_t pwrs; /* 0x04 - AC Power State */ + uint8_t dpte; /* 0x05 - Enable DPTF */ + uint8_t unused[251]; /* ChromeOS specific (0x100 - 0xfff) */ chromeos_acpi_t chromeos;

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Patch merged into coreboot/master: acpi_device: Add support for writing ACPI Device Properties
by gerrit＠coreboot.org 28 May '16

28 May '16

the following patch was just integrated into master: commit 559e947306d9a8684f7c0879c122a9b3b3f87c16 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue May 10 13:18:17 2016 -0700 acpi_device: Add support for writing ACPI Device Properties The recent ACPI specification extensions have formally defined a method for describing device information with a key=value format that is modeled after the Devicetree/DTS format using a special crafted object named _DSD with a specific UUID for this format. There are three defined Device Property types: Integers, Strings, and References. It is also possible to have arrays of these properties under one key=value pair. Strings and References are both represented as character arrays but result in different generated ACPI OpCodes. Various helpers are provided for writing the Device Property header (to fill in the object name and UUID) and footer (to fill in the property count and device length values) as well as for writing the different Device Property types. A specific helper is provided for writing the defined GPIO binding Device Property that is used to allow GPIOs to be referred to by name rather than resource index. This is all documented in the _DSD Device Properties UUID document: http://uefi.org/sites/default/files/resources/_DSD-device-properties-UUID.p… This will be used by device drivers to provide device properties that are consumed by the operating system. Devicetree bindings are often described in the linux kernel at Documentation/devicetree/bindings/ A sample driver here has an input GPIO that it needs to describe to the kernel driver: chip.h: struct drivers_generic_sample_config { struct acpi_gpio mode_gpio; }; sample.c: static void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_generic_sample_config *config = dev->chip_info; const char *path = acpi_device_path(dev); ... acpi_device_write_gpio(&config->mode_gpio); ... acpi_dp_write_header(); acpi_dp_write_gpio("mode-gpio", path, 0, 0, 0); acpi_dp_write_footer(); ... } devicetree.cb: device pci 1f.0 on chip drivers/generic/sample register "mode_gpio" = "ACPI_GPIO_INPUT(GPP_B1)" device generic 0 on end end end SSDT.dsl: Name (_CRS, ResourceTemplate () { GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionInputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer) { 25 } }) Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () {"mode-gpio", Package () { \_SB.PCI0.LPCB, 0, 0, 1 }} } }) Change-Id: I93ffd09e59d05c09e38693e221a87085469be3ad Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://review.coreboot.org/14937 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/14937 for details. -gerrit

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Patch merged into coreboot/master: acpi_device: Add support for writing ACPI SPI descriptors
by gerrit＠coreboot.org 28 May '16

28 May '16

the following patch was just integrated into master: commit 70c86d9b265a7ea821fcd1b0684d60393d9908c1 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue May 10 07:26:34 2016 -0700 acpi_device: Add support for writing ACPI SPI descriptors Add required definitions to describe an ACPI SPI bus and a method to write the SpiSerialBus() descriptor to the SSDT. This will be used by device drivers to describe their SPI resources to the OS. SPI devices are not currently enumerated in the devicetree but can be enumerated by device drivers directly. generic.c: void acpi_fill_ssdt_generator(struct device *dev) { struct acpi_spi spi = { .device_select = dev->path->generic.device.id, .device_select_polarity = SPI_POLARITY_LOW, .spi_wire_mode = SPI_4_WIRE_MODE, .speed = 1000 * 1000; /* 1 mHz */ .data_bit_length = 8, .clock_phase = SPI_CLOCK_PHASE_FIRST, .clock_polarity = SPI_POLARITY_LOW, .resource = acpi_device_path(dev->bus->dev) }; ... acpi_device_write_spi(&spi); ... } devicetree.cb: device pci 1e.2 on chip drivers/spi/generic device generic 0 on end end end SSDT.dsl: SpiSerialBus (0, PolarityLow, FourWireMode, 8, ControllerInitiated, 1000000, ClockPolarityLow, ClockPhaseFirst, "\\_SB.PCI0.SPI0", 0, ResourceConsumer) Change-Id: I0ef83dc111ac6c19d68872ab64e1e5e3a7756cae Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://review.coreboot.org/14936 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/14936 for details. -gerrit

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Patch merged into coreboot/master: acpi_device: Add support for writing ACPI I2C descriptors
by gerrit＠coreboot.org 28 May '16

28 May '16

the following patch was just integrated into master: commit 1010b4aeacd709500e31ec10d96187f8835a4f2d Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Mon May 9 20:10:47 2016 -0700 acpi_device: Add support for writing ACPI I2C descriptors Add required definitions to describe an ACPI I2C bus and a method to write the I2cSerialBus() descriptor to the SSDT. This will be used by device drivers to describe their I2C resources to the OS. The devicetree i2c device can supply the address and 7 or 10 bit mode as well as indicate the GPIO controller device, and the bus speed can be fixed or configured by the driver. chip.h: struct drivers_i2c_generic_config { enum i2c_speed bus_speed; }; generic.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_i2c_generic_config *config = dev->chip_info; struct acpi_i2c i2c = { .address = dev->path->i2c.device, .mode_10bit = dev->path.i2c.mode_10bit, .speed = config->bus_speed ? : I2C_SPEED_FAST, .resource = acpi_device_path(dev->bus->dev) }; ... acpi_device_write_i2c(&i2c); ... } devicetree.cb: device pci 15.0 on chip drivers/i2c/generic device i2c 10.0 on end end end SSDT.dsl: I2cSerialBus (0x10, ControllerInitiated, 400000, AddressingMode7Bit, "\\_SB.PCI0.I2C0", 0, ResourceConsumer) Change-Id: I598401ac81a92c72f19da0271af1e218580a6c49 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://review.coreboot.org/14935 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/14935 for details. -gerrit

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Patch merged into coreboot/master: acpi_device: Add support for writing ACPI GPIO descriptors
by gerrit＠coreboot.org 28 May '16

28 May '16

the following patch was just integrated into master: commit cfb6ea7e659be66c90a94841a33e69afa8163eab Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Mon May 9 17:08:38 2016 -0700 acpi_device: Add support for writing ACPI GPIO descriptors Add definitions to describe GPIOs in generated ACPI objects and a method to write a GpioIo() or GpioInt() descriptor to the SSDT. ACPI GPIOs have many possible configuration options and a structure is created to describe it accurately in ACPI terms. There are many shared descriptor fields between GpioIo() and GpioInt() so the same function can write both types. GpioInt shares many properties with ACPI Interrupts and the same types are re-used here where possible. One addition is that GpioInt can be configured to trigger on both low and high edge transitions. One descriptor can describe multiple GPIO pins (limited to 8 in this implementation) that all share configuration and controller and are used by the same device scope. Accurately referring to the GPIO controller that this pin is connected to requires the SoC/board to implement a function handler for acpi_gpio_path(), or for the caller to provide this directly as a string in the acpi_gpio->reference variable. This will get used by device drivers to describe their resources in the SSDT. Here is a sample for a Maxim 98357A I2S codec which has a GPIO for power and channel selection called "sdmode". chip.h: struct drivers_generic_max98357a_config { struct acpi_gpio sdmode_gpio; }; max98357a.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_generic_max98357a_config *config = dev->chip_info; ... acpi_device_write_gpio(&config->sdmode_gpio); ... } devicetree.cb: device pci 1f.3 on chip drivers/generic/max98357a register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPP_C5)" device generic 0 on end end end SSDT.dsl: GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer, ,) { 53 } Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Change-Id: Ibf5bab9c4bf6f21252373fb013e78f872550b167 Reviewed-on: https://review.coreboot.org/14934 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/14934 for details. -gerrit

1 0

Patch set updated for coreboot: acpi_device: Add support for writing ACPI Device Properties
by Duncan Laurie 28 May '16

28 May '16

Duncan Laurie (dlaurie(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14937 -gerrit commit a06bd2613ab28aec7e00aa8b9e1a82354ebdc67d Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue May 10 13:18:17 2016 -0700 acpi_device: Add support for writing ACPI Device Properties The recent ACPI specification extensions have formally defined a method for describing device information with a key=value format that is modeled after the Devicetree/DTS format using a special crafted object named _DSD with a specific UUID for this format. There are three defined Device Property types: Integers, Strings, and References. It is also possible to have arrays of these properties under one key=value pair. Strings and References are both represented as character arrays but result in different generated ACPI OpCodes. Various helpers are provided for writing the Device Property header (to fill in the object name and UUID) and footer (to fill in the property count and device length values) as well as for writing the different Device Property types. A specific helper is provided for writing the defined GPIO binding Device Property that is used to allow GPIOs to be referred to by name rather than resource index. This is all documented in the _DSD Device Properties UUID document: http://uefi.org/sites/default/files/resources/_DSD-device-properties-UUID.p… This will be used by device drivers to provide device properties that are consumed by the operating system. Devicetree bindings are often described in the linux kernel at Documentation/devicetree/bindings/ A sample driver here has an input GPIO that it needs to describe to the kernel driver: chip.h: struct drivers_generic_sample_config { struct acpi_gpio mode_gpio; }; sample.c: static void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_generic_sample_config *config = dev->chip_info; const char *path = acpi_device_path(dev); ... acpi_device_write_gpio(&config->mode_gpio); ... acpi_dp_write_header(); acpi_dp_write_gpio("mode-gpio", path, 0, 0, 0); acpi_dp_write_footer(); ... } devicetree.cb: device pci 1f.0 on chip drivers/generic/sample register "mode_gpio" = "ACPI_GPIO_INPUT(GPP_B1)" device generic 0 on end end end SSDT.dsl: Name (_CRS, ResourceTemplate () { GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionInputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer) { 25 } }) Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () {"mode-gpio", Package () { \_SB.PCI0.LPCB, 0, 0, 1 }} } }) Change-Id: I93ffd09e59d05c09e38693e221a87085469be3ad Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/arch/x86/acpi_device.c | 135 ++++++++++++++++++++++++++++++++ src/arch/x86/include/arch/acpi_device.h | 60 ++++++++++++++ 2 files changed, 195 insertions(+) diff --git a/src/arch/x86/acpi_device.c b/src/arch/x86/acpi_device.c index 073b938..69d44f3 100644 --- a/src/arch/x86/acpi_device.c +++ b/src/arch/x86/acpi_device.c @@ -24,6 +24,15 @@ #include <gpio.h> #endif +/* + * Pointer to length field in device properties package + * Location is set in dp_header() and length filled in by dp_footer() + */ +static char *dp_count_ptr; + +/* Count of the number of device properties in the current set */ +static char dp_count; + /* Write empty word value and return pointer to it */ static void *acpi_device_write_zero_len(void) { @@ -453,3 +462,129 @@ void acpi_device_write_spi(const struct acpi_spi *spi) /* Fill in SPI Descriptor Length */ acpi_device_fill_len(desc_length); } + +/* Write a header for using _DSD to export Device Properties */ +void acpi_dp_write_header(void) +{ + /* Name (_DSD) */ + acpigen_write_name("_DSD"); + + /* Package (2) */ + acpigen_write_package(2); + + /* ToUUID (ACPI_DP_UUID) */ + acpigen_write_uuid(ACPI_DP_UUID); + + /* Package (X) */ + acpigen_emit_byte(0x12); + acpigen_write_len_f(); + dp_count_ptr = acpigen_get_current(); + acpigen_emit_byte(0); /* Number of elements, filled by dp_footer */ + + /* Reset element counter */ + dp_count = 0; +} + +/* Fill in length values from writing Device Properties */ +void acpi_dp_write_footer(void) +{ + /* Patch device property element count */ + *dp_count_ptr = dp_count; + + acpigen_pop_len(); /* Inner package length */ + acpigen_pop_len(); /* Outer package length */ +} + +void acpi_dp_write_value(const struct acpi_dp *prop) +{ + switch (prop->type) { + case ACPI_DP_TYPE_INTEGER: + acpigen_write_integer(prop->integer); + break; + case ACPI_DP_TYPE_STRING: + acpigen_write_string(prop->string); + break; + case ACPI_DP_TYPE_REFERENCE: + acpigen_emit_namestring(prop->string); + break; + } +} + +/* Write Device Property key with value as an integer */ +void acpi_dp_write_keyval(const char *key, const struct acpi_dp *prop) +{ + acpigen_write_package(2); + acpigen_write_string(key); + acpi_dp_write_value(prop); + acpigen_pop_len(); + dp_count++; +} + +/* Write Device Property key with value as an integer */ +void acpi_dp_write_integer(const char *key, uint64_t value) +{ + const struct acpi_dp prop = ACPI_DP_INTEGER(value); + acpi_dp_write_keyval(key, &prop); +} + +/* Write Device Property key with value as a string */ +void acpi_dp_write_string(const char *key, const char *value) +{ + const struct acpi_dp prop = ACPI_DP_STRING(value); + acpi_dp_write_keyval(key, &prop); +} + +/* Write Device Property key with value as a reference */ +void acpi_dp_write_reference(const char *key, const char *value) +{ + const struct acpi_dp prop = ACPI_DP_REFERENCE(value); + acpi_dp_write_keyval(key, &prop); +} + +/* Write array of Device Properties */ +void acpi_dp_write_array(const char *key, const struct acpi_dp *array, int len) +{ + int i; + acpigen_write_package(2); + acpigen_write_string(key); + acpigen_write_package(len); + for (i = 0; i < len; i++) + acpi_dp_write_value(&array[i]); + acpigen_pop_len(); + acpigen_pop_len(); + dp_count++; +} + +/* Write array of Device Properties with values as integers */ +void acpi_dp_write_integer_array(const char *key, uint64_t *array, int len) +{ + int i; + acpigen_write_package(2); + acpigen_write_string(key); + acpigen_write_package(len); + for (i = 0; i < len; i++) + acpigen_write_integer(array[i]); + acpigen_pop_len(); + acpigen_pop_len(); + dp_count++; +} + +/* + * Device Properties for GPIO binding + * linux/Documentation/acpi/gpio-properties.txt + */ +void acpi_dp_write_gpio(const char *key, const char *ref, int index, + int pin, int active_low) +{ + const struct acpi_dp gpio_prop[] = { + /* The device that has _CRS containing GpioIo()/GpioInt() */ + ACPI_DP_REFERENCE(ref), + /* Index of the GPIO resource in _CRS starting from zero */ + ACPI_DP_INTEGER(index), + /* Pin in the GPIO resource, typically zero */ + ACPI_DP_INTEGER(pin), + /* Set if pin is active low */ + ACPI_DP_INTEGER(active_low) + }; + acpi_dp_write_array(key, gpio_prop, ARRAY_SIZE(gpio_prop)); +} diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h index dc7f26c..65f49b2 100644 --- a/src/arch/x86/include/arch/acpi_device.h +++ b/src/arch/x86/include/arch/acpi_device.h @@ -228,4 +228,64 @@ struct acpi_spi { /* Write SPI Bus descriptor to SSDT AML output */ void acpi_device_write_spi(const struct acpi_spi *spi); +/* + * Device Properties with _DSD + * http://uefi.org/sites/default/files/resources/_DSD-device-properties-UUID.p… + */ + +#define ACPI_DP_UUID "daffd814-6eba-4d8c-8a91-bc9bbf4aa301" + +enum acpi_dp_type { + ACPI_DP_TYPE_INTEGER, + ACPI_DP_TYPE_STRING, + ACPI_DP_TYPE_REFERENCE, +}; + +struct acpi_dp { + enum acpi_dp_type type; + union { + uint64_t integer; + const char *string; + }; +}; + +#define ACPI_DP_INTEGER(x) { .type = ACPI_DP_TYPE_INTEGER, .integer = x } +#define ACPI_DP_STRING(x) { .type = ACPI_DP_TYPE_STRING, .string = x } +#define ACPI_DP_REFERENCE(x) { .type = ACPI_DP_TYPE_REFERENCE, .string = x } + +/* + * Writing Device Properties objects via _DSD + */ + +/* Start a set of Device Properties with _DSD and UUID */ +void acpi_dp_write_header(void); + +/* End the Device Properties set and fill in length values */ +void acpi_dp_write_footer(void); + +/* Write a Device Property value, but not the key */ +void acpi_dp_write_value(const struct acpi_dp *prop); + +/* Write a Device Property, both key and value */ +void acpi_dp_write_keyval(const char *key, const struct acpi_dp *prop); + +/* Write an integer as a Device Property */ +void acpi_dp_write_integer(const char *key, uint64_t value); + +/* Write a string as a Device Property */ +void acpi_dp_write_string(const char *key, const char *value); + +/* Write an ACPI reference as a Device Property */ +void acpi_dp_write_reference(const char *key, const char *value); + +/* Write an array of Device Properties */ +void acpi_dp_write_array(const char *key, const struct acpi_dp *array, int len); + +/* Write an array of integers as Device Properties */ +void acpi_dp_write_integer_array(const char *key, uint64_t *array, int len); + +/* Write a GPIO binding Device Property */ +void acpi_dp_write_gpio(const char *key, const char *ref, int index, + int pin, int active_low); + #endif

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coreboot-gerrit May 2016