coreboot-gerrit November 2016

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: mainboard/google/reef: Add support for RECOVERY_MRC_CACHE
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17243 -gerrit commit d0853a82a9ee7e154a1f5496f423d9a908c37664 Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sun Nov 6 00:07:08 2016 -0700 mainboard/google/reef: Add support for RECOVERY_MRC_CACHE 1. Add RECOVERY_MRC_CACHE region to reef FMAP. 2. Implement helper function for getting event for recovery mode with memory retraining. 3. Select HAS_RECOVERY_MRC_CACHE. BUG=chrome-os-partner:59352 BRANCH=None TEST=Verified recovery mode behavior with and without memory training request on reef. Change-Id: I91abc9f8122f1aa3980c6372ab557e56a7a92730 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/mainboard/google/reef/Kconfig | 1 + src/mainboard/google/reef/chromeos.c | 15 +++++++++++++-- src/mainboard/google/reef/chromeos.fmd | 3 ++- 3 files changed, 16 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 6045f47..bb7a531 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -33,6 +33,7 @@ config DRIVER_TPM_I2C_IRQ config CHROMEOS select LID_SWITCH if BASEBOARD_REEF_LAPTOP + select HAS_RECOVERY_MRC_CACHE config DRIVERS_I2C_DA7219 default y diff --git a/src/mainboard/google/reef/chromeos.c b/src/mainboard/google/reef/chromeos.c index 58c2cd8..506f9de 100644 --- a/src/mainboard/google/reef/chromeos.c +++ b/src/mainboard/google/reef/chromeos.c @@ -55,11 +55,22 @@ int get_recovery_mode_switch(void) EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY)); } +int get_recovery_mode_retrain_switch(void) +{ + /* + * Check if the EC has posted the keyboard recovery event with memory + * retrain. + */ + return !!(google_chromeec_get_events_b() & + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT)); +} + int clear_recovery_mode_switch(void) { - /* Clear keyboard recovery event. */ + /* Clear all host event bits requesting recovery mode. */ return google_chromeec_clear_events_b( - EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY)); + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY) | + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT)); } int get_write_protect_state(void) diff --git a/src/mainboard/google/reef/chromeos.fmd b/src/mainboard/google/reef/chromeos.fmd index d25a9b2..c6a413d 100644 --- a/src/mainboard/google/reef/chromeos.fmd +++ b/src/mainboard/google/reef/chromeos.fmd @@ -13,7 +13,8 @@ FLASH 16M { } } MISC_RW@0x400000 0x4a000 { - RW_MRC_CACHE@0x0 0x40000 + RECOVERY_MRC_CACHE@0x0 0x10000 + RW_MRC_CACHE@0x10000 0x30000 RW_ELOG@0x40000 0x4000 RW_SHARED@0x44000 0x4000 { SHARED_DATA@0x0 0x2000

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Patch set updated for coreboot: ec/acpi: Include ec.c unconditionally in romstage
by Nico Huber 07 Nov '16

07 Nov '16

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17123 -gerrit commit 1727128d6bb3a1d7aa380f044ec981fefb0737e6 Author: Nico Huber <nico.huber(a)secunet.com> Date: Tue Oct 25 15:38:55 2016 +0200 ec/acpi: Include ec.c unconditionally in romstage Dependencies on EC code should be specified at board level and not here. We can include the file unconditionally in romstage and let the linker decide if it's needed. Change-Id: Ie2d1970ac1dd175a9d42651573a88cd866f19cb9 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- src/ec/acpi/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ec/acpi/Makefile.inc b/src/ec/acpi/Makefile.inc index efdd4b1..34fc307 100644 --- a/src/ec/acpi/Makefile.inc +++ b/src/ec/acpi/Makefile.inc @@ -1,7 +1,7 @@ ifeq ($(CONFIG_EC_ACPI),y) ramstage-y += ec.c +romstage-y += ec.c smm-$(CONFIG_HAVE_SMI_HANDLER) += ec.c -romstage-$(CONFIG_BOARD_LENOVO_X201) += ec.c endif

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Patch set updated for coreboot: google/chromeec: Sync ec_commands.h host events with ec codebase
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17240 -gerrit commit 1044435be2905c1ba1224e2f9ec1482d70c80af7 Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sun Nov 6 00:12:23 2016 -0700 google/chromeec: Sync ec_commands.h host events with ec codebase BUG=chrome-os-partner:59352 BRANCH=None TEST=Compiles successfully for reef Change-Id: Ibfa5681e16a97e342633104d2aae1fb0402939b8 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/ec/google/chromeec/ec_commands.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 4a551c2..ec404f0 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -471,9 +471,21 @@ enum host_event_code { /* Emulate MKBP event */ EC_HOST_EVENT_MKBP = 27, + /* EC desires to change state of host-controlled USB mux */ + EC_HOST_EVENT_USB_MUX = 28, + /* TABLET/LAPTOP mode event*/ EC_HOST_EVENT_MODE_CHANGE = 29, + /* Keyboard recovery combo with hardware reinitialization */ + EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, + + /* + * Reserve this last bit to indicate that at least one bit in a + * secondary host event word is set. See crbug.com/633646. + */ + EC_HOST_EVENT_EXTENDED = 31, + /* * The high bit of the event mask is not used as a host event code. If * it reads back as set, then the entire event mask should be

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Patch set updated for coreboot: vboot: Add support for recovery mode with forced memory retraining
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17241 -gerrit commit b2e34fbc8c8d07f985e782b1ae8be36384249ac6 Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sat Nov 5 23:52:08 2016 -0700 vboot: Add support for recovery mode with forced memory retraining 1. Add new function vboot_recovery_mode_memory_retrain that indicates if recovery mode requires memory retraining to be performed. 2. Add helper functions get_recovery_mode_retrain_switch to read memory retrain switch. This is provided as weak function which should be implemented by mainboard just like {get,clear}_recovery_mode_switch. BUG=chrome-os-partner:59352 BRANCH=None TEST=Verified behavior of recovery mode with forced memory retraining on reef Change-Id: I46c10fbf25bc100d9f562c36da3ac646c9dae7d1 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/include/bootmode.h | 1 + src/vboot/bootmode.c | 10 ++++++++++ src/vboot/vboot_common.h | 1 + 3 files changed, 12 insertions(+) diff --git a/src/include/bootmode.h b/src/include/bootmode.h index 21aa386..c807472 100644 --- a/src/include/bootmode.h +++ b/src/include/bootmode.h @@ -22,6 +22,7 @@ int get_write_protect_state(void); int get_sw_write_protect_state(void); int get_developer_mode_switch(void); int get_recovery_mode_switch(void); +int get_recovery_mode_retrain_switch(void); int clear_recovery_mode_switch(void); int get_wipeout_mode_switch(void); int get_lid_switch(void); diff --git a/src/vboot/bootmode.c b/src/vboot/bootmode.c index 12a4dc0..5bb7040 100644 --- a/src/vboot/bootmode.c +++ b/src/vboot/bootmode.c @@ -162,6 +162,16 @@ int vboot_recovery_mode_enabled(void) return !!vboot_check_recovery_request(); } +int __attribute__((weak)) get_recovery_mode_retrain_switch(void) +{ + return 0; +} + +int vboot_recovery_mode_memory_retrain(void) +{ + return get_recovery_mode_retrain_switch(); +} + int vboot_developer_mode_enabled(void) { if (!IS_ENABLED(CONFIG_VBOOT)) diff --git a/src/vboot/vboot_common.h b/src/vboot/vboot_common.h index 59fd44c..956b54c 100644 --- a/src/vboot/vboot_common.h +++ b/src/vboot/vboot_common.h @@ -107,5 +107,6 @@ void verstage_mainboard_init(void); /* Check boot modes */ int vboot_developer_mode_enabled(void); int vboot_recovery_mode_enabled(void); +int vboot_recovery_mode_memory_retrain(void); #endif /* __VBOOT_VBOOT_COMMON_H__ */

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Patch set updated for coreboot: mrc: Add support for separate training cache in recovery mode
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17242 -gerrit commit 4385227f2e8869008fa70e32751b09019be1fddb Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sat Nov 5 23:57:02 2016 -0700 mrc: Add support for separate training cache in recovery mode 1. Re-factor MRC cache driver to properly select RW_MRC_CACHE or RECOVERY_MRC_CACHE based on the boot mode. - If normal mode boot, use RW_MRC_CACHE, if available. - If recovery mode boot: - Retrain memory if RECOVERY_MRC_CACHE not present, or recovery is requested explicity with retrain memory request. - Use RECOVERY_MRC_CACHE otherwise. 2. Protect RECOVERY_MRC_CACHE in non-recovery mode and recovery mode. 3. Update training data in appropriate cache: - Use RW_MRC_CACHE if normal mode. - Use RECOVERY_MRC_CACHE if present in recovery mode. Else use RW_MRC_CACHE. 4. Add proper debug logs to indicate which training data cache is used at any point. BUG=chrome-os-partner:59352 BRANCH=None TEST=Verified that correct cache is used in both normal and recovery mode on reef. Change-Id: Ie79737a1450bd1ff71543e44a5a3e16950e70fb3 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/drivers/intel/fsp2_0/memory_init.c | 40 +++++---- src/include/elog.h | 1 + src/soc/intel/common/Kconfig | 4 + src/soc/intel/common/mrc_cache.c | 156 ++++++++++++++++++++++----------- src/soc/intel/common/mrc_cache.h | 6 ++ 5 files changed, 137 insertions(+), 70 deletions(-) diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index d0a22ce..3ea1897 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -55,13 +55,6 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version) printk(BIOS_ERR, "Failed to stash MRC data\n"); } -/* - * On every trip to recovery, newly generated MRC data is stored with this - * version since it is not expected to be a legit version. This ensures that on - * next normal boot, memory re-training occurs and new MRC data is stored. - */ -#define MRC_DEAD_VERSION (0xdeaddead) - static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) { struct range_entry fsp_mem; @@ -89,10 +82,6 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) die("Failed to accommodate FSP reserved memory request!\n"); - /* Now that CBMEM is up, save the list so ramstage can use it */ - if (vboot_recovery_mode_enabled()) - fsp_version = MRC_DEAD_VERSION; - save_memory_training_data(s3wake, fsp_version); /* Create romstage handof information */ @@ -103,26 +92,39 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) printk(BIOS_SPEW, "Romstage handoff structure not added!\n"); } +static const char *mrc_cache_get_region_name(void) +{ + /* In normal mode, always use DEFAULT_MRC_CACHE */ + if (!vboot_recovery_mode_enabled()) + return DEFAULT_MRC_CACHE; + + /* + * In recovery mode, force retraining by returning NULL if: + * 1. Recovery cache is not supported, or + * 2. Memory retrain switch is set. + */ + if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) || + vboot_recovery_mode_memory_retrain()) + return NULL; + + return RECOVERY_MRC_CACHE; +} + static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake, uint32_t fsp_version) { const struct mrc_saved_data *mrc_cache; + const char *name; arch_upd->NvsBufferPtr = NULL; if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) return; - /* Don't use saved training data when recovery mode is enabled. */ - if (vboot_recovery_mode_enabled()) { - printk(BIOS_SPEW, "Recovery mode. Not using MRC cache.\n"); - return; - } + name = mrc_cache_get_region_name(); - if (mrc_cache_get_current_with_version(&mrc_cache, fsp_version)) { - printk(BIOS_SPEW, "MRC cache was not found\n"); + if (mrc_cache_get_current_from_region(&mrc_cache, fsp_version, name)) return; - } /* MRC cache found */ arch_upd->NvsBufferPtr = (void *)mrc_cache->data; diff --git a/src/include/elog.h b/src/include/elog.h index 7fdcda7..fec9d09 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -152,6 +152,7 @@ struct elog_event_data_me_extended { /* Memory Cache Update */ #define ELOG_TYPE_MEM_CACHE_UPDATE 0xaa #define ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL 0 +#define ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY 1 #define ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS 0 #define ELOG_MEM_CACHE_UPDATE_STATUS_FAIL 1 struct elog_event_mem_cache_update { diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index affec55..5d8bf66 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -27,6 +27,10 @@ config MRC_SETTINGS_PROTECT bool "Enable protection on MRC settings" default n +config HAS_RECOVERY_MRC_CACHE + bool + default n + endif # CACHE_MRC_SETTINGS config DISPLAY_MTRRS diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c index bef3ba2..983cc87 100644 --- a/src/soc/intel/common/mrc_cache.c +++ b/src/soc/intel/common/mrc_cache.c @@ -36,12 +36,16 @@ struct mrc_data_region { }; /* common code */ -static int mrc_cache_get_region(struct mrc_data_region *region) +static int mrc_cache_get_region(const char *name, + struct mrc_data_region *region) { bool located_by_fmap = true; struct region_device rdev; - if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev)) + region->base = NULL; + region->size = 0; + + if (fmap_locate_area_as_rdev(name, &rdev)) located_by_fmap = false; /* CHROMEOS builds must get their MRC cache from FMAP. */ @@ -62,6 +66,38 @@ static int mrc_cache_get_region(struct mrc_data_region *region) return 0; } +/* Protect mrc region with a Protected Range Register */ +static int __protect_mrc_cache(const struct mrc_data_region *region, + const char *name) +{ + if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + return 0; + + if (nvm_is_write_protected() <= 0) { + printk(BIOS_INFO, "MRC: NOT enabling PRR for %s.\n", name); + return 1; + } + + if (nvm_protect(region->base, region->size) < 0) { + printk(BIOS_ERR, "MRC: ERROR setting PRR for %s.\n", name); + return -1; + } + + printk(BIOS_INFO, "MRC: Enabled Protected Range on %s.\n", name); + return 0; +} + +static int protect_mrc_cache(const char *name) +{ + struct mrc_data_region region; + if (mrc_cache_get_region(name, &region) < 0) { + printk(BIOS_ERR, "MRC: Could not find region %s\n", name); + return -1; + } + + return __protect_mrc_cache(&region, name); +} + static int mrc_cache_in_region(const struct mrc_data_region *region, const struct mrc_saved_data *cache) { @@ -149,31 +185,57 @@ static int __mrc_cache_get_current(const struct mrc_data_region *region, return -1; if (verified_cache->version != version) { - printk(BIOS_DEBUG, "MRC cache version mismatch: %x vs %x\n", + printk(BIOS_DEBUG, "MRC: cache version mismatch: %x vs %x\n", verified_cache->version, version); return -1; } - printk(BIOS_DEBUG, "MRC cache slot %d @ %p\n", slot-1, verified_cache); + printk(BIOS_DEBUG, "MRC: cache slot %d @ %p\n", slot-1, verified_cache); return 0; } -int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, - uint32_t version) +int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, + uint32_t version, + const char *region_name) { struct mrc_data_region region; - if (mrc_cache_get_region(&region) < 0) + if (!region_name) { + printk(BIOS_ERR, "MRC: Requires memory retraining.\n"); return -1; + } - return __mrc_cache_get_current(&region, cache, version); + printk(BIOS_ERR, "MRC: Using data from %s\n", region_name); + + if (mrc_cache_get_region(region_name, &region) < 0) { + printk(BIOS_ERR, "MRC: Region %s not found. " + "Requires memory retraining.\n", region_name); + return -1; + } + + if (__mrc_cache_get_current(&region, cache, version) < 0) { + printk(BIOS_ERR, "MRC: Valid slot not found in %s." + "Requires memory retraining.\n", region_name); + return -1; + } + + return 0; +} + +int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, + uint32_t version) +{ + return mrc_cache_get_current_from_region(cache, version, + DEFAULT_MRC_CACHE); } int mrc_cache_get_current(const struct mrc_saved_data **cache) { return mrc_cache_get_current_with_version(cache, 0); } + + /* Fill in mrc_saved_data structure with payload. */ static void mrc_cache_fill(struct mrc_saved_data *cache, const void *data, size_t size, uint32_t version) @@ -197,14 +259,14 @@ int mrc_cache_stash_data_with_version(const void *data, size_t size, cache = cbmem_add(CBMEM_ID_MRCDATA, cbmem_size); if (cache == NULL) { - printk(BIOS_ERR, "No space in cbmem for MRC data.\n"); + printk(BIOS_ERR, "MRC: No space in cbmem for training data.\n"); return -1; } /* Clear alignment padding bytes at end of data. */ memset(&cache->data[size], 0, cbmem_size - size - sizeof(*cache)); - printk(BIOS_DEBUG, "Relocate MRC DATA from %p to %p (%zu bytes)\n", + printk(BIOS_DEBUG, "MRC: Relocate data from %p to %p (%zu bytes)\n", data, cache, size); mrc_cache_fill(cache, data, size, version); @@ -263,25 +325,6 @@ mrc_cache_next_slot(const struct mrc_data_region *region, return next_slot; } -/* Protect RW_MRC_CACHE region with a Protected Range Register */ -static int protect_mrc_cache(const struct mrc_data_region *region) -{ -#if IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT) - if (nvm_is_write_protected() <= 0) { - printk(BIOS_INFO, "NOT enabling PRR for RW_MRC_CACHE region\n"); - return 1; - } - - if (nvm_protect(region->base, region->size) < 0) { - printk(BIOS_ERR, "ERROR setting PRR for RW_MRC_CACHE region\n"); - return -1; - } - - printk(BIOS_INFO, "Enabled Protected Range on RW_MRC_CACHE region\n"); -#endif - return 0; -} - static void log_event_cache_update(uint8_t slot, uint8_t status) { const int type = ELOG_TYPE_MEM_CACHE_UPDATE; @@ -300,23 +343,34 @@ static void update_mrc_cache(void *unused) const struct mrc_saved_data *current_saved; const struct mrc_saved_data *next_slot; struct mrc_data_region region; + const char *region_name = DEFAULT_MRC_CACHE; + uint8_t slot = ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL; - printk(BIOS_DEBUG, "Updating MRC cache data.\n"); + printk(BIOS_DEBUG, "MRC: Updating cache data.\n"); - current_boot = cbmem_find(CBMEM_ID_MRCDATA); - if (!current_boot) { - printk(BIOS_ERR, "No MRC cache in cbmem.\n"); + if (vboot_recovery_mode_enabled() && + IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) { + region_name = RECOVERY_MRC_CACHE; + slot = ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY; + } else + protect_mrc_cache(RECOVERY_MRC_CACHE); + + printk(BIOS_ERR, "MRC: Cache region selected - %s\n", region_name); + + if (mrc_cache_get_region(region_name, &region)) { + printk(BIOS_ERR, "MRC: Could not obtain cache region.\n"); return; } - if (mrc_cache_get_region(&region)) { - printk(BIOS_ERR, "Could not obtain MRC cache region.\n"); - return; + current_boot = cbmem_find(CBMEM_ID_MRCDATA); + if (!current_boot) { + printk(BIOS_ERR, "MRC: No cache in cbmem.\n"); + goto out; } if (!mrc_cache_valid(&region, current_boot)) { - printk(BIOS_ERR, "MRC cache data in cbmem invalid.\n"); - return; + printk(BIOS_ERR, "MRC: Cache data in cbmem invalid.\n"); + goto out; } current_saved = NULL; @@ -326,20 +380,20 @@ static void update_mrc_cache(void *unused) if (current_saved->size == current_boot->size && !memcmp(&current_saved->data[0], &current_boot->data[0], current_saved->size)) { - printk(BIOS_DEBUG, "MRC cache up to date.\n"); - protect_mrc_cache(&region); - return; + printk(BIOS_DEBUG, "MRC: Cache up to date.\n"); + goto out; } } next_slot = mrc_cache_next_slot(&region, current_saved); if (!mrc_slot_valid(&region, next_slot, current_boot)) { - printk(BIOS_DEBUG, "Slot @ %p is invalid.\n", next_slot); + printk(BIOS_DEBUG, "MRC: Slot @ %p is invalid.\n", next_slot); if (!nvm_is_erased(region.base, region.size)) { if (nvm_erase(region.base, region.size) < 0) { - printk(BIOS_DEBUG, "Failure erasing region.\n"); - return; + printk(BIOS_DEBUG, "MRC: Failure erasing " + "region %s.\n", region_name); + goto out; } } next_slot = region.base; @@ -347,16 +401,16 @@ static void update_mrc_cache(void *unused) if (nvm_write((void *)next_slot, current_boot, current_boot->size + sizeof(*current_boot))) { - printk(BIOS_DEBUG, "Failure writing MRC cache to %p.\n", - next_slot); - log_event_cache_update(ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL, - ELOG_MEM_CACHE_UPDATE_STATUS_FAIL); + printk(BIOS_DEBUG, "MRC: Failure writing MRC cache to %s:%p\n", + region_name, next_slot); + log_event_cache_update(slot, ELOG_MEM_CACHE_UPDATE_STATUS_FAIL); } else { - log_event_cache_update(ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL, - ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS); + log_event_cache_update(slot, + ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS); } - protect_mrc_cache(&region); +out: + __protect_mrc_cache(&region, region_name); } BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL); diff --git a/src/soc/intel/common/mrc_cache.h b/src/soc/intel/common/mrc_cache.h index 9b14c1e..8bbd4ed 100644 --- a/src/soc/intel/common/mrc_cache.h +++ b/src/soc/intel/common/mrc_cache.h @@ -19,6 +19,9 @@ #include <stddef.h> #include <stdint.h> +#define DEFAULT_MRC_CACHE "RW_MRC_CACHE" +#define RECOVERY_MRC_CACHE "RECOVERY_MRC_CACHE" + /* Wrapper object to save MRC information. */ struct mrc_saved_data { uint32_t signature; @@ -32,6 +35,9 @@ struct mrc_saved_data { int mrc_cache_get_current(const struct mrc_saved_data **cache); int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, uint32_t version); +int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, + uint32_t version, + const char *region_name); /* Stash the resulting MRC data to be saved in non-volatile storage later. */ int mrc_cache_stash_data(const void *data, size_t size);

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Patch set updated for coreboot: mainboard/google/reef: Add support for RECOVERY_MRC_CACHE
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17243 -gerrit commit 86a841a2f4de6090acbd3233f6c497d386ee09ef Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sun Nov 6 00:07:08 2016 -0700 mainboard/google/reef: Add support for RECOVERY_MRC_CACHE 1. Add RECOVERY_MRC_CACHE region to reef FMAP. 2. Implement helper function for getting event for recovery mode with memory retraining. 3. Select HAS_RECOVERY_MRC_CACHE. BUG=chrome-os-partner:59352 BRANCH=None TEST=Verified recovery mode behavior with and without memory training request on reef. Change-Id: I91abc9f8122f1aa3980c6372ab557e56a7a92730 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/mainboard/google/reef/Kconfig | 1 + src/mainboard/google/reef/chromeos.c | 23 +++++++++++++++++++---- src/mainboard/google/reef/chromeos.fmd | 3 ++- 3 files changed, 22 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 6045f47..bb7a531 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -33,6 +33,7 @@ config DRIVER_TPM_I2C_IRQ config CHROMEOS select LID_SWITCH if BASEBOARD_REEF_LAPTOP + select HAS_RECOVERY_MRC_CACHE config DRIVERS_I2C_DA7219 default y diff --git a/src/mainboard/google/reef/chromeos.c b/src/mainboard/google/reef/chromeos.c index 58c2cd8..a55e6c8 100644 --- a/src/mainboard/google/reef/chromeos.c +++ b/src/mainboard/google/reef/chromeos.c @@ -50,16 +50,31 @@ int get_developer_mode_switch(void) int get_recovery_mode_switch(void) { - /* Check if the EC has posted the keyboard recovery event. */ + /* + * Check if the EC has posted the keyboard recovery event with/without + * memory retrain. + */ return !!(google_chromeec_get_events_b() & - EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY)); + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY) | + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT))); +} + +int get_recovery_mode_retrain_switch(void) +{ + /* + * Check if the EC has posted the keyboard recovery event with memory + * retrain. + */ + return !!(google_chromeec_get_events_b() & + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT)); } int clear_recovery_mode_switch(void) { - /* Clear keyboard recovery event. */ + /* Clear all host event bits requesting recovery mode. */ return google_chromeec_clear_events_b( - EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY)); + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY) | + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT)); } int get_write_protect_state(void) diff --git a/src/mainboard/google/reef/chromeos.fmd b/src/mainboard/google/reef/chromeos.fmd index d25a9b2..c6a413d 100644 --- a/src/mainboard/google/reef/chromeos.fmd +++ b/src/mainboard/google/reef/chromeos.fmd @@ -13,7 +13,8 @@ FLASH 16M { } } MISC_RW@0x400000 0x4a000 { - RW_MRC_CACHE@0x0 0x40000 + RECOVERY_MRC_CACHE@0x0 0x10000 + RW_MRC_CACHE@0x10000 0x30000 RW_ELOG@0x40000 0x4000 RW_SHARED@0x44000 0x4000 { SHARED_DATA@0x0 0x2000

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Patch set updated for coreboot: google/chromeec: Sync ec_commands.h host events with ec codebase
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17240 -gerrit commit 2bc2e66041eb70f0d3745e6dcafee7481c133703 Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sun Nov 6 00:12:23 2016 -0700 google/chromeec: Sync ec_commands.h host events with ec codebase BUG=chrome-os-partner:59352 BRANCH=None TEST=Compiles successfully Change-Id: Ibfa5681e16a97e342633104d2aae1fb0402939b8 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/ec/google/chromeec/ec_commands.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 4a551c2..ec404f0 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -471,9 +471,21 @@ enum host_event_code { /* Emulate MKBP event */ EC_HOST_EVENT_MKBP = 27, + /* EC desires to change state of host-controlled USB mux */ + EC_HOST_EVENT_USB_MUX = 28, + /* TABLET/LAPTOP mode event*/ EC_HOST_EVENT_MODE_CHANGE = 29, + /* Keyboard recovery combo with hardware reinitialization */ + EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, + + /* + * Reserve this last bit to indicate that at least one bit in a + * secondary host event word is set. See crbug.com/633646. + */ + EC_HOST_EVENT_EXTENDED = 31, + /* * The high bit of the event mask is not used as a host event code. If * it reads back as set, then the entire event mask should be

1 0

Patch set updated for coreboot: vboot: Add support for recovery mode with forced memory retraining
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17241 -gerrit commit 5798a2a3b5cf61bcfd1a86777c712a2045a01006 Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sat Nov 5 23:52:08 2016 -0700 vboot: Add support for recovery mode with forced memory retraining 1. Add new function vboot_recovery_mode_memory_retrain that indicates if recovery mode requires memory retraining to be performed. 2. Add helper functions get_recovery_mode_retrain_switch to read memory retrain switch. This is provided as weak function which should be implemented by mainboard just like {get,clear}_recovery_mode_switch. BUG=chrome-os-partner:59352 BRANCH=None TEST=Verified behavior of recovery mode with forced memory retraining on reef. Change-Id: I46c10fbf25bc100d9f562c36da3ac646c9dae7d1 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/include/bootmode.h | 1 + src/vboot/bootmode.c | 10 ++++++++++ src/vboot/vboot_common.h | 1 + 3 files changed, 12 insertions(+) diff --git a/src/include/bootmode.h b/src/include/bootmode.h index 21aa386..c807472 100644 --- a/src/include/bootmode.h +++ b/src/include/bootmode.h @@ -22,6 +22,7 @@ int get_write_protect_state(void); int get_sw_write_protect_state(void); int get_developer_mode_switch(void); int get_recovery_mode_switch(void); +int get_recovery_mode_retrain_switch(void); int clear_recovery_mode_switch(void); int get_wipeout_mode_switch(void); int get_lid_switch(void); diff --git a/src/vboot/bootmode.c b/src/vboot/bootmode.c index 12a4dc0..5bb7040 100644 --- a/src/vboot/bootmode.c +++ b/src/vboot/bootmode.c @@ -162,6 +162,16 @@ int vboot_recovery_mode_enabled(void) return !!vboot_check_recovery_request(); } +int __attribute__((weak)) get_recovery_mode_retrain_switch(void) +{ + return 0; +} + +int vboot_recovery_mode_memory_retrain(void) +{ + return get_recovery_mode_retrain_switch(); +} + int vboot_developer_mode_enabled(void) { if (!IS_ENABLED(CONFIG_VBOOT)) diff --git a/src/vboot/vboot_common.h b/src/vboot/vboot_common.h index 59fd44c..956b54c 100644 --- a/src/vboot/vboot_common.h +++ b/src/vboot/vboot_common.h @@ -107,5 +107,6 @@ void verstage_mainboard_init(void); /* Check boot modes */ int vboot_developer_mode_enabled(void); int vboot_recovery_mode_enabled(void); +int vboot_recovery_mode_memory_retrain(void); #endif /* __VBOOT_VBOOT_COMMON_H__ */

1 0

Patch set updated for coreboot: mrc: Add support for separate training cache in recovery mode
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17242 -gerrit commit a870f9dd2674c754980312caf4fb49e35c871ef1 Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sat Nov 5 23:57:02 2016 -0700 mrc: Add support for separate training cache in recovery mode 1. Re-factor MRC cache driver to properly select RW_MRC_CACHE or RECOVERY_MRC_CACHE based on the boot mode. - If normal mode boot, use RW_MRC_CACHE, if available. - If recovery mode boot: - Retrain memory if RECOVERY_MRC_CACHE not present, or recovery is requested explicity with retrain memory request. - Use RECOVERY_MRC_CACHE otherwise. 2. Protect RECOVERY_MRC_CACHE in non-recovery mode. 3. Update training data in appropriate cache: - Use RW_MRC_CACHE if normal mode. - Use RECOVERY_MRC_CACHE if present in recovery mode. Else use RW_MRC_CACHE. 4. Add proper debug logs to indicate which training data cache is used at any point. BUG=chrome-os-partner:59352 BRANCH=None TEST=Verified that correct cache is used in both normal and recovery mode on reef. Change-Id: Ie79737a1450bd1ff71543e44a5a3e16950e70fb3 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/drivers/intel/fsp2_0/memory_init.c | 60 +++++++++---- src/include/elog.h | 1 + src/soc/intel/common/Kconfig | 4 + src/soc/intel/common/mrc_cache.c | 155 ++++++++++++++++++++++----------- src/soc/intel/common/mrc_cache.h | 9 ++ 5 files changed, 159 insertions(+), 70 deletions(-) diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index d0a22ce..5dc622e 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -14,6 +14,7 @@ #include <arch/io.h> #include <arch/cpu.h> #include <arch/symbols.h> +#include <bootstate.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -55,13 +56,6 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version) printk(BIOS_ERR, "Failed to stash MRC data\n"); } -/* - * On every trip to recovery, newly generated MRC data is stored with this - * version since it is not expected to be a legit version. This ensures that on - * next normal boot, memory re-training occurs and new MRC data is stored. - */ -#define MRC_DEAD_VERSION (0xdeaddead) - static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) { struct range_entry fsp_mem; @@ -89,10 +83,6 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) die("Failed to accommodate FSP reserved memory request!\n"); - /* Now that CBMEM is up, save the list so ramstage can use it */ - if (vboot_recovery_mode_enabled()) - fsp_version = MRC_DEAD_VERSION; - save_memory_training_data(s3wake, fsp_version); /* Create romstage handof information */ @@ -103,26 +93,39 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) printk(BIOS_SPEW, "Romstage handoff structure not added!\n"); } +static const char *mrc_cache_get_region_name(void) +{ + /* In normal mode, always use DEFAULT_MRC_CACHE */ + if (!vboot_recovery_mode_enabled()) + return DEFAULT_MRC_CACHE; + + /* + * In recovery mode, force retraining by returning NULL if: + * 1. Recovery cache is not supported, or + * 2. Memory retrain switch is set. + */ + if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) || + vboot_recovery_mode_memory_retrain()) + return NULL; + + return RECOVERY_MRC_CACHE; +} + static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake, uint32_t fsp_version) { const struct mrc_saved_data *mrc_cache; + const char *name; arch_upd->NvsBufferPtr = NULL; if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) return; - /* Don't use saved training data when recovery mode is enabled. */ - if (vboot_recovery_mode_enabled()) { - printk(BIOS_SPEW, "Recovery mode. Not using MRC cache.\n"); - return; - } + name = mrc_cache_get_region_name(); - if (mrc_cache_get_current_with_version(&mrc_cache, fsp_version)) { - printk(BIOS_SPEW, "MRC cache was not found\n"); + if (mrc_cache_get_current_from_region(&mrc_cache, fsp_version, name)) return; - } /* MRC cache found */ arch_upd->NvsBufferPtr = (void *)mrc_cache->data; @@ -322,3 +325,22 @@ void fsp_memory_init(bool s3wake) do_fsp_memory_init(&hdr, s3wake, &memmap); } + +/* Protect RECOVERY_MRC_CACHE in non-recovery mode. */ +static void protect_recovery_cache(void *unused) +{ + /* + * In recovery mode, mrc cache driver will protect recovery mode cache + * if present. + */ + if (vboot_recovery_mode_enabled()) + return; + + if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) + return; + + protect_mrc_cache(RECOVERY_MRC_CACHE); +} + +BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, protect_recovery_cache, + NULL); diff --git a/src/include/elog.h b/src/include/elog.h index 7fdcda7..fec9d09 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -152,6 +152,7 @@ struct elog_event_data_me_extended { /* Memory Cache Update */ #define ELOG_TYPE_MEM_CACHE_UPDATE 0xaa #define ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL 0 +#define ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY 1 #define ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS 0 #define ELOG_MEM_CACHE_UPDATE_STATUS_FAIL 1 struct elog_event_mem_cache_update { diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index affec55..5d8bf66 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -27,6 +27,10 @@ config MRC_SETTINGS_PROTECT bool "Enable protection on MRC settings" default n +config HAS_RECOVERY_MRC_CACHE + bool + default n + endif # CACHE_MRC_SETTINGS config DISPLAY_MTRRS diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c index bef3ba2..28deacf 100644 --- a/src/soc/intel/common/mrc_cache.c +++ b/src/soc/intel/common/mrc_cache.c @@ -36,12 +36,16 @@ struct mrc_data_region { }; /* common code */ -static int mrc_cache_get_region(struct mrc_data_region *region) +static int mrc_cache_get_region(const char *name, + struct mrc_data_region *region) { bool located_by_fmap = true; struct region_device rdev; - if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev)) + region->base = NULL; + region->size = 0; + + if (fmap_locate_area_as_rdev(name, &rdev)) located_by_fmap = false; /* CHROMEOS builds must get their MRC cache from FMAP. */ @@ -62,6 +66,38 @@ static int mrc_cache_get_region(struct mrc_data_region *region) return 0; } +/* Protect mrc region with a Protected Range Register */ +static int __protect_mrc_cache(const struct mrc_data_region *region, + const char *name) +{ + if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + return 0; + + if (nvm_is_write_protected() <= 0) { + printk(BIOS_INFO, "MRC: NOT enabling PRR for %s.\n", name); + return 1; + } + + if (nvm_protect(region->base, region->size) < 0) { + printk(BIOS_ERR, "MRC: ERROR setting PRR for %s.\n", name); + return -1; + } + + printk(BIOS_INFO, "MRC: Enabled Protected Range on %s.\n", name); + return 0; +} + +int protect_mrc_cache(const char *name) +{ + struct mrc_data_region region; + if (mrc_cache_get_region(name, &region) < 0) { + printk(BIOS_ERR, "MRC: Could not find region %s\n", name); + return -1; + } + + return __protect_mrc_cache(&region, name); +} + static int mrc_cache_in_region(const struct mrc_data_region *region, const struct mrc_saved_data *cache) { @@ -149,31 +185,57 @@ static int __mrc_cache_get_current(const struct mrc_data_region *region, return -1; if (verified_cache->version != version) { - printk(BIOS_DEBUG, "MRC cache version mismatch: %x vs %x\n", + printk(BIOS_DEBUG, "MRC: cache version mismatch: %x vs %x\n", verified_cache->version, version); return -1; } - printk(BIOS_DEBUG, "MRC cache slot %d @ %p\n", slot-1, verified_cache); + printk(BIOS_DEBUG, "MRC: cache slot %d @ %p\n", slot-1, verified_cache); return 0; } -int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, - uint32_t version) +int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, + uint32_t version, + const char *region_name) { struct mrc_data_region region; - if (mrc_cache_get_region(&region) < 0) + if (!region_name) { + printk(BIOS_ERR, "MRC: Requires memory retraining.\n"); + return -1; + } + + printk(BIOS_ERR, "MRC: Using data from %s\n", region_name); + + if (mrc_cache_get_region(region_name, &region) < 0) { + printk(BIOS_ERR, "MRC: Region %s not found. " + "Requires memory retraining.\n", region_name); + return -1; + } + + if (__mrc_cache_get_current(&region, cache, version) < 0) { + printk(BIOS_ERR, "MRC: Valid slot not found in %s." + "Requires memory retraining.\n", region_name); return -1; + } + + return 0; +} - return __mrc_cache_get_current(&region, cache, version); +int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, + uint32_t version) +{ + return mrc_cache_get_current_from_region(cache, version, + DEFAULT_MRC_CACHE); } int mrc_cache_get_current(const struct mrc_saved_data **cache) { return mrc_cache_get_current_with_version(cache, 0); } + + /* Fill in mrc_saved_data structure with payload. */ static void mrc_cache_fill(struct mrc_saved_data *cache, const void *data, size_t size, uint32_t version) @@ -197,14 +259,14 @@ int mrc_cache_stash_data_with_version(const void *data, size_t size, cache = cbmem_add(CBMEM_ID_MRCDATA, cbmem_size); if (cache == NULL) { - printk(BIOS_ERR, "No space in cbmem for MRC data.\n"); + printk(BIOS_ERR, "MRC: No space in cbmem for training data.\n"); return -1; } /* Clear alignment padding bytes at end of data. */ memset(&cache->data[size], 0, cbmem_size - size - sizeof(*cache)); - printk(BIOS_DEBUG, "Relocate MRC DATA from %p to %p (%zu bytes)\n", + printk(BIOS_DEBUG, "MRC: Relocate data from %p to %p (%zu bytes)\n", data, cache, size); mrc_cache_fill(cache, data, size, version); @@ -263,25 +325,6 @@ mrc_cache_next_slot(const struct mrc_data_region *region, return next_slot; } -/* Protect RW_MRC_CACHE region with a Protected Range Register */ -static int protect_mrc_cache(const struct mrc_data_region *region) -{ -#if IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT) - if (nvm_is_write_protected() <= 0) { - printk(BIOS_INFO, "NOT enabling PRR for RW_MRC_CACHE region\n"); - return 1; - } - - if (nvm_protect(region->base, region->size) < 0) { - printk(BIOS_ERR, "ERROR setting PRR for RW_MRC_CACHE region\n"); - return -1; - } - - printk(BIOS_INFO, "Enabled Protected Range on RW_MRC_CACHE region\n"); -#endif - return 0; -} - static void log_event_cache_update(uint8_t slot, uint8_t status) { const int type = ELOG_TYPE_MEM_CACHE_UPDATE; @@ -300,23 +343,33 @@ static void update_mrc_cache(void *unused) const struct mrc_saved_data *current_saved; const struct mrc_saved_data *next_slot; struct mrc_data_region region; + const char *region_name = DEFAULT_MRC_CACHE; + uint8_t slot = ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL; - printk(BIOS_DEBUG, "Updating MRC cache data.\n"); + printk(BIOS_DEBUG, "MRC: Updating cache data.\n"); - current_boot = cbmem_find(CBMEM_ID_MRCDATA); - if (!current_boot) { - printk(BIOS_ERR, "No MRC cache in cbmem.\n"); - return; + if (vboot_recovery_mode_enabled() && + IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) { + region_name = RECOVERY_MRC_CACHE; + slot = ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY; } - if (mrc_cache_get_region(&region)) { - printk(BIOS_ERR, "Could not obtain MRC cache region.\n"); + printk(BIOS_ERR, "MRC: Cache region selected - %s\n", region_name); + + if (mrc_cache_get_region(region_name, &region)) { + printk(BIOS_ERR, "MRC: Could not obtain cache region.\n"); return; } + current_boot = cbmem_find(CBMEM_ID_MRCDATA); + if (!current_boot) { + printk(BIOS_ERR, "MRC: No cache in cbmem.\n"); + goto out; + } + if (!mrc_cache_valid(&region, current_boot)) { - printk(BIOS_ERR, "MRC cache data in cbmem invalid.\n"); - return; + printk(BIOS_ERR, "MRC: Cache data in cbmem invalid.\n"); + goto out; } current_saved = NULL; @@ -326,20 +379,20 @@ static void update_mrc_cache(void *unused) if (current_saved->size == current_boot->size && !memcmp(&current_saved->data[0], &current_boot->data[0], current_saved->size)) { - printk(BIOS_DEBUG, "MRC cache up to date.\n"); - protect_mrc_cache(&region); - return; + printk(BIOS_DEBUG, "MRC: Cache up to date.\n"); + goto out; } } next_slot = mrc_cache_next_slot(&region, current_saved); if (!mrc_slot_valid(&region, next_slot, current_boot)) { - printk(BIOS_DEBUG, "Slot @ %p is invalid.\n", next_slot); + printk(BIOS_DEBUG, "MRC: Slot @ %p is invalid.\n", next_slot); if (!nvm_is_erased(region.base, region.size)) { if (nvm_erase(region.base, region.size) < 0) { - printk(BIOS_DEBUG, "Failure erasing region.\n"); - return; + printk(BIOS_DEBUG, "MRC: Failure erasing " + "region %s.\n", region_name); + goto out; } } next_slot = region.base; @@ -347,16 +400,16 @@ static void update_mrc_cache(void *unused) if (nvm_write((void *)next_slot, current_boot, current_boot->size + sizeof(*current_boot))) { - printk(BIOS_DEBUG, "Failure writing MRC cache to %p.\n", - next_slot); - log_event_cache_update(ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL, - ELOG_MEM_CACHE_UPDATE_STATUS_FAIL); + printk(BIOS_DEBUG, "MRC: Failure writing MRC cache to %s:%p\n", + region_name, next_slot); + log_event_cache_update(slot, ELOG_MEM_CACHE_UPDATE_STATUS_FAIL); } else { - log_event_cache_update(ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL, - ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS); + log_event_cache_update(slot, + ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS); } - protect_mrc_cache(&region); +out: + __protect_mrc_cache(&region, region_name); } BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL); diff --git a/src/soc/intel/common/mrc_cache.h b/src/soc/intel/common/mrc_cache.h index 9b14c1e..79364e4 100644 --- a/src/soc/intel/common/mrc_cache.h +++ b/src/soc/intel/common/mrc_cache.h @@ -19,6 +19,9 @@ #include <stddef.h> #include <stdint.h> +#define DEFAULT_MRC_CACHE "RW_MRC_CACHE" +#define RECOVERY_MRC_CACHE "RECOVERY_MRC_CACHE" + /* Wrapper object to save MRC information. */ struct mrc_saved_data { uint32_t signature; @@ -32,10 +35,16 @@ struct mrc_saved_data { int mrc_cache_get_current(const struct mrc_saved_data **cache); int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, uint32_t version); +int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, + uint32_t version, + const char *region_name); /* Stash the resulting MRC data to be saved in non-volatile storage later. */ int mrc_cache_stash_data(const void *data, size_t size); int mrc_cache_stash_data_with_version(const void *data, size_t size, uint32_t version); +/* Protect MRC cache stored in region whose name is provided. */ +int protect_mrc_cache(const char *name); + #endif /* _COMMON_MRC_CACHE_H_ */

1 0

Patch set updated for coreboot: mainboard/google/reef: Add support for RECOVERY_MRC_CACHE
by Furquan Shaikh 07 Nov '16

07 Nov '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17243 -gerrit commit 002ee7d5985df06bb2756ba91fa5e8a3cccc8ffd Author: Furquan Shaikh <furquan(a)chromium.org> Date: Sun Nov 6 00:07:08 2016 -0700 mainboard/google/reef: Add support for RECOVERY_MRC_CACHE 1. Add RECOVERY_MRC_CACHE region to reef FMAP. 2. Implement helper functions for getting and clearing event for recovery mode with memory retraining. 3. Select HAS_RECOVERY_MRC_CACHE. BUG=chrome-os-partner:59352 BRANCH=None TEST=Verified recovery mode behavior with and without memory training request on reef. Change-Id: I91abc9f8122f1aa3980c6372ab557e56a7a92730 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/mainboard/google/reef/Kconfig | 1 + src/mainboard/google/reef/chromeos.c | 23 +++++++++++++++++++---- src/mainboard/google/reef/chromeos.fmd | 3 ++- 3 files changed, 22 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 6045f47..bb7a531 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -33,6 +33,7 @@ config DRIVER_TPM_I2C_IRQ config CHROMEOS select LID_SWITCH if BASEBOARD_REEF_LAPTOP + select HAS_RECOVERY_MRC_CACHE config DRIVERS_I2C_DA7219 default y diff --git a/src/mainboard/google/reef/chromeos.c b/src/mainboard/google/reef/chromeos.c index 58c2cd8..a55e6c8 100644 --- a/src/mainboard/google/reef/chromeos.c +++ b/src/mainboard/google/reef/chromeos.c @@ -50,16 +50,31 @@ int get_developer_mode_switch(void) int get_recovery_mode_switch(void) { - /* Check if the EC has posted the keyboard recovery event. */ + /* + * Check if the EC has posted the keyboard recovery event with/without + * memory retrain. + */ return !!(google_chromeec_get_events_b() & - EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY)); + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY) | + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT))); +} + +int get_recovery_mode_retrain_switch(void) +{ + /* + * Check if the EC has posted the keyboard recovery event with memory + * retrain. + */ + return !!(google_chromeec_get_events_b() & + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT)); } int clear_recovery_mode_switch(void) { - /* Clear keyboard recovery event. */ + /* Clear all host event bits requesting recovery mode. */ return google_chromeec_clear_events_b( - EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY)); + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY) | + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT)); } int get_write_protect_state(void) diff --git a/src/mainboard/google/reef/chromeos.fmd b/src/mainboard/google/reef/chromeos.fmd index d25a9b2..c6a413d 100644 --- a/src/mainboard/google/reef/chromeos.fmd +++ b/src/mainboard/google/reef/chromeos.fmd @@ -13,7 +13,8 @@ FLASH 16M { } } MISC_RW@0x400000 0x4a000 { - RW_MRC_CACHE@0x0 0x40000 + RECOVERY_MRC_CACHE@0x0 0x10000 + RW_MRC_CACHE@0x10000 0x30000 RW_ELOG@0x40000 0x4000 RW_SHARED@0x44000 0x4000 { SHARED_DATA@0x0 0x2000

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coreboot-gerrit November 2016