coreboot-gerrit January 2016

coreboot-gerrit@coreboot.org

1 participants
2471 discussions

Patch set updated for coreboot: buildgcc: Update coreboot's IASL version to 20151218
by Martin Roth 06 Jan '16

06 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12817 -gerrit commit 9aa24533750aa7572e7436b9d8d9e1830ec9610e Author: Martin Roth <gaumless(a)gmail.com> Date: Wed Dec 30 15:10:13 2015 -0700 buildgcc: Update coreboot's IASL version to 20151218 Update IASL from 20150619 to 20151218 See release notes at acpica.org Change-Id: Ic7e7b3956378ad611069e984d5a59c78e4cb08b1 Signed-off-by: Martin Roth <gaumless(a)gmail.com> --- util/crossgcc/buildgcc | 2 +- .../patches/acpica-unix-20150619_iasl.patch | 12 ---------- .../patches/acpica-unix-20151218_iasl.patch | 27 ++++++++++++++++++++++ .../crossgcc/sum/acpica-unix-20150619.tar.gz.cksum | 1 - .../crossgcc/sum/acpica-unix-20151218.tar.gz.cksum | 1 + 5 files changed, 29 insertions(+), 14 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 31db9cb..cf1c289 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -39,7 +39,7 @@ GCC_VERSION=5.2.0 GCC_AUTOCONF_VERSION=2.69 BINUTILS_VERSION=2.25 GDB_VERSION=7.9.1 -IASL_VERSION=20150619 +IASL_VERSION=20151218 PYTHON_VERSION=3.4.3 EXPAT_VERSION=2.1.0 # CLANG version number diff --git a/util/crossgcc/patches/acpica-unix-20150619_iasl.patch b/util/crossgcc/patches/acpica-unix-20150619_iasl.patch deleted file mode 100644 index 6cb087c..0000000 --- a/util/crossgcc/patches/acpica-unix-20150619_iasl.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -urN acpica-unix-20150619/source/compiler/asloptions.c acpica-unix-20150619/source/compiler/asloptions.c ---- acpica-unix-20150619/source/compiler/asloptions.c 2015-06-19 08:56:19.000000000 -0600 -+++ acpica-unix-20150619/source/compiler/asloptions.c 2015-12-08 10:44:58.816669240 -0700 -@@ -717,6 +717,7 @@ - case '^': - - printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME)); -+ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION); - exit (0); - - case 'a': - diff --git a/util/crossgcc/patches/acpica-unix-20151218_iasl.patch b/util/crossgcc/patches/acpica-unix-20151218_iasl.patch new file mode 100644 index 0000000..e35a360 --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20151218_iasl.patch @@ -0,0 +1,27 @@ +Add coreboot toolchain version string +--- acpica-unix-20151218/source/compiler/asloptions.c ++++ acpica-unix-20151218/source/compiler/asloptions.c +@@ -169,6 +169,7 @@ + if (argc < 2) + { + printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME)); ++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION); + Usage (); + exit (1); + } +@@ -199,6 +200,7 @@ + if (Gbl_DoSignon) + { + printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME)); ++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION); + if (Gbl_IgnoreErrors) + { + printf ("Ignoring all errors, forcing AML file generation\n\n"); +@@ -743,6 +745,7 @@ + case '^': + + printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME)); ++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION); + exit (0); + + case 'a': diff --git a/util/crossgcc/sum/acpica-unix-20150619.tar.gz.cksum b/util/crossgcc/sum/acpica-unix-20150619.tar.gz.cksum deleted file mode 100644 index 4047300..0000000 --- a/util/crossgcc/sum/acpica-unix-20150619.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -ccc86513f10c47762bf46bf4d348c8cbda4336f5 tarballs/acpica-unix-20150619.tar.gz diff --git a/util/crossgcc/sum/acpica-unix-20151218.tar.gz.cksum b/util/crossgcc/sum/acpica-unix-20151218.tar.gz.cksum new file mode 100644 index 0000000..fb9876b --- /dev/null +++ b/util/crossgcc/sum/acpica-unix-20151218.tar.gz.cksum @@ -0,0 +1 @@ +97e430aa6e936e77abeba936345588fff003e280 tarballs/acpica-unix-20151218.tar.gz

1 0

Patch set updated for coreboot: mainboard/asus/kgpe-d16: Enable romstage microcode spinlocks
by Timothy Pearson 06 Jan '16

06 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12809 -gerrit commit 593a2ab4267ca718227e35d8b5414dae1a76ff2a Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Thu Dec 24 13:26:18 2015 -0600 mainboard/asus/kgpe-d16: Enable romstage microcode spinlocks Change-Id: I93687efc5405359286d3197f0e59ec3b118c5100 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/mainboard/asus/kgpe-d16/Kconfig | 1 + src/mainboard/asus/kgpe-d16/romstage.c | 15 ++++++++++++++- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/src/mainboard/asus/kgpe-d16/Kconfig b/src/mainboard/asus/kgpe-d16/Kconfig index 49dd37b..f394ca9 100644 --- a/src/mainboard/asus/kgpe-d16/Kconfig +++ b/src/mainboard/asus/kgpe-d16/Kconfig @@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select PARALLEL_CPU_INIT select HAVE_ROMSTAGE_CONSOLE_SPINLOCK select HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK + select HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK select HAVE_HARD_RESET select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index f9af195..09de4b5 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -336,6 +336,18 @@ void initialize_romstage_nvram_cbfs_lock(void) car_get_var(nvram_cbfs_spinlock) = SPIN_LOCK_UNLOCKED; } +static spinlock_t microcode_cbfs_spinlock CAR_GLOBAL; + +spinlock_t* romstage_microcode_cbfs_lock(void) +{ + return car_get_var_ptr(&microcode_cbfs_spinlock); +} + +void initialize_romstage_microcode_cbfs_lock(void) +{ + car_get_var(microcode_cbfs_spinlock) = SPIN_LOCK_UNLOCKED; +} + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { uint32_t esp; @@ -362,9 +374,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) timestamp_init(timestamp_get()); timestamp_add_now(TS_START_ROMSTAGE); - /* Initialize the printk and nvram CBFS spinlocks */ + /* Initialize the printk, nvram CBFS, and microcode CBFS spinlocks */ initialize_romstage_console_lock(); initialize_romstage_nvram_cbfs_lock(); + initialize_romstage_microcode_cbfs_lock(); /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */

1 0

Patch set updated for coreboot: cpu/amd/microcode: Introduce CBFS access spinlock to avoid IOMMU failure
by Timothy Pearson 06 Jan '16

06 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12063 -gerrit commit 546f20ec697d93a759263673a4c66e6c820aa808 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Fri Aug 28 20:48:17 2015 -0500 cpu/amd/microcode: Introduce CBFS access spinlock to avoid IOMMU failure When microcode updates are enabled, this fixes an issue identical to that described in GIT hash 7b22d84d: * drivers/pc80: Add optional spinlock for nvram CBFS access Change-Id: Ib7e8cb171f44833167053ca98a85cca23021dfba Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/Kconfig | 4 ++++ src/arch/x86/include/arch/smp/spinlock.h | 7 ++++++- src/cpu/amd/microcode/microcode.c | 19 ++++++++++++++++++- 3 files changed, 28 insertions(+), 2 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index a8b0869..f6702ea 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -489,6 +489,10 @@ config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK SR565x, that cannot handle concurrent CBFS accesses from multiple APs during early startup. +config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK + bool + default n + config HAVE_MONOTONIC_TIMER def_bool n help diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h index 057d9e3..39a81d2 100644 --- a/src/arch/x86/include/arch/smp/spinlock.h +++ b/src/arch/x86/include/arch/smp/spinlock.h @@ -1,7 +1,10 @@ #ifndef ARCH_SMP_SPINLOCK_H #define ARCH_SMP_SPINLOCK_H -#if !defined(__PRE_RAM__) || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) +#if !defined(__PRE_RAM__) \ + || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \ + || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) \ + || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) /* * Your basic SMP spinlocks, allowing only a single CPU anywhere @@ -16,6 +19,8 @@ spinlock_t *romstage_console_lock(void); void initialize_romstage_console_lock(void); spinlock_t* romstage_nvram_cbfs_lock(void); void initialize_romstage_nvram_cbfs_lock(void); +spinlock_t* romstage_microcode_cbfs_lock(void); +void initialize_romstage_microcode_cbfs_lock(void); #endif #define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 } diff --git a/src/cpu/amd/microcode/microcode.c b/src/cpu/amd/microcode/microcode.c index 37d395a..314d070 100644 --- a/src/cpu/amd/microcode/microcode.c +++ b/src/cpu/amd/microcode/microcode.c @@ -20,6 +20,7 @@ #include <cpu/amd/microcode.h> #include <cbfs.h> #include <arch/io.h> +#include <smp/spinlock.h> #define UCODE_DEBUG(fmt, args...) \ do { printk(BIOS_DEBUG, "[microcode] "fmt, ##args); } while(0) @@ -197,14 +198,30 @@ void amd_update_microcode_from_cbfs(uint32_t equivalent_processor_rev_id) return; } +#ifdef __PRE_RAM__ +#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) + spin_lock(romstage_microcode_cbfs_lock()); +#endif +#endif + ucode = cbfs_boot_map_with_leak(microcode_cbfs_file[i], CBFS_TYPE_MICROCODE, &ucode_len); if (!ucode) { UCODE_DEBUG("microcode file not found. Skipping updates.\n"); - +#ifdef __PRE_RAM__ +#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) + spin_unlock(romstage_microcode_cbfs_lock()); +#endif +#endif return; } amd_update_microcode(ucode, ucode_len, equivalent_processor_rev_id); + +#ifdef __PRE_RAM__ +#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) + spin_unlock(romstage_microcode_cbfs_lock()); +#endif +#endif } }

1 0

Patch set updated for coreboot: cpu/amd/microcode: Introduce CBFS access spinlock to avoid IOMMU failure
by Timothy Pearson 06 Jan '16

06 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12063 -gerrit commit e7d9bcd9071c2bfbac83582a0e5d02b6f7ea736c Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Fri Aug 28 20:48:17 2015 -0500 cpu/amd/microcode: Introduce CBFS access spinlock to avoid IOMMU failure Change-Id: Ib7e8cb171f44833167053ca98a85cca23021dfba Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/Kconfig | 4 ++++ src/arch/x86/include/arch/smp/spinlock.h | 7 ++++++- src/cpu/amd/microcode/microcode.c | 24 +++++++++++++++++++++++- 3 files changed, 33 insertions(+), 2 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index a8b0869..f6702ea 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -489,6 +489,10 @@ config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK SR565x, that cannot handle concurrent CBFS accesses from multiple APs during early startup. +config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK + bool + default n + config HAVE_MONOTONIC_TIMER def_bool n help diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h index 057d9e3..39a81d2 100644 --- a/src/arch/x86/include/arch/smp/spinlock.h +++ b/src/arch/x86/include/arch/smp/spinlock.h @@ -1,7 +1,10 @@ #ifndef ARCH_SMP_SPINLOCK_H #define ARCH_SMP_SPINLOCK_H -#if !defined(__PRE_RAM__) || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) +#if !defined(__PRE_RAM__) \ + || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \ + || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) \ + || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) /* * Your basic SMP spinlocks, allowing only a single CPU anywhere @@ -16,6 +19,8 @@ spinlock_t *romstage_console_lock(void); void initialize_romstage_console_lock(void); spinlock_t* romstage_nvram_cbfs_lock(void); void initialize_romstage_nvram_cbfs_lock(void); +spinlock_t* romstage_microcode_cbfs_lock(void); +void initialize_romstage_microcode_cbfs_lock(void); #endif #define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 } diff --git a/src/cpu/amd/microcode/microcode.c b/src/cpu/amd/microcode/microcode.c index 37d395a..5f3280c 100644 --- a/src/cpu/amd/microcode/microcode.c +++ b/src/cpu/amd/microcode/microcode.c @@ -21,6 +21,12 @@ #include <cbfs.h> #include <arch/io.h> +#ifdef __PRE_RAM__ +#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) +#include <smp/spinlock.h> +#endif +#endif + #define UCODE_DEBUG(fmt, args...) \ do { printk(BIOS_DEBUG, "[microcode] "fmt, ##args); } while(0) @@ -197,14 +203,30 @@ void amd_update_microcode_from_cbfs(uint32_t equivalent_processor_rev_id) return; } +#ifdef __PRE_RAM__ +#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) + spin_lock(romstage_microcode_cbfs_lock()); +#endif +#endif + ucode = cbfs_boot_map_with_leak(microcode_cbfs_file[i], CBFS_TYPE_MICROCODE, &ucode_len); if (!ucode) { UCODE_DEBUG("microcode file not found. Skipping updates.\n"); - +#ifdef __PRE_RAM__ +#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) + spin_unlock(romstage_microcode_cbfs_lock()); +#endif +#endif return; } amd_update_microcode(ucode, ucode_len, equivalent_processor_rev_id); + +#ifdef __PRE_RAM__ +#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) + spin_unlock(romstage_microcode_cbfs_lock()); +#endif +#endif } }

1 0

New patch to review for coreboot: toolchain.inc: test IASL by version string instead of number
by Martin Roth 06 Jan '16

06 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12847 -gerrit commit eac8eae42ecbaa2be97077324517fbffcc787004 Author: Martin Roth <martinroth(a)google.com> Date: Tue Jan 5 16:14:12 2016 -0700 toolchain.inc: test IASL by version string instead of number Test that the coreboot toolchain version of IASL is being used by looking for the string 'coreboot toolchain' instead of a specific version number. While this may cause people to have to rebuild their toolchains again now, it helps to prevent toolchain failures when bisecting in the future. Change-Id: I9913eeae8f29ddc3ec8c70077c05d898595eb283 Signed-off-by: Martin Roth <martinroth(a)google.com> --- toolchain.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/toolchain.inc b/toolchain.inc index 5836a19..99d1706 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -160,7 +160,7 @@ $(foreach arch,$(sort $(foreach stage,$(COREBOOT_STANDARD_STAGES),$(ARCH-$(stage $(eval COMPILERFAIL:=1)$(warning The coreboot toolchain for '$(arch)' architecture was not found.))) #if iasl doesn't match the current coreboot version, fail the test #TODO: Figure out if iasl is even needed for the build. -$(if $(shell if [ -n "$(IASL)" ]; then $(IASL) -v 2>&1 | grep -q "$(shell util/crossgcc/buildgcc -s iasl)" || echo not-coreboot; else echo not-coreboot; fi), \ +$(if $(shell if [ -n "$(IASL)" ]; then $(IASL) -v 2>&1 | grep -q "coreboot toolchain" || echo not-coreboot; else echo not-coreboot; fi), \ $(eval COMPILERFAIL:=1)$(eval IASLFAIL:=1)$(warning The coreboot toolchain version of iasl '$(shell util/crossgcc/buildgcc -s iasl)' was not found)) else #$(CONFIG_ANY_TOOLCHAIN) $(foreach arch,$(sort $(foreach stage,$(COREBOOT_STANDARD_STAGES),$(ARCH-$(stage)-y))), \

1 0

Patch merged into coreboot/master: toolchain.inc: Test for valid toolchain when ANY_TOOLCHAIN is used
by gerrit＠coreboot.org 06 Jan '16

06 Jan '16

the following patch was just integrated into master: commit af91b8b086b6fd087a99a4e88ad76e46defacf9b Author: Martin Roth <martinroth(a)google.com> Date: Mon Dec 7 14:33:44 2015 -0700 toolchain.inc: Test for valid toolchain when ANY_TOOLCHAIN is used Even when ANY_TOOLCHAIN is selected, a valid compiler for the requested architecture is needed. Change-Id: If1a0a1ca6b726e8e58d29c69de93546510582548 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12681 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/12681 for details. -gerrit

1 0

New patch to review for coreboot: Makefile: Add toolchain version check
by Martin Roth 06 Jan '16

06 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12846 -gerrit commit 038eb244f71f8da7fe3aba3ca21c607c7b06f390 Author: Martin Roth <martinroth(a)google.com> Date: Tue Jan 5 16:07:42 2016 -0700 Makefile: Add toolchain version check This is an initial check for the coreboot toolchain versions. It currently checks binutils, gcc, clang, and iasl. The other components are slightly more difficult to test, but should follow on shortly. This supplies two targets to check the toolchain: test_toolchain_and_halt - dies if the toolchain is not the current version that is specified in the tree. test_toolchain - will print the status of the toolchain, but will continue to build if called as one of several targets. for example 'make test_toolchain all' will print the status, and then build the tree even if a toolchain component is out of date. Change-Id: I41daf6c4545c01dc21231d78fd081bbcf77c4726 Signed-off-by: Martin Roth <martinroth(a)google.com> --- Makefile.inc | 11 +++++++++++ toolchain.inc | 15 +++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/Makefile.inc b/Makefile.inc index 000ad63..fb7bed9 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -486,6 +486,7 @@ help_toolchain help:: @echo ' crossgcc-clean - Remove all built coreboot cross-compilers' @echo ' iasl - Build coreboot IASL compiler (built by all cross targets)' @echo ' clang - Build coreboot clang compiler' + @echo ' test_toolchain - Reports if toolchain components are out of date' @echo ' crossgcc-ARCH - Build cross-compiler for specific architecture' @echo ' crosstools-ARCH - Build cross-compiler with GDB for specific architecture' @echo ' ARCH can be "i386", "x64", "arm", "aarch64", "mips", "riscv", or "power8"' @@ -559,6 +560,16 @@ crossgcc-clean: clean-for-update tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(FMAPTOOL) $(RMODTOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(IFDFAKE) $(CBOOTIMAGE) $(AMDFWTOOL) +test_toolchain_and_halt test_toolchain: +ifeq ($(COMPILER_OUT_OF_DATE),1) + echo "The coreboot toolchain is not the current version" +ifneq ($(filter test_toolchain_and_halt,$(MAKECMDGOALS)),) +$(error ) +endif # ifneq ($(filter crossgcc_check_and_halt,$(MAKECMDGOALS)),) +else + echo "The coreboot tools are the current version" +endif # ifeq ($(COMPILER_OUT_OF_DATE),1) + ########################################################################### # Common recipes for all stages ########################################################################### diff --git a/toolchain.inc b/toolchain.inc index f2a6232..609fe44 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -185,3 +185,18 @@ $(error Halting the build) endif #($(COMPILERFAIL),1) endif #($(NOCOMPILE),1) + +ifneq ($(MAKECMDGOALS),) +ifneq ($(filter test_toolchain%,$(MAKECMDGOALS)),) +$(foreach arch, $(ARCH_SUPPORTED), \ + $(if $(shell if [ -n "$(GCC_CC_$(arch))" ]; then $(GCC_CC_$(arch)) -v 2>&1 | grep -q "$(shell util/crossgcc/buildgcc -s gcc)" || echo not-current; fi), \ + $(eval COMPILER_OUT_OF_DATE:=1)$(warning The coreboot toolchain version of gcc for '$(arch)' architecture is not the current version.)) \ + $(if $(shell if [ -n "$(CLANG_CC_$(arch))" ]; then $(CLANG_CC_$(arch)) -v 2>&1 | grep -q "$(shell util/crossgcc/buildgcc -s clang)" || echo not-current; fi), \ + $(eval COMPILER_OUT_OF_DATE:=1)$(warning The coreboot toolchain version of clang for '$(arch)' architecture is not the current version.)) \ + $(if $(shell if [ "$(OBJDUMP_$(arch))" != "invalidobjdump" ]; then $(OBJDUMP_$(arch)) -v 2>&1 | grep -q "$(shell util/crossgcc/buildgcc -s binutils)" || echo not-current; fi), \ + $(eval COMPILER_OUT_OF_DATE:=1)$(warning The coreboot toolchain version of binutils for '$(arch)' architecture is not the current version.)) \ +) +$(if $(shell if [ -n "$(IASL)" ]; then $(IASL) -v 2>&1 | grep -q "$(shell util/crossgcc/buildgcc -s iasl)" || echo not-coreboot; fi), \ + $(eval COMPILER_OUT_OF_DATE:=1)$(warning The coreboot toolchain version of iasl is not the current version)) +endif # ifneq ($(filter crossgcc_check%,$(MAKECMDGOALS)),) +endif # ifneq ($(MAKECMDGOALS),)

1 0

New patch to review for coreboot: xcompile: Quote variables to prevent globbing and splitting.
by Martin Roth 05 Jan '16

05 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12845 -gerrit commit 78616a467ac56b16b76d8f7eb6d0c5493b356166 Author: Martin Roth <martinroth(a)google.com> Date: Tue Jan 5 15:55:44 2016 -0700 xcompile: Quote variables to prevent globbing and splitting. Quoting variables prevents word splitting and glob expansion, and prevents the script from breaking when input contains spaces, line feeds, glob characters and such. See shellcheck warning SC2086 Change-Id: Ib6ca46b64a621c4bea5c33ac312f2824b0386235 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/xcompile/xcompile | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 48df75b..b3dd074 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -52,7 +52,7 @@ program_exists() { } -if [ "$(${XGCCPATH}/iasl 2>/dev/null | grep -c ACPI)" -gt 0 ]; then +if [ "$("${XGCCPATH}/iasl" 2>/dev/null | grep -c ACPI)" -gt 0 ]; then IASL=${XGCCPATH}iasl elif [ "$(iasl 2>/dev/null | grep -c ACPI)" -gt 0 ]; then IASL=iasl @@ -107,11 +107,11 @@ testas() { rm -f "$obj_file" [ -n "$use_dash_twidth" ] && use_dash_twidth="--$twidth" [ -n "$endian" ] && endian="-$endian" - ${gccprefix}as $use_dash_twidth $endian -o "$obj_file" $TMPFILE \ + "${gccprefix}as" $use_dash_twidth $endian -o "$obj_file" "$TMPFILE" \ 2>/dev/null || return 1 # Check output content type. - local obj_type="$(LANG=C LC_ALL= ${gccprefix}objdump -p $obj_file 2>/dev/null)" + local obj_type="$(LANG=C LC_ALL='' "${gccprefix}"objdump -p "$obj_file" 2>/dev/null)" local obj_arch="$(expr "$obj_type" : '.*format $.[a-z0-9-]*$')" [ "$obj_arch" = "$full_arch" ] || return 1 @@ -329,8 +329,8 @@ test_architecture() { unset TABI TARCH TBFDARCH TCLIST TENDIAN TSUPP TWIDTH unset CC_RT_EXTRA_GCC CC_RT_EXTRA_CLANG unset GCC CLANG - if type arch_config_$architecture > /dev/null; then - arch_config_$architecture + if type "arch_config_$architecture" > /dev/null; then + "arch_config_$architecture" else die "no architecture definition for $architecture" fi @@ -339,7 +339,7 @@ test_architecture() { # environment variable. # Ex: CROSS_COMPILE_arm="armv7a-cros-linux-gnueabi-" # CROSS_COMPILE_x86="i686-pc-linux-gnu-" - search="$(eval echo \$CROSS_COMPILE_$architecture 2>/dev/null)" + search="$(eval echo "\$CROSS_COMPILE_$architecture" 2>/dev/null)" search="$search $CROSS_COMPILE" for toolchain in $TCLIST; do search="$search $XGCCPATH$toolchain-$TABI-" @@ -382,7 +382,7 @@ test_architecture() { # This loops over all supported architectures. for architecture in $SUPPORTED_ARCHITECTURES; do - test_architecture $architecture + test_architecture "$architecture" detect_special_flags "$architecture" detect_compiler_runtime "$architecture" report_arch_toolchain

1 0

New patch to review for coreboot: xcompile: Use local variables in the test functions
by Martin Roth 05 Jan '16

05 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12844 -gerrit commit 7707c0537e443661d3b54229266010897c86e3b4 Author: Martin Roth <martinroth(a)google.com> Date: Tue Jan 5 15:49:32 2016 -0700 xcompile: Use local variables in the test functions Using the local variables instead of positional parameters helps readability. - Add and use the local variables in testcc. - Use the existing local variables in testld. Change-Id: Ice13288b830a7aa043b360eaee8e36f060589a18 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/xcompile/xcompile | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index b336f88..48df75b 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -74,11 +74,13 @@ HOSTCC?=${HOSTCC} EOF testcc() { + local cc="$1" + local cflags="$2" local tmp_c="$TMPFILE.c" local tmp_o="$TMPFILE.o" rm -f "$tmp_c" "$tmp_o" echo "void _start(void) {}" >"$tmp_c" - $1 -nostdlib -Werror $2 -c "$tmp_c" -o "$tmp_o" >/dev/null 2>&1 + "$cc" -nostdlib -Werror $cflags -c "$tmp_c" -o "$tmp_o" >/dev/null 2>&1 } testld() { @@ -89,8 +91,8 @@ testld() { local tmp_o="$TMPFILE.o" local tmp_elf="$TMPFILE.elf" rm -f "$tmp_elf" - testcc $1 $2 && - $3 -nostdlib -static $4 -o "$tmp_elf" "$tmp_o" >/dev/null 2>&1 + testcc "$gcc" "$cflags" && + $ld -nostdlib -static $ldflags -o "$tmp_elf" "$tmp_o" >/dev/null 2>&1 } testas() {

1 0

New patch to review for coreboot: xcompile: use $() instead of backticks
by Martin Roth 05 Jan '16

05 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12843 -gerrit commit ccce82014a5cb5b0d3a440375a803204f553001f Author: Martin Roth <martinroth(a)google.com> Date: Tue Jan 5 15:44:02 2016 -0700 xcompile: use $() instead of backticks While the backtick syntax isn't actually depricated, the $() syntax is preferred. Since both styles were being used in this script, settle on the new standard for all cases. Change-Id: I33770d666781b4fa34c909411e0d220c2540dbb4 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/xcompile/xcompile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index c8cf6e9..b336f88 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -19,15 +19,15 @@ TMPFILE="" XGCCPATH=$1 # libpayload crossgcc path -if [ -d "`pwd`/../../util/crossgcc/xgcc/bin/" ] +if [ -d "$(pwd)/../../util/crossgcc/xgcc/bin/" ] then - XGCCPATH=${XGCCPATH:-"`pwd`/../../util/crossgcc/xgcc/bin/"} + XGCCPATH=${XGCCPATH:-"$(pwd)/../../util/crossgcc/xgcc/bin/"} fi # coreboot crossgcc path -if [ -d "`pwd`/util/crossgcc/xgcc/bin/" ] +if [ -d "$(pwd)/util/crossgcc/xgcc/bin/" ] then - XGCCPATH=${XGCCPATH:-"`pwd`/util/crossgcc/xgcc/bin/"} + XGCCPATH=${XGCCPATH:-"$(pwd)/util/crossgcc/xgcc/bin/"} fi die() { @@ -187,9 +187,9 @@ detect_special_flags() { detect_compiler_runtime() { test -z "$CLANG" || \ - CC_RT_CLANG="`${CLANG} ${CFLAGS_CLANG} -print-librt-file-name 2>/dev/null`" + CC_RT_CLANG="$(${CLANG} ${CFLAGS_CLANG} -print-librt-file-name 2>/dev/null)" test -z "$GCC" || \ - CC_RT_GCC="`${GCC} ${CFLAGS_GCC} -print-libgcc-file-name`" + CC_RT_GCC="$(${GCC} ${CFLAGS_GCC} -print-libgcc-file-name)" } report_arch_toolchain() {

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2016