coreboot-gerrit June 2015

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Patch set updated for coreboot: e358d64 AMD K8 fam10: Eliminate local variable min_bus
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8364 -gerrit commit e358d64e94175ee080cba81d3f6db2e51439f90d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Feb 5 08:12:20 2015 +0200 AMD K8 fam10: Eliminate local variable min_bus Some cases of max==0xff wrapping around the 8-bit link->secondary register remain to be solved. Change-Id: I01e2ab6b2f23a03dbac49207ab584eccd1ca9b1f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/northbridge/amd/amdfam10/northbridge.c | 19 +++++++------------ src/northbridge/amd/amdk8/northbridge.c | 16 +++++++--------- 2 files changed, 14 insertions(+), 21 deletions(-) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index caf5410..efd8a70 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -199,7 +199,6 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool unsigned int next_unitid; u32 ht_c_index; u32 ht_unitid_base[4]; // here assume only 4 HT device on chain - u32 min_bus; u32 max_devfn; /* Check for connected link. */ @@ -220,25 +219,21 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool */ if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) { - min_bus = ++max; + max++; } else if (is_sblink) { - // first chain will on bus 0 - min_bus = max; /* actually max is 0 here */ + } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) { - min_bus = ++max; + max++; } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) { - // second chain will be on 0x40, third 0x80, forth 0xc0 - // i would refined that to 2, 3, 4 ==> 0, 0x, 40, 0x80, 0xc0 - // >4 will use more segments, // We can have 16 segmment and every segment have 256 bus, // For that case need the kernel support mmio pci config. /* One node can have 8 link and segn is the same. */ - min_bus = (((max & 0xff) >> 3) + 1) << 3; - max = min_bus; + max++; + max = ALIGN_UP(max, 8); } - link->secondary = min_bus; + link->secondary = max; link->subordinate = link->secondary; ht_route_link(link, HT_ROUTE_SCAN); @@ -255,7 +250,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool } //if ext conf is enabled, only need use 0x1f - if (min_bus == 0) + if (link->secondary == 0) max_devfn = (0x17<<3) | 7; else max_devfn = (0x1f<<3) | 7; diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index b27404e..7826749 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -141,7 +141,6 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ u32 config_busses; u32 free_reg, config_reg; u32 ht_unitid_base[4]; // here assume only 4 HT device on chain - u32 min_bus; u32 max_devfn; link->cap = 0x80 + (link->link_num * 0x20); @@ -180,19 +179,18 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ * so we set the subordinate bus number to 0xff for the moment. */ if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) { - min_bus = ++max; + max++; } else if (is_sblink) { - // first chain will on bus 0 - min_bus = max; /* actually max is 0 here */ + } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) { - min_bus = ++max; + max++; } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) { /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ - min_bus = (max & ~0x3f) + 0x40; - max = min_bus; + max++; + max = ALIGN_UP(max, 0x40); } - link->secondary = min_bus; + link->secondary = max; link->subordinate = link->secondary; ht_route_link(link, HT_ROUTE_SCAN); @@ -214,7 +212,7 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ ht_unitid_base[i] = 0x20; } - if (min_bus == 0) + if (link->secondary == 0) max_devfn = (0x17<<3) | 7; else max_devfn = (0x1f<<3) | 7;

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Patch set updated for coreboot: fc3078c AMD K8 fam10: Refactor HT link connection test
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8562 -gerrit commit fc3078cbc2ea8a8be53ea8bb1da18f7cd6312d95 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 23 00:34:26 2015 +0200 AMD K8 fam10: Refactor HT link connection test Change-Id: I1e935a6b848a59f7f2e58779bceea599032de9e3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/hypertransport.c | 17 +++++++++++++ src/include/device/device.h | 1 + src/include/device/hypertransport.h | 7 ++++++ src/northbridge/amd/amdfam10/northbridge.c | 38 ++++++++++++------------------ src/northbridge/amd/amdk8/northbridge.c | 37 ++++++++++++----------------- 5 files changed, 55 insertions(+), 45 deletions(-) diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c index 584ac78..5aea5e6 100644 --- a/src/device/hypertransport.c +++ b/src/device/hypertransport.c @@ -507,6 +507,23 @@ void ht_scan_bridge(struct device *dev) do_pci_scan_bridge(dev, hypertransport_scan_chain_x); } +bool ht_is_non_coherent_link(struct bus *link) +{ + u32 link_type; + do { + link_type = pci_read_config32(link->dev, link->cap + 0x18); + } while (link_type & ConnectionPending); + + if (!(link_type & LinkConnected)) + return false; + + do { + link_type = pci_read_config32(link->dev, link->cap + 0x18); + } while (!(link_type & InitComplete)); + + return !!(link_type & NonCoherent); +} + /** Default device operations for hypertransport bridges */ static struct pci_operations ht_bus_ops_pci = { .set_subsystem = 0, diff --git a/src/include/device/device.h b/src/include/device/device.h index 396ecf8..851c27d 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -90,6 +90,7 @@ struct bus { unsigned reset_needed : 1; unsigned disable_relaxed_ordering : 1; + unsigned ht_link_up : 1; }; /* diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h index 22e0ac4..b2ebecf 100644 --- a/src/include/device/hypertransport.h +++ b/src/include/device/hypertransport.h @@ -3,6 +3,13 @@ #include <device/hypertransport_def.h> +/* TODO: Check HT specs for better names for these. */ +#define LinkConnected (1 << 0) +#define InitComplete (1 << 1) +#define NonCoherent (1 << 2) +#define ConnectionPending (1 << 4) +bool ht_is_non_coherent_link(struct bus *link); + unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned *ht_unit_base, unsigned offset_unitid); void ht_scan_bridge(struct device *dev); diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index df0d712..6c56998 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -141,23 +141,6 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn) } -static bool is_non_coherent_link(struct device *dev, struct bus *link) -{ - u32 link_type; - do { - link_type = pci_read_config32(dev, link->cap + 0x18); - } while (link_type & ConnectionPending); - - if (!(link_type & LinkConnected)) - return false; - - do { - link_type = pci_read_config32(dev, link->cap + 0x18); - } while (!(link_type & InitComplete)); - - return !!(link_type & NonCoherent); -} - typedef enum { HT_ROUTE_CLOSE, HT_ROUTE_SCAN, @@ -200,11 +183,6 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_devfn; - /* Check for connected link. */ - link->cap = 0x80 + (link->link_num * 0x20); - if (!is_non_coherent_link(dev, link)) - return max; - /* See if there is an available configuration space mapping * register in function 1. */ @@ -298,6 +276,17 @@ static void relocate_sb_ht_chain(void) } } +static void trim_ht_chain(struct device *dev) +{ + struct bus *link; + + /* Check for connected link. */ + for (link = dev->link_list; link; link = link->next) { + link->cap = 0x80 + (link->link_num * 0x20); + link->ht_link_up = ht_is_non_coherent_link(link); + } +} + static void amdfam10_scan_chains(device_t dev) { unsigned nodeid; @@ -308,9 +297,12 @@ static void amdfam10_scan_chains(device_t dev) nodeid = amdfam10_nodeid(dev); /* Do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0 */ + trim_ht_chain(dev); + for (link = dev->link_list; link; link = link->next) { bool is_sblink = (nodeid == 0) && (link->link_num == sblink); - max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max); + if (link->ht_link_up) + max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max); } dev->bus->subordinate = max; diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 84c1144..8d8e1ef 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -79,23 +79,6 @@ static void f1_write_config32(unsigned reg, u32 value) } } -static bool is_non_coherent_link(struct device *dev, struct bus *link) -{ - u32 link_type; - do { - link_type = pci_read_config32(dev, link->cap + 0x18); - } while (link_type & ConnectionPending); - - if (!(link_type & LinkConnected)) - return false; - - do { - link_type = pci_read_config32(dev, link->cap + 0x18); - } while (!(link_type & InitComplete)); - - return !!(link_type & NonCoherent); -} - typedef enum { HT_ROUTE_CLOSE, HT_ROUTE_SCAN, @@ -143,10 +126,6 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_devfn; - link->cap = 0x80 + (link->link_num * 0x20); - if (!is_non_coherent_link(dev, link)) - return max; - /* See if there is an available configuration space mapping * register in function 1. */ @@ -267,6 +246,17 @@ static void relocate_sb_ht_chain(void) } } +static void trim_ht_chain(struct device *dev) +{ + struct bus *link; + + /* Check for connected links. */ + for (link = dev->link_list; link; link = link->next) { + link->cap = 0x80 + (link->link_num * 0x20); + link->ht_link_up = ht_is_non_coherent_link(link); + } +} + static void amdk8_scan_chains(device_t dev) { unsigned nodeid; @@ -278,9 +268,12 @@ static void amdk8_scan_chains(device_t dev) if (nodeid == 0) sblink = (pci_read_config32(dev, 0x64)>>8) & 3; + trim_ht_chain(dev); + for (link = dev->link_list; link; link = link->next) { bool is_sblink = (nodeid == 0) && (link->link_num == sblink); - max = amdk8_scan_chain(dev, nodeid, link, is_sblink, max); + if (link->ht_link_up) + max = amdk8_scan_chain(dev, nodeid, link, is_sblink, max); } dev->bus->subordinate = max;

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Patch set updated for coreboot: f7bdf18 AMD K8 fam10: Refactor logic around SB_HT_CHAIN_ON_BUS0
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8365 -gerrit commit f7bdf18d63637a8be7ce2c53d8d3662345d6676c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Feb 5 13:36:54 2015 +0200 AMD K8 fam10: Refactor logic around SB_HT_CHAIN_ON_BUS0 Change-Id: I452a93af452073eeac4e6cb9bbc232dc59e911c1 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/northbridge/amd/amdfam10/northbridge.c | 14 +++----------- src/northbridge/amd/amdk8/northbridge.c | 12 ++++-------- 2 files changed, 7 insertions(+), 19 deletions(-) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index fb963f6..98f41f3 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -216,20 +216,12 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool * so we set the subordinate bus number to 0xff for the moment. */ - if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) { + if ((CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) || !is_sblink) max++; - } else if (is_sblink) { - } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) { - max++; - } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) { - // We can have 16 segmment and every segment have 256 bus, - // For that case need the kernel support mmio pci config. - - /* One node can have 8 link and segn is the same. */ - max++; + /* One node can have 8 link and segn is the same. */ + if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) && !is_sblink) max = ALIGN_UP(max, 8); - } link->secondary = max; link->subordinate = link->secondary; diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index e087888..7184c38 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -178,17 +178,13 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ * We have no idea how many busses are behind this bridge yet, * so we set the subordinate bus number to 0xff for the moment. */ - if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) { - max++; - } else if (is_sblink) { - } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) { - max++; - } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) { - /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ + if ((CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) || !is_sblink) max++; + + /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ + if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) && !is_sblink) max = ALIGN_UP(max, 0x40); - } link->secondary = max; link->subordinate = link->secondary;

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Patch set updated for coreboot: 55159be AMD K8 fam10: Drop redundant parameters on scan_chain()
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8563 -gerrit commit 55159bea564db6457be6daea47f6a33b8dabac57 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 28 12:03:20 2015 +0200 AMD K8 fam10: Drop redundant parameters on scan_chain() Change-Id: I6041b666e6792cf97b8273ed54832d86af8ed23e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/northbridge/amd/amdfam10/northbridge.c | 16 +++++----------- src/northbridge/amd/amdk8/northbridge.c | 16 ++++++---------- 2 files changed, 11 insertions(+), 21 deletions(-) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 6c56998..2575f77 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -172,17 +172,16 @@ static void ht_route_link(struct bus *link, scan_state mode) } -static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_sblink, - u32 max) +static u32 amdfam10_scan_chain(struct bus *link, u32 max) { -// I want to put sb chain in bus 0 can I? - - int i; unsigned int next_unitid; u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_devfn; + u32 nodeid = amdfam10_nodeid(link->dev); + bool is_sblink = (nodeid == 0) && (link->link_num == sysconf.sblk); + /* See if there is an available configuration space mapping * register in function 1. */ @@ -289,20 +288,15 @@ static void trim_ht_chain(struct device *dev) static void amdfam10_scan_chains(device_t dev) { - unsigned nodeid; struct bus *link; - unsigned sblink = sysconf.sblk; unsigned int max = dev->bus->subordinate; - nodeid = amdfam10_nodeid(dev); - /* Do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0 */ trim_ht_chain(dev); for (link = dev->link_list; link; link = link->next) { - bool is_sblink = (nodeid == 0) && (link->link_num == sblink); if (link->ht_link_up) - max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max); + max = amdfam10_scan_chain(link, max); } dev->bus->subordinate = max; diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 8d8e1ef..a8f59f0 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -116,8 +116,7 @@ static u32 amdk8_nodeid(device_t dev) return (dev->path.pci.devfn >> 3) - 0x18; } -static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_sblink, - u32 max) +static u32 amdk8_scan_chain(struct bus *link, u32 max) { int i; unsigned int next_unitid; @@ -126,6 +125,10 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_devfn; + u32 nodeid = amdk8_nodeid(link->dev); + unsigned int sblink = (pci_read_config32(link->dev, 0x64)>>8) & 3; + bool is_sblink = (nodeid == 0) && (link->link_num == sblink); + /* See if there is an available configuration space mapping * register in function 1. */ @@ -259,21 +262,14 @@ static void trim_ht_chain(struct device *dev) static void amdk8_scan_chains(device_t dev) { - unsigned nodeid; struct bus *link; - unsigned sblink = 0; unsigned int max = dev->bus->subordinate; - nodeid = amdk8_nodeid(dev); - if (nodeid == 0) - sblink = (pci_read_config32(dev, 0x64)>>8) & 3; - trim_ht_chain(dev); for (link = dev->link_list; link; link = link->next) { - bool is_sblink = (nodeid == 0) && (link->link_num == sblink); if (link->ht_link_up) - max = amdk8_scan_chain(dev, nodeid, link, is_sblink, max); + max = amdk8_scan_chain(link, max); } dev->bus->subordinate = max;

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Patch set updated for coreboot: a2ecd91 AMD K8 fam10: Eliminate local variables busn and max_bus
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8362 -gerrit commit a2ecd91c06cb2a39c6bb88c752261d96c2714bf9 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Feb 22 09:22:55 2015 +0200 AMD K8 fam10: Eliminate local variables busn and max_bus Change-Id: I297de09dcf93511acece4441593ef958a390fddb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/northbridge/amd/amdfam10/northbridge.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index ff5dc31..fd134a2 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -199,11 +199,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool unsigned int next_unitid; u32 ht_c_index; u32 ht_unitid_base[4]; // here assume only 4 HT device on chain - u32 max_bus; u32 min_bus; -#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 1 - u32 busn = max&0xff; -#endif u32 max_devfn; /* Check for connected link. */ @@ -232,7 +228,8 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool // i would refined that to 2, 3, 4 ==> 0, 0x, 40, 0x80, 0xc0 // >4 will use more segments, We can have 16 segmment and every segment have 256 bus, For that case need the kernel support mmio pci config. else { - min_bus = ((busn>>3) + 1) << 3; // one node can have 8 link and segn is the same + /* One node can have 8 link and segn is the same. */ + min_bus = (((max & 0xff) >> 3) + 1) << 3; } max = min_bus; #else @@ -244,7 +241,6 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool #else min_bus = ++max; #endif - max_bus = 0xfc; link->secondary = min_bus; link->subordinate = link->secondary;

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Patch set updated for coreboot: 3efee3e AMD K8 fam10: Drop local is_sblink in scan_chains
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8564 -gerrit commit 3efee3e51047d41b07a32361b3b865e951a74f4c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Feb 22 08:54:45 2015 +0200 AMD K8 fam10: Drop local is_sblink in scan_chains We can define is_sblink = (max == 0) as sblink is always the very first chain we scan. Change-Id: Ibd6b3ea23954ca919ae148604bca2495e9f8753b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/northbridge/amd/amdfam10/northbridge.c | 9 +++------ src/northbridge/amd/amdk8/northbridge.c | 9 +++------ 2 files changed, 6 insertions(+), 12 deletions(-) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 2575f77..26a835b 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -179,9 +179,6 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_devfn; - u32 nodeid = amdfam10_nodeid(link->dev); - bool is_sblink = (nodeid == 0) && (link->link_num == sysconf.sblk); - /* See if there is an available configuration space mapping * register in function 1. */ @@ -193,11 +190,11 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) * so we set the subordinate bus number to 0xff for the moment. */ - if (!is_sblink) + if (max != 0) max++; /* One node can have 8 link and segn is the same. */ - if (CONFIG_HT_CHAIN_DISTRIBUTE && !is_sblink) + if (CONFIG_HT_CHAIN_DISTRIBUTE) max = ALIGN_UP(max, 8); link->secondary = max; @@ -221,7 +218,7 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) else max_devfn = (0x1f<<3) | 7; - next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(is_sblink)); + next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(link->secondary == 0)); /* Now that nothing is overlapping it is safe to scan the children. */ pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index a8f59f0..2783ad1 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -124,10 +124,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) u32 free_reg, config_reg; u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_devfn; - u32 nodeid = amdk8_nodeid(link->dev); - unsigned int sblink = (pci_read_config32(link->dev, 0x64)>>8) & 3; - bool is_sblink = (nodeid == 0) && (link->link_num == sblink); /* See if there is an available configuration space mapping * register in function 1. @@ -161,11 +158,11 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) * so we set the subordinate bus number to 0xff for the moment. */ - if (!is_sblink) + if (max != 0) max++; /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ - if (CONFIG_HT_CHAIN_DISTRIBUTE && !is_sblink) + if (CONFIG_HT_CHAIN_DISTRIBUTE) max = ALIGN_UP(max, 0x40); link->secondary = max; @@ -195,7 +192,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) else max_devfn = (0x1f<<3) | 7; - next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(is_sblink)); + next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(link->secondary == 0)); /* Now that nothing is overlapping it is safe to scan the children. */ pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7);

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Patch set updated for coreboot: 35e5770 AMD K8 fam10: Drop extra HT scan_chain() parameters
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8565 -gerrit commit 35e577021bc366778c5959d591e60535523505bb Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Feb 22 08:27:13 2015 +0200 AMD K8 fam10: Drop extra HT scan_chain() parameters Change-Id: Ice7cb89c19585cf725b6f73c33443050f8d65418 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/hypertransport.c | 28 ++++++++++++++++++++++++++-- src/include/device/hypertransport.h | 3 +-- src/northbridge/amd/amdfam10/northbridge.c | 19 +------------------ src/northbridge/amd/amdk8/northbridge.c | 22 +++------------------- 4 files changed, 31 insertions(+), 41 deletions(-) diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c index 5aea5e6..07a320d 100644 --- a/src/device/hypertransport.c +++ b/src/device/hypertransport.c @@ -248,7 +248,7 @@ static void ht_collapse_early_enumeration(struct bus *bus, } } -unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, +static unsigned int do_hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned *ht_unitid_base, unsigned offset_unitid) @@ -477,6 +477,30 @@ end_of_chain: return next_unitid; } +unsigned int hypertransport_scan_chain(struct bus *bus) +{ + int i; + unsigned int max_devfn; + u32 ht_unitid_base[4]; + + for (i = 0; i < 4; i++) + ht_unitid_base[i] = 0x20; + + if (bus->secondary == 0) + max_devfn = (CONFIG_CDB << 3) - 1; + else + max_devfn = (0x20 << 3) - 1; + + unsigned int next_unitid = do_hypertransport_scan_chain(bus, 0, max_devfn, + ht_unitid_base, offset_unit_id(bus->secondary == 0)); + + bus->hcdn_reg = 0; + for (i = 0; i < 4; i++) + bus->hcdn_reg |= (ht_unitid_base[i] & 0xff) << (i*8); + + return next_unitid; +} + /** * Scan a PCI bridge and the buses behind the bridge. * @@ -495,7 +519,7 @@ static void hypertransport_scan_chain_x(struct bus *bus, unsigned int ht_unitid_base[4]; unsigned int offset_unitid = 1; - unsigned int next_unitid = hypertransport_scan_chain(bus, min_devfn, max_devfn, + unsigned int next_unitid = do_hypertransport_scan_chain(bus, min_devfn, max_devfn, ht_unitid_base, offset_unitid); /* Now that nothing is overlapping it is safe to scan the children. */ diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h index b2ebecf..bc8ccd4 100644 --- a/src/include/device/hypertransport.h +++ b/src/include/device/hypertransport.h @@ -10,8 +10,7 @@ #define ConnectionPending (1 << 4) bool ht_is_non_coherent_link(struct bus *link); -unsigned int hypertransport_scan_chain(struct bus *bus, - unsigned min_devfn, unsigned max_devfn, unsigned *ht_unit_base, unsigned offset_unitid); +unsigned int hypertransport_scan_chain(struct bus *bus); void ht_scan_bridge(struct device *dev); extern struct device_operations default_ht_ops_bus; diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 26a835b..bcb6e3f 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -174,10 +174,7 @@ static void ht_route_link(struct bus *link, scan_state mode) static u32 amdfam10_scan_chain(struct bus *link, u32 max) { - int i; unsigned int next_unitid; - u32 ht_unitid_base[4]; // here assume only 4 HT device on chain - u32 max_devfn; /* See if there is an available configuration space mapping * register in function 1. @@ -208,17 +205,8 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) /* Now we can scan all of the subordinate busses i.e. the * chain on the hypertranport link */ - for(i=0;i<4;i++) { - ht_unitid_base[i] = 0x20; - } - //if ext conf is enabled, only need use 0x1f - if (link->secondary == 0) - max_devfn = (0x17<<3) | 7; - else - max_devfn = (0x1f<<3) | 7; - - next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(link->secondary == 0)); + next_unitid = hypertransport_scan_chain(link); /* Now that nothing is overlapping it is safe to scan the children. */ pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); @@ -235,11 +223,6 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) set_config_map_reg(link); - /* Use ht_unitid_base to update hcdn_reg. */ - link->hcdn_reg = 0; - for (i = 0; i < 4;i++) - link->hcdn_reg |= (ht_unitid_base[i] & 0xff) << (i*8); - store_ht_c_conf_bus(link); return link->subordinate; diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 2783ad1..1c62647 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -118,12 +118,10 @@ static u32 amdk8_nodeid(device_t dev) static u32 amdk8_scan_chain(struct bus *link, u32 max) { - int i; unsigned int next_unitid; + int index; u32 config_busses; u32 free_reg, config_reg; - u32 ht_unitid_base[4]; // here assume only 4 HT device on chain - u32 max_devfn; u32 nodeid = amdk8_nodeid(link->dev); /* See if there is an available configuration space mapping @@ -183,16 +181,8 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) /* Now we can scan all of the subordinate busses i.e. the * chain on the hypertranport link */ - for(i=0;i<4;i++) { - ht_unitid_base[i] = 0x20; - } - - if (link->secondary == 0) - max_devfn = (0x17<<3) | 7; - else - max_devfn = (0x1f<<3) | 7; - next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(link->secondary == 0)); + next_unitid = hypertransport_scan_chain(link); /* Now that nothing is overlapping it is safe to scan the children. */ pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); @@ -207,13 +197,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) (link->subordinate << 24); f1_write_config32(config_reg, config_busses); - - // use config_reg and ht_unitid_base to update hcdn_reg - link->hcdn_reg = 0; - for (i = 0; i < 4; i++) - link->hcdn_reg |= (ht_unitid_base[i] & 0xff) << (i*8); - - int index = (config_reg-0xe0) >> 2; + index = (config_reg-0xe0) >> 2; sysconf.hcdn_reg[index] = link->hcdn_reg; return link->subordinate;

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Patch set updated for coreboot: 569cd47 AMD K8 fam10: Use parent subordinate to track HT enumeration
by Kyösti Mälkki 04 Jun '15

04 Jun '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8566 -gerrit commit 569cd4762e49cfe28953302fec52e133163e516e Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 21 11:11:58 2015 +0200 AMD K8 fam10: Use parent subordinate to track HT enumeration Change-Id: I930f2beacdc95d0a7edd07db66a1c2e58bb2f3cd Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/northbridge/amd/agesa/family10/northbridge.c | 3 -- src/northbridge/amd/agesa/family15/northbridge.c | 4 --- src/northbridge/amd/amdfam10/northbridge.c | 36 +++++++++++------------ src/northbridge/amd/amdk8/northbridge.c | 37 ++++++++++++------------ 4 files changed, 37 insertions(+), 43 deletions(-) diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 0fe1910..5938e32 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -561,7 +561,6 @@ static void amdfam10_scan_chains(device_t dev) unsigned sblink = sysconf.sblk; device_t io_hub = NULL; u32 next_unitid = 0xff; - unsigned int max = dev->bus->subordinate; nodeid = amdfam10_nodeid(dev); if (nodeid == 0) { @@ -578,8 +577,6 @@ static void amdfam10_scan_chains(device_t dev) } max = dev->bus->subordinate; } - - dev->bus->subordinate = max; } static struct device_operations northbridge_operations = { diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 94e16ac..f13e398 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -465,7 +465,6 @@ static void scan_chains(device_t dev) struct bus *link; device_t io_hub = NULL; u32 next_unitid = 0x18; - unsigned int max = dev->bus->subordinate; nodeid = amdfam15_nodeid(dev); if (nodeid == 0) { @@ -481,10 +480,7 @@ static void scan_chains(device_t dev) pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); } } - max = dev->bus->subordinate; } - - dev->bus->subordinate = max; } diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index bcb6e3f..e9d12c7 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -152,6 +152,15 @@ static void ht_route_link(struct bus *link, scan_state mode) struct bus *parent = link->dev->bus; u32 busses; + if (mode == HT_ROUTE_SCAN) { + if (parent->subordinate == 0) + link->secondary = 0; + else + link->secondary = parent->subordinate + 1; + + link->subordinate = link->secondary; + } + /* Configure the bus numbers for this bridge: the configuration * transactions will not be propagated by the bridge if it is * not correctly configured @@ -170,9 +179,15 @@ static void ht_route_link(struct bus *link, scan_state mode) } pci_write_config32(link->dev, link->cap + 0x14, busses); + if (mode == HT_ROUTE_FINAL) { + if (CONFIG_HT_CHAIN_DISTRIBUTE) + parent->subordinate = ALIGN_UP(link->subordinate, 8) - 1; + else + parent->subordinate = link->subordinate; + } } -static u32 amdfam10_scan_chain(struct bus *link, u32 max) +static void amdfam10_scan_chain(struct bus *link) { unsigned int next_unitid; @@ -180,23 +195,13 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) * register in function 1. */ if (get_ht_c_index(link) >= 4) - return max; + return; /* Set up the primary, secondary and subordinate bus numbers. * We have no idea how many busses are behind this bridge yet, * so we set the subordinate bus number to 0xff for the moment. */ - if (max != 0) - max++; - - /* One node can have 8 link and segn is the same. */ - if (CONFIG_HT_CHAIN_DISTRIBUTE) - max = ALIGN_UP(max, 8); - - link->secondary = max; - link->subordinate = link->secondary; - ht_route_link(link, HT_ROUTE_SCAN); /* set the config map space */ @@ -224,8 +229,6 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) set_config_map_reg(link); store_ht_c_conf_bus(link); - - return link->subordinate; } /* Do sb ht chain at first, in case s2885 put sb chain @@ -269,17 +272,14 @@ static void trim_ht_chain(struct device *dev) static void amdfam10_scan_chains(device_t dev) { struct bus *link; - unsigned int max = dev->bus->subordinate; /* Do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0 */ trim_ht_chain(dev); for (link = dev->link_list; link; link = link->next) { if (link->ht_link_up) - max = amdfam10_scan_chain(link, max); + amdfam10_scan_chain(link); } - - dev->bus->subordinate = max; } diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 1c62647..9b5735f 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -91,6 +91,15 @@ static void ht_route_link(struct bus *link, scan_state mode) struct bus *parent = dev->bus; u32 busses; + if (mode == HT_ROUTE_SCAN) { + if (link->dev->bus->subordinate == 0) + link->secondary = 0; + else + link->secondary = parent->subordinate + 1; + + link->subordinate = link->secondary; + } + /* Configure the bus numbers for this bridge: the configuration * transactions will not be propagated by the bridge if it is * not correctly configured @@ -109,6 +118,13 @@ static void ht_route_link(struct bus *link, scan_state mode) } pci_write_config32(link->dev, link->cap + 0x14, busses); + if (mode == HT_ROUTE_FINAL) { + /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ + if (CONFIG_HT_CHAIN_DISTRIBUTE) + parent->subordinate = ALIGN_UP(link->subordinate, 0x40) - 1; + else + parent->subordinate = link->subordinate; + } } static u32 amdk8_nodeid(device_t dev) @@ -116,7 +132,7 @@ static u32 amdk8_nodeid(device_t dev) return (dev->path.pci.devfn >> 3) - 0x18; } -static u32 amdk8_scan_chain(struct bus *link, u32 max) +static void amdk8_scan_chain(struct bus *link) { unsigned int next_unitid; int index; @@ -148,7 +164,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) * register skip this bus */ if (config_reg > 0xec) { - return max; + return; } /* Set up the primary, secondary and subordinate bus numbers. @@ -156,16 +172,6 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) * so we set the subordinate bus number to 0xff for the moment. */ - if (max != 0) - max++; - - /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ - if (CONFIG_HT_CHAIN_DISTRIBUTE) - max = ALIGN_UP(max, 0x40); - - link->secondary = max; - link->subordinate = link->secondary; - ht_route_link(link, HT_ROUTE_SCAN); config_busses = f1_read_config32(config_reg); @@ -199,8 +205,6 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) index = (config_reg-0xe0) >> 2; sysconf.hcdn_reg[index] = link->hcdn_reg; - - return link->subordinate; } /* Do sb ht chain at first, in case s2885 put sb chain @@ -244,16 +248,13 @@ static void trim_ht_chain(struct device *dev) static void amdk8_scan_chains(device_t dev) { struct bus *link; - unsigned int max = dev->bus->subordinate; trim_ht_chain(dev); for (link = dev->link_list; link; link = link->next) { if (link->ht_link_up) - max = amdk8_scan_chain(link, max); + amdk8_scan_chain(link); } - - dev->bus->subordinate = max; }

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Patch merged into coreboot/master: 580e722 devicetree: Change scan_bus() prototype in device ops
by gerrit＠coreboot.org 04 Jun '15

04 Jun '15

the following patch was just integrated into master: commit 580e7223bb617cfa14bf24e48bb39bac47c4e8e0 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Mar 19 21:04:23 2015 +0200 devicetree: Change scan_bus() prototype in device ops The input/output value max is no longer used for tracking the bus enumeration sequence, everything is handled in the context of devicetree bus objects. Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/8541 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Reviewed-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/8541 for details. -gerrit

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Patch merged into coreboot/master: 2d2367c devicetree: Single scan_bridges()
by gerrit＠coreboot.org 04 Jun '15

04 Jun '15

the following patch was just integrated into master: commit 2d2367cd95dc6ab2dd51b1005675e42bab417769 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 20 21:28:31 2015 +0200 devicetree: Single scan_bridges() Change-Id: Ifd277992a69a4182e2fac92aaf746abe4fec2a1b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/8540 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/8540 for details. -gerrit

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