coreboot-gerrit June 2015

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Patch set updated for coreboot: 8711f18 southbridge/ibexpeak: use new ssdt sata port generator
by Alexander Couzens 04 Jun '15

04 Jun '15

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9710 -gerrit commit 8711f1892d031b8b5b180bec41a9e28e62e1fbb9 Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Thu Apr 16 02:23:00 2015 +0200 southbridge/ibexpeak: use new ssdt sata port generator Change-Id: Id3eca5551a070dfdd6fa674e1d5b6627e28ab5a7 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- src/southbridge/intel/ibexpeak/Kconfig | 1 + src/southbridge/intel/ibexpeak/sata.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index ccd16bf..f31f83c 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -35,6 +35,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SOUTHBRIDGE_INTEL_COMMON select HAVE_USBDEBUG_OPTIONS select COMMON_FADT + select ACPI_SATA_GENERATOR config EHCI_BAR hex diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index 29d9240..be2b961 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -26,6 +26,7 @@ #include <device/pci_ids.h> #include "pch.h" #include <pc80/mc146818rtc.h> +#include <acpi/sata.h> typedef struct southbridge_intel_ibexpeak_config config_t; @@ -249,6 +250,11 @@ static void sata_set_subsystem(device_t dev, unsigned vendor, unsigned device) } } +static void sata_fill_ssdt(device_t dev) { + config_t *config = dev->chip_info; + generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map); +} + static struct pci_operations sata_pci_ops = { .set_subsystem = sata_set_subsystem, }; @@ -259,6 +265,7 @@ static struct device_operations sata_ops = { .enable_resources = pci_dev_enable_resources, .init = sata_init, .enable = sata_enable, + .acpi_fill_ssdt_generator = sata_fill_ssdt, .scan_bus = 0, .ops_pci = &sata_pci_ops, };

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Patch set updated for coreboot: a97946e device_ops: add device_t argument to acpi_inject_dsdt_generator
by Alexander Couzens 04 Jun '15

04 Jun '15

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9597 -gerrit commit a97946e65a6f813e86f8fbebcb5662eb1669d300 Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Sun Apr 12 21:49:46 2015 +0200 device_ops: add device_t argument to acpi_inject_dsdt_generator `device_t device` is missing as argument. Every device_op function should have a `device_t device` argument. Change-Id: I3fc8e0339fa46fe92cc39f7afa896ffd38c26c8d Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- src/arch/x86/boot/acpi.c | 2 +- src/include/device/device.h | 2 +- src/mainboard/siemens/sitemp_g1p1/acpi_tables.c | 2 +- src/mainboard/siemens/sitemp_g1p1/mainboard.h | 2 +- src/soc/intel/baytrail/southcluster.c | 2 +- src/soc/intel/broadwell/lpc.c | 2 +- src/soc/intel/fsp_baytrail/acpi.c | 2 +- src/soc/intel/fsp_baytrail/baytrail/acpi.h | 3 ++- src/southbridge/intel/bd82x6x/lpc.c | 2 +- src/southbridge/intel/fsp_bd82x6x/lpc.c | 2 +- src/southbridge/intel/fsp_rangeley/lpc.c | 2 +- src/southbridge/intel/i82801gx/lpc.c | 2 +- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/intel/ibexpeak/lpc.c | 2 +- src/southbridge/intel/lynxpoint/lpc.c | 2 +- src/southbridge/intel/sch/lpc.c | 2 +- 16 files changed, 17 insertions(+), 16 deletions(-) diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index f0e56ea..ca52fb4 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -824,7 +824,7 @@ unsigned long write_acpi_tables(unsigned long start) acpigen_set_current((char *) current); for (dev = all_devices; dev; dev = dev->next) if (dev->ops && dev->ops->acpi_inject_dsdt_generator) { - dev->ops->acpi_inject_dsdt_generator(); + dev->ops->acpi_inject_dsdt_generator(dev); } current = (unsigned long) acpigen_get_current(); memcpy((char *)current, diff --git a/src/include/device/device.h b/src/include/device/device.h index 9c53f95..beac42a 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -58,7 +58,7 @@ struct device_operations { #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) unsigned long (*write_acpi_tables)(unsigned long start, struct acpi_rsdp *rsdp); void (*acpi_fill_ssdt_generator)(void); - void (*acpi_inject_dsdt_generator)(void); + void (*acpi_inject_dsdt_generator)(device_t dev); #endif const struct pci_operations *ops_pci; const struct smbus_bus_operations *ops_smbus_bus; diff --git a/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c b/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c index c6f7dc1..dbb3229 100644 --- a/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c +++ b/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c @@ -91,7 +91,7 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -void mainboard_inject_dsdt(void) +void mainboard_inject_dsdt(device_t device) { global_vars_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, GLOBAL_VARS_SIZE); diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.h b/src/mainboard/siemens/sitemp_g1p1/mainboard.h index 7f80ca8..33d0a5e 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mainboard.h +++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.h @@ -1 +1 @@ -void mainboard_inject_dsdt(void); +void mainboard_inject_dsdt(device_t device); diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 26e0156..ce387c8 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -513,7 +513,7 @@ void southcluster_enable_dev(device_t dev) } } -static void southcluster_inject_dsdt(void) +static void southcluster_inject_dsdt(device_t device) { global_nvs_t *gnvs; diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 13c975f..253dc93 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -611,7 +611,7 @@ static void pch_lpc_read_resources(device_t dev) memset(gnvs, 0, sizeof(global_nvs_t)); } -static void southcluster_inject_dsdt(void) +static void southcluster_inject_dsdt(device_t device) { global_nvs_t *gnvs; diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 1a0c0ce..2825773 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -596,7 +596,7 @@ unsigned long southcluster_write_acpi_tables(unsigned long current, return current; } -void southcluster_inject_dsdt(void) +void southcluster_inject_dsdt(device_t device) { global_nvs_t *gnvs; diff --git a/src/soc/intel/fsp_baytrail/baytrail/acpi.h b/src/soc/intel/fsp_baytrail/baytrail/acpi.h index 6798f45..1e60508 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/acpi.h +++ b/src/soc/intel/fsp_baytrail/baytrail/acpi.h @@ -23,6 +23,7 @@ #include <arch/acpi.h> #include <baytrail/nvs.h> +#include <device/device.h> void acpi_create_intel_hpet(acpi_hpet_t * hpet); void acpi_create_serialio_ssdt(acpi_header_t *ssdt); @@ -31,6 +32,6 @@ unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); unsigned long southcluster_write_acpi_tables(unsigned long current, struct acpi_rsdp *rsdp); -void southcluster_inject_dsdt(void); +void southcluster_inject_dsdt(device_t device); #endif /* _BAYTRAIL_ACPI_H_ */ diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index fec0d5c..0c24a0a 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -628,7 +628,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); void *opregion; diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c index b410332..3f4343d 100644 --- a/src/southbridge/intel/fsp_bd82x6x/lpc.c +++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c @@ -590,7 +590,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); void *opregion; diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index 22de62d..c047081 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -431,7 +431,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 5ff8c24..6a89291 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -629,7 +629,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 8713e55..7c11310 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -540,7 +540,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index e46bea6..58a00d5 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -621,7 +621,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); void *opregion; diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 4b7de54..50f48cb 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -744,7 +744,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs; diff --git a/src/southbridge/intel/sch/lpc.c b/src/southbridge/intel/sch/lpc.c index e961e4f..0c031db 100644 --- a/src/southbridge/intel/sch/lpc.c +++ b/src/southbridge/intel/sch/lpc.c @@ -189,7 +189,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } -static void southbridge_inject_dsdt(void) +static void southbridge_inject_dsdt(device_t dev) { global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));

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Patch set updated for coreboot: c4fc880 device_ops: add device_t argument to acpi_fill_ssdt_generator
by Alexander Couzens 04 Jun '15

04 Jun '15

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9598 -gerrit commit c4fc880707f475e576dce3f62d85ff0305e9ffcb Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Sun Apr 12 22:18:55 2015 +0200 device_ops: add device_t argument to acpi_fill_ssdt_generator `device_t device` is missing as argument. Every device_op function should have a `device_t device` argument. Change-Id: I7fca8c3fa15c1be672e50e4422d7ac8e4aaa1e36 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- src/arch/x86/boot/acpi.c | 2 +- src/arch/x86/include/arch/acpi.h | 3 ++- src/cpu/intel/fsp_model_206ax/acpi.c | 2 +- src/cpu/intel/fsp_model_406dx/acpi.c | 2 +- src/cpu/intel/haswell/acpi.c | 2 +- src/cpu/intel/model_2065x/acpi.c | 2 +- src/cpu/intel/model_206ax/acpi.c | 2 +- src/cpu/intel/speedstep/acpi.c | 2 +- src/include/device/device.h | 2 +- src/mainboard/lenovo/x200/mainboard.c | 2 +- src/mainboard/lenovo/x201/mainboard.c | 2 +- src/mainboard/lenovo/x60/mainboard.c | 2 +- src/mainboard/tyan/s2891/mainboard.c | 2 +- src/mainboard/tyan/s2892/mainboard.c | 2 +- src/mainboard/tyan/s2895/mainboard.c | 2 +- src/mainboard/winent/mb6047/mainboard.c | 2 +- src/northbridge/amd/agesa/family12/northbridge.c | 2 +- src/northbridge/amd/agesa/family14/northbridge.c | 2 +- src/northbridge/amd/agesa/family15/northbridge.c | 2 +- src/northbridge/amd/agesa/family15rl/northbridge.c | 2 +- src/northbridge/amd/agesa/family15tn/northbridge.c | 2 +- src/northbridge/amd/agesa/family16kb/northbridge.c | 2 +- src/northbridge/amd/amdfam10/acpi.c | 2 +- src/northbridge/amd/amdfam10/amdfam10.h | 2 +- src/northbridge/amd/amdk8/acpi.c | 2 +- src/northbridge/amd/amdk8/acpi.h | 2 +- src/northbridge/amd/pi/00630F01/northbridge.c | 2 +- src/northbridge/amd/pi/00730F01/northbridge.c | 2 +- src/northbridge/intel/fsp_rangeley/acpi.c | 4 ++-- src/northbridge/intel/fsp_rangeley/northbridge.h | 8 +++++++- src/soc/intel/baytrail/acpi.c | 2 +- src/soc/intel/broadwell/acpi.c | 2 +- src/soc/intel/fsp_baytrail/acpi.c | 2 +- src/southbridge/amd/amd8111/lpc.c | 2 +- src/southbridge/amd/sb600/lpc.c | 2 +- src/southbridge/amd/sb700/lpc.c | 2 +- src/southbridge/intel/bd82x6x/lpc.c | 2 +- src/southbridge/intel/i82371eb/acpi_tables.c | 2 +- src/southbridge/intel/i82371eb/isa.c | 4 ++-- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/intel/ibexpeak/lpc.c | 2 +- src/southbridge/nvidia/ck804/lpc.c | 2 +- src/southbridge/nvidia/mcp55/lpc.c | 2 +- src/southbridge/via/k8t890/traf_ctrl.c | 2 +- 44 files changed, 53 insertions(+), 46 deletions(-) diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index ca52fb4..dd01e0c 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -325,7 +325,7 @@ void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id) struct device *dev; for (dev = all_devices; dev; dev = dev->next) if (dev->ops && dev->ops->acpi_fill_ssdt_generator) { - dev->ops->acpi_fill_ssdt_generator(); + dev->ops->acpi_fill_ssdt_generator(dev); } current = (unsigned long) acpigen_get_current(); } diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index 10db820..be97db5 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -29,6 +29,7 @@ #include <stdint.h> #include <rules.h> +#include <device/device.h> #define RSDP_SIG "RSD PTR " /* RSDT pointer signature */ #define ACPI_TABLE_CREATOR "COREBOOT" /* Must be exactly 8 bytes long! */ @@ -539,7 +540,7 @@ void acpi_create_hpet(acpi_hpet_t *hpet); unsigned long acpi_write_hpet(unsigned long start, acpi_rsdp_t *rsdp); /* cpu/intel/speedstep/acpi.c */ -void generate_cpu_entries(void); +void generate_cpu_entries(device_t device); #endif void acpi_create_mcfg(acpi_mcfg_t *mcfg); diff --git a/src/cpu/intel/fsp_model_206ax/acpi.c b/src/cpu/intel/fsp_model_206ax/acpi.c index 95c90fb..272f486 100644 --- a/src/cpu/intel/fsp_model_206ax/acpi.c +++ b/src/cpu/intel/fsp_model_206ax/acpi.c @@ -302,7 +302,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; int totalcores = dev_count_cpu(); diff --git a/src/cpu/intel/fsp_model_406dx/acpi.c b/src/cpu/intel/fsp_model_406dx/acpi.c index ba778b6..abc35ad 100644 --- a/src/cpu/intel/fsp_model_406dx/acpi.c +++ b/src/cpu/intel/fsp_model_406dx/acpi.c @@ -263,7 +263,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; int totalcores = dev_count_cpu(); diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index b8aad14..c072075 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -307,7 +307,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int coreID, cpuID, pcontrol_blk = get_pmbase(), plen = 6; int totalcores = dev_count_cpu(); diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 1e4bb03..da8ba4e 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -299,7 +299,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; int totalcores = dev_count_cpu(); diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 47c958a..94cc6de 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -302,7 +302,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; int totalcores = dev_count_cpu(); diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index 6c7178e..1c3cb9d 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -117,7 +117,7 @@ static void gen_pstate_entries(const sst_table_t *const pstates, /** * @brief Generate ACPI entries for Speedstep for each cpu */ -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; int totalcores = determine_total_number_of_cores(); diff --git a/src/include/device/device.h b/src/include/device/device.h index beac42a..b806859 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -57,7 +57,7 @@ struct device_operations { #endif #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) unsigned long (*write_acpi_tables)(unsigned long start, struct acpi_rsdp *rsdp); - void (*acpi_fill_ssdt_generator)(void); + void (*acpi_fill_ssdt_generator)(device_t dev); void (*acpi_inject_dsdt_generator)(device_t dev); #endif const struct pci_operations *ops_pci; diff --git a/src/mainboard/lenovo/x200/mainboard.c b/src/mainboard/lenovo/x200/mainboard.c index 3ec615f..4fb2baf 100644 --- a/src/mainboard/lenovo/x200/mainboard.c +++ b/src/mainboard/lenovo/x200/mainboard.c @@ -32,7 +32,7 @@ #include <ec/lenovo/h8/h8.h> #include "drivers/lenovo/lenovo.h" -static void fill_ssdt(void) +static void fill_ssdt(device_t device) { drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 0); } diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index a4da528..62e4fc9 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -87,7 +87,7 @@ static void mainboard_init(device_t dev) printk(BIOS_SPEW, "SPI configured\n"); } -static void fill_ssdt(void) +static void fill_ssdt(device_t device) { drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 0); } diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c index fbab0f1..b137aaa 100644 --- a/src/mainboard/lenovo/x60/mainboard.c +++ b/src/mainboard/lenovo/x60/mainboard.c @@ -99,7 +99,7 @@ static void mainboard_init(device_t dev) } } -static void fill_ssdt(void) +static void fill_ssdt(device_t device) { drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 1); } diff --git a/src/mainboard/tyan/s2891/mainboard.c b/src/mainboard/tyan/s2891/mainboard.c index 9a8dd90..10d99a2 100644 --- a/src/mainboard/tyan/s2891/mainboard.c +++ b/src/mainboard/tyan/s2891/mainboard.c @@ -6,7 +6,7 @@ #include <arch/acpigen.h> #include <cpu/amd/amdk8_sysconf.h> -static void mainboard_acpi_fill_ssdt_generator(void) { +static void mainboard_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(0, 0, 0); } diff --git a/src/mainboard/tyan/s2892/mainboard.c b/src/mainboard/tyan/s2892/mainboard.c index 9a8dd90..10d99a2 100644 --- a/src/mainboard/tyan/s2892/mainboard.c +++ b/src/mainboard/tyan/s2892/mainboard.c @@ -6,7 +6,7 @@ #include <arch/acpigen.h> #include <cpu/amd/amdk8_sysconf.h> -static void mainboard_acpi_fill_ssdt_generator(void) { +static void mainboard_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(0, 0, 0); } diff --git a/src/mainboard/tyan/s2895/mainboard.c b/src/mainboard/tyan/s2895/mainboard.c index 604df51..e62b95e 100644 --- a/src/mainboard/tyan/s2895/mainboard.c +++ b/src/mainboard/tyan/s2895/mainboard.c @@ -8,7 +8,7 @@ extern u16 pm_base; -static void mainboard_acpi_fill_ssdt_generator(void) { +static void mainboard_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(0, 0, 0); } diff --git a/src/mainboard/winent/mb6047/mainboard.c b/src/mainboard/winent/mb6047/mainboard.c index 9a8dd90..10d99a2 100644 --- a/src/mainboard/winent/mb6047/mainboard.c +++ b/src/mainboard/winent/mb6047/mainboard.c @@ -6,7 +6,7 @@ #include <arch/acpigen.h> #include <cpu/amd/amdk8_sysconf.h> -static void mainboard_acpi_fill_ssdt_generator(void) { +static void mainboard_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(0, 0, 0); } diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 935e137..ee291a5 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -811,7 +811,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 32b74f6..2cf4736 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -793,7 +793,7 @@ static void cpu_bus_init(device_t dev) /* North Bridge Structures */ -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 94e16ac..d42926f 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -506,7 +506,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index 0a1e7d3..6c2e953 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -477,7 +477,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 37b6a8e..aef0d83 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -477,7 +477,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 9bbc279..192c3df 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -477,7 +477,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c index dee2087..734ebb6 100644 --- a/src/northbridge/amd/amdfam10/acpi.c +++ b/src/northbridge/amd/amdfam10/acpi.c @@ -196,7 +196,7 @@ void update_ssdtx(void *ssdtx, int i) } -void northbridge_acpi_write_vars(void) +void northbridge_acpi_write_vars(device_t device) { /* * If more than one physical CPU is installed, northbridge_acpi_write_vars() diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 0bbdbd3..9213ed1 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -1076,6 +1076,6 @@ struct acpi_rsdp; unsigned long northbridge_write_acpi_tables(unsigned long start, struct acpi_rsdp *rsdp); -void northbridge_acpi_write_vars(void); +void northbridge_acpi_write_vars(device_t device); #endif /* AMDFAM10_H */ diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c index d407d7e..1bb1d83 100644 --- a/src/northbridge/amd/amdk8/acpi.c +++ b/src/northbridge/amd/amdk8/acpi.c @@ -277,7 +277,7 @@ static void k8acpi_write_pci_data(int dlen, const char *name, int offset) { acpigen_pop_len(); } -void k8acpi_write_vars(void) +void k8acpi_write_vars(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/amdk8/acpi.h b/src/northbridge/amd/amdk8/acpi.h index a9c2ded..4d822e4 100644 --- a/src/northbridge/amd/amdk8/acpi.h +++ b/src/northbridge/amd/amdk8/acpi.h @@ -21,7 +21,7 @@ #define AMDK8_ACPI_H #include <arch/acpigen.h> -void k8acpi_write_vars(void); +void k8acpi_write_vars(device_t device); unsigned long northbridge_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp); #endif diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index 60a1d49..d21becf 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -471,7 +471,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 8e340ce..2e46b16 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -465,7 +465,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static void northbridge_fill_ssdt_generator(void) +static void northbridge_fill_ssdt_generator(device_t device) { msr_t msr; char pscope[] = "\\_SB.PCI0"; diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c index 6b6a703..c726155 100644 --- a/src/northbridge/intel/fsp_rangeley/acpi.c +++ b/src/northbridge/intel/fsp_rangeley/acpi.c @@ -65,7 +65,7 @@ unsigned long acpi_fill_mcfg(unsigned long current) return current; } -void northbridge_acpi_fill_ssdt_generator(void) +void northbridge_acpi_fill_ssdt_generator(device_t device) { u32 bmbound; char pscope[] = "\\_SB.PCI0"; @@ -74,5 +74,5 @@ void northbridge_acpi_fill_ssdt_generator(void) acpigen_write_scope(pscope); acpigen_write_name_dword("BMBD", bmbound); acpigen_pop_len(); - generate_cpu_entries(); + generate_cpu_entries(device); } diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h index d7f4ebd..dc4676b 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.h +++ b/src/northbridge/intel/fsp_rangeley/northbridge.h @@ -27,6 +27,9 @@ /* Everything below this line is ignored in the DSDT */ #ifndef __ACPI__ +#include <rules.h> +#include <device/device.h> + /* Device 0:0.0 PCI configuration space (Host Bridge) */ /* SideBand B-UNIT */ @@ -72,7 +75,10 @@ void dump_pci_devices(void); void dump_spd_registers(void); void dump_mem(unsigned start, unsigned end); void report_platform_info(void); -void northbridge_acpi_fill_ssdt_generator(void); + +#if ENV_RAMSTAGE +void northbridge_acpi_fill_ssdt_generator(device_t device); +#endif #endif /* #ifndef __ASSEMBLER__ */ #endif /* #ifndef __ACPI__ */ diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index dd8833d..e3444b6 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -447,7 +447,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int core; int pcontrol_blk = get_pmbase(), plen = 6; diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 67220c5..34a576d 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -537,7 +537,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int coreID, cpuID, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6; int totalcores = dev_count_cpu(); diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 2825773..9b0d148 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -513,7 +513,7 @@ static void generate_P_state_entries(int core, int cores_per_package) acpigen_pop_len(); } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int core; int pcontrol_blk = get_pmbase(), plen = 6; diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c index 47b9ae7..df3eff4 100644 --- a/src/southbridge/amd/amd8111/lpc.c +++ b/src/southbridge/amd/amd8111/lpc.c @@ -128,7 +128,7 @@ unsigned long acpi_fill_mcfg(unsigned long current) return current; } -static void southbridge_acpi_fill_ssdt_generator(void) { +static void southbridge_acpi_fill_ssdt_generator(device_t device) { #if CONFIG_SET_FIDVID amd_generate_powernow(pm_base + 0x10, 6, 1); acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS"); diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c index 2fb9e22..78fe1fb 100644 --- a/src/southbridge/amd/sb600/lpc.c +++ b/src/southbridge/amd/sb600/lpc.c @@ -223,7 +223,7 @@ static void sb600_lpc_enable_resources(device_t dev) extern u16 pm_base; -static void southbridge_acpi_fill_ssdt_generator(void) { +static void southbridge_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(pm_base + 8, 6, 1); } diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 94d8dcb..a39ec18 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -267,7 +267,7 @@ static void sb700_lpc_enable_resources(device_t dev) #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) -static void southbridge_acpi_fill_ssdt_generator(void) { +static void southbridge_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(ACPI_CPU_CONTROL, 6, 1); } diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 0c24a0a..6bf43de 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -797,7 +797,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe1_blk.addrh = 0x0; } -static void southbridge_fill_ssdt(void) +static void southbridge_fill_ssdt(device_t device) { device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); config_t *chip = dev->chip_info; diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index c919205..fa3029c 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -45,7 +45,7 @@ static int determine_total_number_of_cores(void) return count; } -void generate_cpu_entries(void) +void generate_cpu_entries(device_t device) { int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6; int numcpus = determine_total_number_of_cores(); diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 024604b..61006e6 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -129,10 +129,10 @@ static void sb_read_resources(struct device *dev) } #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) -static void southbridge_acpi_fill_ssdt_generator(void) +static void southbridge_acpi_fill_ssdt_generator(device_t device) { acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS"); - generate_cpu_entries(); + generate_cpu_entries(device); } #endif diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 7c11310..ac1d49f 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -562,7 +562,7 @@ static void southbridge_inject_dsdt(device_t dev) } } -static void southbridge_fill_ssdt(void) +static void southbridge_fill_ssdt(device_t device) { device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); config_t *chip = dev->chip_info; diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 58a00d5..6565293 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -784,7 +784,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe1_blk.addrh = 0x0; } -static void southbridge_fill_ssdt(void) +static void southbridge_fill_ssdt(device_t device) { device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); config_t *chip = dev->chip_info; diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c index 406b4f2..d0f687f 100644 --- a/src/southbridge/nvidia/ck804/lpc.c +++ b/src/southbridge/nvidia/ck804/lpc.c @@ -313,7 +313,7 @@ static void ck804_lpc_enable_resources(device_t dev) #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) -static void southbridge_acpi_fill_ssdt_generator(void) +static void southbridge_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(0, 0, 0); } diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c index d3399f3..8d1a83a 100644 --- a/src/southbridge/nvidia/mcp55/lpc.c +++ b/src/southbridge/nvidia/mcp55/lpc.c @@ -283,7 +283,7 @@ static const struct pci_driver lpc_driver __pci_driver = { #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) -static void southbridge_acpi_fill_ssdt_generator(void) +static void southbridge_acpi_fill_ssdt_generator(device_t device) { amd_generate_powernow(0, 0, 0); } diff --git a/src/southbridge/via/k8t890/traf_ctrl.c b/src/southbridge/via/k8t890/traf_ctrl.c index b4620da..75dc353 100644 --- a/src/southbridge/via/k8t890/traf_ctrl.c +++ b/src/southbridge/via/k8t890/traf_ctrl.c @@ -127,7 +127,7 @@ static void traf_ctrl_enable_k8t890(struct device *dev) #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) -static void southbridge_acpi_fill_ssdt_generator(void) { +static void southbridge_acpi_fill_ssdt_generator(device_t dev) { amd_generate_powernow(0, 0, 0); acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS"); }

1 0

Patch set updated for coreboot: 9b23433 device_ops: add device_t argument to write_acpi_tables
by Alexander Couzens 04 Jun '15

04 Jun '15

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9599 -gerrit commit 9b234335d17e43e2d05c6902ab03f63b74a84edf Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Sun Apr 12 22:28:37 2015 +0200 device_ops: add device_t argument to write_acpi_tables `device_t device` is missing as argument. Every device_op function should have a `device_t device` argument. Change-Id: I1ba4bfa0ac36a09a82b108249158c80c50f9f5fd Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- src/arch/x86/boot/acpi.c | 4 ++-- src/arch/x86/include/arch/acpi.h | 2 +- src/include/device/device.h | 2 +- src/mainboard/amd/serengeti_cheetah/acpi_tables.c | 2 +- src/mainboard/amd/serengeti_cheetah/mainboard.h | 2 +- src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c | 3 ++- src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h | 2 +- src/mainboard/emulation/qemu-i440fx/acpi.h | 2 +- src/mainboard/getac/p470/acpi_tables.c | 4 +++- src/mainboard/getac/p470/mainboard.h | 3 ++- src/mainboard/iwill/dk8_htx/acpi_tables.c | 4 +++- src/mainboard/iwill/dk8_htx/mainboard.h | 2 +- src/northbridge/amd/agesa/family12/northbridge.c | 3 ++- src/northbridge/amd/agesa/family14/northbridge.c | 3 ++- src/northbridge/amd/agesa/family15/northbridge.c | 3 ++- src/northbridge/amd/agesa/family15rl/northbridge.c | 3 ++- src/northbridge/amd/agesa/family15tn/northbridge.c | 3 ++- src/northbridge/amd/agesa/family16kb/northbridge.c | 3 ++- src/northbridge/amd/amdfam10/acpi.c | 5 +++-- src/northbridge/amd/amdfam10/amdfam10.h | 3 ++- src/northbridge/amd/amdk8/acpi.c | 5 ++++- src/northbridge/amd/amdk8/acpi.h | 2 +- src/northbridge/amd/pi/00630F01/northbridge.c | 3 ++- src/northbridge/amd/pi/00730F01/northbridge.c | 3 ++- src/northbridge/intel/gm45/acpi.c | 4 +++- src/northbridge/intel/gm45/gm45.h | 8 +++++++- src/soc/intel/fsp_baytrail/acpi.c | 5 +++-- src/soc/intel/fsp_baytrail/baytrail/acpi.h | 3 ++- src/southbridge/intel/lynxpoint/lpc.c | 4 +++- 29 files changed, 63 insertions(+), 32 deletions(-) diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index dd01e0c..4090a1d 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -508,7 +508,7 @@ void acpi_create_hpet(acpi_hpet_t *hpet) header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t)); } -unsigned long acpi_write_hpet(unsigned long current, acpi_rsdp_t *rsdp) +unsigned long acpi_write_hpet(device_t device, unsigned long current, acpi_rsdp_t *rsdp) { acpi_hpet_t *hpet; @@ -898,7 +898,7 @@ unsigned long write_acpi_tables(unsigned long start) for (dev = all_devices; dev; dev = dev->next) { if (dev->ops && dev->ops->write_acpi_tables) { - current = dev->ops->write_acpi_tables(current, rsdp); + current = dev->ops->write_acpi_tables(dev, current, rsdp); ALIGN_CURRENT; } } diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index be97db5..28f650c 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -537,7 +537,7 @@ void acpi_create_slit(acpi_slit_t *slit, #if ENV_RAMSTAGE void acpi_create_hpet(acpi_hpet_t *hpet); -unsigned long acpi_write_hpet(unsigned long start, acpi_rsdp_t *rsdp); +unsigned long acpi_write_hpet(device_t device, unsigned long start, acpi_rsdp_t *rsdp); /* cpu/intel/speedstep/acpi.c */ void generate_cpu_entries(device_t device); diff --git a/src/include/device/device.h b/src/include/device/device.h index b806859..076db13 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -56,7 +56,7 @@ struct device_operations { void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t); #endif #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - unsigned long (*write_acpi_tables)(unsigned long start, struct acpi_rsdp *rsdp); + unsigned long (*write_acpi_tables)(device_t dev, unsigned long start, struct acpi_rsdp *rsdp); void (*acpi_fill_ssdt_generator)(device_t dev); void (*acpi_inject_dsdt_generator)(device_t dev); #endif diff --git a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c index 225f897..b25f7e7 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c @@ -119,7 +119,7 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp) +unsigned long mainboard_write_acpi_tables(device_t dev, unsigned long start, acpi_rsdp_t *rsdp) { unsigned long current; acpi_header_t *ssdtx; diff --git a/src/mainboard/amd/serengeti_cheetah/mainboard.h b/src/mainboard/amd/serengeti_cheetah/mainboard.h index 80d8f2a..fc2dcaf 100644 --- a/src/mainboard/amd/serengeti_cheetah/mainboard.h +++ b/src/mainboard/amd/serengeti_cheetah/mainboard.h @@ -1 +1 @@ -unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp); +unsigned long mainboard_write_acpi_tables(device_t device, unsigned long start, acpi_rsdp_t *rsdp); diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c index ac021d0..7b5be84 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c @@ -127,7 +127,8 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -unsigned long mainboard_write_acpi_tables(unsigned long current, +unsigned long mainboard_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_header_t *ssdtx; diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h index 8f17804..b152b04 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h @@ -1,2 +1,2 @@ -unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp); +unsigned long mainboard_write_acpi_tables(device_t device, unsigned long start, acpi_rsdp_t *rsdp); diff --git a/src/mainboard/emulation/qemu-i440fx/acpi.h b/src/mainboard/emulation/qemu-i440fx/acpi.h index c0d4e6e..f2ffdeb 100644 --- a/src/mainboard/emulation/qemu-i440fx/acpi.h +++ b/src/mainboard/emulation/qemu-i440fx/acpi.h @@ -1 +1 @@ -unsigned long northbridge_write_acpi_tables(unsigned long start); +unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start); diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c index b6cd654..18b7151 100644 --- a/src/mainboard/getac/p470/acpi_tables.c +++ b/src/mainboard/getac/p470/acpi_tables.c @@ -110,7 +110,9 @@ unsigned long acpi_fill_madt(unsigned long current) } #define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp) +unsigned long mainboard_write_acpi_tables(device_t device, + unsigned long start, + acpi_rsdp_t *rsdp) { unsigned long current; acpi_header_t *ecdt; diff --git a/src/mainboard/getac/p470/mainboard.h b/src/mainboard/getac/p470/mainboard.h index 45d961b..56f5455 100644 --- a/src/mainboard/getac/p470/mainboard.h +++ b/src/mainboard/getac/p470/mainboard.h @@ -1,4 +1,5 @@ struct acpi_rsdp; -unsigned long mainboard_write_acpi_tables(unsigned long start, +unsigned long mainboard_write_acpi_tables(device_t device, + unsigned long start, struct acpi_rsdp *rsdp); diff --git a/src/mainboard/iwill/dk8_htx/acpi_tables.c b/src/mainboard/iwill/dk8_htx/acpi_tables.c index 5767878..7c8835a 100644 --- a/src/mainboard/iwill/dk8_htx/acpi_tables.c +++ b/src/mainboard/iwill/dk8_htx/acpi_tables.c @@ -125,7 +125,9 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp) +unsigned long mainboard_write_acpi_tables(device_t device, + unsigned long start, + acpi_rsdp_t *rsdp) { unsigned long current; acpi_header_t *ssdtx; diff --git a/src/mainboard/iwill/dk8_htx/mainboard.h b/src/mainboard/iwill/dk8_htx/mainboard.h index 80d8f2a..fc2dcaf 100644 --- a/src/mainboard/iwill/dk8_htx/mainboard.h +++ b/src/mainboard/iwill/dk8_htx/mainboard.h @@ -1 +1 @@ -unsigned long mainboard_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp); +unsigned long mainboard_write_acpi_tables(device_t device, unsigned long start, acpi_rsdp_t *rsdp); diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index ee291a5..ec1f493 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -832,7 +832,8 @@ static void northbridge_fill_ssdt_generator(device_t device) acpigen_pop_len(); } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 2cf4736..6d3a173 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -832,7 +832,8 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest) return (unsigned long)current; } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index d42926f..5ad7ae3 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -527,7 +527,8 @@ static void northbridge_fill_ssdt_generator(device_t device) acpigen_pop_len(); } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index 6c2e953..199843e 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -498,7 +498,8 @@ static void northbridge_fill_ssdt_generator(device_t device) acpigen_pop_len(); } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index aef0d83..85b9799 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -498,7 +498,8 @@ static void northbridge_fill_ssdt_generator(device_t device) acpigen_pop_len(); } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 192c3df..25f40b8 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -498,7 +498,8 @@ static void northbridge_fill_ssdt_generator(device_t device) acpigen_pop_len(); } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c index 734ebb6..4b86e96 100644 --- a/src/northbridge/amd/amdfam10/acpi.c +++ b/src/northbridge/amd/amdfam10/acpi.c @@ -330,8 +330,9 @@ void northbridge_acpi_write_vars(device_t device) acpigen_pop_len(); } -unsigned long northbridge_write_acpi_tables(unsigned long current, - struct acpi_rsdp *rsdp) +unsigned long northbridge_write_acpi_tables(device_t device, + unsigned long current, + struct acpi_rsdp *rsdp) { acpi_srat_t *srat; acpi_slit_t *slit; diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 9213ed1..9461385 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -1074,7 +1074,8 @@ BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List); struct acpi_rsdp; -unsigned long northbridge_write_acpi_tables(unsigned long start, +unsigned long northbridge_write_acpi_tables(device_t device, + unsigned long start, struct acpi_rsdp *rsdp); void northbridge_acpi_write_vars(device_t device); diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c index 1bb1d83..10228cf 100644 --- a/src/northbridge/amd/amdk8/acpi.c +++ b/src/northbridge/amd/amdk8/acpi.c @@ -204,7 +204,10 @@ static unsigned long acpi_fill_slit(unsigned long current) return current; } -unsigned long northbridge_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp) +unsigned long northbridge_write_acpi_tables( + device_t device, + unsigned long start, + acpi_rsdp_t *rsdp) { unsigned long current; acpi_srat_t *srat; diff --git a/src/northbridge/amd/amdk8/acpi.h b/src/northbridge/amd/amdk8/acpi.h index 4d822e4..b874dd4 100644 --- a/src/northbridge/amd/amdk8/acpi.h +++ b/src/northbridge/amd/amdk8/acpi.h @@ -22,6 +22,6 @@ #include <arch/acpigen.h> void k8acpi_write_vars(device_t device); -unsigned long northbridge_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp); +unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, acpi_rsdp_t *rsdp); #endif diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index d21becf..acecb28 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -492,7 +492,8 @@ static void northbridge_fill_ssdt_generator(device_t device) acpigen_pop_len(); } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 2e46b16..3e5b2b2 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -486,7 +486,8 @@ static void northbridge_fill_ssdt_generator(device_t device) acpigen_pop_len(); } -static unsigned long agesa_write_acpi_tables(unsigned long current, +static unsigned long agesa_write_acpi_tables(device_t device, + unsigned long current, acpi_rsdp_t *rsdp) { acpi_srat_t *srat; diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index a1cfdb5..daa5aed 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -109,7 +109,9 @@ static unsigned long acpi_fill_dmar(unsigned long current) } #define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long northbridge_write_acpi_tables(unsigned long start, struct acpi_rsdp *rsdp) +unsigned long northbridge_write_acpi_tables(device_t device, + unsigned long start, + struct acpi_rsdp *rsdp) { unsigned long current; #if CONFIG_IOMMU diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index db3db00..cb946fc 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -25,6 +25,7 @@ #ifndef __ACPI__ +#include <rules.h> #include <stdint.h> typedef enum { @@ -435,8 +436,13 @@ u32 decode_igd_gtt_size(u32 gsm); void init_iommu(void); +#if ENV_RAMSTAGE +#include <device/device.h> + struct acpi_rsdp; -unsigned long northbridge_write_acpi_tables(unsigned long start, struct acpi_rsdp *rsdp); +unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp); #endif + +#endif /* !__ACPI__ */ #endif /* __NORTHBRIDGE_INTEL_GM45_GM45_H__ */ diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 9b0d148..ed607b3 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -569,12 +569,13 @@ unsigned long acpi_madt_irq_overrides(unsigned long current) #define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long southcluster_write_acpi_tables(unsigned long current, +unsigned long southcluster_write_acpi_tables(device_t device, + unsigned long current, struct acpi_rsdp *rsdp) { acpi_header_t *ssdt2; - current = acpi_write_hpet(current, rsdp); + current = acpi_write_hpet(device, current, rsdp); ALIGN_CURRENT; ssdt2 = (acpi_header_t *)current; diff --git a/src/soc/intel/fsp_baytrail/baytrail/acpi.h b/src/soc/intel/fsp_baytrail/baytrail/acpi.h index 1e60508..0cd978d 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/acpi.h +++ b/src/soc/intel/fsp_baytrail/baytrail/acpi.h @@ -30,7 +30,8 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt); void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt); unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); -unsigned long southcluster_write_acpi_tables(unsigned long current, +unsigned long southcluster_write_acpi_tables(device_t device, + unsigned long current, struct acpi_rsdp *rsdp); void southcluster_inject_dsdt(device_t device); diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 50f48cb..8308f41 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -786,7 +786,9 @@ static void southbridge_inject_dsdt(device_t dev) } #define ALIGN_CURRENT current = (ALIGN(current, 16)) -static unsigned long southbridge_write_acpi_tables(unsigned long start, struct acpi_rsdp *rsdp) +static unsigned long southbridge_write_acpi_tables(device_t device, + unsigned long start, + struct acpi_rsdp *rsdp) { unsigned long current; acpi_hpet_t *hpet;

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Patch set updated for coreboot: b0d3587 build system: move more clang handling to xcompile
by Patrick Georgi 04 Jun '15

04 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7612 -gerrit commit b0d35875e5928c58a1f6f4dc2577602aaa90bdaa Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Thu Jun 4 13:45:40 2015 +0200 build system: move more clang handling to xcompile clang requires some additional options to disable warnings which can be handled by xcompile. Also drop the hard coded clang compilers in Makefile Change-Id: I0f12f755420f315127e6d9adc00b1246c6e7131b Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile | 22 ---------------------- util/xcompile/xcompile | 17 ++++++++++++----- 2 files changed, 12 insertions(+), 27 deletions(-) diff --git a/Makefile b/Makefile index b41057c..ca46cbd 100644 --- a/Makefile +++ b/Makefile @@ -122,32 +122,10 @@ include $(HAVE_DOTCONFIG) include .xcompile -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) -# FIXME: armv7/aarch64 won't build right now -# NOTE: clang puts compiler-rt under lib/linux/libclang_rt.builtins-i386.a -# this means the triple is i386-linux-elf instead of i386-none-elf -CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 -# Tone down some clang warnings -CFLAGS_x86_32 += -Wno-unused-variable -Wno-unused-function -Wno-tautological-compare -Wno-shift-overflow -CC_x86_32:=clang -HOSTCC := clang - ifneq ($(CONFIG_MMX),y) CFLAGS_x86_32 += -mno-mmx endif -# FIXME: we end up with conflicting flags with this, not clear on this part. -#ifneq ($(CONFIG_SSE),y) -#CFLAGS_x86_32 += -mno-sse -#endif - -CFLAGS_arm = -no-integrated-as -Qunused-arguments -target arm-eabi -ccc-gcc-name $(CC_arm) -CC_arm:=clang - -CFLAGS_aarch64 = -no-integrated-as -Qunused-arguments -target aarch64-eabi -ccc-gcc-name $(CC_aarch64) -CC_aarch64:=clang -endif - include toolchain.inc strip_quotes = $(subst ",,$(subst \",,$(1))) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 66b011a..8b20d66 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -98,13 +98,13 @@ testas() { # Architecture matched. GCCPREFIX="$gccprefix" - if [ -z "$use_dash_twidth" ]; then - ASFLAGS="" - CFLAGS_GCC="" - LDFLAGS="" - else + unset ASFLAGS LDFLAGS + unset CFLAGS_GCC CFLAGS_CLANG + + if [ -n "$use_dash_twidth" ]; then ASFLAGS="--$twidth" CFLAGS_GCC="-m$twidth" + CFLAGS_CLANG="-m$twidth" LDFLAGS="-b $full_arch" fi @@ -114,6 +114,7 @@ testas() { "elf32-i386" ) LDFLAGS="$LDFLAGS -melf_i386" CFLAGS_GCC="$CFLAGS_GCC -Wl,-b,elf32-i386 -Wl,-melf_i386" + CFLAGS_CLANG="$CFLAGS_GCC -Wl,-b,elf32-i386 -Wl,-melf_i386" ;; esac @@ -140,6 +141,8 @@ detect_special_flags() { x86) testcc "$GCC" "$CFLAGS_GCC -Wa,--divide" && CFLAGS_GCC="$CFLAGS_GCC -Wa,--divide" + testcc "$CLANG" "$CFLAGS_CLANG -Wa,--divide" && + CFLAGS_CLANG="$CFLAGS_CLANG -Wa,--divide" # Always build for i686 -- no sse/mmx instructions since SMM # modules are compiled using these flags. Note that this # doesn't prevent a project using xcompile to explicitly @@ -174,6 +177,10 @@ COMPILER_RT_${TARCH}:=${CC_RT_GCC} COMPILER_RT_FLAGS_${TARCH}:=${CC_RT_EXTRA_GCC} else CC_${TARCH}:=${CLANG} +CFLAGS_${TARCH}:=${CFLAGS_CLANG} +CFLAGS_${TARCH}+=-no-integrated-as -Qunused-arguments -m${TWIDTH} +# tone down compiler warnings +CFLAGS_${TARCH}+=-Wno-unused-variable -Wno-unused-function -Wno-tautological-compare -Wno-shift-overflow COMPILER_RT_${TARCH}:=${CC_RT_CLANG} COMPILER_RT_FLAGS_${TARCH}:=${CC_RT_EXTRA_CLANG} endif

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Patch set updated for coreboot: bdf1494 arch/x86: No need to specify -Wa, --divide in a Makefile
by Patrick Georgi 04 Jun '15

04 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10426 -gerrit commit bdf14947db608c247115edaf0f818298955e0505 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Thu Jun 4 13:14:54 2015 +0200 arch/x86: No need to specify -Wa,--divide in a Makefile We test for it in xcompile and add it to CFLAGS. Change-Id: I041a881b542bc55c1725af384f038da3356e3bb1 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/arch/x86/Makefile.inc | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 5da5a4a..9f4589b 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -27,8 +27,6 @@ subdirs-y += boot subdirs-y += lib subdirs-y += smp -DISASSEMBLY=-Wa,--divide - ################################################################################ # i386 specific tools NVRAMTOOL:=$(objutil)/nvramtool/nvramtool @@ -114,7 +112,7 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) $(CFLAGS_x86_32) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + $(CC_bootblock) $(CFLAGS_x86_32) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n"

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Patch set updated for coreboot: 8571a96 build system: move compiler runtime determination to xcompile
by Patrick Georgi 04 Jun '15

04 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10425 -gerrit commit 8571a96a2702621535b47471890d1242f6025196 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Thu Jun 4 13:31:38 2015 +0200 build system: move compiler runtime determination to xcompile Instead of fetching libgcc's location and required compiler flags on every individual build, do it once in xcompile. Change-Id: Ie5832fcb21710c4cf381ba475589d42ce0235f96 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- toolchain.inc | 11 ++--------- util/xcompile/xcompile | 12 ++++++++++++ 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/toolchain.inc b/toolchain.inc index e089f2e..8b7b30a 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -104,15 +104,8 @@ STRIP_$(1) := $(STRIP_$(2)) READELF_$(1) := $(READELF_$(2)) CFLAGS_$(1) = $$(CFLAGS_common) $$(CFLAGS_$(2)) CPPFLAGS_$(1) = $$(CPPFLAGS_common) $$(CPPFLAGS_$(2)) -COMPILER_RT_FLAGS_$(1) := -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) -COMPILER_RT_$(1) := $(shell $(CC_$(2)) $(CFLAGS_$(2)) -print-librt-file-name 2>/dev/null) -else -COMPILER_RT_$(1) := $(wildcard $(shell $(CC_$(2)) $(CFLAGS_$(2)) -print-libgcc-file-name)) -ifeq ($(2),x86_32) -COMPILER_RT_FLAGS_$(1) := --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 -endif -endif +COMPILER_RT_$(1) := $$(COMPILER_RT_$(2)) +COMPILER_RT_FLAGS_$(1) := $$(COMPILER_RT_FLAGS_$(2)) endef # define_class: Allows defining any program as dynamic class and compiler tool diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 94e0c19..66b011a 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -157,6 +157,11 @@ detect_special_flags() { esac } +detect_compiler_runtime() { + CC_RT_CLANG="`${CLANG} ${CFLAGS} -print-librt-file-name`" + CC_RT_GCC="`${GCC} ${CFLAGS} -print-libgcc-file-name`" +} + report_arch_toolchain() { cat <<EOF # elf${TWIDTH}-${TBFDARCH} toolchain (${GCC}) @@ -165,8 +170,12 @@ SUBARCH_SUPPORTED+=${TSUPP-${TARCH}} ifeq (\$(CONFIG_COMPILER_GCC),y) CC_${TARCH}:=${GCC} CFLAGS_${TARCH}:=${CFLAGS_GCC} +COMPILER_RT_${TARCH}:=${CC_RT_GCC} +COMPILER_RT_FLAGS_${TARCH}:=${CC_RT_EXTRA_GCC} else CC_${TARCH}:=${CLANG} +COMPILER_RT_${TARCH}:=${CC_RT_CLANG} +COMPILER_RT_FLAGS_${TARCH}:=${CC_RT_EXTRA_CLANG} endif CPP_${TARCH}:=${GCCPREFIX}cpp AS_${TARCH}:=${GCCPREFIX}as ${ASFLAGS} @@ -217,6 +226,7 @@ arch_config_x86() { TCLIST="i386 x86_64" TWIDTH="32" TABI="elf" + CC_RT_EXTRA_GCC="--wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3" } arch_config_mipsel() { @@ -235,6 +245,7 @@ test_architecture() { GCCPREFIX="invalid" unset TABI TARCH TBFDARCH TCLIST TENDIAN TSUPP TWIDTH + unset CC_RT_EXTRA_GCC CC_RT_EXTRA_CLANG unset GCC CLANG if type arch_config_$architecture > /dev/null; then arch_config_$architecture @@ -293,6 +304,7 @@ test_architecture() { for architecture in $SUPPORTED_ARCHITECTURES; do if test_architecture $architecture; then detect_special_flags "$architecture" + detect_compiler_runtime "$architecture" report_arch_toolchain fi done

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Patch set updated for coreboot: 72564ee xcompile: Detect clang compilers
by Patrick Georgi 04 Jun '15

04 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10424 -gerrit commit 72564ee3e3c635a21079094dfe5c32392ac38cee Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Thu Jun 4 13:44:41 2015 +0200 xcompile: Detect clang compilers This uses the availability of CONFIG_* variables in .xcompile and tests for compilers in xcompile so that the build system doesn't need to probe them. Change-Id: I359ad6245d2527efa7e848a9b38f5f194744c827 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- util/xcompile/xcompile | 48 ++++++++++++++++++++++++++++++++++-------------- 1 file changed, 34 insertions(+), 14 deletions(-) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 0a22c34..94e0c19 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -124,21 +124,21 @@ detect_special_flags() { local architecture="$1" # GCC 4.6 is much more picky about unused variables. # Turn off it's warnings for now: - testcc "$CC" "$CFLAGS_GCC -Wno-unused-but-set-variable " && + testcc "$GCC" "$CFLAGS_GCC -Wno-unused-but-set-variable " && CFLAGS_GCC="$CFLAGS_GCC -Wno-unused-but-set-variable " # Use bfd linker instead of gold if available: - testcc "$CC" "$CFLAGS_GCC -fuse-ld=bfd" && + testcc "$GCC" "$CFLAGS_GCC -fuse-ld=bfd" && CFLAGS_GCC="$CFLAGS_GCC -fuse-ld=bfd" && LINKER_SUFFIX='.bfd' - testcc "$CC" "$CFLAGS_GCC -fno-stack-protector"&& + testcc "$GCC" "$CFLAGS_GCC -fno-stack-protector"&& CFLAGS_GCC="$CFLAGS_GCC -fno-stack-protector" - testcc "$CC" "$CFLAGS_GCC -Wl,--build-id=none" && + testcc "$GCC" "$CFLAGS_GCC -Wl,--build-id=none" && CFLAGS_GCC="$CFLAGS_GCC -Wl,--build-id=none" case "$architecture" in x86) - testcc "$CC" "$CFLAGS_GCC -Wa,--divide" && + testcc "$GCC" "$CFLAGS_GCC -Wa,--divide" && CFLAGS_GCC="$CFLAGS_GCC -Wa,--divide" # Always build for i686 -- no sse/mmx instructions since SMM # modules are compiled using these flags. Note that this @@ -147,11 +147,11 @@ detect_special_flags() { CFLAGS_GCC="$CFLAGS_GCC -march=i686" ;; mipsel) - testcc "$CC" "$CFLAGS_GCC -mno-abicalls -fno-pic" && \ + testcc "$GCC" "$CFLAGS_GCC -mno-abicalls -fno-pic" && \ CFLAGS_GCC+=" -mno-abicalls -fno-pic" # Enforce little endian mode. - testcc "$CC" "$CFLAGS_GCC -EL" && \ + testcc "$GCC" "$CFLAGS_GCC -EL" && \ CFLAGS_GCC+=" -EL" ;; esac @@ -159,11 +159,15 @@ detect_special_flags() { report_arch_toolchain() { cat <<EOF -# elf${TWIDTH}-${TBFDARCH} toolchain (${GCCPREFIX}gcc) +# elf${TWIDTH}-${TBFDARCH} toolchain (${GCC}) ARCH_SUPPORTED+=${TARCH} SUBARCH_SUPPORTED+=${TSUPP-${TARCH}} -CC_${TARCH}:=${GCCPREFIX}gcc +ifeq (\$(CONFIG_COMPILER_GCC),y) +CC_${TARCH}:=${GCC} CFLAGS_${TARCH}:=${CFLAGS_GCC} +else +CC_${TARCH}:=${CLANG} +endif CPP_${TARCH}:=${GCCPREFIX}cpp AS_${TARCH}:=${GCCPREFIX}as ${ASFLAGS} LD_${TARCH}:=${GCCPREFIX}ld${LINKER_SUFFIX} ${LDFLAGS} @@ -231,6 +235,7 @@ test_architecture() { GCCPREFIX="invalid" unset TABI TARCH TBFDARCH TCLIST TENDIAN TSUPP TWIDTH + unset GCC CLANG if type arch_config_$architecture > /dev/null; then arch_config_$architecture else @@ -257,21 +262,36 @@ test_architecture() { program_exists "${gccprefix}as" || continue for endian in $TENDIAN ""; do testas "$gccprefix" "$TWIDTH" "$TBFDARCH" \ - "" "$endian" && return 0 + "" "$endian" && break 3 testas "$gccprefix" "$TWIDTH" "$TBFDARCH" \ - "TRUE" "$endian" && return 0 + "TRUE" "$endian" && break 3 done done done + if [ "invalid" != "$GCCPREFIX" ]; then + GCC="${GCCPREFIX}gcc" + fi + + for clang_arch in $TCLIST invalid; do + testcc "clang" "-target ${clang_arch}-$TABI -c" && break + done - echo "Warning: no suitable GCC for $architecture." >&2 - return 1 + if [ "invalid" != "$clang_arch" ]; then + # FIXME: this may break in a clang && !gcc configuration, + # but that's more of a clang limitation. Let's be optimistic + # that this will change in the future. + CLANG="clang -target ${clang_arch}-${TABI} -ccc-gcc-name ${GCC}" + fi + + if [ -z "$GCC" -a -z "$CLANG" ]; then + echo "Warning: no suitable compiler for $architecture." >&2 + return 1 + fi } # This loops over all supported architectures. for architecture in $SUPPORTED_ARCHITECTURES; do if test_architecture $architecture; then - CC="${GCCPREFIX}"gcc detect_special_flags "$architecture" report_arch_toolchain fi

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Patch set updated for coreboot: 60c34e3 acpi/sata: add generic sata ssdt port generator
by Alexander Couzens 04 Jun '15

04 Jun '15

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9708 -gerrit commit 60c34e3b5994d66021bfe0c7e7def05ef83c51ee Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Thu Apr 16 02:03:26 2015 +0200 acpi/sata: add generic sata ssdt port generator generate_sata_ssdt_ports() generates ports based on sata enable map Change-Id: Ie68e19c93f093d6c61634c4adfde484b88f28a77 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- Makefile.inc | 2 +- src/Kconfig | 2 ++ src/acpi/Kconfig | 6 +++++ src/acpi/Makefile.inc | 1 + src/acpi/sata.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++ src/acpi/sata.h | 4 ++++ 6 files changed, 75 insertions(+), 1 deletion(-) diff --git a/Makefile.inc b/Makefile.inc index d5ef301..f1475e6 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -52,7 +52,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs ####################################################################### # root source directories of coreboot -subdirs-y := src/lib src/console src/device +subdirs-y := src/lib src/console src/device src/acpi subdirs-y += src/ec/acpi $(wildcard src/ec/*/*) $(wildcard src/southbridge/*/*) subdirs-y += $(wildcard src/soc/*/*) $(wildcard src/northbridge/*/*) subdirs-y += src/superio $(wildcard src/drivers/*) src/cpu src/vendorcode diff --git a/src/Kconfig b/src/Kconfig index 5aa76fb..f685cc3 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -330,6 +330,8 @@ config RAM_CODE_SUPPORT endmenu +source "src/acpi/Kconfig" + source "src/mainboard/Kconfig" source "src/arch/*/Kconfig" diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig new file mode 100644 index 0000000..e025f99 --- /dev/null +++ b/src/acpi/Kconfig @@ -0,0 +1,6 @@ + +config ACPI_SATA_GENERATOR + bool + default n + help + Use acpi sata port generator. diff --git a/src/acpi/Makefile.inc b/src/acpi/Makefile.inc new file mode 100644 index 0000000..53ac679 --- /dev/null +++ b/src/acpi/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_ACPI_SATA_GENERATOR) += sata.c diff --git a/src/acpi/sata.c b/src/acpi/sata.c new file mode 100644 index 0000000..b488574 --- /dev/null +++ b/src/acpi/sata.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2015 Alexander Couzens <lynxis(a)fe80.eu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include "sata.h" + +#include <arch/acpi.h> +#include <arch/acpigen.h> + +/* e.g. + * generate_sata_ssdt_ports("\_SB.PCI0.SATA", 0x3); + * generates: + * Scope (\_SB.PCI0.SATA) + * { + * Device (PRT0) + * { + * Name (_ADR, 0x0000FFFF) // _ADR: Address + * } + * + * Device (PRT1) + * { + * Name (_ADR, 0x0001FFFF) // _ADR: Address + * } + * } + */ +void generate_sata_ssdt_ports(const char *scope, uint8_t enable_map) +{ + int i; + int bit; + char port_name[4] = "PRT0"; + + acpigen_write_scope(scope); + + /* generate a device for every enabled port */ + for (i = 0; i < 8; i++) { + bit = 1 << i; + if (!(bit & enable_map)) + continue; + + port_name[3] = '0' + i; + acpigen_write_device(port_name); + + acpigen_write_name_dword("_ADR", 0xffff + i * 0x10000); + acpigen_pop_len(); /* close PRT%d */ + } + + acpigen_pop_len(); /* close scope */ +} diff --git a/src/acpi/sata.h b/src/acpi/sata.h new file mode 100644 index 0000000..affaa34 --- /dev/null +++ b/src/acpi/sata.h @@ -0,0 +1,4 @@ + +#include <stdint.h> + +void generate_sata_ssdt_ports(const char *scope, uint8_t enable_map);

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Patch set updated for coreboot: 5f4fadc southbridge/bd82x6x: use new ssdt sata port generator
by Alexander Couzens 04 Jun '15

04 Jun '15

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9709 -gerrit commit 5f4fadca4991fb700bfc23dffee96f23e87fc6c1 Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Thu Apr 16 02:00:21 2015 +0200 southbridge/bd82x6x: use new ssdt sata port generator Change-Id: I2be76097ebd27f2529e3fbbecefd314a0eea3cb0 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- src/southbridge/intel/bd82x6x/Kconfig | 1 + src/southbridge/intel/bd82x6x/acpi/sata.asl | 52 ----------------------------- src/southbridge/intel/bd82x6x/sata.c | 8 +++++ 3 files changed, 9 insertions(+), 52 deletions(-) diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 6190879..3a68fec 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -37,6 +37,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select PCIEXP_COMMON_CLOCK select SPI_FLASH select COMMON_FADT + select ACPI_SATA_GENERATOR config EHCI_BAR hex diff --git a/src/southbridge/intel/bd82x6x/acpi/sata.asl b/src/southbridge/intel/bd82x6x/acpi/sata.asl index fb685a3..00d3010 100644 --- a/src/southbridge/intel/bd82x6x/acpi/sata.asl +++ b/src/southbridge/intel/bd82x6x/acpi/sata.asl @@ -26,56 +26,4 @@ Device (SATA) { Name (_ADR, 0x001f0002) - - Device (PRID) - { - Name (_ADR, 0) - - // Get Timing Mode - Method (_GTM) - { - Name(PBUF, Buffer(20) { - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00 }) - - CreateDwordField (PBUF, 0, PIO0) - CreateDwordField (PBUF, 4, DMA0) - CreateDwordField (PBUF, 8, PIO1) - CreateDwordField (PBUF, 12, DMA1) - CreateDwordField (PBUF, 16, FLAG) - - // TODO fill return structure - - Return (PBUF) - } - - // Set Timing Mode - Method (_STM, 3) - { - CreateDwordField (Arg0, 0, PIO0) - CreateDwordField (Arg0, 4, DMA0) - CreateDwordField (Arg0, 8, PIO1) - CreateDwordField (Arg0, 12, DMA1) - CreateDwordField (Arg0, 16, FLAG) - - // TODO: Do the deed - } - - Device (DSK0) - { - Name (_ADR, 0) - // TODO: _RMV ? - // TODO: _GTF ? - } - - Device (DSK1) - { - Name (_ADR, 1) - - // TODO: _RMV ? - // TODO: _GTF ? - } - - } } diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index 1cdc5e2..18e5a08 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -25,6 +25,7 @@ #include <device/pci_ids.h> #include "pch.h" #include <pc80/mc146818rtc.h> +#include <acpi/sata.h> typedef struct southbridge_intel_bd82x6x_config config_t; @@ -247,6 +248,11 @@ static void sata_set_subsystem(device_t dev, unsigned vendor, unsigned device) } } +static void sata_fill_ssdt(device_t dev) { + config_t *config = dev->chip_info; + generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map); +} + static struct pci_operations sata_pci_ops = { .set_subsystem = sata_set_subsystem, }; @@ -255,6 +261,8 @@ static struct device_operations sata_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, + .acpi_fill_ssdt_generator + = sata_fill_ssdt, .init = sata_init, .enable = sata_enable, .scan_bus = 0,

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coreboot-gerrit June 2015