coreboot-gerrit December 2015

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: pcengines/apu1: Supply _HID object for ACPI GPIO devices
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit eca844b9490d840377e2d0c54dffc1271758a62b Author: Martin Roth <martinroth(a)google.com> Date: Tue Dec 1 10:46:33 2015 -0700 pcengines/apu1: Supply _HID object for ACPI GPIO devices The _HID was present for the top level BTNS and LEDS Devices, but was missing in the individual devices. The alternative would be to supply the GPIO being used as an _ADR object, but since it looks like the driver already has another method of handling that, it isn't required. Fixes these IASL warnings: dsdt.aml 1522: Device (BTN1) Warning 3141 - ^ Missing dependency (Device object requires a _HID or _ADR in same scope) dsdt.aml 1567: Device (LED1) Warning 3141 - ^ Missing dependency (Device object requires a _HID or _ADR in same scope) dsdt.aml 1576: Device (LED2) Warning 3141 - ^ Missing dependency (Device object requires a _HID or _ADR in same scope) dsdt.aml 1587: Device (LED3) Warning 3141 - ^ Missing dependency (Device object requires a _HID or _ADR in same scope) Change-Id: I67c48084a6ee2a104ffff2b5a986d24a51ee49e1 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12582 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12582 for details. -gerrit

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Patch set updated for coreboot: intel/common/firmware: Add option to configure SPI for EM100
by Martin Roth 06 Dec '15

06 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12637 -gerrit commit df245b082767edd3737f5acc18a0662c94511592 Author: Martin Roth <martinroth(a)google.com> Date: Thu Dec 3 14:27:45 2015 -0700 intel/common/firmware: Add option to configure SPI for EM100 Add a Kconfig option to set the firmware descriptor to allow EM100 use. Change-Id: If5d7cd6ad671f0328ee5be0b5e660dbc837fcac3 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/southbridge/intel/common/firmware/Kconfig | 6 ++++++ src/southbridge/intel/common/firmware/Makefile.inc | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig index 316ade4..62b9a31 100644 --- a/src/southbridge/intel/common/firmware/Kconfig +++ b/src/southbridge/intel/common/firmware/Kconfig @@ -34,6 +34,12 @@ config IFD_BIN_PATH default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin" depends on HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD +config EM100 + bool "Configure IFD for EM100 usage" + depends on HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD + help + Set SPI frequency to 20MHz and disable Dual Output Fast Read Support + config HAVE_ME_BIN bool "Add Intel ME/TXE firmware" depends on HAVE_IFD_BIN diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc index 49a4434..fa28ccf 100644 --- a/src/southbridge/intel/common/firmware/Makefile.inc +++ b/src/southbridge/intel/common/firmware/Makefile.inc @@ -71,6 +71,12 @@ else ifneq ($(CONFIG_BUILD_WITH_FAKE_IFD),y) mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre endif +ifeq ($(CONFIG_EM100),y) + printf " IFDTOOL Setting EM100 mode\n" + $(objutil)/ifdtool/ifdtool --em100 $(obj)/coreboot.pre + mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre +endif + PHONY+=add_intel_firmware endif

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Patch merged into coreboot/master: intel/fsp_rangeley: change non-existent config options to #defines
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 49fdf3f957869dab82b46d6548f73ceab909132b Author: Martin Roth <martinroth(a)google.com> Date: Thu Nov 26 15:58:12 2015 -0700 intel/fsp_rangeley: change non-existent config options to #defines Kconfig symbols CONFIG_ACPI_INCLUDE_PMIO and CONFIG_ACPI_INCLUDE_GPIO were never added to the coreboot codebase when the Rangeley code was brought in from Sage. These symbols disabled ACPI code that was unused because it caused dmesg warnings due to conflicts with drivers trying to claim the same addresses as the ACPI code. Because it could be used on some other platforms, it was left in instead of being completely removed. - Change the Kconfig symbol names to simple #defines in the mainboard code. - Add the #defines along with comments to the reference platform. - Hook everything together in dsdt.asl - Update new mainboard littleplains the same way. Change-Id: I1f62157c6e447ea9b7207699572930e4711fc3e0 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12552 Reviewed-by: David Guckian <david.guckian(a)intel.com> Tested-by: build bot (Jenkins) See https://review.coreboot.org/12552 for details. -gerrit

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Patch merged into coreboot/master: Remove #ifdef checks on Kconfig symbols
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 7c38e1e8bc47c2842b23c565a35f8d959428ec3c Author: Martin Roth <martinroth(a)google.com> Date: Fri Nov 27 13:05:04 2015 -0700 Remove #ifdef checks on Kconfig symbols In coreboot, bool, hex, and int type symbols are ALWAYS defined. Change-Id: I58a36b37075988bb5ff67ac692c7d93c145b0dbc Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12560 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12560 for details. -gerrit

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Patch merged into coreboot/master: amd/pi/00660F01: Remove 'PER_DEVICE_ACPI_TABLES'
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 19fbdcc8283e0e499cb517d1149225bfadc61f03 Author: Martin Roth <martinroth(a)google.com> Date: Thu Nov 26 17:58:03 2015 -0700 amd/pi/00660F01: Remove 'PER_DEVICE_ACPI_TABLES' The PER_DEVICE_ACPI_TABLES Kconfig symbol is no longer used as it was removed in commit 83f81cad (acpi: Remove monolithic ACPI) Change-Id: Ie6ba252f6e7d33da9d4500f1201367f116e4c505 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12554 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/12554 for details. -gerrit

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Patch merged into coreboot/master: hp/pavilion_m6_1035dx: Fix IASL warning - Missing _HID object
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit ad4764dddd838cfc5713f407b642e2357eb6e888 Author: Martin Roth <martinroth(a)google.com> Date: Tue Nov 24 16:46:44 2015 -0700 hp/pavilion_m6_1035dx: Fix IASL warning - Missing _HID object - Add System board _HID object. - Remove Kconfig default disabling IASL warnings as errors Fixes warning: dsdt.aml 64: Device (MB) { Warning 3141 - ^ Missing dependency (Device object requires a _HID or _ADR in same scope) Change-Id: I4fa6ab2a6744d58ded8b0feb361e002d90e11474 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12532 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12532 for details. -gerrit

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Patch merged into coreboot/master: Rangeley: Change A, A, A, A INT routing to A, A, A, B
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit d49bbff8ffc00d5a83d774f123939f5fc444ba08 Author: Martin Roth <martinroth(a)google.com> Date: Wed Dec 2 16:24:00 2015 -0700 Rangeley: Change A, A, A, A INT routing to A, A, A, B Devices that have their interrupt routing set to A, A, A, A don't get any interrupt values assigned because that series evaluates to 0. The code that sets the interrupt values checks to make sure a value is set by verifying that it's not 0. On Bay Trail, these are all single-function graphics devices, so by changing one of the unused interrupt lines from A to any other value, it assigns the values correctly. This issue did not affect ACPI interrupt routing. This is just a workaround, and the root issue still needs to be fixed. Change-Id: I4e6fe56084cbe86b309da15d61b296f1936458ec Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12630 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12630 for details. -gerrit

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Patch merged into coreboot/master: fsp_baytrail: Change A, A, A, A IRQ routing to A, A, A, B
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit cf752fe9666919e5c403a9dac09a70cbaf64fa1f Author: Martin Roth <martinroth(a)google.com> Date: Wed Dec 2 16:20:53 2015 -0700 fsp_baytrail: Change A, A, A, A IRQ routing to A, A, A, B Devices that have their interrupt routing set to A, A, A, A don't get any interrupt values assigned because that series evaluates to 0. The code that sets the interrupt values checks to make sure a value is set by verifying that it's not 0. On Bay Trail, these are all single-function graphics devices, so by changing one of the unused interrupt lines from A to any other value, it assigns the values correctly. This issue did not affect ACPI interrupt routing. This is just a workaround, and the root issue still needs to be fixed. Change-Id: I78866e3e0079435037e457a4fb04979254b56ee2 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12629 Tested-by: build bot (Jenkins) Reviewed-by: Ben Gardner <gardner.ben(a)gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12629 for details. -gerrit

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Patch merged into coreboot/master: southbridge/intel/fspi89xx: Don't include common/firmware makefile
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 242ee89f983bf304cca95e15860f7e294fd1e9a6 Author: Martin Roth <martinroth(a)google.com> Date: Thu Dec 3 14:29:33 2015 -0700 southbridge/intel/fspi89xx: Don't include common/firmware makefile The folder southbridge/intel/common/firmware is already being included so does not need to be added a second time here. Change-Id: I60d795a60c772547278a5a5e0c9a023a93f90417 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12636 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12636 for details. -gerrit

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Patch merged into coreboot/master: Makefile.inc: Add AMDFWTOOL to tools so abuild will stop failing
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 9c940aec36617128764bdeb3894a05d374c8673a Author: Martin Roth <martinroth(a)google.com> Date: Fri Dec 4 13:11:35 2015 -0700 Makefile.inc: Add AMDFWTOOL to tools so abuild will stop failing Jenkins keeps failing trying to build AMDFWTOOL because it's being built by multiple platforms at the same time. Putting it into the tools list and having it built ahead of time should fix this problem. Change-Id: I2a8308036135729f0ed19502f3e039aca009b3f3 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12647 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12647 for details. -gerrit

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coreboot-gerrit December 2015