coreboot-gerrit December 2015

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: libpayload/configs/config.purin: Use CONFIG_LP_8250_SERIAL_CONSOLE
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 2a27a858091f6b0a2c80487789281d6983917425 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 12:07:34 2015 -0700 libpayload/configs/config.purin: Use CONFIG_LP_8250_SERIAL_CONSOLE - Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE. - CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the default values for these new config options. CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver) Change-Id: I2775c3676d5f458a4c31fe0c1d571bc2b9221a5c Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12653 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12653 for details. -gerrit

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Patch merged into coreboot/master: MAINTAINERS: Designate Intel maintainers for FSP 1.1
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 533f6668a429d61be3a2c141603480d5fb2cd4a4 Author: Martin Roth <martinroth(a)google.com> Date: Fri Dec 4 08:36:49 2015 -0700 MAINTAINERS: Designate Intel maintainers for FSP 1.1 After several internal discussions, teams at Intel with stakes in coreboot have decided to each assign one or more maintainers. These maintainers can be expected to provide a point of contact for assistance with technical (code-related) issues, testing on real hardware, and making sure that their FSP-related areas continue to function with upstream coreboot. They understand that the inclusion of their information in the MAINTAINERS file does not give them any extra power over their areas. At the same time, nobody expects any community process to change. The one expectation is that reasonable efforts be made to contact these maintainers when making fundamental changes to their areas, or when discussing code removal. Change-Id: I1aa135838984973f648dec5dbb35ff73992e9289 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12644 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy <leroy.p.leahy(a)intel.com> See https://review.coreboot.org/12644 for details. -gerrit

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Patch merged into coreboot/master: cbfstool: Re-align help text
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 0eae36486a8d96d9945de459ec8161f14df60edf Author: Martin Roth <martinroth(a)google.com> Date: Fri Dec 4 11:27:11 2015 -0700 cbfstool: Re-align help text The help text had gotten kind of sloppy. There was a missing newline in the add-stage command, some of the lines were too long, etc. Change-Id: If7bdc519ae062fb4ac6fc67e6b55af1e80eabe33 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12646 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Alexander Couzens <lynxis(a)fe80.eu> See https://review.coreboot.org/12646 for details. -gerrit

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New patch to review for coreboot: qemu-x86: Enable SMP support
by Patrick Georgi 06 Dec '15

06 Dec '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12656 -gerrit commit 7d4439cf8a2665ce82544d72db7e3d5835b7cd13 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sun Dec 6 20:58:21 2015 +0100 qemu-x86: Enable SMP support QEmu can do this for a while now. Change-Id: I3a5027a7afc9dd18463d26cb42fe68747a89f6b0 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/cpu/qemu-x86/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 88cf82b..ea2bc46 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -19,3 +19,4 @@ config CPU_QEMU_X86 select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select SMP

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New patch to review for coreboot: mohonpeak/Kconfig: Whitespace fixes
by Martin Roth 06 Dec '15

06 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12655 -gerrit commit 9d3d1ef34f1ce28c1a27b560f34b4e7aa47e368a Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 12:14:42 2015 -0700 mohonpeak/Kconfig: Whitespace fixes Auto-indent did me wrong, and I didn't notice it. Change-Id: I5a736cf53a3bdbe57b28b2d6a55befd341d8dfd8 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/intel/mohonpeak/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig index 8f6e077..2c1d2de 100644 --- a/src/mainboard/intel/mohonpeak/Kconfig +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -71,10 +71,10 @@ config UART_FOR_CONSOLE help The Mohon Peak board uses COM2 (2f8) for the serial console. - config PAYLOAD_CONFIGFILE - string - default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios" - help + config PAYLOAD_CONFIGFILE + string + default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios" + help The Avoton/Rangeley chip does not allow devices to write into the 0xe000 segment. This means that USB/SATA devices will not work in SeaBIOS unless we put the SeaBIOS buffer area down in the 0x9000 segment.

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New patch to review for coreboot: libpayload/configs/config.veyron: Use CONFIG_LP_8250_SERIAL_CONSOLE
by Martin Roth 06 Dec '15

06 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12654 -gerrit commit a3d77da697d1c6131002c6eac4f9ed02f7750e82 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 12:13:11 2015 -0700 libpayload/configs/config.veyron: Use CONFIG_LP_8250_SERIAL_CONSOLE - Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE. - CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the default values for these new config options. CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver) Change-Id: I97461c5e0c14075dcf8a35c96a0b0f1651e2e8e4 Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/libpayload/configs/config.veyron | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/payloads/libpayload/configs/config.veyron b/payloads/libpayload/configs/config.veyron index 8843098..aca5817 100644 --- a/payloads/libpayload/configs/config.veyron +++ b/payloads/libpayload/configs/config.veyron @@ -30,6 +30,7 @@ CONFIG_LP_LIBC=y # CONFIG_LP_CURSES is not set CONFIG_LP_CBFS=y CONFIG_LP_LZMA=y +CONFIG_LP_LZ4=y # # Console Options @@ -37,11 +38,11 @@ CONFIG_LP_LZMA=y CONFIG_LP_SKIP_CONSOLE_INIT=y CONFIG_LP_CBMEM_CONSOLE=y CONFIG_LP_SERIAL_CONSOLE=y -# CONFIG_LP_8250_SERIAL_CONSOLE is not set +CONFIG_LP_8250_SERIAL_CONSOLE=y # CONFIG_LP_S5P_SERIAL_CONSOLE is not set -CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE=y # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_BG4CD_SERIAL_CONSOLE is not set +# CONFIG_LP_PL011_SERIAL_CONSOLE is not set # CONFIG_LP_SERIAL_SET_SPEED is not set # CONFIG_LP_SERIAL_ACS_FALLBACK is not set CONFIG_LP_VIDEO_CONSOLE=y

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New patch to review for coreboot: libpayload/configs/config.purin: Use CONFIG_LP_8250_SERIAL_CONSOLE
by Martin Roth 06 Dec '15

06 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12653 -gerrit commit 6f4e5677b123d9b8b1e82cb111b9050354678c11 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 12:07:34 2015 -0700 libpayload/configs/config.purin: Use CONFIG_LP_8250_SERIAL_CONSOLE - Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE. - CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the default values for these new config options. CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver) Change-Id: I2775c3676d5f458a4c31fe0c1d571bc2b9221a5c Signed-off-by: Martin Roth <martinroth(a)google.com> --- payloads/libpayload/configs/config.purin | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/payloads/libpayload/configs/config.purin b/payloads/libpayload/configs/config.purin index 74856a6..adb93b1 100644 --- a/payloads/libpayload/configs/config.purin +++ b/payloads/libpayload/configs/config.purin @@ -30,6 +30,7 @@ CONFIG_LP_LIBC=y # CONFIG_LP_CURSES is not set CONFIG_LP_CBFS=y CONFIG_LP_LZMA=y +CONFIG_LP_LZ4=y # # Console Options @@ -37,11 +38,11 @@ CONFIG_LP_LZMA=y CONFIG_LP_SKIP_CONSOLE_INIT=y CONFIG_LP_CBMEM_CONSOLE=y CONFIG_LP_SERIAL_CONSOLE=y -# CONFIG_LP_8250_SERIAL_CONSOLE is not set +CONFIG_LP_8250_SERIAL_CONSOLE=y # CONFIG_LP_S5P_SERIAL_CONSOLE is not set -CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE=y # CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set # CONFIG_LP_BG4CD_SERIAL_CONSOLE is not set +# CONFIG_LP_PL011_SERIAL_CONSOLE is not set # CONFIG_LP_SERIAL_SET_SPEED is not set # CONFIG_LP_SERIAL_ACS_FALLBACK is not set # CONFIG_LP_VIDEO_CONSOLE is not set

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Patch set updated for coreboot: Enable KCONFIG_STRICT mode
by Martin Roth 06 Dec '15

06 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/10978 -gerrit commit 12d0c8a6eb871294a2098b9bff4e91b5ceb08881 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jul 17 17:29:19 2015 -0700 Enable KCONFIG_STRICT mode Change-Id: I6aa77db1b12a67472302ea39d7433993a6838af6 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 99d7139..08d4f97 100644 --- a/Makefile +++ b/Makefile @@ -57,6 +57,7 @@ export KCONFIG_DEPENDENCIES := $(obj)/auto.conf.cmd export KCONFIG_SPLITCONFIG := $(obj)/config export KCONFIG_TRISTATE := $(obj)/tristate.conf export KCONFIG_NEGATIVES := 1 +export KCONFIG_STRICT := 1 # directory containing the toplevel Makefile.inc TOPLEVEL := .

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Patch merged into coreboot/master: MAINTAINERS: add myself to lenovo boards + ec
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 753af5b1042a73d6287a7b9ee78755cb29013ba6 Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Sat Dec 5 13:45:27 2015 +0100 MAINTAINERS: add myself to lenovo boards + ec Change-Id: I94835e85046b5d2b63b9b822c0dc670bf939e57e Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> Reviewed-on: https://review.coreboot.org/12650 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/12650 for details. -gerrit

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Patch merged into coreboot/master: fsp_baytrail: Add missing newline to eMMC Mode log
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit d347f6cb0b788c5e887b15849ad789ba30833558 Author: Ben Gardner <gardner.ben(a)gmail.com> Date: Wed Dec 2 12:42:28 2015 -0600 fsp_baytrail: Add missing newline to eMMC Mode log Change-Id: Icd697053c2ea1a2ac42bdd045134d223d93d5403 Signed-off-by: Ben Gardner <gardner.ben(a)gmail.com> Reviewed-on: https://review.coreboot.org/12623 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/12623 for details. -gerrit

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coreboot-gerrit December 2015