coreboot-gerrit December 2015

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: soc/intel/common: Remove USE_FMAP - symbol doesn't exist
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12663 -gerrit commit 1ebc555f195e5c1913d24af515f3e4bf3e730061 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 19:18:37 2015 -0700 soc/intel/common: Remove USE_FMAP - symbol doesn't exist The USE_FMAP Kconfig symbol doesn't exist, so remove things that are depending on it not being enabled. Either the use of the USE_FMAP symbol should be removed, or the symbol should be added. I'm not sure how this plays with the updates to cbfstool, but I thought I'd post this for comment and see which direction it should go. Change-Id: I1946f5d13a762ab07744a1d9a6cb754433e6701d Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/soc/intel/common/Kconfig | 7 ------- 1 file changed, 7 deletions(-) diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index 96d2b8e..028e915 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -8,26 +8,19 @@ if SOC_INTEL_COMMON config CACHE_MRC_SETTINGS bool "Save cached MRC settings" default n - help - If CONFIG_USE_FMAP is enabled, it is assumed that a flashmap - containing an RW_MRC_CACHE entry that specifies the location and size - of the cache will be added to the image and present at runtime. if CACHE_MRC_SETTINGS config MRC_SETTINGS_CACHE_BASE hex - depends on !USE_FMAP default 0xfffe0000 config MRC_SETTINGS_CACHE_SIZE hex - depends on !USE_FMAP default 0x10000 config MRC_SETTINGS_PROTECT bool "Enable protection on MRC settings" - depends on !USE_FMAP default n endif # CACHE_MRC_SETTINGS

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New patch to review for coreboot: soc/intel/skylake: Remove obsolete Kconfig symbols
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12662 -gerrit commit 5dd70cec2ffbc787a1b7e78a7c1c0206ca69309f Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 18:36:35 2015 -0700 soc/intel/skylake: Remove obsolete Kconfig symbols CPU_MICROCODE_IN_CBFS was renamed to SUPPORT_CPU_UCODE_IN_CBFS in commit 66e0c4c8 (cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS) Both CPU_MICROCODE_IN_CBFS and SUPPORT_CPU_UCODE_IN_CBFS were present, so just remove CPU_MICROCODE_IN_CBFS. SMM_MODULES was removed in commit 44cbe10f (smm: Merge configs SMM_MODULES and SMM_TSEG) Change-Id: Icdd4fcc5a3a97aee443742aaab3df92b53ff4589 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/soc/intel/skylake/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 3de9b54..1f7be57 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -16,7 +16,6 @@ config CPU_SPECIFIC_OPTIONS select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE select COLLECT_TIMESTAMPS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select CPU_MICROCODE_IN_CBFS select GENERIC_GPIO_LIB select HAS_PRECBMEM_TIMESTAMP_REGION select HAVE_HARD_RESET @@ -38,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_RESET - select SMM_MODULES select SMM_TSEG select SMP select SPI_FLASH

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Patch set updated for coreboot: Enable KCONFIG_STRICT mode
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/10978 -gerrit commit eb7680a9fb201a19a2c7f9195f78bd222d22456f Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jul 17 17:29:19 2015 -0700 Enable KCONFIG_STRICT mode Change-Id: I6aa77db1b12a67472302ea39d7433993a6838af6 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 99d7139..08d4f97 100644 --- a/Makefile +++ b/Makefile @@ -57,6 +57,7 @@ export KCONFIG_DEPENDENCIES := $(obj)/auto.conf.cmd export KCONFIG_SPLITCONFIG := $(obj)/config export KCONFIG_TRISTATE := $(obj)/tristate.conf export KCONFIG_NEGATIVES := 1 +export KCONFIG_STRICT := 1 # directory containing the toplevel Makefile.inc TOPLEVEL := .

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New patch to review for coreboot: vendorcode/google/chromeos: Only select ELOG if SPI_FLASH is available
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12661 -gerrit commit d698d6580767c8351a3eb33d4df18f82497e3159 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 18:28:05 2015 -0700 vendorcode/google/chromeos: Only select ELOG if SPI_FLASH is available ELOG requires SPI_FLASH, so don't bother selecting if if SPI_FLASH isn't available. Change-Id: I080ac47e74aba820c94409d4913647abee215076 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/vendorcode/google/chromeos/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index 4d05b3e..aae611c 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -25,7 +25,7 @@ config CHROMEOS select TPM_INIT_FAILURE_IS_FATAL if PC80_SYSTEM && LPC_TPM select SKIP_TPM_STARTUP_ON_NORMAL_BOOT if PC80_SYSTEM && LPC_TPM select BOOTMODE_STRAPS - select ELOG + select ELOG if SPI_FLASH select COLLECT_TIMESTAMPS select VBOOT_VERIFY_FIRMWARE help

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New patch to review for coreboot: emulation/qemu-arm7: Fix Kconfig symbols for stage compilers
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12660 -gerrit commit 809dab92b121711ec46e29ffff433009acc916e5 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 18:13:43 2015 -0700 emulation/qemu-arm7: Fix Kconfig symbols for stage compilers These had typos ARM_STAGE_ARM7 instead of ARCH_STAGE_ARM7 Change-Id: Iffe8fecb3e52a50ff02b774478a10c353093688b Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/emulation/qemu-armv7/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig index c6199ea..bb13e98 100644 --- a/src/mainboard/emulation/qemu-armv7/Kconfig +++ b/src/mainboard/emulation/qemu-armv7/Kconfig @@ -27,9 +27,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy select DRIVERS_UART_PL011 select BOOTBLOCK_CONSOLE select CONSOLE_SERIAL - select ARM_BOOTBLOCK_ARMV7 - select ARM_ROMSTAGE_ARMV7 - select ARM_RAMSTAGE_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select BOARD_ROMSIZE_KB_4096 config MAINBOARD_DIR

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New patch to review for coreboot: google/oak: Move CHROMEOS specific Kconfig objects under CHROMEOS
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12659 -gerrit commit 24f39068f829d7218b7a8f667fdee78397816174 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 18:02:30 2015 -0700 google/oak: Move CHROMEOS specific Kconfig objects under CHROMEOS The symbols CHROMEOS_VBNV_EC, EC_SOFTWARE_SYNC, and VIRTUAL_DEV_SWITCH should only be selected if CHROMEOS is selected. Change-Id: I07ef631d63be53cf99a6bf61d0e91b88728dbba3 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/google/oak/Kconfig | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/oak/Kconfig b/src/mainboard/google/oak/Kconfig index e45fb4c..89c448d 100644 --- a/src/mainboard/google/oak/Kconfig +++ b/src/mainboard/google/oak/Kconfig @@ -23,12 +23,14 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select SOC_MEDIATEK_MT8173 select BOARD_ID_AUTO - select CHROMEOS_VBNV_EC select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_SPI - select EC_SOFTWARE_SYNC select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT + +config CHROMEOS + select CHROMEOS_VBNV_EC + select EC_SOFTWARE_SYNC select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR

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New patch to review for coreboot: console: Allow ARM64 platforms to select bootblock console
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12658 -gerrit commit 36c196f320b4638a5113065c86c47178c34d5423 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 18:00:20 2015 -0700 console: Allow ARM64 platforms to select bootblock console Change-Id: I09943aafe29f6e7a2a878e7b6141661982dfc645 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/console/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 3130ee9..73c6b28 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -2,7 +2,7 @@ menu "Console" config BOOTBLOCK_CONSOLE bool "Enable early (bootblock) console output." - depends on ARCH_ARM || ARCH_RISCV || ARCH_MIPS + depends on ARCH_ARM || ARCH_ARM64 || ARCH_RISCV || ARCH_MIPS default n help Use console during the bootblock if supported

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New patch to review for coreboot: soc/mediatek/mt8173: SPI_ATOMIC_SEQUENCING depends on SPI_FLASH
by Martin Roth 07 Dec '15

07 Dec '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12657 -gerrit commit e051c629a3ffeefa769f411e616a98991b02d468 Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 17:59:31 2015 -0700 soc/mediatek/mt8173: SPI_ATOMIC_SEQUENCING depends on SPI_FLASH Don't select SPI_ATOMIC_SEQUENCING unless SPI_FLASH is being used. warning: (... SOC_MEDIATEK_MT8173) selects SPI_ATOMIC_SEQUENCING which has unmet direct dependencies (SPI_FLASH) Change-Id: I93e9a7102d1d0ef62565110b5b3b677da8d0c72b Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/soc/mediatek/mt8173/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/mediatek/mt8173/Kconfig b/src/soc/mediatek/mt8173/Kconfig index 6f23eba..5158651 100644 --- a/src/soc/mediatek/mt8173/Kconfig +++ b/src/soc/mediatek/mt8173/Kconfig @@ -8,7 +8,7 @@ config SOC_MEDIATEK_MT8173 select ARCH_VERSTAGE_ARMV8_64 select BOOTBLOCK_CONSOLE select HAVE_UART_SPECIAL - select SPI_ATOMIC_SEQUENCING + select SPI_ATOMIC_SEQUENCING if SPI_FLASH select HAVE_MONOTONIC_TIMER select GENERIC_UDELAY select HAS_PRECBMEM_TIMESTAMP_REGION

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Patch merged into coreboot/master: util/board_status: Fix a couple of ugly wiki lines
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 4f8ff240dd45fc568b05bb17bea5afca7a8ce75c Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Wed Dec 2 18:07:22 2015 -0600 util/board_status: Fix a couple of ugly wiki lines Examples from the KGPE-D16 entry: AMD SR5650 AMD SB700 AMD SB700 DISABLE ISA DMA AMD SUBTYPE SP5100 AMD_SOCKET_G34_NON_AGESA Should be: AMD SR5650 AMD SB700 AMD SUBTYPE SP5100 AMD Opteron™ Magny-Cours/Interlagos Change-Id: I3881a27060c0cd66a7228d201f477e89f364daca Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12631 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12631 for details. -gerrit

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Patch merged into coreboot/master: libpayload/configs/config.veyron: Use CONFIG_LP_8250_SERIAL_CONSOLE
by gerrit＠coreboot.org 06 Dec '15

06 Dec '15

the following patch was just integrated into master: commit 5a8d619a1c002ccf2cff71b1b54e4f870ed392ec Author: Martin Roth <martinroth(a)google.com> Date: Sun Dec 6 12:13:11 2015 -0700 libpayload/configs/config.veyron: Use CONFIG_LP_8250_SERIAL_CONSOLE - Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE. - CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the default values for these new config options. CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver) Change-Id: I97461c5e0c14075dcf8a35c96a0b0f1651e2e8e4 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/12654 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/12654 for details. -gerrit

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coreboot-gerrit December 2015