coreboot-gerrit December 2014

coreboot-gerrit@coreboot.org

1 participants
1346 discussions

Patch merged into coreboot/master: c3101a0 blaze: change ramcode 0000 to use 792MHz bct
by gerrit＠coreboot.org 26 Dec '14

26 Dec '14

the following patch was just integrated into master: commit c3101a09639062702707269cc59972d3f29c0652 Author: Ken Chang <kenc(a)nvidia.com> Date: Wed Apr 30 17:04:04 2014 +0800 blaze: change ramcode 0000 to use 792MHz bct The original sdram-hynix-2GB-792.inc was just copied from nyan bct file. This change updates the cfg file for Hynix 2GB, 792MHz DRAM based on the data generated by t124_emc_reg_tool. BUG=none BRANCH=blaze TEST=emerged coreboot, booted successfully into kernel. Original-Change-Id: I9534b4df6d35193179de124309df12ed830098a0 Original-Signed-off-by: Ken Chang <kenc(a)nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197660 Original-Reviewed-by: Tom Warren <twarren(a)nvidia.com> Original-Reviewed-by: Hung-Te Lin <hungte(a)chromium.org> (cherry picked from commit 797dabe54f2679bb5717961dda1947df453eb0f1) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Ie67bedb29d5d9c3a3b58d949ddf9600716c385ec Reviewed-on: http://review.coreboot.org/7898 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> See http://review.coreboot.org/7898 for details. -gerrit

1 0

Patch merged into coreboot/master: bb932c5 nyan*: I2C: Implement bus clear when 'ARB_LOST' error occurs
by gerrit＠coreboot.org 26 Dec '14

26 Dec '14

the following patch was just integrated into master: commit bb932c56f0ba7890697fe2666cc63d2a215d95f1 Author: Tom Warren <twarren(a)nvidia.com> Date: Wed Apr 30 14:51:38 2014 -0700 nyan*: I2C: Implement bus clear when 'ARB_LOST' error occurs This is a fix for the 'Lost arb' we're seeing on Nyan* during reboot stress testing. It occurs when we are slamming the default PMIC registers with pmic_write_reg(). Currently, I've only captured this a few times, and the bus clear seemed to work, as the PMIC writes continued (where they'd hang the system before bus clear) for a couple of regs, then it hangs hard, no messages, no 2nd lost arb, etc. So I've added code to the PMIC write function that will reset the SoC if any I2C error occurs. That seems to recover OK, i.e. on the next reboot the PMIC writes all go thru, boot is OK, kernel loads, etc. BUG=chrome-os-partner:28323 BRANCH=nyan TEST=Tested on nyan. Built for nyan and nyan_big. Original-Change-Id: I1ac5e3023ae22c015105b7f0fb7849663b4aa982 Original-Signed-off-by: Tom Warren <twarren(a)nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197732 Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> Original-Reviewed-by: Jimmy Zhang <jimmzhang(a)nvidia.com> (cherry picked from commit f445127e2d9e223a5ef9117008a7ac7631a7980c) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I584d55b99d65f1e278961db6bdde1845cb01f3bc Reviewed-on: http://review.coreboot.org/7897 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> See http://review.coreboot.org/7897 for details. -gerrit

1 0

Patch set updated for coreboot: da2e348 soc/samsung/exynos: Layout common code framework
by Edward O'Callaghan 26 Dec '14

26 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7929 -gerrit commit da2e3485107a42283b2b3cd34e0e26507e371e9b Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 13:58:56 2014 +1100 soc/samsung/exynos: Layout common code framework Layout the framework to merge common components between Exynos families. Change-Id: Ic8896e791dac9757c2bd19f390d0a5821f96fc06 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/soc/samsung/Kconfig | 1 + src/soc/samsung/Makefile.inc | 1 + src/soc/samsung/exynos/Kconfig | 11 ++++++ src/soc/samsung/exynos/Makefile.inc | 19 ++++++++++ src/soc/samsung/exynos/bootblock.c | 55 +++++++++++++++++++++++++++ src/soc/samsung/exynos/cbmem.c | 27 +++++++++++++ src/soc/samsung/exynos/mct.c | 36 ++++++++++++++++++ src/soc/samsung/exynos/monotonic_timer.c | 34 +++++++++++++++++ src/soc/samsung/exynos/wakeup.c | 57 ++++++++++++++++++++++++++++ src/soc/samsung/exynos/wakeup.h | 43 +++++++++++++++++++++ src/soc/samsung/exynos5250/Kconfig | 8 +--- src/soc/samsung/exynos5250/Makefile.inc | 14 ++----- src/soc/samsung/exynos5250/bootblock.c | 55 --------------------------- src/soc/samsung/exynos5250/cbmem.c | 27 ------------- src/soc/samsung/exynos5250/mct.c | 36 ------------------ src/soc/samsung/exynos5250/monotonic_timer.c | 34 ----------------- src/soc/samsung/exynos5250/wakeup.c | 57 ---------------------------- src/soc/samsung/exynos5250/wakeup.h | 43 --------------------- src/soc/samsung/exynos5420/Kconfig | 9 +---- src/soc/samsung/exynos5420/Makefile.inc | 14 ++----- src/soc/samsung/exynos5420/bootblock.c | 55 --------------------------- src/soc/samsung/exynos5420/cbmem.c | 27 ------------- src/soc/samsung/exynos5420/mct.c | 36 ------------------ src/soc/samsung/exynos5420/monotonic_timer.c | 34 ----------------- src/soc/samsung/exynos5420/wakeup.c | 57 ---------------------------- src/soc/samsung/exynos5420/wakeup.h | 43 --------------------- 26 files changed, 292 insertions(+), 541 deletions(-) diff --git a/src/soc/samsung/Kconfig b/src/soc/samsung/Kconfig index 9241d27..8bb0aa2 100644 --- a/src/soc/samsung/Kconfig +++ b/src/soc/samsung/Kconfig @@ -1,2 +1,3 @@ +source src/soc/samsung/exynos/Kconfig source src/soc/samsung/exynos5250/Kconfig source src/soc/samsung/exynos5420/Kconfig diff --git a/src/soc/samsung/Makefile.inc b/src/soc/samsung/Makefile.inc index 496b5f7..7a4123f 100644 --- a/src/soc/samsung/Makefile.inc +++ b/src/soc/samsung/Makefile.inc @@ -1,2 +1,3 @@ +subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS) += exynos subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5250) += exynos5250 subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5420) += exynos5420 diff --git a/src/soc/samsung/exynos/Kconfig b/src/soc/samsung/exynos/Kconfig new file mode 100644 index 0000000..63f1a45 --- /dev/null +++ b/src/soc/samsung/exynos/Kconfig @@ -0,0 +1,11 @@ +config CPU_SAMSUNG_EXYNOS + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 + select CPU_HAS_BOOTBLOCK_INIT + select HAVE_MONOTONIC_TIMER + select HAVE_UART_SPECIAL + select RELOCATABLE_MODULES + select DYNAMIC_CBMEM + bool + default n diff --git a/src/soc/samsung/exynos/Makefile.inc b/src/soc/samsung/exynos/Makefile.inc new file mode 100644 index 0000000..490c816 --- /dev/null +++ b/src/soc/samsung/exynos/Makefile.inc @@ -0,0 +1,19 @@ +bootblock-y += bootblock.c +bootblock-y += mct.c +##bootblock-y += mct.c power.c +bootblock-y += wakeup.c + +# Clock is required for UART +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c + +romstage-y += mct.c +romstage-y += monotonic_timer.c +romstage-y += cbmem.c +#romstage-y += power.c +romstage-y += wakeup.c + +ramstage-y += mct.c +ramstage-y += monotonic_timer.c +ramstage-y += cbmem.c +#ramstage-y += power.c +#ramstage-y += usb.c diff --git a/src/soc/samsung/exynos/bootblock.c b/src/soc/samsung/exynos/bootblock.c new file mode 100644 index 0000000..5d2d2b7 --- /dev/null +++ b/src/soc/samsung/exynos/bootblock.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <bootblock_common.h> +#include <arch/cache.h> + +#include "clk.h" +#include "wakeup.h" +#include "cpu.h" + +/* convenient shorthand (in MB) */ +#define SRAM_START (EXYNOS5_SRAM_BASE >> 20) +#define SRAM_SIZE 1 +#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */ + +void bootblock_cpu_init(void) +{ + /* kick off the multi-core timer. + * We want to do this as early as we can. + */ + mct_start(); + + if (get_wakeup_state() == WAKEUP_DIRECT) { + wakeup(); + /* Never returns. */ + } + + /* set up dcache and MMU */ + mmu_init(); + mmu_disable_range(0, SRAM_START); + mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK); + mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF); + dcache_mmu_enable(); + + /* For most ARM systems, we have to initialize firmware media source + * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is + * already handled by iROM so there's no need to setup again. + */ +} diff --git a/src/soc/samsung/exynos/cbmem.c b/src/soc/samsung/exynos/cbmem.c new file mode 100644 index 0000000..4650320 --- /dev/null +++ b/src/soc/samsung/exynos/cbmem.c @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stddef.h> +#include <cbmem.h> +#include "cpu.h" + +void *cbmem_top(void) +{ + return (void *)(get_fb_base_kb() * KiB); +} diff --git a/src/soc/samsung/exynos/mct.c b/src/soc/samsung/exynos/mct.c new file mode 100644 index 0000000..bbb90e4 --- /dev/null +++ b/src/soc/samsung/exynos/mct.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <arch/io.h> +#include "clk.h" + +uint64_t mct_raw_value(void) +{ + uint64_t upper = readl(&exynos_mct->g_cnt_u); + uint64_t lower = readl(&exynos_mct->g_cnt_l); + + return (upper << 32) | lower; +} + +void mct_start(void) +{ + writel(readl(&exynos_mct->g_tcon) | (0x1 << 8), + &exynos_mct->g_tcon); +} diff --git a/src/soc/samsung/exynos/monotonic_timer.c b/src/soc/samsung/exynos/monotonic_timer.c new file mode 100644 index 0000000..89ac416 --- /dev/null +++ b/src/soc/samsung/exynos/monotonic_timer.c @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <timer.h> + +#include "clk.h" + +static const uint32_t clocks_per_usec = MCT_HZ/1000000; + +void timer_monotonic_get(struct mono_time *mt) +{ + /* We don't have to call mct_start() here + * because it was already called in the bootblock + */ + + mono_time_set_usecs(mt, mct_raw_value() / clocks_per_usec); +} diff --git a/src/soc/samsung/exynos/wakeup.c b/src/soc/samsung/exynos/wakeup.c new file mode 100644 index 0000000..a240717 --- /dev/null +++ b/src/soc/samsung/exynos/wakeup.c @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/cache.h> +#include <console/console.h> +#include "power.h" +#include "wakeup.h" + +void wakeup(void) +{ + if (wakeup_need_reset()) + power_reset(); + + power_init(); /* Ensure ps_hold_setup() for early wakeup. */ + dcache_mmu_disable(); + power_exit_wakeup(); + /* Should never return. If we do, reset. */ + power_reset(); +} + +int get_wakeup_state(void) +{ + uint32_t status = power_read_reset_status(); + + /* DIDLE/LPA can be resumed without clock reset (ex, bootblock), + * and SLEEP requires resetting clock (should be done in ROM stage). + */ + + if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA) + return WAKEUP_DIRECT; + + if (status == S5P_CHECK_SLEEP) + return WAKEUP_NEED_CLOCK_RESET; + + return IS_NOT_WAKEUP; +} + +void wakeup_enable_uart(void) +{ + power_release_uart_retention(); +} diff --git a/src/soc/samsung/exynos/wakeup.h b/src/soc/samsung/exynos/wakeup.h new file mode 100644 index 0000000..91025c3 --- /dev/null +++ b/src/soc/samsung/exynos/wakeup.h @@ -0,0 +1,43 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CPU_SAMSUNG_EXYNOS_WAKEUP_H +#define CPU_SAMSUNG_EXYNOS_WAKEUP_H + +/* Power Down Modes */ +#define S5P_CHECK_SLEEP 0x00000BAD +#define S5P_CHECK_DIDLE 0xBAD00000 +#define S5P_CHECK_LPA 0xABAD0000 + +enum { + // A normal boot (not suspend/resume) + IS_NOT_WAKEUP, + // A wake up event that can be resumed any time + WAKEUP_DIRECT, + // A wake up event that must be resumed only after + // clock and memory controllers are re-initialized + WAKEUP_NEED_CLOCK_RESET, +}; + +int wakeup_need_reset(void); +int get_wakeup_state(void); +void wakeup(void); +void wakeup_enable_uart(void); + +#endif /* CPU_SAMSUNG_EXYNOS_WAKEUP_H */ diff --git a/src/soc/samsung/exynos5250/Kconfig b/src/soc/samsung/exynos5250/Kconfig index 8d7c867..2193126 100644 --- a/src/soc/samsung/exynos5250/Kconfig +++ b/src/soc/samsung/exynos5250/Kconfig @@ -1,13 +1,7 @@ config CPU_SAMSUNG_EXYNOS5250 - select ARCH_BOOTBLOCK_ARMV7 - select ARCH_ROMSTAGE_ARMV7 - select ARCH_RAMSTAGE_ARMV7 - select CPU_HAS_BOOTBLOCK_INIT - select HAVE_MONOTONIC_TIMER - select HAVE_UART_SPECIAL - select DYNAMIC_CBMEM bool default n + select CPU_SAMSUNG_EXYNOS if CPU_SAMSUNG_EXYNOS5250 diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc index 735ce2e..cce65e5 100644 --- a/src/soc/samsung/exynos5250/Makefile.inc +++ b/src/soc/samsung/exynos5250/Makefile.inc @@ -1,14 +1,11 @@ bootblock-y += spi.c alternate_cbfs.c -bootblock-y += bootblock.c -bootblock-y += pinmux.c mct.c power.c +bootblock-y += pinmux.c power.c # Clock is required for UART bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif -bootblock-y += wakeup.c bootblock-y += gpio.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c @@ -19,16 +16,12 @@ romstage-y += pinmux.c # required by s3c24x0_i2c and uart. romstage-y += dmc_common.c romstage-y += dmc_init_ddr3.c romstage-y += power.c -romstage-y += mct.c -romstage-y += monotonic_timer.c romstage-$(CONFIG_DRIVERS_UART) += uart.c -romstage-y += wakeup.c romstage-y += gpio.c romstage-y += timer.c romstage-y += trustzone.c romstage-y += i2c.c #romstage-y += wdt.c -romstage-y += cbmem.c ramstage-y += spi.c alternate_cbfs.c ramstage-y += clock.c @@ -38,15 +31,14 @@ ramstage-y += power.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += cpu.c ramstage-y += tmu.c -ramstage-y += mct.c -ramstage-y += monotonic_timer.c ramstage-y += timer.c ramstage-y += gpio.c ramstage-y += i2c.c ramstage-y += dp-reg.c ramstage-y += fb.c ramstage-y += usb.c -ramstage-y += cbmem.c + +CPPFLAGS_common += -Isrc/soc/samsung/exynos/ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@ diff --git a/src/soc/samsung/exynos5250/bootblock.c b/src/soc/samsung/exynos5250/bootblock.c deleted file mode 100644 index 5d2d2b7..0000000 --- a/src/soc/samsung/exynos5250/bootblock.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <bootblock_common.h> -#include <arch/cache.h> - -#include "clk.h" -#include "wakeup.h" -#include "cpu.h" - -/* convenient shorthand (in MB) */ -#define SRAM_START (EXYNOS5_SRAM_BASE >> 20) -#define SRAM_SIZE 1 -#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */ - -void bootblock_cpu_init(void) -{ - /* kick off the multi-core timer. - * We want to do this as early as we can. - */ - mct_start(); - - if (get_wakeup_state() == WAKEUP_DIRECT) { - wakeup(); - /* Never returns. */ - } - - /* set up dcache and MMU */ - mmu_init(); - mmu_disable_range(0, SRAM_START); - mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK); - mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF); - dcache_mmu_enable(); - - /* For most ARM systems, we have to initialize firmware media source - * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is - * already handled by iROM so there's no need to setup again. - */ -} diff --git a/src/soc/samsung/exynos5250/cbmem.c b/src/soc/samsung/exynos5250/cbmem.c deleted file mode 100644 index 4650320..0000000 --- a/src/soc/samsung/exynos5250/cbmem.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stddef.h> -#include <cbmem.h> -#include "cpu.h" - -void *cbmem_top(void) -{ - return (void *)(get_fb_base_kb() * KiB); -} diff --git a/src/soc/samsung/exynos5250/mct.c b/src/soc/samsung/exynos5250/mct.c deleted file mode 100644 index bbb90e4..0000000 --- a/src/soc/samsung/exynos5250/mct.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2012 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <arch/io.h> -#include "clk.h" - -uint64_t mct_raw_value(void) -{ - uint64_t upper = readl(&exynos_mct->g_cnt_u); - uint64_t lower = readl(&exynos_mct->g_cnt_l); - - return (upper << 32) | lower; -} - -void mct_start(void) -{ - writel(readl(&exynos_mct->g_tcon) | (0x1 << 8), - &exynos_mct->g_tcon); -} diff --git a/src/soc/samsung/exynos5250/monotonic_timer.c b/src/soc/samsung/exynos5250/monotonic_timer.c deleted file mode 100644 index 89ac416..0000000 --- a/src/soc/samsung/exynos5250/monotonic_timer.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <timer.h> - -#include "clk.h" - -static const uint32_t clocks_per_usec = MCT_HZ/1000000; - -void timer_monotonic_get(struct mono_time *mt) -{ - /* We don't have to call mct_start() here - * because it was already called in the bootblock - */ - - mono_time_set_usecs(mt, mct_raw_value() / clocks_per_usec); -} diff --git a/src/soc/samsung/exynos5250/wakeup.c b/src/soc/samsung/exynos5250/wakeup.c deleted file mode 100644 index a240717..0000000 --- a/src/soc/samsung/exynos5250/wakeup.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/cache.h> -#include <console/console.h> -#include "power.h" -#include "wakeup.h" - -void wakeup(void) -{ - if (wakeup_need_reset()) - power_reset(); - - power_init(); /* Ensure ps_hold_setup() for early wakeup. */ - dcache_mmu_disable(); - power_exit_wakeup(); - /* Should never return. If we do, reset. */ - power_reset(); -} - -int get_wakeup_state(void) -{ - uint32_t status = power_read_reset_status(); - - /* DIDLE/LPA can be resumed without clock reset (ex, bootblock), - * and SLEEP requires resetting clock (should be done in ROM stage). - */ - - if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA) - return WAKEUP_DIRECT; - - if (status == S5P_CHECK_SLEEP) - return WAKEUP_NEED_CLOCK_RESET; - - return IS_NOT_WAKEUP; -} - -void wakeup_enable_uart(void) -{ - power_release_uart_retention(); -} diff --git a/src/soc/samsung/exynos5250/wakeup.h b/src/soc/samsung/exynos5250/wakeup.h deleted file mode 100644 index 690c6a3..0000000 --- a/src/soc/samsung/exynos5250/wakeup.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef CPU_SAMSUNG_EXYNOS5250_WAKEUP_H -#define CPU_SAMSUNG_EXYNOS5250_WAKEUP_H - -/* Power Down Modes */ -#define S5P_CHECK_SLEEP 0x00000BAD -#define S5P_CHECK_DIDLE 0xBAD00000 -#define S5P_CHECK_LPA 0xABAD0000 - -enum { - // A normal boot (not suspend/resume) - IS_NOT_WAKEUP, - // A wake up event that can be resumed any time - WAKEUP_DIRECT, - // A wake up event that must be resumed only after - // clock and memory controllers are re-initialized - WAKEUP_NEED_CLOCK_RESET, -}; - -int wakeup_need_reset(void); -int get_wakeup_state(void); -void wakeup(void); -void wakeup_enable_uart(void); - -#endif /* CPU_SAMSUNG_EXYNOS5250_WAKEUP_H */ diff --git a/src/soc/samsung/exynos5420/Kconfig b/src/soc/samsung/exynos5420/Kconfig index 904091e..77d9cba 100644 --- a/src/soc/samsung/exynos5420/Kconfig +++ b/src/soc/samsung/exynos5420/Kconfig @@ -1,14 +1,7 @@ config CPU_SAMSUNG_EXYNOS5420 - select ARCH_BOOTBLOCK_ARMV7 - select ARCH_ROMSTAGE_ARMV7 - select ARCH_RAMSTAGE_ARMV7 - select CPU_HAS_BOOTBLOCK_INIT - select HAVE_MONOTONIC_TIMER - select HAVE_UART_SPECIAL - select RELOCATABLE_MODULES - select DYNAMIC_CBMEM bool default n + select CPU_SAMSUNG_EXYNOS if CPU_SAMSUNG_EXYNOS5420 diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc index ac22620..e6d894c 100644 --- a/src/soc/samsung/exynos5420/Makefile.inc +++ b/src/soc/samsung/exynos5420/Makefile.inc @@ -1,14 +1,11 @@ bootblock-y += spi.c alternate_cbfs.c -bootblock-y += bootblock.c -bootblock-y += pinmux.c mct.c power.c +bootblock-y += pinmux.c power.c # Clock is required for UART bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif -bootblock-y += wakeup.c bootblock-y += gpio.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c @@ -20,15 +17,11 @@ romstage-y += pinmux.c # required by s3c24x0_i2c and uart. romstage-y += dmc_common.c romstage-y += dmc_init_ddr3.c romstage-y += power.c -romstage-y += mct.c -romstage-y += monotonic_timer.c romstage-$(CONFIG_DRIVERS_UART) += uart.c -romstage-y += wakeup.c romstage-y += gpio.c romstage-y += timer.c romstage-y += i2c.c #romstage-y += wdt.c -romstage-y += cbmem.c romstage-y += trustzone.c ramstage-y += spi.c alternate_cbfs.c @@ -39,14 +32,13 @@ ramstage-y += power.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += cpu.c ramstage-y += tmu.c -ramstage-y += mct.c -ramstage-y += monotonic_timer.c ramstage-y += timer.c ramstage-y += gpio.c ramstage-y += i2c.c ramstage-y += dp.c dp_lowlevel.c fimd.c ramstage-y += usb.c -ramstage-y += cbmem.c + +CPPFLAGS_common += -Isrc/soc/samsung/exynos/ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@ diff --git a/src/soc/samsung/exynos5420/bootblock.c b/src/soc/samsung/exynos5420/bootblock.c deleted file mode 100644 index 5d2d2b7..0000000 --- a/src/soc/samsung/exynos5420/bootblock.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <bootblock_common.h> -#include <arch/cache.h> - -#include "clk.h" -#include "wakeup.h" -#include "cpu.h" - -/* convenient shorthand (in MB) */ -#define SRAM_START (EXYNOS5_SRAM_BASE >> 20) -#define SRAM_SIZE 1 -#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */ - -void bootblock_cpu_init(void) -{ - /* kick off the multi-core timer. - * We want to do this as early as we can. - */ - mct_start(); - - if (get_wakeup_state() == WAKEUP_DIRECT) { - wakeup(); - /* Never returns. */ - } - - /* set up dcache and MMU */ - mmu_init(); - mmu_disable_range(0, SRAM_START); - mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK); - mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF); - dcache_mmu_enable(); - - /* For most ARM systems, we have to initialize firmware media source - * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is - * already handled by iROM so there's no need to setup again. - */ -} diff --git a/src/soc/samsung/exynos5420/cbmem.c b/src/soc/samsung/exynos5420/cbmem.c deleted file mode 100644 index 4650320..0000000 --- a/src/soc/samsung/exynos5420/cbmem.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stddef.h> -#include <cbmem.h> -#include "cpu.h" - -void *cbmem_top(void) -{ - return (void *)(get_fb_base_kb() * KiB); -} diff --git a/src/soc/samsung/exynos5420/mct.c b/src/soc/samsung/exynos5420/mct.c deleted file mode 100644 index bbb90e4..0000000 --- a/src/soc/samsung/exynos5420/mct.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2012 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <arch/io.h> -#include "clk.h" - -uint64_t mct_raw_value(void) -{ - uint64_t upper = readl(&exynos_mct->g_cnt_u); - uint64_t lower = readl(&exynos_mct->g_cnt_l); - - return (upper << 32) | lower; -} - -void mct_start(void) -{ - writel(readl(&exynos_mct->g_tcon) | (0x1 << 8), - &exynos_mct->g_tcon); -} diff --git a/src/soc/samsung/exynos5420/monotonic_timer.c b/src/soc/samsung/exynos5420/monotonic_timer.c deleted file mode 100644 index 89ac416..0000000 --- a/src/soc/samsung/exynos5420/monotonic_timer.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <timer.h> - -#include "clk.h" - -static const uint32_t clocks_per_usec = MCT_HZ/1000000; - -void timer_monotonic_get(struct mono_time *mt) -{ - /* We don't have to call mct_start() here - * because it was already called in the bootblock - */ - - mono_time_set_usecs(mt, mct_raw_value() / clocks_per_usec); -} diff --git a/src/soc/samsung/exynos5420/wakeup.c b/src/soc/samsung/exynos5420/wakeup.c deleted file mode 100644 index a240717..0000000 --- a/src/soc/samsung/exynos5420/wakeup.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/cache.h> -#include <console/console.h> -#include "power.h" -#include "wakeup.h" - -void wakeup(void) -{ - if (wakeup_need_reset()) - power_reset(); - - power_init(); /* Ensure ps_hold_setup() for early wakeup. */ - dcache_mmu_disable(); - power_exit_wakeup(); - /* Should never return. If we do, reset. */ - power_reset(); -} - -int get_wakeup_state(void) -{ - uint32_t status = power_read_reset_status(); - - /* DIDLE/LPA can be resumed without clock reset (ex, bootblock), - * and SLEEP requires resetting clock (should be done in ROM stage). - */ - - if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA) - return WAKEUP_DIRECT; - - if (status == S5P_CHECK_SLEEP) - return WAKEUP_NEED_CLOCK_RESET; - - return IS_NOT_WAKEUP; -} - -void wakeup_enable_uart(void) -{ - power_release_uart_retention(); -} diff --git a/src/soc/samsung/exynos5420/wakeup.h b/src/soc/samsung/exynos5420/wakeup.h deleted file mode 100644 index 27ce8e2..0000000 --- a/src/soc/samsung/exynos5420/wakeup.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef CPU_SAMSUNG_EXYNOS5420_WAKEUP_H -#define CPU_SAMSUNG_EXYNOS5420_WAKEUP_H - -/* Power Down Modes */ -#define S5P_CHECK_SLEEP 0x00000BAD -#define S5P_CHECK_DIDLE 0xBAD00000 -#define S5P_CHECK_LPA 0xABAD0000 - -enum { - // A normal boot (not suspend/resume) - IS_NOT_WAKEUP, - // A wake up event that can be resumed any time - WAKEUP_DIRECT, - // A wake up event that must be resumed only after - // clock and memory controllers are re-initialized - WAKEUP_NEED_CLOCK_RESET, -}; - -int wakeup_need_reset(void); -int get_wakeup_state(void); -void wakeup(void); -void wakeup_enable_uart(void); - -#endif /* CPU_SAMSUNG_EXYNOS5420_WAKEUP_H */

1 0

Patch set updated for coreboot: d71766f soc/samsung/exynos5250: Move MMU config into chipset support
by Edward O'Callaghan 26 Dec '14

26 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7930 -gerrit commit d71766f10e4b552a753352228ceb27c4a00c6622 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 18:14:45 2014 +1100 soc/samsung/exynos5250: Move MMU config into chipset support Take configuration out of mainboard support into chipset support as per the FIXME. Change-Id: I925a888044452950fc85b0c5cf21a5fee0b031ec Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/google/daisy/mainboard.c | 9 ++------- src/soc/samsung/exynos5250/alternate_cbfs.c | 7 +++++++ src/soc/samsung/exynos5250/bootblock.c | 14 ++++++++++++++ src/soc/samsung/exynos5250/cpu.h | 2 ++ src/soc/samsung/exynos5250/wakeup.c | 2 ++ 5 files changed, 27 insertions(+), 7 deletions(-) diff --git a/src/mainboard/google/daisy/mainboard.c b/src/mainboard/google/daisy/mainboard.c index cf25967..1218346 100644 --- a/src/mainboard/google/daisy/mainboard.c +++ b/src/mainboard/google/daisy/mainboard.c @@ -44,7 +44,6 @@ /* convenient shorthand (in MB) */ #define DRAM_START (CONFIG_SYS_SDRAM_BASE >> 20) #define DRAM_SIZE CONFIG_DRAM_SIZE_MB -#define DRAM_END (DRAM_START + DRAM_SIZE) /* plus one... */ /* Arbitrary range of DMA memory for depthcharge's drivers */ #define DMA_START (0x77300000) @@ -327,15 +326,11 @@ static void mainboard_enable(device_t dev) { dev->ops->init = &mainboard_init; - /* set up dcache and MMU */ - /* FIXME: this should happen via resource allocator */ exynos5250_config_l2_cache(); - mmu_init(); - mmu_config_range(0, DRAM_START, DCACHE_OFF); + + /* set up caching for the DRAM */ mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF); - mmu_config_range(DRAM_END, 4096 - DRAM_END, DCACHE_OFF); - dcache_mmu_enable(); const unsigned epll_hz = 192000000; const unsigned sample_rate = 48000; diff --git a/src/soc/samsung/exynos5250/alternate_cbfs.c b/src/soc/samsung/exynos5250/alternate_cbfs.c index 10b33f0..d19098b 100644 --- a/src/soc/samsung/exynos5250/alternate_cbfs.c +++ b/src/soc/samsung/exynos5250/alternate_cbfs.c @@ -22,6 +22,7 @@ #include <cbfs.h> /* This driver serves as a CBFS media source. */ #include <stdlib.h> #include <string.h> +#include <arch/cache.h> #include <console/console.h> #include "alternate_cbfs.h" #include "power.h" @@ -53,10 +54,13 @@ static int usb_cbfs_open(struct cbfs_media *media) if (!first_run) return 0; + dcache_mmu_disable(); if (!irom_load_usb()) { + dcache_mmu_enable(); printk(BIOS_EMERG, "Unable to load CBFS image via USB!\n"); return -1; } + dcache_mmu_enable(); /* * We need to trust the host/irom to copy the image to our @@ -98,10 +102,13 @@ static int sdmmc_cbfs_open(struct cbfs_media *media) if (!first_run) return 0; + dcache_mmu_disable(); if (!irom_load_sdmmc(1, count, alternate_cbfs_buffer)) { + dcache_mmu_enable(); printk(BIOS_EMERG, "Unable to load CBFS image from SDMMC!\n"); return -1; } + dcache_mmu_enable(); printk(BIOS_DEBUG, "SDMMC read successful, CBFS image should now be" " at %p\n", alternate_cbfs_buffer); diff --git a/src/soc/samsung/exynos5250/bootblock.c b/src/soc/samsung/exynos5250/bootblock.c index f524399..5d2d2b7 100644 --- a/src/soc/samsung/exynos5250/bootblock.c +++ b/src/soc/samsung/exynos5250/bootblock.c @@ -18,9 +18,16 @@ */ #include <bootblock_common.h> +#include <arch/cache.h> #include "clk.h" #include "wakeup.h" +#include "cpu.h" + +/* convenient shorthand (in MB) */ +#define SRAM_START (EXYNOS5_SRAM_BASE >> 20) +#define SRAM_SIZE 1 +#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */ void bootblock_cpu_init(void) { @@ -34,6 +41,13 @@ void bootblock_cpu_init(void) /* Never returns. */ } + /* set up dcache and MMU */ + mmu_init(); + mmu_disable_range(0, SRAM_START); + mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK); + mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF); + dcache_mmu_enable(); + /* For most ARM systems, we have to initialize firmware media source * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is * already handled by iROM so there's no need to setup again. diff --git a/src/soc/samsung/exynos5250/cpu.h b/src/soc/samsung/exynos5250/cpu.h index 10f9ef4..a813dca 100644 --- a/src/soc/samsung/exynos5250/cpu.h +++ b/src/soc/samsung/exynos5250/cpu.h @@ -22,6 +22,8 @@ #include <arch/io.h> +#define EXYNOS5_SRAM_BASE 0x02020000 + /* Base address registers */ #define EXYNOS5_GPIO_PART6_BASE 0x03860000 /* Z<6:0> */ #define EXYNOS5_PRO_ID 0x10000000 diff --git a/src/soc/samsung/exynos5250/wakeup.c b/src/soc/samsung/exynos5250/wakeup.c index b7161cf..a240717 100644 --- a/src/soc/samsung/exynos5250/wakeup.c +++ b/src/soc/samsung/exynos5250/wakeup.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <arch/cache.h> #include <console/console.h> #include "power.h" #include "wakeup.h" @@ -27,6 +28,7 @@ void wakeup(void) power_reset(); power_init(); /* Ensure ps_hold_setup() for early wakeup. */ + dcache_mmu_disable(); power_exit_wakeup(); /* Should never return. If we do, reset. */ power_reset();

1 0

Patch set updated for coreboot: 3c461bf soc/samsung/exynos: Layout common code framework
by Edward O'Callaghan 26 Dec '14

26 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7929 -gerrit commit 3c461bfaeb539dd0166feeb9e8661e66d61d1d30 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 13:58:56 2014 +1100 soc/samsung/exynos: Layout common code framework Layout the framework to merge common components between Exynos families. Change-Id: Ic8896e791dac9757c2bd19f390d0a5821f96fc06 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/soc/samsung/Kconfig | 1 + src/soc/samsung/Makefile.inc | 1 + src/soc/samsung/exynos/Kconfig | 11 +++++++ src/soc/samsung/exynos/Makefile.inc | 17 ++++++++++ src/soc/samsung/exynos/cbmem.c | 27 ++++++++++++++++ src/soc/samsung/exynos/wakeup.c | 57 +++++++++++++++++++++++++++++++++ src/soc/samsung/exynos/wakeup.h | 43 +++++++++++++++++++++++++ src/soc/samsung/exynos5250/Kconfig | 8 +---- src/soc/samsung/exynos5250/Makefile.inc | 6 ++-- src/soc/samsung/exynos5250/cbmem.c | 27 ---------------- src/soc/samsung/exynos5250/wakeup.c | 57 --------------------------------- src/soc/samsung/exynos5250/wakeup.h | 43 ------------------------- src/soc/samsung/exynos5420/Kconfig | 9 +----- src/soc/samsung/exynos5420/Makefile.inc | 6 ++-- src/soc/samsung/exynos5420/cbmem.c | 27 ---------------- src/soc/samsung/exynos5420/wakeup.c | 57 --------------------------------- src/soc/samsung/exynos5420/wakeup.h | 43 ------------------------- 17 files changed, 163 insertions(+), 277 deletions(-) diff --git a/src/soc/samsung/Kconfig b/src/soc/samsung/Kconfig index 9241d27..8bb0aa2 100644 --- a/src/soc/samsung/Kconfig +++ b/src/soc/samsung/Kconfig @@ -1,2 +1,3 @@ +source src/soc/samsung/exynos/Kconfig source src/soc/samsung/exynos5250/Kconfig source src/soc/samsung/exynos5420/Kconfig diff --git a/src/soc/samsung/Makefile.inc b/src/soc/samsung/Makefile.inc index 496b5f7..7a4123f 100644 --- a/src/soc/samsung/Makefile.inc +++ b/src/soc/samsung/Makefile.inc @@ -1,2 +1,3 @@ +subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS) += exynos subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5250) += exynos5250 subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5420) += exynos5420 diff --git a/src/soc/samsung/exynos/Kconfig b/src/soc/samsung/exynos/Kconfig new file mode 100644 index 0000000..63f1a45 --- /dev/null +++ b/src/soc/samsung/exynos/Kconfig @@ -0,0 +1,11 @@ +config CPU_SAMSUNG_EXYNOS + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 + select CPU_HAS_BOOTBLOCK_INIT + select HAVE_MONOTONIC_TIMER + select HAVE_UART_SPECIAL + select RELOCATABLE_MODULES + select DYNAMIC_CBMEM + bool + default n diff --git a/src/soc/samsung/exynos/Makefile.inc b/src/soc/samsung/exynos/Makefile.inc new file mode 100644 index 0000000..31b7aed --- /dev/null +++ b/src/soc/samsung/exynos/Makefile.inc @@ -0,0 +1,17 @@ +#bootblock-y += mct.c power.c +bootblock-y += wakeup.c + +# Clock is required for UART +#bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c + +#romstage-y += mct.c +#romstage-y += monotonic_timer.c +romstage-y += cbmem.c +#romstage-y += power.c +romstage-y += wakeup.c + +#ramstage-y += mct.c +#ramstage-y += monotonic_timer.c +ramstage-y += cbmem.c +#ramstage-y += power.c +#ramstage-y += usb.c diff --git a/src/soc/samsung/exynos/cbmem.c b/src/soc/samsung/exynos/cbmem.c new file mode 100644 index 0000000..4650320 --- /dev/null +++ b/src/soc/samsung/exynos/cbmem.c @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stddef.h> +#include <cbmem.h> +#include "cpu.h" + +void *cbmem_top(void) +{ + return (void *)(get_fb_base_kb() * KiB); +} diff --git a/src/soc/samsung/exynos/wakeup.c b/src/soc/samsung/exynos/wakeup.c new file mode 100644 index 0000000..a240717 --- /dev/null +++ b/src/soc/samsung/exynos/wakeup.c @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/cache.h> +#include <console/console.h> +#include "power.h" +#include "wakeup.h" + +void wakeup(void) +{ + if (wakeup_need_reset()) + power_reset(); + + power_init(); /* Ensure ps_hold_setup() for early wakeup. */ + dcache_mmu_disable(); + power_exit_wakeup(); + /* Should never return. If we do, reset. */ + power_reset(); +} + +int get_wakeup_state(void) +{ + uint32_t status = power_read_reset_status(); + + /* DIDLE/LPA can be resumed without clock reset (ex, bootblock), + * and SLEEP requires resetting clock (should be done in ROM stage). + */ + + if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA) + return WAKEUP_DIRECT; + + if (status == S5P_CHECK_SLEEP) + return WAKEUP_NEED_CLOCK_RESET; + + return IS_NOT_WAKEUP; +} + +void wakeup_enable_uart(void) +{ + power_release_uart_retention(); +} diff --git a/src/soc/samsung/exynos/wakeup.h b/src/soc/samsung/exynos/wakeup.h new file mode 100644 index 0000000..91025c3 --- /dev/null +++ b/src/soc/samsung/exynos/wakeup.h @@ -0,0 +1,43 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CPU_SAMSUNG_EXYNOS_WAKEUP_H +#define CPU_SAMSUNG_EXYNOS_WAKEUP_H + +/* Power Down Modes */ +#define S5P_CHECK_SLEEP 0x00000BAD +#define S5P_CHECK_DIDLE 0xBAD00000 +#define S5P_CHECK_LPA 0xABAD0000 + +enum { + // A normal boot (not suspend/resume) + IS_NOT_WAKEUP, + // A wake up event that can be resumed any time + WAKEUP_DIRECT, + // A wake up event that must be resumed only after + // clock and memory controllers are re-initialized + WAKEUP_NEED_CLOCK_RESET, +}; + +int wakeup_need_reset(void); +int get_wakeup_state(void); +void wakeup(void); +void wakeup_enable_uart(void); + +#endif /* CPU_SAMSUNG_EXYNOS_WAKEUP_H */ diff --git a/src/soc/samsung/exynos5250/Kconfig b/src/soc/samsung/exynos5250/Kconfig index 8d7c867..2193126 100644 --- a/src/soc/samsung/exynos5250/Kconfig +++ b/src/soc/samsung/exynos5250/Kconfig @@ -1,13 +1,7 @@ config CPU_SAMSUNG_EXYNOS5250 - select ARCH_BOOTBLOCK_ARMV7 - select ARCH_ROMSTAGE_ARMV7 - select ARCH_RAMSTAGE_ARMV7 - select CPU_HAS_BOOTBLOCK_INIT - select HAVE_MONOTONIC_TIMER - select HAVE_UART_SPECIAL - select DYNAMIC_CBMEM bool default n + select CPU_SAMSUNG_EXYNOS if CPU_SAMSUNG_EXYNOS5250 diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc index 735ce2e..f8ac26a 100644 --- a/src/soc/samsung/exynos5250/Makefile.inc +++ b/src/soc/samsung/exynos5250/Makefile.inc @@ -8,7 +8,6 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif -bootblock-y += wakeup.c bootblock-y += gpio.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c @@ -22,13 +21,11 @@ romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c romstage-$(CONFIG_DRIVERS_UART) += uart.c -romstage-y += wakeup.c romstage-y += gpio.c romstage-y += timer.c romstage-y += trustzone.c romstage-y += i2c.c #romstage-y += wdt.c -romstage-y += cbmem.c ramstage-y += spi.c alternate_cbfs.c ramstage-y += clock.c @@ -46,7 +43,8 @@ ramstage-y += i2c.c ramstage-y += dp-reg.c ramstage-y += fb.c ramstage-y += usb.c -ramstage-y += cbmem.c + +CPPFLAGS_common += -Isrc/soc/samsung/exynos/ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@ diff --git a/src/soc/samsung/exynos5250/cbmem.c b/src/soc/samsung/exynos5250/cbmem.c deleted file mode 100644 index 4650320..0000000 --- a/src/soc/samsung/exynos5250/cbmem.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stddef.h> -#include <cbmem.h> -#include "cpu.h" - -void *cbmem_top(void) -{ - return (void *)(get_fb_base_kb() * KiB); -} diff --git a/src/soc/samsung/exynos5250/wakeup.c b/src/soc/samsung/exynos5250/wakeup.c deleted file mode 100644 index a240717..0000000 --- a/src/soc/samsung/exynos5250/wakeup.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/cache.h> -#include <console/console.h> -#include "power.h" -#include "wakeup.h" - -void wakeup(void) -{ - if (wakeup_need_reset()) - power_reset(); - - power_init(); /* Ensure ps_hold_setup() for early wakeup. */ - dcache_mmu_disable(); - power_exit_wakeup(); - /* Should never return. If we do, reset. */ - power_reset(); -} - -int get_wakeup_state(void) -{ - uint32_t status = power_read_reset_status(); - - /* DIDLE/LPA can be resumed without clock reset (ex, bootblock), - * and SLEEP requires resetting clock (should be done in ROM stage). - */ - - if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA) - return WAKEUP_DIRECT; - - if (status == S5P_CHECK_SLEEP) - return WAKEUP_NEED_CLOCK_RESET; - - return IS_NOT_WAKEUP; -} - -void wakeup_enable_uart(void) -{ - power_release_uart_retention(); -} diff --git a/src/soc/samsung/exynos5250/wakeup.h b/src/soc/samsung/exynos5250/wakeup.h deleted file mode 100644 index 690c6a3..0000000 --- a/src/soc/samsung/exynos5250/wakeup.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef CPU_SAMSUNG_EXYNOS5250_WAKEUP_H -#define CPU_SAMSUNG_EXYNOS5250_WAKEUP_H - -/* Power Down Modes */ -#define S5P_CHECK_SLEEP 0x00000BAD -#define S5P_CHECK_DIDLE 0xBAD00000 -#define S5P_CHECK_LPA 0xABAD0000 - -enum { - // A normal boot (not suspend/resume) - IS_NOT_WAKEUP, - // A wake up event that can be resumed any time - WAKEUP_DIRECT, - // A wake up event that must be resumed only after - // clock and memory controllers are re-initialized - WAKEUP_NEED_CLOCK_RESET, -}; - -int wakeup_need_reset(void); -int get_wakeup_state(void); -void wakeup(void); -void wakeup_enable_uart(void); - -#endif /* CPU_SAMSUNG_EXYNOS5250_WAKEUP_H */ diff --git a/src/soc/samsung/exynos5420/Kconfig b/src/soc/samsung/exynos5420/Kconfig index 904091e..77d9cba 100644 --- a/src/soc/samsung/exynos5420/Kconfig +++ b/src/soc/samsung/exynos5420/Kconfig @@ -1,14 +1,7 @@ config CPU_SAMSUNG_EXYNOS5420 - select ARCH_BOOTBLOCK_ARMV7 - select ARCH_ROMSTAGE_ARMV7 - select ARCH_RAMSTAGE_ARMV7 - select CPU_HAS_BOOTBLOCK_INIT - select HAVE_MONOTONIC_TIMER - select HAVE_UART_SPECIAL - select RELOCATABLE_MODULES - select DYNAMIC_CBMEM bool default n + select CPU_SAMSUNG_EXYNOS if CPU_SAMSUNG_EXYNOS5420 diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc index ac22620..c2da01b 100644 --- a/src/soc/samsung/exynos5420/Makefile.inc +++ b/src/soc/samsung/exynos5420/Makefile.inc @@ -8,7 +8,6 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif -bootblock-y += wakeup.c bootblock-y += gpio.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c @@ -23,12 +22,10 @@ romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c romstage-$(CONFIG_DRIVERS_UART) += uart.c -romstage-y += wakeup.c romstage-y += gpio.c romstage-y += timer.c romstage-y += i2c.c #romstage-y += wdt.c -romstage-y += cbmem.c romstage-y += trustzone.c ramstage-y += spi.c alternate_cbfs.c @@ -46,7 +43,8 @@ ramstage-y += gpio.c ramstage-y += i2c.c ramstage-y += dp.c dp_lowlevel.c fimd.c ramstage-y += usb.c -ramstage-y += cbmem.c + +CPPFLAGS_common += -Isrc/soc/samsung/exynos/ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@ diff --git a/src/soc/samsung/exynos5420/cbmem.c b/src/soc/samsung/exynos5420/cbmem.c deleted file mode 100644 index 4650320..0000000 --- a/src/soc/samsung/exynos5420/cbmem.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stddef.h> -#include <cbmem.h> -#include "cpu.h" - -void *cbmem_top(void) -{ - return (void *)(get_fb_base_kb() * KiB); -} diff --git a/src/soc/samsung/exynos5420/wakeup.c b/src/soc/samsung/exynos5420/wakeup.c deleted file mode 100644 index a240717..0000000 --- a/src/soc/samsung/exynos5420/wakeup.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/cache.h> -#include <console/console.h> -#include "power.h" -#include "wakeup.h" - -void wakeup(void) -{ - if (wakeup_need_reset()) - power_reset(); - - power_init(); /* Ensure ps_hold_setup() for early wakeup. */ - dcache_mmu_disable(); - power_exit_wakeup(); - /* Should never return. If we do, reset. */ - power_reset(); -} - -int get_wakeup_state(void) -{ - uint32_t status = power_read_reset_status(); - - /* DIDLE/LPA can be resumed without clock reset (ex, bootblock), - * and SLEEP requires resetting clock (should be done in ROM stage). - */ - - if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA) - return WAKEUP_DIRECT; - - if (status == S5P_CHECK_SLEEP) - return WAKEUP_NEED_CLOCK_RESET; - - return IS_NOT_WAKEUP; -} - -void wakeup_enable_uart(void) -{ - power_release_uart_retention(); -} diff --git a/src/soc/samsung/exynos5420/wakeup.h b/src/soc/samsung/exynos5420/wakeup.h deleted file mode 100644 index 27ce8e2..0000000 --- a/src/soc/samsung/exynos5420/wakeup.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef CPU_SAMSUNG_EXYNOS5420_WAKEUP_H -#define CPU_SAMSUNG_EXYNOS5420_WAKEUP_H - -/* Power Down Modes */ -#define S5P_CHECK_SLEEP 0x00000BAD -#define S5P_CHECK_DIDLE 0xBAD00000 -#define S5P_CHECK_LPA 0xABAD0000 - -enum { - // A normal boot (not suspend/resume) - IS_NOT_WAKEUP, - // A wake up event that can be resumed any time - WAKEUP_DIRECT, - // A wake up event that must be resumed only after - // clock and memory controllers are re-initialized - WAKEUP_NEED_CLOCK_RESET, -}; - -int wakeup_need_reset(void); -int get_wakeup_state(void); -void wakeup(void); -void wakeup_enable_uart(void); - -#endif /* CPU_SAMSUNG_EXYNOS5420_WAKEUP_H */

1 0

Patch set updated for coreboot: 717573f soc/samsung/exynos5250: Move MMU config into chipset support
by Edward O'Callaghan 26 Dec '14

26 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7930 -gerrit commit 717573fe359cfb3439e350ea68b193ac43e8703c Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 18:14:45 2014 +1100 soc/samsung/exynos5250: Move MMU config into chipset support Take configuration out of mainboard support into chipset support as per the FIXME. Change-Id: I925a888044452950fc85b0c5cf21a5fee0b031ec Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/google/daisy/mainboard.c | 9 +-------- src/soc/samsung/exynos5250/alternate_cbfs.c | 7 +++++++ src/soc/samsung/exynos5250/bootblock.c | 16 ++++++++++++++++ src/soc/samsung/exynos5250/cpu.h | 2 ++ src/soc/samsung/exynos5250/wakeup.c | 2 ++ 5 files changed, 28 insertions(+), 8 deletions(-) diff --git a/src/mainboard/google/daisy/mainboard.c b/src/mainboard/google/daisy/mainboard.c index cf25967..3f9b49d 100644 --- a/src/mainboard/google/daisy/mainboard.c +++ b/src/mainboard/google/daisy/mainboard.c @@ -44,7 +44,6 @@ /* convenient shorthand (in MB) */ #define DRAM_START (CONFIG_SYS_SDRAM_BASE >> 20) #define DRAM_SIZE CONFIG_DRAM_SIZE_MB -#define DRAM_END (DRAM_START + DRAM_SIZE) /* plus one... */ /* Arbitrary range of DMA memory for depthcharge's drivers */ #define DMA_START (0x77300000) @@ -327,15 +326,9 @@ static void mainboard_enable(device_t dev) { dev->ops->init = &mainboard_init; - /* set up dcache and MMU */ - /* FIXME: this should happen via resource allocator */ - exynos5250_config_l2_cache(); - mmu_init(); - mmu_config_range(0, DRAM_START, DCACHE_OFF); + /* set up caching for the DRAM */ mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF); - mmu_config_range(DRAM_END, 4096 - DRAM_END, DCACHE_OFF); - dcache_mmu_enable(); const unsigned epll_hz = 192000000; const unsigned sample_rate = 48000; diff --git a/src/soc/samsung/exynos5250/alternate_cbfs.c b/src/soc/samsung/exynos5250/alternate_cbfs.c index 10b33f0..d19098b 100644 --- a/src/soc/samsung/exynos5250/alternate_cbfs.c +++ b/src/soc/samsung/exynos5250/alternate_cbfs.c @@ -22,6 +22,7 @@ #include <cbfs.h> /* This driver serves as a CBFS media source. */ #include <stdlib.h> #include <string.h> +#include <arch/cache.h> #include <console/console.h> #include "alternate_cbfs.h" #include "power.h" @@ -53,10 +54,13 @@ static int usb_cbfs_open(struct cbfs_media *media) if (!first_run) return 0; + dcache_mmu_disable(); if (!irom_load_usb()) { + dcache_mmu_enable(); printk(BIOS_EMERG, "Unable to load CBFS image via USB!\n"); return -1; } + dcache_mmu_enable(); /* * We need to trust the host/irom to copy the image to our @@ -98,10 +102,13 @@ static int sdmmc_cbfs_open(struct cbfs_media *media) if (!first_run) return 0; + dcache_mmu_disable(); if (!irom_load_sdmmc(1, count, alternate_cbfs_buffer)) { + dcache_mmu_enable(); printk(BIOS_EMERG, "Unable to load CBFS image from SDMMC!\n"); return -1; } + dcache_mmu_enable(); printk(BIOS_DEBUG, "SDMMC read successful, CBFS image should now be" " at %p\n", alternate_cbfs_buffer); diff --git a/src/soc/samsung/exynos5250/bootblock.c b/src/soc/samsung/exynos5250/bootblock.c index f524399..602932a 100644 --- a/src/soc/samsung/exynos5250/bootblock.c +++ b/src/soc/samsung/exynos5250/bootblock.c @@ -18,9 +18,16 @@ */ #include <bootblock_common.h> +#include <arch/cache.h> #include "clk.h" #include "wakeup.h" +#include "cpu.h" + +/* convenient shorthand (in MB) */ +#define SRAM_START (EXYNOS5_SRAM_BASE >> 20) +#define SRAM_SIZE 1 +#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */ void bootblock_cpu_init(void) { @@ -34,6 +41,15 @@ void bootblock_cpu_init(void) /* Never returns. */ } + exynos5250_config_l2_cache(); + + /* set up dcache and MMU */ + mmu_init(); + mmu_disable_range(0, SRAM_START); + mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK); + mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF); + dcache_mmu_enable(); + /* For most ARM systems, we have to initialize firmware media source * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is * already handled by iROM so there's no need to setup again. diff --git a/src/soc/samsung/exynos5250/cpu.h b/src/soc/samsung/exynos5250/cpu.h index 10f9ef4..a813dca 100644 --- a/src/soc/samsung/exynos5250/cpu.h +++ b/src/soc/samsung/exynos5250/cpu.h @@ -22,6 +22,8 @@ #include <arch/io.h> +#define EXYNOS5_SRAM_BASE 0x02020000 + /* Base address registers */ #define EXYNOS5_GPIO_PART6_BASE 0x03860000 /* Z<6:0> */ #define EXYNOS5_PRO_ID 0x10000000 diff --git a/src/soc/samsung/exynos5250/wakeup.c b/src/soc/samsung/exynos5250/wakeup.c index b7161cf..a240717 100644 --- a/src/soc/samsung/exynos5250/wakeup.c +++ b/src/soc/samsung/exynos5250/wakeup.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <arch/cache.h> #include <console/console.h> #include "power.h" #include "wakeup.h" @@ -27,6 +28,7 @@ void wakeup(void) power_reset(); power_init(); /* Ensure ps_hold_setup() for early wakeup. */ + dcache_mmu_disable(); power_exit_wakeup(); /* Should never return. If we do, reset. */ power_reset();

1 0

Patch set updated for coreboot: b434b64 samsung/exynos*/Makefile.inc: Eliminating a ifeq
by Edward O'Callaghan 26 Dec '14

26 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7925 -gerrit commit b434b64ad8f723d29fd4ba34b60cd55caa2040e6 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 12:08:11 2014 +1100 samsung/exynos*/Makefile.inc: Eliminating a ifeq No need for if/endif this and that in Makefiles here. Change-Id: Ib96f5cfa434d0383ee3bfe49995a8f8830987f20 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/soc/samsung/exynos5250/Makefile.inc | 4 +--- src/soc/samsung/exynos5420/Makefile.inc | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc index cc89f2d..735ce2e 100644 --- a/src/soc/samsung/exynos5250/Makefile.inc +++ b/src/soc/samsung/exynos5250/Makefile.inc @@ -21,9 +21,7 @@ romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c -ifeq ($(CONFIG_DRIVERS_UART),y) -romstage-y += uart.c -endif +romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += wakeup.c romstage-y += gpio.c romstage-y += timer.c diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc index 5f37e7e..ac22620 100644 --- a/src/soc/samsung/exynos5420/Makefile.inc +++ b/src/soc/samsung/exynos5420/Makefile.inc @@ -22,9 +22,7 @@ romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c -ifeq ($(CONFIG_DRIVERS_UART),y) -romstage-y += uart.c -endif +romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += wakeup.c romstage-y += gpio.c romstage-y += timer.c

1 0

Patch set updated for coreboot: a7cb9a2 soc/samsung/exynos5420/uart.c: Implement 'uart_tx_flush()'
by Edward O'Callaghan 26 Dec '14

26 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7927 -gerrit commit a7cb9a28e60a661105699ac0914c35080787bae3 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 12:44:08 2014 +1100 soc/samsung/exynos5420/uart.c: Implement 'uart_tx_flush()' This brings 'uart.c' implementations closer together between Exynos generations. Change-Id: Ifbc61794207ff36a9d8a98951e917f3b6d2ef205 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/soc/samsung/exynos5420/uart.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c index 4d71155..7a7b79b 100644 --- a/src/soc/samsung/exynos5420/uart.c +++ b/src/soc/samsung/exynos5420/uart.c @@ -149,6 +149,11 @@ static void exynos5_uart_tx_byte(struct s5p_uart *uart, unsigned char data) writeb(data, &uart->utxh); } +static void exynos5_uart_tx_flush(struct s5p_uart *uart) +{ + while (readl(&uart->ufstat) & 0x1ff0000); +} + uintptr_t uart_platform_base(int idx) { if (idx < 4) @@ -177,7 +182,8 @@ void uart_tx_byte(int idx, unsigned char data) void uart_tx_flush(int idx) { - /* Exynos5250 implements this too. */ + struct s5p_uart *uart = uart_platform_baseptr(idx); + exynos5_uart_tx_flush(uart); } #ifndef __PRE_RAM__

1 0

Patch merged into coreboot/master: fa95a6f soc/samsung/exynos5250/clk.h: Trivial, fix spelling in comments
by gerrit＠coreboot.org 26 Dec '14

26 Dec '14

the following patch was just integrated into master: commit fa95a6fb60ccb0a94a041fbad5a2b6fd8cf809fa Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 13:29:29 2014 +1100 soc/samsung/exynos5250/clk.h: Trivial, fix spelling in comments Change-Id: Iaacd4d7977ddeff4204acdc32d4d13fd88b6660b Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/7928 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/7928 for details. -gerrit

1 0

Patch merged into coreboot/master: 9b152b2 soc/samsung/exynos5250/clock.c: Trivial whitespace fixes
by gerrit＠coreboot.org 26 Dec '14

26 Dec '14

the following patch was just integrated into master: commit 9b152b2a5565139039eaf4273baddb0aef2e1bb3 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Dec 26 12:36:47 2014 +1100 soc/samsung/exynos5250/clock.c: Trivial whitespace fixes Reduce difference with exynos5420/clock.c by fixing some whitespace and an include directive. Change-Id: Ifbdd61c8300f3988f5f729fe7d6124ac8a9b7821 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/7926 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/7926 for details. -gerrit

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2014