coreboot-gerrit December 2014

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: fad89ac libpayload: video: Check for 'console' pointer before dereferencing it
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7910 -gerrit commit fad89acc9d0ffd7b98b8c47bbfbdd28cfc48e8bb Author: Julius Werner <jwerner(a)chromium.org> Date: Tue May 20 17:56:25 2014 -0700 libpayload: video: Check for 'console' pointer before dereferencing it Seems that the 'if (cursor_enabled)' check in video_console_fixup_cursor() that was removed in commit 1f880bca0 really meant to check for 'if (console)'. Looks like the whole video console driver is built extra robust to not fail no matter how screwed up the console is, so let's add this missing check here as well. Also fixed up a few other missing 'if (!console)' checks while I'm at it. However, what payloads should really be doing is check the return value of video_(console_)init() and not call the other video functions if that failed. This also adapts video_console_init() to correctly pass through the return value for that purpose (something that seems to have been overlooked in the dd9e4e58 refactoring). BUG=chrome-os-partner:28494 TEST=None. I don't know what Dave did to trigger this in the first place, but it's pretty straight-forward. Original-Change-Id: I1b9f09d49dc70dacf20621b19e081c754d4814f7 Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/200688 Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit 3f01d1dc0974774f0b3ba5fc4e069978f266f2fc) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I98c1d8360539b457e6df07cbcf799acaf6c4631b --- payloads/libpayload/drivers/video/video.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/payloads/libpayload/drivers/video/video.c b/payloads/libpayload/drivers/video/video.c index 318548b..5f76a30 100644 --- a/payloads/libpayload/drivers/video/video.c +++ b/payloads/libpayload/drivers/video/video.c @@ -73,6 +73,9 @@ void video_get_rows_cols(unsigned int *rows, unsigned int *cols) static void video_console_fixup_cursor(void) { + if (!console) + return; + if (cursorx < 0) cursorx = 0; @@ -89,7 +92,7 @@ static void video_console_fixup_cursor(void) cursory--; } - if (console && console->set_cursor) + if (console->set_cursor) console->set_cursor(cursorx, cursory); } @@ -119,6 +122,9 @@ void video_console_putc(u8 row, u8 col, unsigned int ch) void video_console_putchar(unsigned int ch) { + if (!console) + return; + /* replace black-on-black with light-gray-on-black. * do it here, instead of in libc/console.c */ @@ -145,16 +151,11 @@ void video_console_putchar(unsigned int ch) break; case '\t': - while(cursorx % 8 && cursorx < console->columns) { - if (console) - console->putc(cursory, cursorx, (ch & 0xFF00) | ' '); - - cursorx++; - } + while(cursorx % 8 && cursorx < console->columns) + console->putc(cursory, cursorx++, (ch & 0xFF00) | ' '); break; default: - if (console) - console->putc(cursory, cursorx++, ch); + console->putc(cursory, cursorx++, ch); break; } @@ -167,7 +168,7 @@ void video_console_get_cursor(unsigned int *x, unsigned int *y, unsigned int *en *y=0; *en=0; - if (console->get_cursor) + if (console && console->get_cursor) console->get_cursor(x, y, en); *x = cursorx; @@ -214,9 +215,10 @@ int video_init(void) int video_console_init(void) { - video_init(); - if (console) - console_add_output_driver(&cons); + int ret = video_init(); + if (ret) + return ret; + console_add_output_driver(&cons); return 0; }

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Patch set updated for coreboot: 9bdbe0c libpayload: Fix pointer related casts
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7905 -gerrit commit 9bdbe0c10ee002dc59355b7f8fff0ba010f1d7ec Author: Furquan Shaikh <furquan(a)google.com> Date: Tue May 13 13:47:32 2014 -0700 libpayload: Fix pointer related casts Fix pointer related casts since this can create a problem for 64-bit systems. BUG=None BRANCH=None TEST=Compiled successfully for link, nyan using emerge-* libpayload Original-Change-Id: I4cbd2d9f1efaaac87c3eba69204337fd6893ed66 Original-Reviewed-on: https://chromium-review.googlesource.com/199564 Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 914b118a64b0691aeca463dff24252db9c24109e) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I11f070ed5d3eddd8b9be30c428cb24c8439e617b --- payloads/libpayload/drivers/usb/xhci.c | 2 +- payloads/libpayload/include/usb/usb.h | 3 ++- payloads/libpayload/libc/malloc.c | 9 +++++---- payloads/libpayload/libcbfs/cbfs.c | 10 +++++----- 4 files changed, 13 insertions(+), 11 deletions(-) diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c index c60a967..9807858 100644 --- a/payloads/libpayload/drivers/usb/xhci.c +++ b/payloads/libpayload/drivers/usb/xhci.c @@ -166,7 +166,7 @@ xhci_init (unsigned long physical_bar) controller->poll_intr_queue = xhci_poll_intr_queue; controller->pcidev = 0; - controller->reg_base = (u32)physical_bar; + controller->reg_base = (uintptr_t)physical_bar; controller->instance = xzalloc(sizeof(xhci_t)); xhci_t *const xhci = (xhci_t *)controller->instance; diff --git a/payloads/libpayload/include/usb/usb.h b/payloads/libpayload/include/usb/usb.h index ec9912a..4d8b2c2 100644 --- a/payloads/libpayload/include/usb/usb.h +++ b/payloads/libpayload/include/usb/usb.h @@ -31,6 +31,7 @@ #define __USB_H #include <libpayload.h> #include <pci/pci.h> +#include <stdint.h> typedef enum { host_to_device = 0, device_to_host = 1 } dev_req_dir; typedef enum { standard_type = 0, class_type = 1, vendor_type = @@ -210,7 +211,7 @@ typedef enum { OHCI = 0, UHCI = 1, EHCI = 2, XHCI = 3} hc_type; struct usbdev_hc { hci_t *next; - u32 reg_base; + uintptr_t reg_base; pcidev_t pcidev; // 0 if not used (eg on ARM) hc_type type; int latest_address; diff --git a/payloads/libpayload/libc/malloc.c b/payloads/libpayload/libc/malloc.c index 0f2845d..1d99a9c 100644 --- a/payloads/libpayload/libc/malloc.c +++ b/payloads/libpayload/libc/malloc.c @@ -41,6 +41,7 @@ #define IN_MALLOC_C #include <libpayload.h> +#include <stdint.h> struct memory_type { void *start; @@ -158,7 +159,7 @@ static void *alloc(int len, struct memory_type *type) if (header & FLAG_FREE) { if (len <= size) { - hdrtype_t volatile *nptr = (hdrtype_t volatile *)((int)ptr + HDRSIZE + len); + hdrtype_t volatile *nptr = (hdrtype_t volatile *)((uintptr_t)ptr + HDRSIZE + len); int nsize = size - (HDRSIZE + len); /* If there is still room in this block, @@ -177,11 +178,11 @@ static void *alloc(int len, struct memory_type *type) *ptr = USED_BLOCK(size); } - return (void *)((int)ptr + HDRSIZE); + return (void *)((uintptr_t)ptr + HDRSIZE); } } - ptr = (hdrtype_t volatile *)((int)ptr + HDRSIZE + size); + ptr = (hdrtype_t volatile *)((uintptr_t)ptr + HDRSIZE + size); } while (ptr < (hdrtype_t *) type->end); @@ -353,7 +354,7 @@ static struct align_region_t *allocate_region(int alignment, int num_elements, s free(new_region); return NULL; } - new_region->start_data = (void*)((u32)(new_region->start + num_elements + alignment - 1) & (~(alignment-1))); + new_region->start_data = (void*)((uintptr_t)(new_region->start + num_elements + alignment - 1) & (~(alignment-1))); new_region->size = num_elements * alignment; new_region->free = num_elements; new_region->next = type->align_regions; diff --git a/payloads/libpayload/libcbfs/cbfs.c b/payloads/libpayload/libcbfs/cbfs.c index 5610555..c4f01b5 100644 --- a/payloads/libpayload/libcbfs/cbfs.c +++ b/payloads/libpayload/libcbfs/cbfs.c @@ -135,21 +135,21 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) cbfs_get_file_content(media, name, CBFS_TYPE_STAGE, NULL); /* this is a mess. There is no ntohll. */ /* for now, assume compatible byte order until we solve this. */ - uint32_t entry; + uintptr_t entry; uint32_t final_size; if (stage == NULL) return (void *) -1; - LOG("loading stage %s @ 0x%x (%d bytes), entry @ 0x%llx\n", + LOG("loading stage %s @ 0x%p (%d bytes), entry @ 0x%llx\n", name, - (uint32_t) stage->load, stage->memlen, + (void*)(uintptr_t) stage->load, stage->memlen, stage->entry); final_size = cbfs_decompress(stage->compression, ((unsigned char *) stage) + sizeof(struct cbfs_stage), - (void *) (uint32_t) stage->load, + (void *) (uintptr_t) stage->load, stage->len); if (!final_size) return (void *) -1; @@ -180,7 +180,7 @@ int cbfs_execute_stage(struct cbfs_media *media, const char *name) } /* FIXME: This isn't right */ - LOG("run @ %p\n", (void *) ntohl((uint32_t) stage->entry)); + LOG("run @ %p\n", (void *) (uintptr_t)ntohll(stage->entry)); return run_address((void *)(uintptr_t)ntohll(stage->entry)); }

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Patch set updated for coreboot: b4e71fb libpayload: usbmsc: Implement limited LUN support
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7904 -gerrit commit b4e71fba7e35dd9395bc94e0d22c43049ae449e5 Author: Julius Werner <jwerner(a)chromium.org> Date: Fri May 2 16:35:50 2014 -0700 libpayload: usbmsc: Implement limited LUN support I always thought the support for multiple logical SCSI units in the USB mass storage class was a dead feature. Turns out that it's actually used by SD card readers that provide multiple slots (e.g. one regular sized and one micro-SD). Implementing perfect support for that would require a major redesign of the whole MSC stack, since the one device -> one disk assumption is deeply embedded in our data structures. Instead, this patch implements a poor man's LUN support that will just cycle through all available LUNs (in multiple calls to usb_msc_poll()) until it finds a connected device. This should be reasonable enough to allow these card readers to be usable while only requiring superficial changes. Also removes the unused 'protocol' attribute of usb_msc_inst_t. BRANCH=rambi?,nyan BUG=chrome-os-partner:28437 TEST=Alternatively plug an SD or micro-SD card (or both) into my card reader, confirm that one of them is correctly detected at all times. Original-Change-Id: I3df4ca88afe2dcf7928b823aa2a73c2b0f599cf2 Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/198101 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> (cherry picked from commit 960534a20e4334772c29355bb0d310b3f41b31ee) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I39909fc96e32c9a5d76651d91c2b5c16c89ace9e --- payloads/libpayload/drivers/usb/usbmsc.c | 41 +++++++++++++++++++------------- payloads/libpayload/include/usb/usbmsc.h | 7 +++--- 2 files changed, 28 insertions(+), 20 deletions(-) diff --git a/payloads/libpayload/drivers/usb/usbmsc.c b/payloads/libpayload/drivers/usb/usbmsc.c index 3b5206e..62428b6 100644 --- a/payloads/libpayload/drivers/usb/usbmsc.c +++ b/payloads/libpayload/drivers/usb/usbmsc.c @@ -170,10 +170,10 @@ reset_transport (usbdev_t *dev) } /* device may stall this command, so beware! */ -static int -get_max_luns (usbdev_t *dev) +static void +initialize_luns (usbdev_t *dev) { - unsigned char luns = 75; + usbmsc_inst_t *msc = MSC_INST (dev); dev_req_t dr; dr.bmRequestType = 0; dr.data_dir = device_to_host; @@ -185,23 +185,24 @@ get_max_luns (usbdev_t *dev) dr.wValue = 0; dr.wIndex = 0; dr.wLength = 1; - if (dev->controller->control (dev, IN, sizeof (dr), &dr, 1, &luns) < 0) - luns = 0; // assume only 1 lun if req fails - return luns; + if (dev->controller->control (dev, IN, sizeof (dr), &dr, + sizeof (msc->num_luns), &msc->num_luns) < 0) + msc->num_luns = 0; /* assume only 1 lun if req fails */ + msc->num_luns++; /* Get Max LUN returns number of last LUN */ + msc->lun = 0; } unsigned int tag; -unsigned char lun = 0; static void wrap_cbw (cbw_t *cbw, int datalen, cbw_direction dir, const u8 *cmd, - int cmdlen) + int cmdlen, u8 lun) { memset (cbw, 0, sizeof (cbw_t)); cbw->dCBWSignature = cbw_signature; cbw->dCBWTag = ++tag; - cbw->bCBWLUN = lun; // static value per device + cbw->bCBWLUN = lun; cbw->dCBWDataTransferLength = datalen; cbw->bmCBWFlags = dir; @@ -236,7 +237,7 @@ execute_command (usbdev_t *dev, cbw_direction dir, const u8 *cb, int cblen, if ((cb[0] == 0x1b) && (cb[4] == 1)) { //start command, always succeed always_succeed = 1; } - wrap_cbw (&cbw, buflen, dir, cb, cblen); + wrap_cbw (&cbw, buflen, dir, cb, cblen, MSC_INST (dev)->lun); if (dev->controller-> bulk (MSC_INST (dev)->bulk_out, sizeof (cbw), (u8 *) &cbw, 0) < 0) { return reset_transport (dev); @@ -623,7 +624,6 @@ usb_msc_init (usbdev_t *dev) if (!dev->data) fatal("Not enough memory for USB MSC device.\n"); - MSC_INST (dev)->protocol = interface->bInterfaceSubClass; MSC_INST (dev)->bulk_in = 0; MSC_INST (dev)->bulk_out = 0; MSC_INST (dev)->usbdisk_created = 0; @@ -655,7 +655,8 @@ usb_msc_init (usbdev_t *dev) MSC_INST (dev)->bulk_in->endpoint, MSC_INST (dev)->bulk_out->endpoint); - usb_debug (" has %d luns\n", get_max_luns (dev) + 1); + initialize_luns (dev); + usb_debug (" has %d luns\n", MSC_INST (dev)->num_luns); /* Test if unit is ready (nothing to do if it isn't). */ if (usb_msc_test_unit_ready (dev) != USB_MSC_READY) @@ -668,16 +669,22 @@ usb_msc_init (usbdev_t *dev) static void usb_msc_poll (usbdev_t *dev) { - int prev_ready = MSC_INST (dev)->ready; + usbmsc_inst_t *msc = MSC_INST (dev); + int prev_ready = msc->ready; if (usb_msc_test_unit_ready (dev) == USB_MSC_DETACHED) return; - if (!prev_ready && MSC_INST (dev)->ready) { - usb_debug ("usb msc: not ready -> ready\n"); + if (!prev_ready && msc->ready) { + usb_debug ("usb msc: not ready -> ready (lun %d)\n", msc->lun); usb_msc_create_disk (dev); - } else if (prev_ready && !MSC_INST (dev)->ready) { - usb_debug ("usb msc: ready -> not ready\n"); + } else if (prev_ready && !msc->ready) { + usb_debug ("usb msc: ready -> not ready (lun %d)\n", msc->lun); usb_msc_remove_disk (dev); + } else if (!prev_ready && !msc->ready) { + u8 new_lun = (msc->lun + 1) % msc->num_luns; + usb_debug("usb msc: not ready (lun %d) -> lun %d\n", msc->lun, + new_lun); + msc->lun = new_lun; } } diff --git a/payloads/libpayload/include/usb/usbmsc.h b/payloads/libpayload/include/usb/usbmsc.h index 8930156..f4562a5 100644 --- a/payloads/libpayload/include/usb/usbmsc.h +++ b/payloads/libpayload/include/usb/usbmsc.h @@ -32,11 +32,12 @@ typedef struct { unsigned int blocksize; unsigned int numblocks; - unsigned int protocol; endpoint_t *bulk_in; endpoint_t *bulk_out; - int usbdisk_created; - int ready; + u8 usbdisk_created; + s8 ready; + u8 lun; + u8 num_luns; void *data; /* For use by consumers of libpayload. */ } usbmsc_inst_t;

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Patch set updated for coreboot: 31f0a07 libpayload: Clean up USB build warnings
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7921 -gerrit commit 31f0a073932d4370779be85a2042b4ddb7e51a22 Author: Marc Jones <marc.jones(a)se-eng.com> Date: Mon Dec 29 22:07:04 2014 -0700 libpayload: Clean up USB build warnings There were a few build warnings in the USB driver to clean up before -Werror may be enabled. Change-Id: I220cfcf0ee926912a184a91d3ced3ba61259130e Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> --- payloads/libpayload/drivers/usb/usbinit.c | 6 +++--- payloads/libpayload/drivers/usb/xhci.c | 4 +++- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/payloads/libpayload/drivers/usb/usbinit.c b/payloads/libpayload/drivers/usb/usbinit.c index 1710760..6fb7d4b 100644 --- a/payloads/libpayload/drivers/usb/usbinit.c +++ b/payloads/libpayload/drivers/usb/usbinit.c @@ -172,15 +172,15 @@ hci_t *usb_add_mmio_hc(hc_type type, void *bar) switch (type) { #ifdef CONFIG_LP_USB_OHCI case OHCI: - return ohci_init(bar); + return ohci_init((unsigned long)bar); #endif #ifdef CONFIG_LP_USB_EHCI case EHCI: - return ehci_init(bar); + return ehci_init((unsigned long)bar); #endif #ifdef CONFIG_LP_USB_XHCI case XHCI: - return xhci_init(bar); + return xhci_init((unsigned long)bar); #endif default: usb_debug("HC type %d (at %p) is not supported!\n", type, bar); diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c index 9807858..7c6e219 100644 --- a/payloads/libpayload/drivers/usb/xhci.c +++ b/payloads/libpayload/drivers/usb/xhci.c @@ -88,6 +88,7 @@ xhci_init_cycle_ring(transfer_ring_t *const tr, const size_t ring_size) } /* On Panther Point: switch ports shared with EHCI to xHCI */ +#ifdef CONFIG_LP_USB_PCI static void xhci_switch_ppt_ports(pcidev_t addr) { @@ -109,6 +110,7 @@ xhci_switch_ppt_ports(pcidev_t addr) xhci_debug("Actually switched over: 0x%"PRIx32"\n", reg32); } } +#endif /* On Panther Point: switch all ports back to EHCI */ static void @@ -286,7 +288,7 @@ _free_xhci: free(xhci->roothub); free(xhci->dev); free(xhci); -_free_controller: +/* _free_controller: */ detach_controller(controller); free(controller); return NULL;

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Patch set updated for coreboot: eab321d libpayload: Provide selfboot function.
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7907 -gerrit commit eab321df3eb87e8e55c5bd097e4d2d0cbdc91036 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Tue May 13 22:33:12 2014 +0800 libpayload: Provide selfboot function. The calling convention of payload entry function is different by architecture. For example, X86 takes no arguments and ARM needs first param to be a cb_header_ptr*. To help payloads load and execute other payloads easily and correctly, we should provide the selfboot() function in libpayload, using same prototype as defined in Coreboot environment. BUG=none TEST=emerge-nyan libpayload # pass BRANCH=none Original-Change-Id: I8f1cb2c0df788794b2f6f7f5500a3910328a4f84 Original-Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/199503 Original-Reviewed-by: Stefan Reinauer <reinauer(a)chromium.org> (cherry picked from commit 1e916cf021ce68886eb9668982c392eadedc7b7e) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I7279ef27f49ef581d25a455dd8f1f2f7f1ba58cb --- payloads/libpayload/arch/arm/Makefile.inc | 1 + payloads/libpayload/arch/arm/selfboot.c | 35 +++++++++++++++++++++++++++++++ payloads/libpayload/arch/x86/Makefile.inc | 1 + payloads/libpayload/arch/x86/selfboot.c | 28 +++++++++++++++++++++++++ payloads/libpayload/include/cbfs.h | 3 +-- 5 files changed, 66 insertions(+), 2 deletions(-) diff --git a/payloads/libpayload/arch/arm/Makefile.inc b/payloads/libpayload/arch/arm/Makefile.inc index 5c22ea8..7009884 100644 --- a/payloads/libpayload/arch/arm/Makefile.inc +++ b/payloads/libpayload/arch/arm/Makefile.inc @@ -38,6 +38,7 @@ libc-y += virtual.c libc-y += memcpy.S memset.S memmove.S libc-y += exception_asm.S exception.c libc-y += cache.c cpu.S +libc-y += selfboot.c libcbfs-$(CONFIG_LP_CBFS) += dummy_media.c # Add other classes here when you put assembly files into them! diff --git a/payloads/libpayload/arch/arm/selfboot.c b/payloads/libpayload/arch/arm/selfboot.c new file mode 100644 index 0000000..cbb7ef1 --- /dev/null +++ b/payloads/libpayload/arch/arm/selfboot.c @@ -0,0 +1,35 @@ +/* + * Copyright 2014 Google Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <libpayload.h> + +extern void *cb_header_ptr; + +void selfboot(void *entry) +{ + __asm__ __volatile__( + "mov r0, %[cb_header_ptr]\n" + "bx %[entry]\n" + :: [cb_header_ptr]"r"(cb_header_ptr), [entry]"r"(entry) + : "r0" + ); +} diff --git a/payloads/libpayload/arch/x86/Makefile.inc b/payloads/libpayload/arch/x86/Makefile.inc index 549a630..d9cc19e 100644 --- a/payloads/libpayload/arch/x86/Makefile.inc +++ b/payloads/libpayload/arch/x86/Makefile.inc @@ -31,6 +31,7 @@ head.o-y += head.S libc-y += main.c sysinfo.c libc-y += timer.c coreboot.c util.S libc-y += exec.S virtual.c +libc-y += selfboot.c libc-y += string.c libc-y += exception_asm.S exception.c diff --git a/payloads/libpayload/arch/x86/selfboot.c b/payloads/libpayload/arch/x86/selfboot.c new file mode 100644 index 0000000..fc89859 --- /dev/null +++ b/payloads/libpayload/arch/x86/selfboot.c @@ -0,0 +1,28 @@ +/* + * Copyright 2014 Google Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <libpayload.h> + +void selfboot(void *entry) +{ + void (*entry_func)(void) = entry; + entry_func(); +} diff --git a/payloads/libpayload/include/cbfs.h b/payloads/libpayload/include/cbfs.h index df3bb1c..c5c811c 100644 --- a/payloads/libpayload/include/cbfs.h +++ b/payloads/libpayload/include/cbfs.h @@ -82,8 +82,7 @@ void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, int run_address(void *f); /* Defined in src/lib/selfboot.c */ -struct lb_memory; -int selfboot(struct lb_memory *mem, struct cbfs_payload *payload); +void selfboot(void *entry); /* Defined in individual arch / board implementation. */ int init_default_cbfs_media(struct cbfs_media *media);

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Patch set updated for coreboot: 7d8762c libpayload: Remove PC Keyboard from ARM build
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7922 -gerrit commit 7d8762cbc7a5e1fdac9162688907f666af3b4bbd Author: Marc Jones <marc.jones(a)se-eng.com> Date: Tue Dec 23 15:22:30 2014 -0700 libpayload: Remove PC Keyboard from ARM build The keyboard.c uses IO cycles to access the legacy PC keyboard device. ARM can't do IO cycles, so remove the option for ARM configs. Change-Id: Ifc6c2368563f27867f4babad5afdde0e78f4cf78 Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> --- payloads/libpayload/Config.in | 3 ++- payloads/libpayload/configs/defconfig-arm | 8 ++------ 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in index f317c18..bef0e05 100644 --- a/payloads/libpayload/Config.in +++ b/payloads/libpayload/Config.in @@ -237,7 +237,8 @@ config COREBOOT_VIDEO_CONSOLE config PC_KEYBOARD bool "Allow input from a PC keyboard" - default y + default y if ARCH_X86 # uses IO + default n config PC_KEYBOARD_LAYOUT_US bool "English (US) keyboard layout" diff --git a/payloads/libpayload/configs/defconfig-arm b/payloads/libpayload/configs/defconfig-arm index 12ad423..fe47d0c 100644 --- a/payloads/libpayload/configs/defconfig-arm +++ b/payloads/libpayload/configs/defconfig-arm @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # libpayload version: 0.2.0 -# Wed Nov 12 14:57:03 2014 +# Tue Dec 23 15:19:30 2014 # # @@ -42,9 +42,7 @@ CONFIG_LP_SERIAL_CONSOLE=y # CONFIG_LP_SERIAL_ACS_FALLBACK is not set CONFIG_LP_VIDEO_CONSOLE=y # CONFIG_LP_COREBOOT_VIDEO_CONSOLE is not set -CONFIG_LP_PC_KEYBOARD=y -CONFIG_LP_PC_KEYBOARD_LAYOUT_US=y -# CONFIG_LP_PC_KEYBOARD_LAYOUT_DE is not set +# CONFIG_LP_PC_KEYBOARD is not set # # Drivers @@ -70,5 +68,3 @@ CONFIG_LP_USB_GEN_HUB=y CONFIG_LP_LITTLE_ENDIAN=y # CONFIG_LP_IO_ADDRESS_SPACE is not set CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y -CONFIG_LP_COREBOOT_INFO_RANGE_BASE=0x10 -CONFIG_LP_COREBOOT_INFO_RANGE_SIZE=0x4000000

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Patch set updated for coreboot: 783e932 libpayload: arm: Add EABI compatible utility functions.
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7906 -gerrit commit 783e932a66408f5d351817c9a7c01293ba3e65e0 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed May 14 12:43:57 2014 +0800 libpayload: arm: Add EABI compatible utility functions. Some EABI conformant toolchains like GCC need additional functions like raise. To prevent payloads adding arch-specific implementations everywhere, we should provide the default version in libpayload. BUG=none TEST=emerge-nyan libpayload # pass BRANCH=none Original-Change-Id: Id1e3c29590aa5881aefd944a7551949ce9a47b8f Original-Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/199686 (cherry picked from commit 395810c4b744dbb720050f79a2c1a30e81464554) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I2e1d8c8cb519f8e788c22d081132d23b49b8f822 --- payloads/libpayload/arch/arm/Makefile.inc | 1 + payloads/libpayload/arch/arm/eabi_compat.c | 56 ++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+) diff --git a/payloads/libpayload/arch/arm/Makefile.inc b/payloads/libpayload/arch/arm/Makefile.inc index 2f8da15..5c22ea8 100644 --- a/payloads/libpayload/arch/arm/Makefile.inc +++ b/payloads/libpayload/arch/arm/Makefile.inc @@ -31,6 +31,7 @@ CFLAGS += -mthumb -march=armv7-a arm_asm_flags = -Wa,-mthumb -Wa,-mimplicit-it=always -Wa,-mno-warn-deprecated head.o-y += head.S +libc-y += eabi_compat.c libc-y += main.c sysinfo.c libc-y += timer.c coreboot.c util.S libc-y += virtual.c diff --git a/payloads/libpayload/arch/arm/eabi_compat.c b/payloads/libpayload/arch/arm/eabi_compat.c new file mode 100644 index 0000000..0df9509 --- /dev/null +++ b/payloads/libpayload/arch/arm/eabi_compat.c @@ -0,0 +1,56 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Google, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Function(s) needed for some EABI conformant tool chains (ex GCC). + */ + +#include <die.h> + +int raise(int signum) __attribute__((weak)); +int raise(int signum) +{ + die("signal %d raised.\n", signum); + return -1; +} + +/* ARM-defined Personality Routines, currently 3 in ARM EHABI. */ + +void __aeabi_unwind_cpp_pr0(void) __attribute__((weak)); +void __aeabi_unwind_cpp_pr0(void) +{ +} + +void __aeabi_unwind_cpp_pr1(void) __attribute__((weak)); +void __aeabi_unwind_cpp_pr1(void) +{ +} + +void __aeabi_unwind_cpp_pr2(void) __attribute__((weak)); +void __aeabi_unwind_cpp_pr2(void) +{ +}

1 0

Patch set updated for coreboot: b174d42 baytrail: Add defines and functions for GPNCORE
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7892 -gerrit commit b174d42ff6d8c9dfdd4d4c964ea3e2c6b0714965 Author: Kein Yuan <kein.yuan(a)intel.com> Date: Thu May 1 18:57:11 2014 -0700 baytrail: Add defines and functions for GPNCORE BUG=chrome-os-partner:25159 BRANCH=firmware-rambi-5216.B TEST=Build pass for Rambi Original-Change-Id: I049f9254fe25aabf13d891579444bba2cfcf68c5 Original-Change-Id: Ib7c814660262e2507813ee5970190f98530dfe5e Original-Signed-off-by: Kein Yuan <kein.yuan(a)intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197984 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Shawn Nematbakhsh <shawnn(a)chromium.org> Original-Tested-by: Shawn Nematbakhsh <shawnn(a)chromium.org> (cherry picked from commit dd05055f2f74fc0e4875733c0e5dedcbae302bfa) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Iee01407a73bec420ab47d07524a3f1fd0f4d9817 --- src/soc/intel/baytrail/baytrail/gpio.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/src/soc/intel/baytrail/baytrail/gpio.h b/src/soc/intel/baytrail/baytrail/gpio.h index 09e45a1..741f3e9 100644 --- a/src/soc/intel/baytrail/baytrail/gpio.h +++ b/src/soc/intel/baytrail/baytrail/gpio.h @@ -344,6 +344,23 @@ struct soc_gpio_config* mainboard_get_gpios(void); #define UART_TXD_PAD 83 #define PCU_SMB_CLK_PAD 88 #define PCU_SMB_DATA_PAD 90 +#define SOC_DDI1_VDDEN_PAD 16 + +static inline unsigned int ncore_pconf0(int pad_num) +{ + return GPNCORE_PAD_BASE + pad_num * 16; +} + +static inline void ncore_select_func(int pad, int func) +{ + uint32_t reg; + uint32_t pconf0_addr = ncore_pconf0(pad); + + reg = read32(pconf0_addr); + reg &= ~0x7; + reg |= func & 0x7; + write32(pconf0_addr, reg); +} static inline unsigned int score_pconf0(int pad_num) {

1 0

New patch to review for coreboot: eaec719 rtc: make ALTCENTURY a KCONFIG option.
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7987 -gerrit commit eaec719fc1718f97288b42966a12bc65bf0745eb Author: Gabe Black <gabeblack(a)google.com> Date: Wed Apr 30 21:31:44 2014 -0700 rtc: make ALTCENTURY a KCONFIG option. The availability of "ALTCENTURY" is now set through a kconfig variable so it can be available to the RTC driver without having to have a specialized interface. BUG=None TEST=Built and booted on Link with the event log code modified to use the RTC interface. Verified that the event times were accurate. BRANCH=nyan Original-Change-Id: Ifa807898e583254e57167fd44932ea86627a02ee Original-Signed-off-by: Gabe Black <gabeblack(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197795 Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Original-Tested-by: Gabe Black <gabeblack(a)chromium.org> Original-Commit-Queue: Gabe Black <gabeblack(a)chromium.org> (cherry picked from commit 9e0fd75142d29afe34f6c6b9ce0099f478ca5a93) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I8e871f31c3d4be7676abf9454ca90808d1ddca03 --- src/drivers/pc80/Kconfig | 5 +++++ src/drivers/pc80/mc146818rtc.c | 22 +++++++++++----------- src/include/pc80/mc146818rtc.h | 5 +---- src/include/rtc.h | 4 ++-- src/southbridge/amd/agesa/hudson/lpc.c | 2 +- src/southbridge/amd/cimx/sb700/late.c | 2 +- src/southbridge/amd/cimx/sb800/late.c | 2 +- src/southbridge/amd/cimx/sb900/late.c | 2 +- src/southbridge/amd/pi/avalon/lpc.c | 2 +- src/southbridge/amd/sb600/lpc.c | 2 +- src/southbridge/amd/sb700/lpc.c | 2 +- src/southbridge/amd/sb800/lpc.c | 2 +- 12 files changed, 27 insertions(+), 25 deletions(-) diff --git a/src/drivers/pc80/Kconfig b/src/drivers/pc80/Kconfig index 5b05f46..928fae4 100644 --- a/src/drivers/pc80/Kconfig +++ b/src/drivers/pc80/Kconfig @@ -27,3 +27,8 @@ config DRIVERS_MC146818 bool default y if ARCH_X86 default n if !ARCH_X86 + +config DRIVERS_RTC_HAS_ALTCENTURY + bool "The RTC supports alt century" + depends on DRIVERS_MC146818 + default y diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index 9e77bd2..36e6e68 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -34,7 +34,7 @@ #endif -static void cmos_reset_date(u8 has_century) +static void cmos_reset_date(void) { /* Now setup a default date equals to the build date */ struct rtc_time time = { @@ -46,7 +46,7 @@ static void cmos_reset_date(u8 has_century) .year = 2000 + bcd2bin(coreboot_build_date.year), .wday = bcd2bin(coreboot_build_date.weekday) }; - rtc_set(&time, has_century); + rtc_set(&time); } #if CONFIG_USE_OPTION_TABLE @@ -123,7 +123,7 @@ void cmos_init(int invalid) cmos_write(0, i); #endif if (cmos_invalid) - cmos_reset_date(RTC_HAS_NO_ALTCENTURY); + cmos_reset_date(); printk(BIOS_WARNING, "RTC:%s%s%s%s\n", invalid?" Clear requested":"", @@ -323,12 +323,13 @@ int set_option(const char *name, void *value) * hurts some OSes. Even if we don't set USE_OPTION_TABLE, we need * to make sure the date is valid. */ -void cmos_check_update_date(u8 has_century) +void cmos_check_update_date() { u8 year, century; /* Note: Need to check if the hardware supports RTC_CLK_ALTCENTURY. */ - century = has_century ? cmos_read(RTC_CLK_ALTCENTURY) : 0; + century = CONFIG_DRIVERS_RTC_HAS_ALTCENTURY ? + cmos_read(RTC_CLK_ALTCENTURY) : 0; year = cmos_read(RTC_CLK_YEAR); /* @@ -337,25 +338,24 @@ void cmos_check_update_date(u8 has_century) * if the date is valid. */ if (century > 0x99 || year > 0x99) /* Invalid date */ - cmos_reset_date(has_century); + cmos_reset_date(); } -int rtc_set(const struct rtc_time *time, u8 has_century) -{ +int rtc_set(const struct rtc_time *time){ cmos_write(bin2bcd(time->sec), RTC_CLK_SECOND); cmos_write(bin2bcd(time->min), RTC_CLK_MINUTE); cmos_write(bin2bcd(time->hour), RTC_CLK_HOUR); cmos_write(bin2bcd(time->mday), RTC_CLK_DAYOFMONTH); cmos_write(bin2bcd(time->mon), RTC_CLK_MONTH); cmos_write(bin2bcd(time->year % 100), RTC_CLK_YEAR); - if (has_century) + if (CONFIG_DRIVERS_RTC_HAS_ALTCENTURY) cmos_write(bin2bcd(time->year / 100), RTC_CLK_ALTCENTURY); cmos_write(bin2bcd(time->wday + 1), RTC_CLK_DAYOFWEEK); return 0; } -int rtc_get(struct rtc_time *time, u8 has_century) +int rtc_get(struct rtc_time *time) { time->sec = bcd2bin(cmos_read(RTC_CLK_SECOND)); time->min = bcd2bin(cmos_read(RTC_CLK_MINUTE)); @@ -363,7 +363,7 @@ int rtc_get(struct rtc_time *time, u8 has_century) time->mday = bcd2bin(cmos_read(RTC_CLK_DAYOFMONTH)); time->mon = bcd2bin(cmos_read(RTC_CLK_MONTH)); time->year = bcd2bin(cmos_read(RTC_CLK_YEAR)); - if (has_century) + if (CONFIG_DRIVERS_RTC_HAS_ALTCENTURY) time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100; else time->year += 2000; diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 3d65909..90ae7ae 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -94,9 +94,6 @@ #define RTC_CLK_YEAR 9 #define RTC_CLK_ALTCENTURY 0x32 -#define RTC_HAS_ALTCENTURY 1 -#define RTC_HAS_NO_ALTCENTURY 0 - /* On PCs, the checksum is built only over bytes 16..45 */ #define PC_CKS_RANGE_START 16 #define PC_CKS_RANGE_END 45 @@ -173,7 +170,7 @@ static inline void cmos_write32(u8 offset, u32 value) #if !defined(__ROMCC__) void cmos_init(int invalid); -void cmos_check_update_date(u8 has_century); +void cmos_check_update_date(void); #if CONFIG_USE_OPTION_TABLE enum cb_err set_option(const char *name, void *val); enum cb_err get_option(void *dest, const char *name); diff --git a/src/include/rtc.h b/src/include/rtc.h index ed32b69..ba9a9c3 100644 --- a/src/include/rtc.h +++ b/src/include/rtc.h @@ -31,7 +31,7 @@ struct rtc_time int wday; }; -int rtc_set(const struct rtc_time *time, u8 has_century); -int rtc_get(struct rtc_time *time, u8 has_century); +int rtc_set(const struct rtc_time *time); +int rtc_get(struct rtc_time *time); #endif /* _RTC_H_ */ diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c index 836966e..b784fc4 100644 --- a/src/southbridge/amd/agesa/hudson/lpc.c +++ b/src/southbridge/amd/agesa/hudson/lpc.c @@ -71,7 +71,7 @@ static void lpc_init(device_t dev) byte |= 1 << 0 | 1 << 3; pci_write_config8(dev, 0xBB, byte); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); /* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c index 9c70482..3fa6940 100644 --- a/src/southbridge/amd/cimx/sb700/late.c +++ b/src/southbridge/amd/cimx/sb700/late.c @@ -81,7 +81,7 @@ static void lpc_init(device_t dev) { printk(BIOS_DEBUG, "SB700 - Late.c - lpc_init - Start.\n"); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); /* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 9c4047f..d7f22d3 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -132,7 +132,7 @@ static void lpc_init(device_t dev) { printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - Start.\n"); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); /* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c index 6f6a501..e9f5ad6 100644 --- a/src/southbridge/amd/cimx/sb900/late.c +++ b/src/southbridge/amd/cimx/sb900/late.c @@ -103,7 +103,7 @@ static void lpc_init(device_t dev) printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - Start.\n"); /* SB Configure HPET base and enable bit */ //- hpetInit(sb_config, &(sb_config->BuildParameters)); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); /* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/pi/avalon/lpc.c b/src/southbridge/amd/pi/avalon/lpc.c index 1f60bc4..7b54cc3 100644 --- a/src/southbridge/amd/pi/avalon/lpc.c +++ b/src/southbridge/amd/pi/avalon/lpc.c @@ -70,7 +70,7 @@ static void lpc_init(device_t dev) byte |= 1 << 0 | 1 << 3; pci_write_config8(dev, 0xBB, byte); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); /* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c index acee69d..dc2f31b 100644 --- a/src/southbridge/amd/sb600/lpc.c +++ b/src/southbridge/amd/sb600/lpc.c @@ -63,7 +63,7 @@ static void lpc_init(device_t dev) byte &= ~(1 << 1); pci_write_config8(dev, 0x78, byte); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); } static void sb600_lpc_read_resources(device_t dev) diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 26478b7..8ebc765 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -90,7 +90,7 @@ static void lpc_init(device_t dev) } #endif - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); } void backup_top_of_ram(uint64_t ramtop) diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c index f862a97..87c09a2 100644 --- a/src/southbridge/amd/sb800/lpc.c +++ b/src/southbridge/amd/sb800/lpc.c @@ -74,7 +74,7 @@ static void lpc_init(device_t dev) byte |= 1 << 0 | 1 << 3; pci_write_config8(dev, 0xBB, byte); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); } static void sb800_lpc_read_resources(device_t dev)

1 0

Patch set updated for coreboot: 5d61a2e rtc: Add an RTC driver for the AS3722 PMIC.
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7890 -gerrit commit 5d61a2e3d1479e4018efcf58e973967b106d7486 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Apr 30 21:37:14 2014 -0700 rtc: Add an RTC driver for the AS3722 PMIC. The AS3722 PMIC, like many PMICs, has an RTC built into it. This change adds a driver for it which implements the new RTC API. BUG=None TEST=Built and booted with the event log code modified to use this interface. Verified that events had accurate timestamps. BRANCH=nyan Original-Change-Id: I400adccbf84221dcba8d520276bb91b389f72268 Original-Signed-off-by: Gabe Black <gabeblack(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197796 Original-Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Original-Tested-by: Gabe Black <gabeblack(a)chromium.org> Original-Commit-Queue: Gabe Black <gabeblack(a)chromium.org> (cherry picked from commit 011e49beba3a99abbd122866891e3c20bf1188d2) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Ibc1d342062c7853a30d195496c077e37a02b35b0 --- src/drivers/Kconfig | 1 + src/drivers/Makefile.inc | 1 + src/drivers/ams/Kconfig | 11 ++++++ src/drivers/ams/Makefile.inc | 1 + src/drivers/ams/as3722rtc.c | 91 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 105 insertions(+) diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig index 12f9a79..08de415 100644 --- a/src/drivers/Kconfig +++ b/src/drivers/Kconfig @@ -17,6 +17,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +source src/drivers/ams/Kconfig source src/drivers/ati/Kconfig source src/drivers/dec/Kconfig source src/drivers/elog/Kconfig diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index 7ae3eb2..151e3f7 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -17,6 +17,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +subdirs-y += ams subdirs-y += ati subdirs-y += dec subdirs-y += emulation diff --git a/src/drivers/ams/Kconfig b/src/drivers/ams/Kconfig new file mode 100644 index 0000000..44b89c5 --- /dev/null +++ b/src/drivers/ams/Kconfig @@ -0,0 +1,11 @@ +config DRIVERS_AS3722_RTC + bool "AS3722 RTC support" + default n + +config DRIVERS_AS3722_RTC_BUS + int "AS3722 RTC bus" + depends on DRIVERS_AS3722_RTC + +config DRIVERS_AS3722_RTC_ADDR + hex "AS3722 RTC chip address" + depends on DRIVERS_AS3722_RTC diff --git a/src/drivers/ams/Makefile.inc b/src/drivers/ams/Makefile.inc new file mode 100644 index 0000000..cf51831 --- /dev/null +++ b/src/drivers/ams/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_AS3722_RTC) += as3722rtc.c diff --git a/src/drivers/ams/as3722rtc.c b/src/drivers/ams/as3722rtc.c new file mode 100644 index 0000000..8fe5748 --- /dev/null +++ b/src/drivers/ams/as3722rtc.c @@ -0,0 +1,91 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <bcd.h> +#include <console/console.h> +#include <device/i2c.h> +#include <rtc.h> +#include <stdint.h> + +enum AS3722_RTC_REG +{ + AS3722_RTC_CONTROL = 0x60, + AS3722_RTC_SECOND = 0x61, + AS3722_RTC_MINUTE = 0x62, + AS3722_RTC_HOUR = 0x63, + AS3722_RTC_DAY = 0x64, + AS3722_RTC_MONTH = 0x65, + AS3722_RTC_YEAR = 0x66 +}; + +enum { + AS3722_RTC_CONTROL_ON = 0x1 << 2 +}; + +static uint8_t as3722_read(enum AS3722_RTC_REG reg) +{ + uint8_t val; + i2c_readb(CONFIG_DRIVERS_AS3722_RTC_BUS, + CONFIG_DRIVERS_AS3722_RTC_ADDR, reg, &val); + return val; +} + +static void as3722_write(enum AS3722_RTC_REG reg, uint8_t val) +{ + i2c_writeb(CONFIG_DRIVERS_AS3722_RTC_BUS, + CONFIG_DRIVERS_AS3722_RTC_ADDR, reg, val); +} + +static void as3722rtc_init(void) +{ + static int initialized; + if (initialized) + return; + + uint8_t control = as3722_read(AS3722_RTC_CONTROL); + as3722_write(AS3722_RTC_CONTROL, control | AS3722_RTC_CONTROL_ON); + + initialized = 1; +} + +int rtc_set(const struct rtc_time *time) +{ + as3722rtc_init(); + + as3722_write(AS3722_RTC_SECOND, bin2bcd(time->sec)); + as3722_write(AS3722_RTC_MINUTE, bin2bcd(time->min)); + as3722_write(AS3722_RTC_HOUR, bin2bcd(time->hour)); + as3722_write(AS3722_RTC_DAY, bin2bcd(time->mday)); + as3722_write(AS3722_RTC_MONTH, bin2bcd(time->mon + 1)); + as3722_write(AS3722_RTC_YEAR, bin2bcd(time->year)); + return 0; +} + +int rtc_get(struct rtc_time *time) +{ + as3722rtc_init(); + + time->sec = bcd2bin(as3722_read(AS3722_RTC_SECOND) & 0x7f); + time->min = bcd2bin(as3722_read(AS3722_RTC_MINUTE) & 0x7f); + time->hour = bcd2bin(as3722_read(AS3722_RTC_HOUR) & 0x3f); + time->mday = bcd2bin(as3722_read(AS3722_RTC_DAY) & 0x3f); + time->mon = bcd2bin(as3722_read(AS3722_RTC_MONTH) & 0x1f) - 1; + time->year = bcd2bin(as3722_read(AS3722_RTC_YEAR) & 0x7f); + return 0; +}

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coreboot-gerrit December 2014