coreboot-gerrit December 2014

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 79f60a5 SPI: Fix Eon support
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit 79f60a5c9d24667928ca11c44eb8c1fccf4a8183 Author: Marc Jones <marc.jones(a)se-eng.com> Date: Thu May 1 14:53:24 2014 -0600 SPI: Fix Eon support The Eon SPI25 code had a number of issues: - fix page write calculation - fix erase segment - fix id check - fix sector size - make commands EN25 generic This makes the code similar to other SPI25 devices used in coreboot. BUG=chrome-os-partner:25907 BRANCH=baytrail(rambi) TEST=Read and write MRC and ELOG on Glimmer with Eon device. Original-Change-Id: I7667eab28b850790d92a591c869788d51c26a56c Original-Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Original-Reviewed-on: https://chromium-review.googlesource.com/198323 Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Original-Commit-Queue: Marc Jones <marc.jones(a)se-eng.com> Original-Tested-by: Marc Jones <marc.jones(a)se-eng.com> (cherry picked from commit 2ee0da695bf6a6c6aedc0dd2b3a3b7c9c3165bca) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I8917e778cd62f3745189336d23c0c6118887d893 Reviewed-on: http://review.coreboot.org/7934 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7934 for details. -gerrit

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Patch merged into coreboot/master: 8e64388 drivers/spi: Prepare Spansion driver for use in CBFS wrapper
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit 8e64388210352dd1a3c594d3de29208fd1010d8d Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Thu May 1 19:30:46 2014 -0700 drivers/spi: Prepare Spansion driver for use in CBFS wrapper Since the same driver is going to be used at all coreboot stages, it can not use malloc() anymore. Replace it with static allocation of the driver container structure. The read interface is changed to spi_flash_cmd_read_slow(), because of the problems with spi_flash_cmd_read_fast() implementation. In fact there is no performance difference in the way the two interface functions are implemented. BUG=chrome-os-partner:27784 TEST=manual . with all patches applied coreboot proceeds to attempting to load the payload. Original-Change-Id: I1c7beedce7747bc89ab865fd844b568ad50d2dae Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/197931 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit 57ee2fd875c689706c70338e073acefb806787e7) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I9d9e7e343148519580ed4986800dc6c6b9a5f5d2 Reviewed-on: http://review.coreboot.org/7933 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7933 for details. -gerrit

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Patch merged into coreboot/master: adcb095 Provide a common CBFS wrapper for SPI storage
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit adcb095e9e1e535b9331648dab0d628afd1336ca Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Thu May 1 12:23:09 2014 -0700 Provide a common CBFS wrapper for SPI storage Coreboot has all necessary infrastructure to use the proper SPI flash interface in bootblock for CBFS. This patch creates a common CBFS wrapper which can be enabled on different platforms as required. COMMON_CBFS_SPI_WRAPPER, a new configuration option, enables the common CBFS interface and prevents default inclusion of all SPI chip drivers, only explicitly configured ones will be included when the new feature is enabled. Since the wrapper uses the same driver at all stages, enabling the new feature will also make it necessary to include the SPI chip drivers in bootblock and romstage images. init_default_cbfs_media() can now be common for different platforms, and as such is defined in the library. BUG=none TEST=manual . with this change and the rest of the patches coreboot on AP148 comes up all the way to attempting to boot the payload (reading earlier stages from the SPI flash along the way). Original-Change-Id: Ia887bb7f386a0e23a110e38001d86f9d43fadf2c Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/197800 Original-Tested-by: Vadim Bendebury <vbendeb(a)google.com> Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit 60eb16ebe624f9420c6191afa6ba239b8e83a6e6) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I7b0bf3dda915c227659ab62743e405312dedaf41 Reviewed-on: http://review.coreboot.org/7932 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7932 for details. -gerrit

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Patch merged into coreboot/master: b152883 drivers/spi: add support for another Spansion chip
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit b1528838f6ba4cdbb0d8f01bf511d9b9482af172 Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Thu May 1 15:50:43 2014 -0700 drivers/spi: add support for another Spansion chip Add the device ID definitions and properties for the SPI chip used on the AP148 board (Google Storm). BUG=chrome-os-partner:27784 TEST=manual . with the rest of the patches applied AP148 boots all the way to trying to read the payload. Original-Change-Id: I5a0e5c9d3cc9ea81bc5227c0fbc1d0a5fc7bec27 Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/197895 Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit a7c69981b18ac6b1158273596b94df0def65963d) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I14e2f4f8f691a7db6ed596a3440914e08680867b Reviewed-on: http://review.coreboot.org/7931 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7931 for details. -gerrit

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Patch merged into coreboot/master: 3cc685f rtc: Add an RTC API, and implement it for x86.
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit 3cc685fd3e851b1bd2b77690ee05ca7f6c5974f7 Author: Marc Jones <marc.jones(a)se-eng.com> Date: Mon Dec 29 21:31:44 2014 -0700 rtc: Add an RTC API, and implement it for x86. This CL adds an API for RTC drivers, and implements its two functions, rtc_get and rtc_set, for x86's RTC. The function which resets the clock when the CMOS as lost state now uses the RTC driver instead of accessing the those registers directly. BUG=None TEST=Built and booted on Link with the event log code modified to use the RTC interface. Verified that the event times were accurate. BRANCH=nyan Original-Change-Id: Ifa807898e583254e57167fd44932ea86627a02ee Original-Signed-off-by: Gabe Black <gabeblack(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197795 Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Original-Tested-by: Gabe Black <gabeblack(a)chromium.org> Original-Commit-Queue: Gabe Black <gabeblack(a)chromium.org> This is the first half of the patch. (cherry picked from commit 9e0fd75142d29afe34f6c6b9ce0099f478ca5a93) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I159f9b4872a0bb932961b4168b180c087dfb1883 Reviewed-on: http://review.coreboot.org/7889 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/7889 for details. -gerrit

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Patch merged into coreboot/master: 8b143c5 cbmem: use a single id to name mapping table
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit 8b143c5c8bb2825b8ea1a704066023307c49e21f Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Wed May 14 10:12:55 2014 -0700 cbmem: use a single id to name mapping table CBMEM IDs are converted to symbolic names by both target and host code. Keep the conversion table in one place to avoid getting out of sync. BUG=none TEST=manual . the new firmware still displays proper CBMEM table entry descriptions: coreboot table: 276 bytes. CBMEM ROOT 0. 5ffff000 00001000 COREBOOT 1. 5fffd000 00002000 . running make in util/cbmem still succeeds Original-Change-Id: I0bd9d288f9e6432b531cea2ae011a6935a228c7a Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/199791 Original-Reviewed-by: Stefan Reinauer <reinauer(a)chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> (cherry picked from commit 5217446a536bb1ba874e162c6e2e16643caa592a) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I0d839316e9697bd3afa0b60490a840d39902dfb3 Reviewed-on: http://review.coreboot.org/7938 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/7938 for details. -gerrit

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Patch merged into coreboot/master: c253717 libpaylod: fix lpgcc logic statement
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit c2537175ecf06d1834e8ce5f5b08816269ad3393 Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Mon May 19 15:43:47 2014 -0700 libpaylod: fix lpgcc logic statement The -z "${V}" sure must have meant to be -n "${V}", but come to think of it, this check is not necessary, as the following check will succeed if and only if V is set to 1. BUG=none TEST=verified that adding V=1 to the environment causes the lpgcc debug statements to show up in the output. Original-Change-Id: I1eb43ef49aeb4f16aef4fbee3a1037e853f9b40f Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/200501 Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> Original-Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> (cherry picked from commit 7d69a292b1dc90e68e539e329f019098f8af5007) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I63785fd9fc88b95d50ecced1f4f74a76ca68089c Reviewed-on: http://review.coreboot.org/7912 Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/7912 for details. -gerrit

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Patch merged into coreboot/master: 1c8e91f libpayload: video: Check for 'console' pointer before dereferencing it
by gerrit＠coreboot.org 30 Dec '14

30 Dec '14

the following patch was just integrated into master: commit 1c8e91f21ab656c393454b774984911155ede827 Author: Julius Werner <jwerner(a)chromium.org> Date: Tue May 20 17:56:25 2014 -0700 libpayload: video: Check for 'console' pointer before dereferencing it Seems that the 'if (cursor_enabled)' check in video_console_fixup_cursor() that was removed in chromium.org 1f880bca0 really meant to check for 'if (console)'. Looks like the whole video console driver is built extra robust to not fail no matter how screwed up the console is, so let's add this missing check here as well. Also fixed up a few other missing 'if (!console)' checks while I'm at it. However, what payloads should really be doing is check the return value of video_(console_)init() and not call the other video functions if that failed. This also adapts video_console_init() to correctly pass through the return value for that purpose (something that seems to have been overlooked in the dd9e4e58 refactoring). BUG=chrome-os-partner:28494 TEST=None. I don't know what Dave did to trigger this in the first place, but it's pretty straight-forward. Original-Change-Id: I1b9f09d49dc70dacf20621b19e081c754d4814f7 Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/200688 Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit 3f01d1dc0974774f0b3ba5fc4e069978f266f2fc) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I98c1d8360539b457e6df07cbcf799acaf6c4631b Reviewed-on: http://review.coreboot.org/7910 Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/7910 for details. -gerrit

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Patch set updated for coreboot: a384e59 libpayload: Fix libpayload build compilation warnings
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7909 -gerrit commit a384e594f0761e6e5ea07bac331392c440f34f29 Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Thu May 15 14:06:29 2014 -0700 libpayload: Fix libpayload build compilation warnings When emerging libpayload a warning is generated about selfboot() being defined without a prior prototype. Add cbfs.h when CBFS use if compiled fixes the warning. BUG=none TEST=build rambi storm nyan_big verify that there is no compilation warnings thrown any more Original-Change-Id: Ic9cb5571f708bb006a0d477e451fd1f3b3eb833f Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/200099 Original-Reviewed-by: Hung-Te Lin <hungte(a)chromium.org> (cherry picked from commit 7e4aa17936b70dd08f58b3a55c6db55ea03709d7) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Ie3baaaca82fb6ec432860c638acb2a3ef9451469 --- payloads/libpayload/include/libpayload.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/payloads/libpayload/include/libpayload.h b/payloads/libpayload/include/libpayload.h index 824e96e..1d4d0da 100644 --- a/payloads/libpayload/include/libpayload.h +++ b/payloads/libpayload/include/libpayload.h @@ -60,6 +60,9 @@ #ifdef CONFIG_LP_LAR #include <lar.h> #endif +#ifdef CONFIG_LP_CBFS +#include <cbfs.h> +#endif #define MIN(a,b) ((a) < (b) ? (a) : (b)) #define MAX(a,b) ((a) > (b) ? (a) : (b))

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Patch set updated for coreboot: 6f8bc78 Fix libpayload build compilation warnings
by Marc Jones 30 Dec '14

30 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7909 -gerrit commit 6f8bc785543af06b7c9e8726171d41e14dc572ec Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Thu May 15 14:06:29 2014 -0700 Fix libpayload build compilation warnings When emerging libpayload a warning is generated about selfboot() being defined without a prior prototype. Addinf cbfs.h when CBFS use if compiled fixes the warning. BUG=none TEST=build rambi storm nyan_big verify that there is no compilation warnings thrown any more Original-Change-Id: Ic9cb5571f708bb006a0d477e451fd1f3b3eb833f Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/200099 Original-Reviewed-by: Hung-Te Lin <hungte(a)chromium.org> (cherry picked from commit 7e4aa17936b70dd08f58b3a55c6db55ea03709d7) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Ie3baaaca82fb6ec432860c638acb2a3ef9451469 --- payloads/libpayload/include/libpayload.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/payloads/libpayload/include/libpayload.h b/payloads/libpayload/include/libpayload.h index 824e96e..1d4d0da 100644 --- a/payloads/libpayload/include/libpayload.h +++ b/payloads/libpayload/include/libpayload.h @@ -60,6 +60,9 @@ #ifdef CONFIG_LP_LAR #include <lar.h> #endif +#ifdef CONFIG_LP_CBFS +#include <cbfs.h> +#endif #define MIN(a,b) ((a) < (b) ? (a) : (b)) #define MAX(a,b) ((a) > (b) ? (a) : (b))

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coreboot-gerrit December 2014