the following patch was just integrated into master:
commit 3cf6aea871e4b5929959124356a7775ff21d65ac
Author: Furquan Shaikh <furquan(a)google.com>
Date: Thu Oct 30 11:53:38 2014 -0700
x86: Update the check for Forbidden global variables
Add a section .illegal_globals to romstage and check that the section does not
contain any variables while creating romstage.
[pg: Handle individual AGESA special cases in the
linker script instead of whitelisting everything
remotely AGESA related in the Makefile.]
Change-Id: I866681f51a44bc21770d32995c281b556a90c153
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
Reviewed-on: http://review.coreboot.org/7306
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/7306 for details.
-gerrit
the following patch was just integrated into master:
commit c3d49984f6fadbc82bc607851e3236191fe551fd
Author: Ronald G. Minnich <rminnich(a)gmail.com>
Date: Thu Dec 4 19:24:20 2014 +0000
RISCV: one last little nit to make it build and run
Change-Id: I6e9e1dff09c08079774f7d6e60e67a12760d37b4
Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com>
Reviewed-on: http://review.coreboot.org/7645
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/7645 for details.
-gerrit
the following patch was just integrated into master:
commit b1163f8bbcabb965f0769d471fcaba646af82c8a
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Fri Dec 5 04:52:52 2014 +1100
vendorcode/amd/agesa/f15tn: Trim out ASCII art in GnbIommuScratch.c
TL;DR ASCII art that sucks, remove it.
Change-Id: I424736b040fe019bba6155de76903225a266760d
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7641
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
See http://review.coreboot.org/7641 for details.
-gerrit
the following patch was just integrated into master:
commit db92eaa252bbafdeee3db38354985a0ccf51f4b1
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Fri Dec 5 05:32:35 2014 +1100
lenovo/g505s: Kconfig: Remove unused PIRQ legacy bits
Since this board does not provide a PIRQ table.
Change-Id: I1068dd99c4cecdd2113484fe24ae2bb86a058cb3
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7644
Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/7644 for details.
-gerrit
Martin Roth (gaumless(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7648
-gerrit
commit 304957de0258affe5ca5429c5d336efd1af8f34b
Author: Martin Roth <martin.roth(a)se-eng.com>
Date: Thu Dec 4 20:44:55 2014 -0700
fsp_baytrail: Kconfig update for Gold 3 FSP
The documentation for the FSP gives the name as BAYTRAIL_FSP.fd instead
of the old FvFsp.bin.
Change-Id: I69c7c5ff49afd6552612cf50c9ca9b30cfb003e2
Signed-off-by: Martin Roth <martin.roth(a)se-eng.com>
---
src/soc/intel/fsp_baytrail/fsp/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/intel/fsp_baytrail/fsp/Kconfig b/src/soc/intel/fsp_baytrail/fsp/Kconfig
index 73800d6..cbe3a95 100644
--- a/src/soc/intel/fsp_baytrail/fsp/Kconfig
+++ b/src/soc/intel/fsp_baytrail/fsp/Kconfig
@@ -25,7 +25,7 @@ config BAYTRAIL_FSP_SPECIFIC_OPTIONS
config FSP_FILE
string
- default "../intel/fsp/baytrail/FvFsp.bin"
+ default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd"
help
The path and filename of the Intel FSP binary for this platform.