coreboot-gerrit December 2014

coreboot-gerrit@coreboot.org

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1346 discussions

New patch to review for coreboot: 3ceb52e aarch64: Fix 64-bit pointer related casts
by Marc Jones 05 Dec '14

05 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7660 -gerrit commit 3ceb52e52511a0739cadca0ab8eacc5f2ead3cf1 Author: Marcelo Povoa <marcelogp(a)chromium.org> Date: Thu Feb 6 15:17:40 2014 -0800 aarch64: Fix 64-bit pointer related casts BUG=None BRANCH=none TEST=Ran image in foundation model Signed-off-by: Marcelo Povoa <marcelogp(a)chromium.org> Original-Change-Id: I80a92673c163b3df312ce632eb52e5bb1e7ab1db Original-Reviewed-on: https://chromium-review.googlesource.com/185273 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Marcelo Póvoa <marcelogp(a)chromium.org> Original-Tested-by: Marcelo Póvoa <marcelogp(a)chromium.org> (cherry picked from commit e2f19689acb973aedee6e4b324ed27b64f2d47de) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Icc3fc82779d18963f0fe8d5fb655f96027164a18 --- src/lib/cbfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 9ee2b46..9e9f4a7 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -85,9 +85,9 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) if (stage == NULL) return (void *) -1; - LOG("loading stage %s @ 0x%x (%d bytes), entry @ 0x%llx\n", + LOG("loading stage %s @ 0x%llx (%d bytes), entry @ 0x%llx\n", name, - (uint32_t) stage->load, stage->memlen, + stage->load, stage->memlen, stage->entry); final_size = cbfs_decompress(stage->compression,

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New patch to review for coreboot: 99abc22 aarch64: Add ELF support
by Marc Jones 05 Dec '14

05 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7659 -gerrit commit 99abc229c9a87e31c7abe11dcda0f2cce9006e84 Author: Marcelo Povoa <marcelogp(a)chromium.org> Date: Thu Feb 6 15:17:33 2014 -0800 aarch64: Add ELF support BUG=None BRANCH=none TEST=Build coreboot Signed-off-by: Marcelo Povoa <marcelogp(a)chromium.org> Original-Change-Id: I38684794fdf5bd95a32f157128434a13f5e2a2d5 Original-Reviewed-on: https://chromium-review.googlesource.com/185271 Original-Reviewed-by: Stefan Reinauer <reinauer(a)chromium.org> Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Original-Tested-by: Marcelo Póvoa <marcelogp(a)chromium.org> Original-Commit-Queue: Marcelo Póvoa <marcelogp(a)chromium.org> (cherry picked from commit 67b74d3dc98a773c3d82b141af178b13e9bb6c06) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Id82a31dc94bb181f2d24eddcbfbfb6d6cdc99643 --- util/cbfstool/elf.h | 2 ++ util/cbfstool/elfheaders.c | 1 + 2 files changed, 3 insertions(+) diff --git a/util/cbfstool/elf.h b/util/cbfstool/elf.h index 8b56a71..c48589b 100644 --- a/util/cbfstool/elf.h +++ b/util/cbfstool/elf.h @@ -245,6 +245,8 @@ typedef struct #define EM_NUM 95 #define EM_AARCH64 183 /* ARM AARCH64 */ +#define EM_AARCH64 183 /* ARM Aarch64 Architecture */ + /* If it is necessary to assign new unofficial EM_* values, please pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision with official or non-GNU unofficial values. */ diff --git a/util/cbfstool/elfheaders.c b/util/cbfstool/elfheaders.c index 634e76a..bee44d8 100644 --- a/util/cbfstool/elfheaders.c +++ b/util/cbfstool/elfheaders.c @@ -610,6 +610,7 @@ elf_headers(const struct buffer *pinput, // The tool may work in architecture-independent way. if (arch != CBFS_ARCHITECTURE_UNKNOWN && + !((ehdr->e_machine == EM_AARCH64) && (arch == CBFS_ARCHITECTURE_AARCH64)) && !((ehdr->e_machine == EM_ARM) && (arch == CBFS_ARCHITECTURE_ARM)) && !((ehdr->e_machine == EM_RISCV) && (arch == CBFS_ARCHITECTURE_RISCV)) && !((ehdr->e_machine == EM_386) && (arch == CBFS_ARCHITECTURE_X86))) {

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Patch merged into coreboot/master: 59bff09 fsp_baytrail: Update function disable code
by gerrit＠coreboot.org 05 Dec '14

05 Dec '14

the following patch was just integrated into master: commit 59bff09f301fe3544cc70aafaf666cae40fa3257 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Fri Dec 5 09:24:53 2014 -0700 fsp_baytrail: Update function disable code - The EDS has the function disable bit for eMMC incorrectly listed as 8. Changing it back to the correct bit 11. - The FSP will disable functions that it is told are disabled, so coreboot code that disables the functions is redundant. Removing it. Change-Id: I95c31d92d3af5182ddf7fd47f651bbb61cdedb82 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/7653 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/7653 for details. -gerrit

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Patch merged into coreboot/master: 1df7064 minnowmax board: Update Kconfig
by gerrit＠coreboot.org 05 Dec '14

05 Dec '14

the following patch was just integrated into master: commit 1df7064e0dabfe41fe4fd87789f24b703d07b2c8 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Thu Dec 4 20:46:55 2014 -0700 minnowmax board: Update Kconfig - The ROM chip is 8MB, not 4MB. - Default to the 2GB SKU instead of 1GB - that's what's out right now. - Set CBFS size to 3MB - that's what the firmware descriptor is set to. Change-Id: Ic77f5c1e898dca39de573623707ff5f5e5ca9682 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/7649 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/7649 for details. -gerrit

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Patch merged into coreboot/master: bc78fcf fsp_baytrail: Kconfig update for Gold 3 FSP
by gerrit＠coreboot.org 05 Dec '14

05 Dec '14

the following patch was just integrated into master: commit bc78fcf99dfe573c77ea9f400bbdfe770e706f12 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Thu Dec 4 20:44:55 2014 -0700 fsp_baytrail: Kconfig update for Gold 3 FSP The documentation for the FSP gives the name as BAYTRAIL_FSP.fd instead of the old FvFsp.bin. Change-Id: I69c7c5ff49afd6552612cf50c9ca9b30cfb003e2 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/7648 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/7648 for details. -gerrit

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Patch merged into coreboot/master: bb27316 fsp_baytrail: Update microcode for Gold 3 FSP release
by gerrit＠coreboot.org 05 Dec '14

05 Dec '14

the following patch was just integrated into master: commit bb273162641f20efaa9e019ff9404f726439a431 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Thu Dec 4 18:12:20 2014 -0700 fsp_baytrail: Update microcode for Gold 3 FSP release New microcode for Bay Trail I B2/B3 and D0 parts was released in the Gold 3 Bay Trail FSP release. Change the microcode size to an area instead of the exact size of the patches. This will hopefully reduce updates to the microcode size. Change-Id: I58b4c57a4bb0e478ffd28bd74a5de6bb61540dfe Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/7647 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/7647 for details. -gerrit

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Patch merged into coreboot/master: e10108a FSP platform microcode: Update to remove Kconfig variable
by gerrit＠coreboot.org 05 Dec '14

05 Dec '14

the following patch was just integrated into master: commit e10108a6691c804f4b917be9a25bc8af3d7cc6a1 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Thu Dec 4 18:06:36 2014 -0700 FSP platform microcode: Update to remove Kconfig variable Move the Kconfig variable into a .h file - this does not need to be in Kconfig. Change-Id: I1db20790ddb32e0eb082503c6c60cbbefa818bb9 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/7646 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/7646 for details. -gerrit

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New patch to review for coreboot: a95eea2 ARM: API to Map Physical Address to Wipe Memory above 4GB
by Marc Jones 05 Dec '14

05 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7658 -gerrit commit a95eea29cdb4e3e5940549721394b1fac312e0de Author: Daisuke Nojiri <dnojiri(a)chromium.org> Date: Wed Mar 5 15:46:28 2014 -0800 ARM: API to Map Physical Address to Wipe Memory above 4GB TEST=Booted nyan in normal and recovery mode. Created a map, filled it with some chars, then verified they can be read from the pointer returned. BUG=chrome-os-partner:25587 BRANCH=None Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> Tested-by: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Change-Id: Id1f1be4f6d2d5734d87bf3452d4806d0fe3fda88 Original-Reviewed-on: https://chromium-review.googlesource.com/188894 Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri(a)chromium.org> (cherry picked from commit 7fda3885f51c8d383585a80e99ab3df9c789d872) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I6255d11396c87f40b0ae12ceab0fd152f2478529 --- payloads/libpayload/arch/arm/virtual.c | 117 ++++++++++++++++++++++++- payloads/libpayload/include/arm/arch/cache.h | 9 ++ payloads/libpayload/include/arm/arch/virtual.h | 5 ++ payloads/libpayload/include/stddef.h | 4 + payloads/libpayload/include/stdlib.h | 5 ++ 5 files changed, 139 insertions(+), 1 deletion(-) diff --git a/payloads/libpayload/arch/arm/virtual.c b/payloads/libpayload/arch/arm/virtual.c index 59768db..0d53e50 100644 --- a/payloads/libpayload/arch/arm/virtual.c +++ b/payloads/libpayload/arch/arm/virtual.c @@ -27,12 +27,127 @@ * SUCH DAMAGE. */ +#include <assert.h> +#include <die.h> +#include <stdlib.h> #include <unistd.h> +#include <arch/cache.h> +#include <arch/virtual.h> +#include <arch/io.h> unsigned long virtual_offset = 0; +extern char _end[]; +/* + * MAIR Index + * (Originally defined in src/arch/arm/include/armv7/arch/cache.h) + */ +#define MAIR_INDX_NC 0 +#define MAIR_INDX_WT 1 +#define MAIR_INDX_WB 2 + +/* + * Translation Table Attribute + * (Originally defined in src/arch/arm/include/armv7/arch/cache.h) + */ +#define ATTR_BASE (\ + 0ULL << 54 | /* PN. 0:Not restricted */ \ + 0ULL << 53 | /* PXN. 0:Not restricted */ \ + 1 << 10 | /* AF. 1:Accessed. This is to prevent access \ + * fault when accessed for the first time */ \ + 0 << 6 | /* AP[2:1]. 0b00:full access from PL1 */ \ + 0 << 5 | /* NS. 0:Output address is in Secure space */ \ + 0 << 1 | /* block/table. 0:block entry */ \ + 1 << 0 /* validity. 1:valid */ \ + ) +#define ATTR_NC (ATTR_BASE | (MAIR_INDX_NC << 2)) +#define ATTR_WT (ATTR_BASE | (MAIR_INDX_WT << 2)) +#define ATTR_WB (ATTR_BASE | (MAIR_INDX_WB << 2)) + +/* Translation Table Entry */ +typedef uint64_t pmd_t; +typedef uint64_t pgd_t; + +#define SECTION_SHIFT 30 +#define BLOCK_SHIFT 21 +#define PAGE_SHIFT 12 +#define PGD_MASK (~0 << PAGE_SHIFT) + +static pmd_t *ttb_buff = 0; +static uintptr_t work_block; +static pmd_t original_map; int getpagesize(void) { - return 4096; + return 1 << PAGE_SHIFT; +} + +static void lpae_map_init(void) +{ + pgd_t *pgd; + + die_if(!(read_ttbcr() >> 31), "LPAE is not enabled\n"); + + /* get work block address */ + work_block = ALIGN_UP((uintptr_t)_end, 2*MiB); + assert(work_block); + printf("Work block for LPAE mapping is @ 0x%p\n", (void *)work_block); + + /* get the address of the 1st pmd from pgd[0] */ + pgd = (pgd_t *)((uintptr_t)read_ttbr0() & PGD_MASK); + ttb_buff = (pmd_t *)((uintptr_t)pgd[0] & PGD_MASK); + assert(ttb_buff); + + original_map = ttb_buff[work_block >> BLOCK_SHIFT]; +} + +static void lpae_flush_work_block(void) +{ + dccmvac((uintptr_t)&ttb_buff[work_block >> BLOCK_SHIFT]); + dsb(); + tlbimvaa(work_block); + dsb(); + isb(); +} + +/** + * Maps a 2MB designated block to a requested physical address, and returns + * the address to the block or NULL on error. + * + * pa_mb: Physical address in MB. Has to be on a 2MB boundary. + * policy: Data chache policy + */ +void *lpae_map_phys_addr(unsigned long pa_mb, enum dcache_policy policy) +{ + pmd_t attr; + + if (!ttb_buff) + lpae_map_init(); + + switch(policy) { + case DCACHE_OFF: + attr = ATTR_NC; + break; + case DCACHE_WRITEBACK: + attr = ATTR_WB; + break; + case DCACHE_WRITETHROUGH: + attr = ATTR_WT; + break; + default: + return NULL; + } + + ttb_buff[work_block >> BLOCK_SHIFT] = + ((pmd_t)pa_mb/2 << BLOCK_SHIFT) | attr; + + lpae_flush_work_block(); + + return (void *)work_block; +} + +void lpae_restore_map(void) +{ + ttb_buff[work_block >> BLOCK_SHIFT] = original_map; + lpae_flush_work_block(); } diff --git a/payloads/libpayload/include/arm/arch/cache.h b/payloads/libpayload/include/arm/arch/cache.h index 470eb55..647ec42 100644 --- a/payloads/libpayload/include/arm/arch/cache.h +++ b/payloads/libpayload/include/arm/arch/cache.h @@ -117,6 +117,15 @@ static inline void write_ttbr0(uint32_t val) asm volatile ("mcr p15, 0, %0, c2, c0, 0" : : "r" (val) : "memory"); } +/* read translation table base register 0 (TTBR0) */ +static inline uint64_t read_ttbr0(void) +{ + uint32_t low, high; + asm volatile ("mrrc p15, 0, %[low], %[high], c2" : + [low] "=r" (low), [high] "=r" (high)); + return ((uint64_t)high << 32) | low; +} + /* read translation table base control register (TTBCR) */ static inline uint32_t read_ttbcr(void) { diff --git a/payloads/libpayload/include/arm/arch/virtual.h b/payloads/libpayload/include/arm/arch/virtual.h index 328c3aa..e51530d 100644 --- a/payloads/libpayload/include/arm/arch/virtual.h +++ b/payloads/libpayload/include/arm/arch/virtual.h @@ -30,6 +30,8 @@ #ifndef _ARCH_VIRTUAL_H #define _ARCH_VIRTUAL_H +#include <arch/cache.h> + extern unsigned long virtual_offset; #define virt_to_phys(virt) ((unsigned long) (virt) + virtual_offset) @@ -38,4 +40,7 @@ extern unsigned long virtual_offset; #define virt_to_bus(addr) virt_to_phys(addr) #define bus_to_virt(addr) phys_to_virt(addr) +void *lpae_map_phys_addr(unsigned long pa_mb, enum dcache_policy policy); +void lpae_restore_map(void); + #endif diff --git a/payloads/libpayload/include/stddef.h b/payloads/libpayload/include/stddef.h index f9deaeb..fca66ed 100644 --- a/payloads/libpayload/include/stddef.h +++ b/payloads/libpayload/include/stddef.h @@ -15,3 +15,7 @@ typedef __SIZE_TYPE__ ssize_t; #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *) 0)->MEMBER) +/* Standard units. */ +#define KiB (1<<10) +#define MiB (1<<20) +#define GiB (1<<30) diff --git a/payloads/libpayload/include/stdlib.h b/payloads/libpayload/include/stdlib.h index 7113b6f..91d854e 100644 --- a/payloads/libpayload/include/stdlib.h +++ b/payloads/libpayload/include/stdlib.h @@ -35,6 +35,11 @@ #include <stddef.h> #include <string.h> +#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1UL) +#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) +#define ALIGN_UP(x,a) ALIGN((x),(a)) +#define ALIGN_DOWN(x,a) ((x) & ~((typeof(x))(a)-1UL)) + /** * @defgroup malloc Memory allocation functions * @{

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New patch to review for coreboot: a10ae8b libpayload: ARM: Keep track of the CPSR when exceptions happen.
by Marc Jones 05 Dec '14

05 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7657 -gerrit commit a10ae8bbfad9ca33ee4e3e60433f93806954fa3b Author: Gabe Black <gabeblack(a)google.com> Date: Mon Dec 16 04:07:50 2013 -0800 libpayload: ARM: Keep track of the CPSR when exceptions happen. Use the SPSR to extract and inject CPSR values when an exception happens and pass that information to exception hooks. The register structure GDB expects when using its remote protocol has a spot for the CPSR. BUG=None TEST=Built and booted on link, nyan. BRANCH=None Original-Change-Id: Id950fb09d72fb0f81e4eef2489c0849ce5dd8aca Original-Signed-off-by: Gabe Black <gabeblack(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/180253 Original-Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Original-Tested-by: Gabe Black <gabeblack(a)chromium.org> Original-Commit-Queue: Gabe Black <gabeblack(a)chromium.org> (cherry picked from commit 8e7014f24a580f84c91fa7b0369dfa922918adcc) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I49357fb6a65edeff7a9a48d54254308a6b0efdb7 --- payloads/libpayload/arch/arm/exception.c | 7 ++++--- payloads/libpayload/arch/arm/exception_asm.S | 4 ++++ payloads/libpayload/include/arm/arch/exception.h | 1 + 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/payloads/libpayload/arch/arm/exception.c b/payloads/libpayload/arch/arm/exception.c index f0ce0ea..45b77a7 100644 --- a/payloads/libpayload/arch/arm/exception.c +++ b/payloads/libpayload/arch/arm/exception.c @@ -66,7 +66,7 @@ static void dump_stack(uintptr_t addr, size_t bytes) } } -static void print_regs(uint32_t *regs) +static void print_regs(struct exception_state *state) { int i; @@ -81,8 +81,9 @@ static void print_regs(uint32_t *regs) printf("IP"); else printf("R%d", i); - printf(" = 0x%08x\n", regs[i]); + printf(" = 0x%08x\n", state->regs[i]); } + printf("CPSR = 0x%08x\n", state->cpsr); } void exception_dispatch(struct exception_state *state, int idx); @@ -102,7 +103,7 @@ void exception_dispatch(struct exception_state *state, int idx) else printf("exception _not_used.\n"); } - print_regs(state->regs); + print_regs(state); dump_stack(state->regs[13], 512); halt(); } diff --git a/payloads/libpayload/arch/arm/exception_asm.S b/payloads/libpayload/arch/arm/exception_asm.S index 6a28c5c..974d172 100644 --- a/payloads/libpayload/arch/arm/exception_asm.S +++ b/payloads/libpayload/arch/arm/exception_asm.S @@ -74,9 +74,13 @@ exception_common: stmfd sp, { sp, lr }^ sub sp, sp, $8 push { r0 - r12 } + mrs r0, SPSR + push { r0 } mov r0, sp ldr r1, exception_idx blx exception_dispatch + pop { r0 } + msr SPSR_cxsf, r0 pop { r0 - r12 } add sp, sp, $8 ldmfd sp!, { pc }^ diff --git a/payloads/libpayload/include/arm/arch/exception.h b/payloads/libpayload/include/arm/arch/exception.h index 13fda57..c6864a5 100644 --- a/payloads/libpayload/include/arm/arch/exception.h +++ b/payloads/libpayload/include/arm/arch/exception.h @@ -36,6 +36,7 @@ void set_vbar(uint32_t vbar); struct exception_state { + uint32_t cpsr; uint32_t regs[16]; } __attribute__((packed));

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New patch to review for coreboot: 0754f5c libpayload: Make it possible to install callbacks for particular exceptions.
by Marc Jones 05 Dec '14

05 Dec '14

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7656 -gerrit commit 0754f5c45bab92f1968028929c1b3683b32eb0ea Author: Gabe Black <gabeblack(a)google.com> Date: Wed Dec 11 00:23:15 2013 -0800 libpayload: Make it possible to install callbacks for particular exceptions. To support a GDB stub, it will be necessary to trap various exceptions which will be used to implement breakpoints, single stepping, etc. BUG=None TEST=Built and booted on Link with hooks installed and saw that they triggered when exceptions occurred. Built and booted on nyan. BRANCH=None Original-Change-Id: Iab659365864a3055159a50b8f6e5c44290d3ba2b Original-Signed-off-by: Gabe Black <gabeblack(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/179602 Original-Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Original-Tested-by: Gabe Black <gabeblack(a)chromium.org> Original-Commit-Queue: Gabe Black <gabeblack(a)chromium.org> (cherry picked from commit 8db0897b1ddad600e247cb4df147c757a8187626) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I5e7f724b99988cd259909dd3bd01166fa52317ec --- payloads/libpayload/arch/arm/exception.c | 100 ++++++--------- payloads/libpayload/arch/arm/exception_asm.S | 32 ++--- payloads/libpayload/arch/arm/main.c | 2 +- payloads/libpayload/arch/x86/exception.c | 152 +++++++++++------------ payloads/libpayload/arch/x86/exception_asm.S | 13 +- payloads/libpayload/include/arm/arch/exception.h | 16 ++- payloads/libpayload/include/exception.h | 5 +- payloads/libpayload/include/x86/arch/exception.h | 81 ++++++++++++ 8 files changed, 238 insertions(+), 163 deletions(-) diff --git a/payloads/libpayload/arch/arm/exception.c b/payloads/libpayload/arch/arm/exception.c index 099d2a4..f0ce0ea 100644 --- a/payloads/libpayload/arch/arm/exception.c +++ b/payloads/libpayload/arch/arm/exception.c @@ -29,19 +29,27 @@ #include <arch/cache.h> #include <arch/exception.h> +#include <exception.h> #include <libpayload.h> #include <stdint.h> -uint8_t exception_stack[0x100] __attribute__((aligned(8))); +uint8_t exception_stack[0x1000] __attribute__((aligned(8))); extern void *exception_stack_end; -void exception_undefined_instruction(uint32_t *); -void exception_software_interrupt(uint32_t *); -void exception_prefetch_abort(uint32_t *); -void exception_data_abort(uint32_t *); -void exception_not_used(uint32_t *); -void exception_irq(uint32_t *); -void exception_fiq(uint32_t *); +struct exception_handler_info +{ + const char *name; + exception_hook hook; +}; + +static struct exception_handler_info exceptions[EXC_COUNT] = { + [EXC_UNDEF] = { "_undefined_instruction" }, + [EXC_SWI] = { "_software_interrupt" }, + [EXC_PABORT] = { "_prefetch_abort" }, + [EXC_DABORT] = { "_data_abort" }, + [EXC_IRQ] = { "_irq" }, + [EXC_FIQ] = { "_fiq" }, +}; static void dump_stack(uintptr_t addr, size_t bytes) { @@ -77,59 +85,25 @@ static void print_regs(uint32_t *regs) } } -void exception_undefined_instruction(uint32_t *regs) -{ - printf("exception _undefined_instruction\n"); - print_regs(regs); - dump_stack(regs[13], 512); - halt(); -} - -void exception_software_interrupt(uint32_t *regs) -{ - printf("exception _software_interrupt\n"); - print_regs(regs); - dump_stack(regs[13], 512); - halt(); -} - -void exception_prefetch_abort(uint32_t *regs) -{ - printf("exception _prefetch_abort\n"); - print_regs(regs); - dump_stack(regs[13], 512); - halt(); -} - -void exception_data_abort(uint32_t *regs) -{ - printf("exception _data_abort\n"); - print_regs(regs); - dump_stack(regs[13], 512); - halt(); -} - -void exception_not_used(uint32_t *regs) -{ - printf("exception _not_used\n"); - print_regs(regs); - dump_stack(regs[13], 512); - halt(); -} - -void exception_irq(uint32_t *regs) +void exception_dispatch(struct exception_state *state, int idx); +void exception_dispatch(struct exception_state *state, int idx) { - printf("exception _irq\n"); - print_regs(regs); - dump_stack(regs[13], 512); - halt(); -} - -void exception_fiq(uint32_t *regs) -{ - printf("exception _fiq\n"); - print_regs(regs); - dump_stack(regs[13], 512); + if (idx >= EXC_COUNT) { + printf("Bad exception index %d.\n", idx); + } else { + struct exception_handler_info *info = &exceptions[idx]; + if (info->hook) { + info->hook(idx, state); + return; + } + + if (info->name) + printf("exception %s\n", info->name); + else + printf("exception _not_used.\n"); + } + print_regs(state->regs); + dump_stack(state->regs[13], 512); halt(); } @@ -146,3 +120,9 @@ void exception_init(void) set_vbar((uintptr_t)exception_table); exception_stack_end = exception_stack + sizeof(exception_stack); } + +void exception_install_hook(int type, exception_hook hook) +{ + die_if(type >= EXC_COUNT, "Out of bounds exception index %d.\n", type); + exceptions[type].hook = hook; +} diff --git a/payloads/libpayload/arch/arm/exception_asm.S b/payloads/libpayload/arch/arm/exception_asm.S index 1f369bc..6a28c5c 100644 --- a/payloads/libpayload/arch/arm/exception_asm.S +++ b/payloads/libpayload/arch/arm/exception_asm.S @@ -43,59 +43,51 @@ exception_table: b 8f 1: - ldr sp, _not_used + mov sp, $0 b exception_common 2: - ldr sp, _undefined_instruction + mov sp, $1 b exception_common 3: - ldr sp, _software_interrupt + mov sp, $2 b exception_common 4: - ldr sp, _prefetch_abort + mov sp, $3 b exception_common 5: - ldr sp, _data_abort + mov sp, $4 b exception_common 6: - ldr sp, _not_used + mov sp, $5 b exception_common 7: - ldr sp, _irq + mov sp, $6 b exception_common 8: - ldr sp, _fiq + mov sp, $7 b exception_common exception_common: - str sp, exception_handler + str sp, exception_idx ldr sp, exception_stack_end push { lr } stmfd sp, { sp, lr }^ sub sp, sp, $8 push { r0 - r12 } mov r0, sp - mov lr, pc - ldr pc, exception_handler + ldr r1, exception_idx + blx exception_dispatch pop { r0 - r12 } add sp, sp, $8 ldmfd sp!, { pc }^ .align 2 -_undefined_instruction: .word exception_undefined_instruction -_software_interrupt: .word exception_software_interrupt -_prefetch_abort: .word exception_prefetch_abort -_data_abort: .word exception_data_abort -_not_used: .word exception_not_used -_irq: .word exception_irq -_fiq: .word exception_fiq - .global exception_stack_end exception_stack_end: .word 0 -exception_handler: +exception_idx: .word 0 .thumb diff --git a/payloads/libpayload/arch/arm/main.c b/payloads/libpayload/arch/arm/main.c index 4e7c05d..cff992f 100644 --- a/payloads/libpayload/arch/arm/main.c +++ b/payloads/libpayload/arch/arm/main.c @@ -27,7 +27,7 @@ * SUCH DAMAGE. */ -#include <arch/exception.h> +#include <exception.h> #include <libpayload.h> unsigned int main_argc; /**< The argc value to pass to main() */ diff --git a/payloads/libpayload/arch/x86/exception.c b/payloads/libpayload/arch/x86/exception.c index a9a65ca..33bef71 100644 --- a/payloads/libpayload/arch/x86/exception.c +++ b/payloads/libpayload/arch/x86/exception.c @@ -27,39 +27,27 @@ * SUCH DAMAGE. */ +#include <arch/exception.h> #include <exception.h> #include <libpayload.h> #include <stdint.h> uint8_t exception_stack[0x1000] __attribute__((aligned(8))); extern void *exception_stack_end; +extern struct exception_handler_state *exception_handler_state_handoff; -struct exception_state +struct exception_handler_state { - u32 eax; - u32 ecx; - u32 edx; - u32 ebx; - u32 esp; - u32 ebp; - u32 esi; - u32 edi; - u32 eip; - u32 eflags; - u32 cs; - u32 ss; - u32 ds; - u32 es; - u32 fs; - u32 gs; + struct exception_state regs; u32 error_code; u32 vector; } __attribute__((packed)); -struct exception_info +struct exception_handler_info { const char *name; void (*error_code_printer)(u32 code); + exception_hook hook; }; static void print_segment_error_code(u32 code) @@ -105,34 +93,34 @@ static void print_raw_error_code(u32 code) printf("%#x", code); } -static struct exception_info exceptions[] = { - [0] = { .name = "divide by zero" }, - [1] = { .name = "debug" }, - [2] = { .name = "non-maskable-interrupt" }, - [3] = { .name = "breakpoint" }, - [4] = { .name = "overflow" }, - [5] = { .name = "bound range" }, - [6] = { .name = "invalid opcode" }, - [7] = { .name = "device not available" }, - [8] = { .name = "double fault", - .error_code_printer = &print_raw_error_code }, - [10] = { .name = "invalid tss", - .error_code_printer = &print_segment_error_code }, - [11] = { .name = "segment not present", - .error_code_printer = &print_segment_error_code }, - [12] = { .name = "stack", - .error_code_printer = &print_segment_error_code }, - [13] = { .name = "general protection", - .error_code_printer = &print_segment_error_code }, - [14] = { .name = "page fault", - .error_code_printer = &print_page_fault_error_code }, - [16] = { .name = "x87 floating point" }, - [17] = { .name = "alignment check", - .error_code_printer = &print_raw_error_code }, - [18] = { .name = "machine check" }, - [19] = { .name = "SIMD floating point" }, - [30] = { .name = "security", - .error_code_printer = &print_raw_error_code }, +static struct exception_handler_info exceptions[EXC_COUNT] = { + [EXC_DE] = { .name = "divide by zero" }, + [EXC_DB] = { .name = "debug" }, + [EXC_NMI] = { .name = "non-maskable-interrupt" }, + [EXC_BP] = { .name = "breakpoint" }, + [EXC_OF] = { .name = "overflow" }, + [EXC_BR] = { .name = "bound range" }, + [EXC_UD] = { .name = "invalid opcode" }, + [EXC_NM] = { .name = "device not available" }, + [EXC_DF] = { .name = "double fault", + .error_code_printer = &print_raw_error_code }, + [EXC_TS] = { .name = "invalid tss", + .error_code_printer = &print_segment_error_code }, + [EXC_NP] = { .name = "segment not present", + .error_code_printer = &print_segment_error_code }, + [EXC_SS] = { .name = "stack", + .error_code_printer = &print_segment_error_code }, + [EXC_GP] = { .name = "general protection", + .error_code_printer = &print_segment_error_code }, + [EXC_PF] = { .name = "page fault", + .error_code_printer = &print_page_fault_error_code }, + [EXC_MF] = { .name = "x87 floating point" }, + [EXC_AC] = { .name = "alignment check", + .error_code_printer = &print_raw_error_code }, + [EXC_MC] = { .name = "machine check" }, + [EXC_XF] = { .name = "SIMD floating point" }, + [EXC_SX] = { .name = "security", + .error_code_printer = &print_raw_error_code }, }; static void dump_stack(uintptr_t addr, size_t bytes) @@ -150,16 +138,9 @@ static void dump_stack(uintptr_t addr, size_t bytes) } } -void exception_handler(void); -void exception_handler(void) +static void dump_exception_state(struct exception_handler_state *state, + struct exception_handler_info *info) { - struct exception_state *state = - (void *)((u8 *)exception_stack_end - sizeof(*state)); - - struct exception_info *info = NULL; - if (state->vector < ARRAY_SIZE(exceptions)) - info = &exceptions[state->vector]; - if (info) printf("Exception %d (%s)\n", state->vector, info->name); else @@ -169,31 +150,50 @@ void exception_handler(void) info->error_code_printer(state->error_code); printf("\n"); } - printf("EIP: 0x%08x\n", state->eip); - printf("CS: 0x%04x\n", state->cs); - printf("EFLAGS: 0x%08x\n", state->eflags); - printf("EAX: 0x%08x\n", state->eax); - printf("ECX: 0x%08x\n", state->ecx); - printf("EDX: 0x%08x\n", state->edx); - printf("EBX: 0x%08x\n", state->ebx); - printf("ESP: 0x%08x\n", state->esp); - printf("EBP: 0x%08x\n", state->ebp); - printf("ESI: 0x%08x\n", state->esi); - printf("EDI: 0x%08x\n", state->edi); - printf("DS: 0x%04x\n", state->ds); - printf("ES: 0x%04x\n", state->es); - printf("SS: 0x%04x\n", state->ss); - printf("FS: 0x%04x\n", state->fs); - printf("GS: 0x%04x\n", state->gs); - - dump_stack(state->esp, 512); - - halt(); + printf("EIP: 0x%08x\n", state->regs.eip); + printf("CS: 0x%04x\n", state->regs.cs); + printf("EFLAGS: 0x%08x\n", state->regs.eflags); + printf("EAX: 0x%08x\n", state->regs.eax); + printf("ECX: 0x%08x\n", state->regs.ecx); + printf("EDX: 0x%08x\n", state->regs.edx); + printf("EBX: 0x%08x\n", state->regs.ebx); + printf("ESP: 0x%08x\n", state->regs.esp); + printf("EBP: 0x%08x\n", state->regs.ebp); + printf("ESI: 0x%08x\n", state->regs.esi); + printf("EDI: 0x%08x\n", state->regs.edi); + printf("DS: 0x%04x\n", state->regs.ds); + printf("ES: 0x%04x\n", state->regs.es); + printf("SS: 0x%04x\n", state->regs.ss); + printf("FS: 0x%04x\n", state->regs.fs); + printf("GS: 0x%04x\n", state->regs.gs); +} + +void exception_dispatch(void) +{ + struct exception_handler_state *state = + exception_handler_state_handoff; + + struct exception_handler_info *info = NULL; + if (state->vector < EXC_COUNT) + info = &exceptions[state->vector]; + + if (info && info->hook) { + info->hook(state->vector, &state->regs); + } else { + dump_exception_state(state, info); + dump_stack(state->regs.esp, 512); + halt(); + } } -void exception_init_asm(void); void exception_init(void) { exception_stack_end = exception_stack + sizeof(exception_stack); exception_init_asm(); } + +void exception_install_hook(int type, exception_hook hook) +{ + die_if(type >= EXC_COUNT, "Out of bound exception type %d.\n", type); + exceptions[type].hook = hook; +} diff --git a/payloads/libpayload/arch/x86/exception_asm.S b/payloads/libpayload/arch/x86/exception_asm.S index c56a7a0..de612ba 100644 --- a/payloads/libpayload/arch/x86/exception_asm.S +++ b/payloads/libpayload/arch/x86/exception_asm.S @@ -31,6 +31,9 @@ .global exception_stack_end exception_stack_end: .long 0 + .global exception_handler_state_handoff +exception_handler_state_handoff: + .long 0 /* Some temporary variables which are used while saving exception state. */ vector: @@ -134,11 +137,13 @@ exception_common: pushl old_eax /* - * Call the C exception handler. It will find the exception state on - * the exception stack. Not passing parameters means we don't have to - * worry about what ABI is being used. + * Call the C exception handler. It will find the exception state + * using the exception_handler_state_handoff global pointer. Not + * passing parameters means we don't have to worry about what ABI + * is being used. */ - call exception_handler + mov %esp, exception_handler_state_handoff + call exception_dispatch /* * Restore state from the exception state structure, including any diff --git a/payloads/libpayload/include/arm/arch/exception.h b/payloads/libpayload/include/arm/arch/exception.h index a0d9413..13fda57 100644 --- a/payloads/libpayload/include/arm/arch/exception.h +++ b/payloads/libpayload/include/arm/arch/exception.h @@ -30,9 +30,23 @@ #ifndef _ARCH_EXCEPTION_H #define _ARCH_EXCEPTION_H -#include <exception.h> #include <stdint.h> void set_vbar(uint32_t vbar); +struct exception_state +{ + uint32_t regs[16]; +} __attribute__((packed)); + +enum { + EXC_UNDEF = 1, + EXC_SWI = 2, + EXC_PABORT = 3, + EXC_DABORT = 4, + EXC_IRQ = 6, + EXC_FIQ = 7, + EXC_COUNT +}; + #endif diff --git a/payloads/libpayload/include/exception.h b/payloads/libpayload/include/exception.h index 6d118e7..1d9b832 100644 --- a/payloads/libpayload/include/exception.h +++ b/payloads/libpayload/include/exception.h @@ -30,8 +30,11 @@ #ifndef _EXCEPTION_H #define _EXCEPTION_H -#include <stdint.h> +#include <arch/exception.h> + +typedef void (*exception_hook)(int type, struct exception_state *state); void exception_init(void); +void exception_install_hook(int type, exception_hook hook); #endif diff --git a/payloads/libpayload/include/x86/arch/exception.h b/payloads/libpayload/include/x86/arch/exception.h new file mode 100644 index 0000000..82f2ca0 --- /dev/null +++ b/payloads/libpayload/include/x86/arch/exception.h @@ -0,0 +1,81 @@ +/* + * This file is part of the libpayload project. + * + * Copyright 2013 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _ARCH_EXCEPTION_H +#define _ARCH_EXCEPTION_H + +#include <stdint.h> + +void exception_dispatch(void); +void exception_init_asm(void); + +struct exception_state +{ + uint32_t eax; + uint32_t ecx; + uint32_t edx; + uint32_t ebx; + uint32_t esp; + uint32_t ebp; + uint32_t esi; + uint32_t edi; + uint32_t eip; + uint32_t eflags; + uint32_t cs; + uint32_t ss; + uint32_t ds; + uint32_t es; + uint32_t fs; + uint32_t gs; +} __attribute__((packed)); + +enum { + EXC_DE = 0, /* Divide by zero */ + EXC_DB = 1, /* Debug */ + EXC_NMI = 2, /* Non maskable interrupt */ + EXC_BP = 3, /* Breakpoint */ + EXC_OF = 4, /* Overflow */ + EXC_BR = 5, /* Bound range */ + EXC_UD = 6, /* Invalid opcode */ + EXC_NM = 7, /* Device not available */ + EXC_DF = 8, /* Double fault */ + EXC_TS = 10, /* Invalid TSS */ + EXC_NP = 11, /* Segment not present */ + EXC_SS = 12, /* Stack */ + EXC_GP = 13, /* General protection */ + EXC_PF = 14, /* Page fault */ + EXC_MF = 16, /* x87 floating point */ + EXC_AC = 17, /* Alignment check */ + EXC_MC = 18, /* Machine check */ + EXC_XF = 19, /* SIMD floating point */ + EXC_SX = 30, /* Security */ + EXC_COUNT +}; + +#endif

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coreboot-gerrit December 2014