coreboot-gerrit December 2014

coreboot-gerrit@coreboot.org

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1346 discussions

Patch set updated for coreboot: 6e33e20 TEST clang warn as error
by Edward O'Callaghan 07 Dec '14

07 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7672 -gerrit commit 6e33e20293e7a29605f36d0cf4786972982e8e95 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Dec 7 02:46:07 2014 +1100 TEST clang warn as error Change-Id: Iac4efa59f63437fd6c7678368f4c62ba005d2103 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- Makefile | 2 +- src/Kconfig | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index eaba3e4..5a7e687 100644 --- a/Makefile +++ b/Makefile @@ -117,7 +117,7 @@ ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) # FIXME: armv7/aarch64 won't build right now # NOTE: clang puts compiler-rt under lib/linux/libclang_rt.builtins-i386.a # this means the triple is i386-linux-elf instead of i386-none-elf -CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 +CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 -Wno-unused-variable -Wno-unused-function CC_x86_32:=clang HOSTCC := clang diff --git a/src/Kconfig b/src/Kconfig index 533bc5c..7f033a2 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1131,8 +1131,7 @@ config ENABLE_APIC_EXT_ID # the whole treee. config WARNINGS_ARE_ERRORS bool - default y if !COMPILER_LLVM_CLANG - default n if COMPILER_LLVM_CLANG + default y # The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE, # POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are

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Patch set updated for coreboot: 4298f7f northbridge/amd/gx2, lx: Treat MSR constant as unsigned long
by Edward O'Callaghan 07 Dec '14

07 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7673 -gerrit commit 4298f7f180dd0d43555c92d4c89ab5df26d92ad4 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Dec 7 03:03:08 2014 +1100 northbridge/amd/gx2,lx: Treat MSR constant as unsigned long Change-Id: I3e1c57334077feb50004d7b39abff4bd84ca095b Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/northbridge/amd/gx2/northbridgeinit.c | 2 +- src/northbridge/amd/lx/northbridgeinit.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index 136dcf2..0cb7803 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -548,7 +548,7 @@ static void rom_shadow_settings(void) * SYSRC(7:0) = 00h ; writeback, can set to 08h to make writethrough */ #define SYSMEM_RCONF_WRITETHROUGH 8 -#define DEVRC_RCONF_DEFAULT 0x21 +#define DEVRC_RCONF_DEFAULT 0x21ul #define ROMBASE_RCONF_DEFAULT 0xFFFC0000 #define ROMRC_RCONF_DEFAULT 0x25 diff --git a/src/northbridge/amd/lx/northbridgeinit.c b/src/northbridge/amd/lx/northbridgeinit.c index 82b3f48..b4e1d4a 100644 --- a/src/northbridge/amd/lx/northbridgeinit.c +++ b/src/northbridge/amd/lx/northbridgeinit.c @@ -602,7 +602,7 @@ static void rom_shadow_settings(void) * ***************************************************************************/ #define SYSMEM_RCONF_WRITETHROUGH 8 -#define DEVRC_RCONF_DEFAULT 0x21 +#define DEVRC_RCONF_DEFAULT 0x21ul #define ROMBASE_RCONF_DEFAULT 0xFFFC0000 #define ROMRC_RCONF_DEFAULT 0x25

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Patch set updated for coreboot: 9ba82fe amd/agesa/f16kb/Lib/amdlib.c: Integer overflow in loop construct
by Edward O'Callaghan 07 Dec '14

07 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7676 -gerrit commit 9ba82fe6c6dbc2f28cc1f043ecbddfd33cd7d013 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Dec 7 05:20:14 2014 +1100 amd/agesa/f16kb/Lib/amdlib.c: Integer overflow in loop construct As is the case in commit: 3312ed7 amd/agesa/f1?/Lib/amdlib.c: Integer overflow in loop construct The semantics of this loop relies on an integer overflow in Index >=0 that implies a return value of (UINT8)-1 which around wraps to 0xFF, or VOLT_UNSUPPORTED. Change-Id: Iced3eff3ae7b8935db3bdd6147372cf3b540883c Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c index d0e66b9..3a7ada8 100644 --- a/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c +++ b/src/vendorcode/amd/agesa/f16kb/Lib/amdlib.c @@ -360,11 +360,11 @@ LibAmdBitScanReverse ( IN UINT32 value ) { - UINTN Index; + UINT8 Index; for (Index = 31; Index >= 0; Index--){ - if (value & (1 << Index)) break; + if (value & (1 << Index)) return Index; } - return (UINT8) Index; + return 0xFF; } VOID LibAmdMsrRead (

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Patch set updated for coreboot: 1cd951b vendorcode/amd/agesa/f1{5, 5tn, 6kb}: Silence empty loop warn
by Edward O'Callaghan 07 Dec '14

07 Dec '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7688 -gerrit commit 1cd951bfc6dd6042e187b6b8f28beaa6eba4eb9c Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Mon Dec 8 01:00:43 2014 +1100 vendorcode/amd/agesa/f1{5,5tn,6kb}: Silence empty loop warn Add decorations to specify that empty loop is intended so. Change-Id: Ia3e40d341eca5e26da3832edc733cf1ccc96c136 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Found-by: Clang --- src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 3 ++- src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 3 ++- src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c index 20ba2a5..2e8c5a4 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c +++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c @@ -507,7 +507,8 @@ MemFGetPCI ( UINT8 Die; // Find NBBlock that associates with node NodeID - for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++); + for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++) + ; ASSERT (Die < MAX_NODES_SUPPORTED); // Get the northbridge pointer for the targeted node. diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c index 20ba2a5..2e8c5a4 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c @@ -507,7 +507,8 @@ MemFGetPCI ( UINT8 Die; // Find NBBlock that associates with node NodeID - for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++); + for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++) + ; ASSERT (Die < MAX_NODES_SUPPORTED); // Get the northbridge pointer for the targeted node. diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c index 6bd8521..bfefb9a 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c @@ -507,7 +507,8 @@ MemFGetPCI ( UINT8 Die; // Find NBBlock that associates with node NodeID - for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++); + for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++) + ; ASSERT (Die < MAX_NODES_SUPPORTED); // Get the northbridge pointer for the targeted node.

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Patch merged into coreboot/master: 0fa7ac7 vx800/vga.c: Remove extraneous parentheses.
by gerrit＠coreboot.org 07 Dec '14

07 Dec '14

the following patch was just integrated into master: commit 0fa7ac76bdc015cc035b48da0a31ac537b53360c Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Dec 7 13:03:16 2014 +0100 vx800/vga.c: Remove extraneous parentheses. Change-Id: Ic81b5f66871ec78c72f2adc5723f22fa94a672e8 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/7682 Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/7682 for details. -gerrit

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Patch set updated for coreboot: fecac15 TEST clang warn as error
by Vladimir Serbinenko 07 Dec '14

07 Dec '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7672 -gerrit commit fecac1515cd89d86379de50e97e7cac56deb615b Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Dec 7 02:46:07 2014 +1100 TEST clang warn as error Change-Id: Iac4efa59f63437fd6c7678368f4c62ba005d2103 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- Makefile | 2 +- src/Kconfig | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index eaba3e4..5a7e687 100644 --- a/Makefile +++ b/Makefile @@ -117,7 +117,7 @@ ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) # FIXME: armv7/aarch64 won't build right now # NOTE: clang puts compiler-rt under lib/linux/libclang_rt.builtins-i386.a # this means the triple is i386-linux-elf instead of i386-none-elf -CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 +CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 -Wno-unused-variable -Wno-unused-function CC_x86_32:=clang HOSTCC := clang diff --git a/src/Kconfig b/src/Kconfig index 533bc5c..7f033a2 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1131,8 +1131,7 @@ config ENABLE_APIC_EXT_ID # the whole treee. config WARNINGS_ARE_ERRORS bool - default y if !COMPILER_LLVM_CLANG - default n if COMPILER_LLVM_CLANG + default y # The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE, # POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are

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Patch set updated for coreboot: 38845ad vendorcode/amd/agesa/f1{5, 5tn, 6kb}: Silence empty loop warn
by Vladimir Serbinenko 07 Dec '14

07 Dec '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7688 -gerrit commit 38845ad13735ab68ed941a070a6068ea970ad464 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Mon Dec 8 01:00:43 2014 +1100 vendorcode/amd/agesa/f1{5,5tn,6kb}: Silence empty loop warn Add decorations to specify that empty loop is intended so. Change-Id: Ia3e40d341eca5e26da3832edc733cf1ccc96c136 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Found-by: Clang --- src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 2 +- src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 2 +- src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c index 20ba2a5..9220193 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c +++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/IDENDIMM/mfidendimm.c @@ -507,7 +507,7 @@ MemFGetPCI ( UINT8 Die; // Find NBBlock that associates with node NodeID - for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++); + for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++) ; ASSERT (Die < MAX_NODES_SUPPORTED); // Get the northbridge pointer for the targeted node. diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c index 20ba2a5..9220193 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c @@ -507,7 +507,7 @@ MemFGetPCI ( UINT8 Die; // Find NBBlock that associates with node NodeID - for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++); + for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++) ; ASSERT (Die < MAX_NODES_SUPPORTED); // Get the northbridge pointer for the targeted node. diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c index 6bd8521..479ce65 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c @@ -507,7 +507,7 @@ MemFGetPCI ( UINT8 Die; // Find NBBlock that associates with node NodeID - for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++); + for (Die = 0; (Die < MAX_NODES_SUPPORTED) && (NBPtr[Die].Node != NodeID); Die ++) ; ASSERT (Die < MAX_NODES_SUPPORTED); // Get the northbridge pointer for the targeted node.

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Patch set updated for coreboot: 375ff14 vx800/vga.c: Remove extraneous parentheses.
by Vladimir Serbinenko 07 Dec '14

07 Dec '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7682 -gerrit commit 375ff14263bdaac0e6e6efbe38d3c0142acffa16 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Dec 7 13:03:16 2014 +0100 vx800/vga.c: Remove extraneous parentheses. Change-Id: Ic81b5f66871ec78c72f2adc5723f22fa94a672e8 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/northbridge/via/vx800/vga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c index 7fe33f2..4ee249f 100644 --- a/src/northbridge/via/vx800/vga.c +++ b/src/northbridge/via/vx800/vga.c @@ -186,7 +186,7 @@ static void vga_init(device_t dev) printk(BIOS_DEBUG, "Enable VGA console\n"); vga_enable_console(); - if ((acpi_sleep_type == 3)/* || (PAYLOAD_IS_SEABIOS == 0)*/) { + if (acpi_sleep_type == 3/* || (PAYLOAD_IS_SEABIOS == 0)*/) { /* It's not clear if these need to be programmed before or after * the VGA bios runs. Try both, clean up later */ /* Set memory rate to 200MHz */

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Patch set updated for coreboot: 878d32d TEST clang warn as error
by Vladimir Serbinenko 07 Dec '14

07 Dec '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7672 -gerrit commit 878d32d11c23faa9fd2310d5de76a61753da09a8 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Dec 7 02:46:07 2014 +1100 TEST clang warn as error Change-Id: Iac4efa59f63437fd6c7678368f4c62ba005d2103 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- Makefile | 2 +- src/Kconfig | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index eaba3e4..5a7e687 100644 --- a/Makefile +++ b/Makefile @@ -117,7 +117,7 @@ ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) # FIXME: armv7/aarch64 won't build right now # NOTE: clang puts compiler-rt under lib/linux/libclang_rt.builtins-i386.a # this means the triple is i386-linux-elf instead of i386-none-elf -CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 +CFLAGS_x86_32 = -no-integrated-as -Qunused-arguments -target i386-linux-elf -m32 -Wno-unused-variable -Wno-unused-function CC_x86_32:=clang HOSTCC := clang diff --git a/src/Kconfig b/src/Kconfig index 533bc5c..7f033a2 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1131,8 +1131,7 @@ config ENABLE_APIC_EXT_ID # the whole treee. config WARNINGS_ARE_ERRORS bool - default y if !COMPILER_LLVM_CLANG - default n if COMPILER_LLVM_CLANG + default y # The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE, # POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are

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Patch set updated for coreboot: c8bf5db northbridge/amd/gx2, lx: Treat MSR constant as unsigned long
by Vladimir Serbinenko 07 Dec '14

07 Dec '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7673 -gerrit commit c8bf5db404a8c053c5f4258bf9dc904243b69760 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Dec 7 03:03:08 2014 +1100 northbridge/amd/gx2,lx: Treat MSR constant as unsigned long Change-Id: I3e1c57334077feb50004d7b39abff4bd84ca095b Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/northbridge/amd/gx2/northbridgeinit.c | 2 +- src/northbridge/amd/lx/northbridgeinit.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index 136dcf2..0cb7803 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -548,7 +548,7 @@ static void rom_shadow_settings(void) * SYSRC(7:0) = 00h ; writeback, can set to 08h to make writethrough */ #define SYSMEM_RCONF_WRITETHROUGH 8 -#define DEVRC_RCONF_DEFAULT 0x21 +#define DEVRC_RCONF_DEFAULT 0x21ul #define ROMBASE_RCONF_DEFAULT 0xFFFC0000 #define ROMRC_RCONF_DEFAULT 0x25 diff --git a/src/northbridge/amd/lx/northbridgeinit.c b/src/northbridge/amd/lx/northbridgeinit.c index 82b3f48..b4e1d4a 100644 --- a/src/northbridge/amd/lx/northbridgeinit.c +++ b/src/northbridge/amd/lx/northbridgeinit.c @@ -602,7 +602,7 @@ static void rom_shadow_settings(void) * ***************************************************************************/ #define SYSMEM_RCONF_WRITETHROUGH 8 -#define DEVRC_RCONF_DEFAULT 0x21 +#define DEVRC_RCONF_DEFAULT 0x21ul #define ROMBASE_RCONF_DEFAULT 0xFFFC0000 #define ROMRC_RCONF_DEFAULT 0x25

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coreboot-gerrit December 2014