coreboot-gerrit November 2014

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Patch set updated for coreboot: fe050f8 device: Clarify correct typing of 'struct device *'
by Edward O'Callaghan 05 Nov '14

05 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7138 -gerrit commit fe050f86498e58b38be6c626d53f57a899e02904 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 1 13:55:04 2014 +1100 device: Clarify correct typing of 'struct device *' Disambiguate 'device_t' into 'struct device *', 'pci_devfn_t' and 'pnp_devfn_t' component types where appropriate. Change-Id: Ic4239efe0462d86694bf4ac0ec898f589b6adf1c Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/device/agp_device.c | 6 +-- src/device/cardbus_device.c | 8 ++-- src/device/cpu_device.c | 8 ++-- src/device/device.c | 14 +++---- src/device/device_romstage.c | 2 +- src/device/device_util.c | 35 ++++++++-------- src/device/hypertransport.c | 20 +++++---- src/device/oprom/yabel/biosemu.c | 2 +- src/device/oprom/yabel/compat/functions.c | 2 +- src/device/oprom/yabel/device.c | 2 +- src/device/oprom/yabel/io.c | 2 +- src/device/pci_device.c | 22 +++++----- src/device/pci_ops.c | 2 +- src/device/pci_rom.c | 2 +- src/device/pciexp_device.c | 22 +++++----- src/device/pcix_device.c | 6 +-- src/device/pnp_device.c | 40 +++++++++--------- src/device/root_device.c | 14 +++---- src/device/smbus_ops.c | 26 ++++++------ src/include/cpu/amd/model_fxx_rev.h | 7 ++-- src/include/device/agp.h | 2 +- src/include/device/cardbus.h | 4 +- src/include/device/device.h | 69 +++++++++++++++---------------- src/include/device/pci.h | 30 +++++++------- src/include/device/pciexp.h | 2 +- src/include/device/pcix.h | 2 +- src/include/device/pnp.h | 38 ++++++++--------- src/include/device/smbus.h | 54 ++++++++++++------------ src/include/reg_script.h | 6 +-- src/lib/reg_script.c | 2 +- 30 files changed, 228 insertions(+), 223 deletions(-) diff --git a/src/device/agp_device.c b/src/device/agp_device.c index 550297a..fc23fe6 100644 --- a/src/device/agp_device.c +++ b/src/device/agp_device.c @@ -24,7 +24,7 @@ #include <device/pci_ids.h> #include <device/agp.h> -static void agp_tune_dev(device_t dev) +static void agp_tune_dev(struct device *dev) { unsigned int cap; @@ -38,7 +38,7 @@ static void agp_tune_dev(device_t dev) unsigned int agp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max) { - device_t child; + struct device *child; max = pci_scan_bus(bus, min_devfn, max_devfn, max); @@ -53,7 +53,7 @@ unsigned int agp_scan_bus(struct bus *bus, unsigned int min_devfn, return max; } -unsigned int agp_scan_bridge(device_t dev, unsigned int max) +unsigned int agp_scan_bridge(struct device *dev, unsigned int max) { return do_pci_scan_bridge(dev, max, agp_scan_bus); } diff --git a/src/device/cardbus_device.c b/src/device/cardbus_device.c index f25f96c..e32ece3 100644 --- a/src/device/cardbus_device.c +++ b/src/device/cardbus_device.c @@ -38,7 +38,7 @@ #define CARDBUS_IO_SIZE 4096 #define CARDBUS_MEM_SIZE (32 * 1024 * 1024) -static void cardbus_record_bridge_resource(device_t dev, resource_t moving, +static void cardbus_record_bridge_resource(struct device *dev, resource_t moving, resource_t min_size, unsigned int index, unsigned long type) { struct resource *resource; @@ -70,7 +70,7 @@ static void cardbus_record_bridge_resource(device_t dev, resource_t moving, resource->size = min_size; } -static void cardbus_size_bridge_resource(device_t dev, unsigned int index) +static void cardbus_size_bridge_resource(struct device *dev, unsigned int index) { struct resource *resource; resource_t min_size; @@ -87,7 +87,7 @@ static void cardbus_size_bridge_resource(device_t dev, unsigned int index) } } -void cardbus_read_resources(device_t dev) +void cardbus_read_resources(struct device *dev) { resource_t moving_base, moving_limit, moving; unsigned long type; @@ -153,7 +153,7 @@ void cardbus_read_resources(device_t dev) compact_resources(dev); } -void cardbus_enable_resources(device_t dev) +void cardbus_enable_resources(struct device *dev) { u16 ctrl; diff --git a/src/device/cpu_device.c b/src/device/cpu_device.c index e76b539..7152d02 100644 --- a/src/device/cpu_device.c +++ b/src/device/cpu_device.c @@ -25,7 +25,7 @@ void remap_bsp_lapic(struct bus *cpu_bus) { struct device_path cpu_path; - device_t cpu; + struct device *cpu; u32 bsp_lapic_id = lapicid(); if (bsp_lapic_id) { @@ -37,10 +37,10 @@ void remap_bsp_lapic(struct bus *cpu_bus) } } -device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled) +struct device *add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled) { struct device_path cpu_path; - device_t cpu; + struct device *cpu; /* Build the cpu device path */ cpu_path.type = DEVICE_PATH_APIC; @@ -61,7 +61,7 @@ device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled) return cpu; } -void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread) +void set_cpu_topology(struct device *cpu, unsigned node, unsigned package, unsigned core, unsigned thread) { cpu->path.apic.node_id = node; cpu->path.apic.package_id = package; diff --git a/src/device/device.c b/src/device/device.c index e068cee..04fc725 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -114,9 +114,9 @@ uint64_t uma_memory_size = 0; * * @see device_path */ -static device_t __alloc_dev(struct bus *parent, struct device_path *path) +static struct device *__alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev, child; + struct device *dev, *child; /* Find the last child of our parent. */ for (child = parent->children; child && child->sibling; /* */ ) @@ -148,9 +148,9 @@ static device_t __alloc_dev(struct bus *parent, struct device_path *path) return dev; } -device_t alloc_dev(struct bus *parent, struct device_path *path) +struct device *alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev; + struct device *dev; spin_lock(&dev_lock); dev = __alloc_dev(parent, path); spin_unlock(&dev_lock); @@ -164,9 +164,9 @@ device_t alloc_dev(struct bus *parent, struct device_path *path) * @param path The relative path from the bus to the appropriate device. * @return Pointer to a device structure for the device on bus at path. */ -device_t alloc_find_dev(struct bus *parent, struct device_path *path) +struct device *alloc_find_dev(struct bus *parent, struct device_path *path) { - device_t child; + struct device *child; spin_lock(&dev_lock); child = find_dev_path(parent, path); if (!child) @@ -750,7 +750,7 @@ static void avoid_fixed_resources(struct device *dev) } } -device_t vga_pri = 0; +struct device *vga_pri = NULL; static void set_vga_bridge_bits(void) { /* diff --git a/src/device/device_romstage.c b/src/device/device_romstage.c index 987fdad..0c81d60 100644 --- a/src/device/device_romstage.c +++ b/src/device/device_romstage.c @@ -28,7 +28,7 @@ #include <device/resource.h> /** Linked list of ALL devices */ -ROMSTAGE_CONST struct device * ROMSTAGE_CONST all_devices = &dev_root; +ROMSTAGE_CONST struct device *ROMSTAGE_CONST all_devices = &dev_root; /** * Given a PCI bus and a devfn number, find the device structure. diff --git a/src/device/device_util.c b/src/device/device_util.c index d5466cb..2bdaff3 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -37,9 +37,9 @@ * @return Pointer to a device structure for the device on bus at path * or 0/NULL if no device is found. */ -device_t find_dev_path(struct bus *parent, struct device_path *path) +struct device *find_dev_path(struct bus *parent, struct device_path *path) { - device_t child; + struct device *child; for (child = parent->children; child; child = child->sibling) { if (path_eq(path, &child->path)) break; @@ -120,9 +120,10 @@ struct device *dev_find_slot_pnp(u16 port, u16 device) * @param apic_id The Local APIC ID number. * @return Pointer to the device structure (if found), 0 otherwise. */ -device_t dev_find_lapic(unsigned apic_id) +struct device *dev_find_lapic(unsigned apic_id) { - device_t dev, result = NULL; + struct device *dev = NULL; + struct device *result = NULL; for (dev = all_devices; dev; dev = dev->next) { if (dev->path.type == DEVICE_PATH_APIC && @@ -185,7 +186,7 @@ struct device *dev_find_class(unsigned int class, struct device *from) * @param dev The device path to encode. * @return Device path encoded into lower 3 bytes of dword. */ -u32 dev_path_encode(device_t dev) +u32 dev_path_encode(struct device *dev) { u32 ret; @@ -238,7 +239,7 @@ u32 dev_path_encode(device_t dev) * Warning: This function uses a static buffer. Don't call it more than once * from the same print statement! */ -const char *dev_path(device_t dev) +const char *dev_path(struct device *dev) { static char buffer[DEVICE_PATH_MAX]; @@ -308,7 +309,7 @@ const char *dev_path(device_t dev) return buffer; } -const char *dev_name(device_t dev) +const char *dev_name(struct device *dev) { if (dev->name) return dev->name; @@ -405,7 +406,7 @@ static int allocate_more_resources(void) * @param prev TODO * @return TODO. */ -static void free_resource(device_t dev, struct resource *res, +static void free_resource(struct device *dev, struct resource *res, struct resource *prev) { if (prev) @@ -424,7 +425,7 @@ static void free_resource(device_t dev, struct resource *res, * * @param dev The device to find the resource on. */ -void compact_resources(device_t dev) +void compact_resources(struct device *dev) { struct resource *res, *next, *prev = NULL; @@ -445,7 +446,7 @@ void compact_resources(device_t dev) * @param index The index of the resource on the device. * @return The resource, if it already exists. */ -struct resource *probe_resource(device_t dev, unsigned index) +struct resource *probe_resource(struct device *dev, unsigned index) { struct resource *res; @@ -468,7 +469,7 @@ struct resource *probe_resource(device_t dev, unsigned index) * @param index The index of the resource on the device. * @return TODO. */ -struct resource *new_resource(device_t dev, unsigned index) +struct resource *new_resource(struct device *dev, unsigned index) { struct resource *resource, *tail; @@ -515,7 +516,7 @@ struct resource *new_resource(device_t dev, unsigned index) * @param index The index of the resource on the device. * return TODO. */ -struct resource *find_resource(device_t dev, unsigned index) +struct resource *find_resource(struct device *dev, unsigned index) { struct resource *resource; @@ -629,7 +630,7 @@ const char *resource_type(struct resource *resource) * @param resource The resource that was just stored. * @param comment TODO */ -void report_resource_stored(device_t dev, struct resource *resource, +void report_resource_stored(struct device *dev, struct resource *resource, const char *comment) { char buf[10]; @@ -721,7 +722,7 @@ void search_global_resources(unsigned long type_mask, unsigned long type, } } -void dev_set_enabled(device_t dev, int enable) +void dev_set_enabled(struct device *dev, int enable) { if (dev->enabled == enable) return; @@ -736,7 +737,7 @@ void dev_set_enabled(device_t dev, int enable) void disable_children(struct bus *bus) { - device_t child; + struct device *child; for (child = bus->children; child; child = child->sibling) { struct bus *link; @@ -890,7 +891,7 @@ void show_all_devs_resources(int debug_level, const char* msg) } } -void fixed_mem_resource(device_t dev, unsigned long index, +void fixed_mem_resource(struct device *dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type) { struct resource *resource; @@ -939,7 +940,7 @@ u32 find_pci_tolm(struct bus *bus) /* Count of enabled CPUs */ int dev_count_cpu(void) { - device_t cpu; + struct device *cpu; int count = 0; for (cpu = all_devices; cpu; cpu = cpu->next) { diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c index d9ab486..030ddea 100644 --- a/src/device/hypertransport.c +++ b/src/device/hypertransport.c @@ -41,9 +41,10 @@ #include <cpu/amd/model_fxx_rev.h> #endif -static device_t ht_scan_get_devs(device_t *old_devices) +static struct device *ht_scan_get_devs(struct device * *old_devices) { - device_t first, last; + struct device *first; + struct device *last; first = *old_devices; last = first; @@ -60,7 +61,7 @@ static device_t ht_scan_get_devs(device_t *old_devices) } if (first) { - device_t child; + struct device *child; /* Unlink the chain from the list of old devices. */ *old_devices = last->sibling; @@ -81,7 +82,7 @@ static device_t ht_scan_get_devs(device_t *old_devices) } #if OPT_HT_LINK == 1 -static unsigned ht_read_freq_cap(device_t dev, unsigned pos) +static unsigned ht_read_freq_cap(struct device *dev, unsigned pos) { /* Handle bugs in valid hypertransport frequency reporting. */ unsigned freq_cap; @@ -126,7 +127,7 @@ struct ht_link { unsigned char ctrl_off, config_off, freq_off, freq_cap_off; }; -static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos) +static int ht_setup_link(struct ht_link *prev, struct device *dev, unsigned pos) { #if OPT_HT_LINK == 1 static const u8 link_width_to_pow2[] = { 3, 4, 0, 5, 1, 2, 0, 0 }; @@ -420,7 +421,10 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, * optimize link. */ unsigned int next_unitid, last_unitid, min_unitid, max_unitid; - device_t old_devices, dev, func, last_func = 0; + struct device *old_devices; + struct device *dev; + struct device *func; + struct device *last_func = NULL; struct ht_link prev; int ht_dev_num = 0; @@ -433,7 +437,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, */ unsigned int real_last_unitid = 0, end_used = 0; u8 real_last_pos = 0; - device_t real_last_dev = NULL; + struct device *real_last_dev = NULL; #endif /* Restore the hypertransport chain to it's uninitialized state. */ @@ -627,7 +631,7 @@ end_of_chain: * a problem in devicetree.cb. */ if (old_devices) { - device_t left; + struct device *left; for (left = old_devices; left; left = left->sibling) printk(BIOS_DEBUG, "%s\n", dev_path(left)); diff --git a/src/device/oprom/yabel/biosemu.c b/src/device/oprom/yabel/biosemu.c index d27a5f1..86197a8 100644 --- a/src/device/oprom/yabel/biosemu.c +++ b/src/device/oprom/yabel/biosemu.c @@ -62,7 +62,7 @@ mainboard_interrupt_handlers(int interrupt, yabel_handleIntFunc func) * will look for an ExpansionROM BAR and use the code from there. */ u32 -biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_addr) +biosemu(u8 *biosmem, u32 biosmem_size, struct device *dev, unsigned long rom_addr) { u8 *rom_image; int i = 0; diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index 27d0413..a132946 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -35,7 +35,7 @@ u8* vmem = NULL; extern u8 *biosmem; -void run_bios(struct device * dev, unsigned long addr) +void run_bios(struct device *dev, unsigned long addr) { biosmem = vmem; diff --git a/src/device/oprom/yabel/device.c b/src/device/oprom/yabel/device.c index 2f41847..37e6020 100644 --- a/src/device/oprom/yabel/device.c +++ b/src/device/oprom/yabel/device.c @@ -407,7 +407,7 @@ biosemu_dev_check_exprom(unsigned long rom_base_addr) } u8 -biosemu_dev_init(struct device * device) +biosemu_dev_init(struct device *device) { u8 rval = 0; //init bios_device struct diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index 08189a9..2d38ad7 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -390,7 +390,7 @@ u32 pci_cfg_read(X86EMU_pioAddr addr, u8 size) { u32 rval = 0xFFFFFFFF; - struct device * dev; + struct device *dev; if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) { // PCI Configuration Mechanism 1 step 1 // write to 0xCF8, sets bus, device, function and Config Space offset diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 8351e9c..e82cb5c 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -157,7 +157,7 @@ unsigned pci_find_next_capability(struct device *dev, unsigned cap, * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. * @return The next matching capability. */ -unsigned pci_find_capability(device_t dev, unsigned cap) +unsigned pci_find_capability(struct device *dev, unsigned cap) { return pci_find_next_capability(dev, cap, 0); } @@ -761,7 +761,7 @@ struct device_operations default_pci_ops_bus = { * @param dev Pointer to the device structure of the bridge. * @return Appropriate bridge operations. */ -static struct device_operations *get_pci_bridge_ops(device_t dev) +static struct device_operations *get_pci_bridge_ops(struct device *dev) { #if CONFIG_PCIX_PLUGIN_SUPPORT unsigned int pcixpos; @@ -959,7 +959,7 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) * @param devfn A device/function number to look at. * @return The device structure for the device (if found), NULL otherwise. */ -device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn) +struct device *pci_probe_dev(struct device * dev, struct bus *bus, unsigned devfn) { u32 id, class; u8 hdr_type; @@ -1066,7 +1066,7 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn) * @param sdev Simple device model identifier, created with PCI_DEV(). * @return Non-zero if bus:dev.fn of device matches. */ -unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev) +unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev) { return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) && dev->path.pci.devfn == PCI_DEV2DEVFN(sdev); @@ -1146,7 +1146,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, * There's probably a problem in devicetree.cb. */ if (old_devices) { - device_t left; + struct device *left; printk(BIOS_WARNING, "PCI: Left over static devices:\n"); for (left = old_devices; left; left = left->sibling) printk(BIOS_WARNING, "%s\n", dev_path(left)); @@ -1280,7 +1280,7 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max) * @param max The highest bus number assigned up to now. * @return The maximum bus number found, after scanning all subordinate busses. */ -unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max) { max = pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff, max); return max; @@ -1326,10 +1326,10 @@ const char *pin_to_str(int pin) * @return The interrupt pin number (1 - 4) that 'dev' will * trigger when generating an interrupt */ -static int swizzle_irq_pins(device_t dev, device_t *parent_bridge) +static int swizzle_irq_pins(struct device *dev, struct device * *parent_bridge) { - device_t parent; /* Our current device's parent device */ - device_t child; /* The child device of the parent */ + struct device *parent; /* Our current device's parent device */ + struct device *child; /* The child device of the parent */ uint8_t parent_bus = 0; /* Parent Bus number */ uint16_t parent_devfn = 0; /* Parent Device and Function number */ uint16_t child_devfn = 0; /* Child Device and Function number */ @@ -1394,7 +1394,7 @@ static int swizzle_irq_pins(device_t dev, device_t *parent_bridge) * Errors: -1 is returned if the device is not enabled * -2 is returned if a parent bridge could not be found. */ -int get_pci_irq_pins(device_t dev, device_t *parent_bdg) +int get_pci_irq_pins(struct device *dev, struct device * *parent_bdg) { uint8_t bus = 0; /* The bus this device is on */ uint16_t devfn = 0; /* This device's device and function numbers */ @@ -1456,7 +1456,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4]) { unsigned int funct; - device_t pdev; + struct device *pdev; u8 line, irq; /* Each slot may contain up to eight functions. */ diff --git a/src/device/pci_ops.c b/src/device/pci_ops.c index 6ddb493..73b4242 100644 --- a/src/device/pci_ops.c +++ b/src/device/pci_ops.c @@ -25,7 +25,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> -const struct pci_bus_operations *pci_bus_default_ops(device_t dev) +const struct pci_bus_operations *pci_bus_default_ops(struct device *dev) { #if CONFIG_MMCONF_SUPPORT_DEFAULT return &pci_ops_mmconf; diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 1bdccf0..b7fdde6 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -155,7 +155,7 @@ struct rom_header *pci_rom_load(struct device *dev, */ if (PCI_CLASS_DISPLAY_VGA == (dev->class >> 8)) { #if !CONFIG_MULTIPLE_VGA_ADAPTERS - extern device_t vga_pri; /* Primary VGA device (device.c). */ + extern struct device *vga_pri; /* Primary VGA device (device.c). */ if (dev != vga_pri) return NULL; /* Only one VGA supported. */ #endif if ((void *)PCI_VGA_RAM_IMAGE_START != rom_header) { diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 87aea67..a38da40 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -30,7 +30,7 @@ * Re-train a PCIe link */ #define PCIE_TRAIN_RETRY 10000 -static int pciexp_retrain_link(device_t dev, unsigned cap) +static int pciexp_retrain_link(struct device *dev, unsigned cap) { unsigned try = PCIE_TRAIN_RETRY; u16 lnk; @@ -57,8 +57,8 @@ static int pciexp_retrain_link(device_t dev, unsigned cap) * and enable Common Clock Configuration if possible. If CCC is * enabled the link must be retrained. */ -static void pciexp_enable_common_clock(device_t root, unsigned root_cap, - device_t endp, unsigned endp_cap) +static void pciexp_enable_common_clock(struct device *root, unsigned root_cap, + struct device *endp, unsigned endp_cap) { u16 root_scc, endp_scc, lnkctl; @@ -96,8 +96,8 @@ static void pciexp_enable_common_clock(device_t root, unsigned root_cap, * by checking both root port and endpoint and returning * the highest latency value. */ -static int pciexp_aspm_latency(device_t root, unsigned root_cap, - device_t endp, unsigned endp_cap, +static int pciexp_aspm_latency(struct device *root, unsigned root_cap, + struct device *endp, unsigned endp_cap, enum aspm_type type) { int root_lat = 0, endp_lat = 0; @@ -139,8 +139,8 @@ static int pciexp_aspm_latency(device_t root, unsigned root_cap, * 2 = L1 Enabled * 3 = L0s and L1 Enabled */ -static enum aspm_type pciexp_enable_aspm(device_t root, unsigned root_cap, - device_t endp, unsigned endp_cap) +static enum aspm_type pciexp_enable_aspm(struct device *root, unsigned root_cap, + struct device *endp, unsigned endp_cap) { const char *aspm_type_str[] = { "None", "L0s", "L1", "L0s and L1" }; enum aspm_type apmc = PCIE_ASPM_NONE; @@ -182,9 +182,9 @@ static enum aspm_type pciexp_enable_aspm(device_t root, unsigned root_cap, } #endif /* CONFIG_PCIEXP_ASPM */ -static void pciexp_tune_dev(device_t dev) +static void pciexp_tune_dev(struct device *dev) { - device_t root = dev->bus->dev; + struct device *root = dev->bus->dev; unsigned int root_cap, cap; cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); @@ -216,7 +216,7 @@ static void pciexp_tune_dev(device_t dev) unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max) { - device_t child; + struct device *child; max = pci_scan_bus(bus, min_devfn, max_devfn, max); @@ -230,7 +230,7 @@ unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, return max; } -unsigned int pciexp_scan_bridge(device_t dev, unsigned int max) +unsigned int pciexp_scan_bridge(struct device *dev, unsigned int max) { return do_pci_scan_bridge(dev, max, pciexp_scan_bus); } diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c index a20c3bf..59355b5 100644 --- a/src/device/pcix_device.c +++ b/src/device/pcix_device.c @@ -24,7 +24,7 @@ #include <device/pci_ids.h> #include <device/pcix.h> -static void pcix_tune_dev(device_t dev) +static void pcix_tune_dev(struct device *dev) { u32 status; u16 orig_cmd, cmd; @@ -65,7 +65,7 @@ static void pcix_tune_dev(device_t dev) static void pcix_tune_bus(struct bus *bus) { - device_t child; + struct device *child; for (child = bus->children; child; child = child->sibling) pcix_tune_dev(child); @@ -112,7 +112,7 @@ const char *pcix_speed(u16 sstatus) return result; } -unsigned int pcix_scan_bridge(device_t dev, unsigned int max) +unsigned int pcix_scan_bridge(struct device *dev, unsigned int max) { unsigned int pos; u16 sstatus; diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c index e4aa4d3..d49b7a9 100644 --- a/src/device/pnp_device.c +++ b/src/device/pnp_device.c @@ -32,13 +32,13 @@ /* PNP config mode wrappers */ -void pnp_enter_conf_mode(device_t dev) +void pnp_enter_conf_mode(struct device *dev) { if (dev->ops->ops_pnp_mode) dev->ops->ops_pnp_mode->enter_conf_mode(dev); } -void pnp_exit_conf_mode(device_t dev) +void pnp_exit_conf_mode(struct device *dev) { if (dev->ops->ops_pnp_mode) dev->ops->ops_pnp_mode->exit_conf_mode(dev); @@ -46,24 +46,24 @@ void pnp_exit_conf_mode(device_t dev) /* PNP fundamental operations */ -void pnp_write_config(device_t dev, u8 reg, u8 value) +void pnp_write_config(struct device *dev, u8 reg, u8 value) { outb(reg, dev->path.pnp.port); outb(value, dev->path.pnp.port + 1); } -u8 pnp_read_config(device_t dev, u8 reg) +u8 pnp_read_config(struct device *dev, u8 reg) { outb(reg, dev->path.pnp.port); return inb(dev->path.pnp.port + 1); } -void pnp_set_logical_device(device_t dev) +void pnp_set_logical_device(struct device *dev) { pnp_write_config(dev, 0x07, dev->path.pnp.device & 0xff); } -void pnp_set_enable(device_t dev, int enable) +void pnp_set_enable(struct device *dev, int enable) { u8 tmp, bitpos; @@ -80,7 +80,7 @@ void pnp_set_enable(device_t dev, int enable) pnp_write_config(dev, 0x30, tmp); } -int pnp_read_enable(device_t dev) +int pnp_read_enable(struct device *dev) { u8 tmp, bitpos; @@ -92,20 +92,20 @@ int pnp_read_enable(device_t dev) return !!(tmp & (1 << bitpos)); } -void pnp_set_iobase(device_t dev, u8 index, u16 iobase) +void pnp_set_iobase(struct device *dev, u8 index, u16 iobase) { /* Index == 0x60 or 0x62. */ pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff); pnp_write_config(dev, index + 1, iobase & 0xff); } -void pnp_set_irq(device_t dev, u8 index, u8 irq) +void pnp_set_irq(struct device *dev, u8 index, u8 irq) { /* Index == 0x70 or 0x72. */ pnp_write_config(dev, index, irq); } -void pnp_set_drq(device_t dev, u8 index, u8 drq) +void pnp_set_drq(struct device *dev, u8 index, u8 drq) { /* Index == 0x74. */ pnp_write_config(dev, index, drq & 0xff); @@ -113,12 +113,12 @@ void pnp_set_drq(device_t dev, u8 index, u8 drq) /* PNP device operations */ -void pnp_read_resources(device_t dev) +void pnp_read_resources(struct device *dev) { return; } -static void pnp_set_resource(device_t dev, struct resource *resource) +static void pnp_set_resource(struct device *dev, struct resource *resource) { if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx " @@ -144,7 +144,7 @@ static void pnp_set_resource(device_t dev, struct resource *resource) report_resource_stored(dev, resource, ""); } -void pnp_set_resources(device_t dev) +void pnp_set_resources(struct device *dev) { struct resource *res; @@ -160,7 +160,7 @@ void pnp_set_resources(device_t dev) pnp_exit_conf_mode(dev); } -void pnp_enable_resources(device_t dev) +void pnp_enable_resources(struct device *dev) { pnp_enter_conf_mode(dev); pnp_set_logical_device(dev); @@ -168,7 +168,7 @@ void pnp_enable_resources(device_t dev) pnp_exit_conf_mode(dev); } -void pnp_enable(device_t dev) +void pnp_enable(struct device *dev) { if (!dev->enabled) { pnp_enter_conf_mode(dev); @@ -178,7 +178,7 @@ void pnp_enable(device_t dev) } } -void pnp_alt_enable(device_t dev) +void pnp_alt_enable(struct device *dev) { pnp_enter_conf_mode(dev); pnp_set_logical_device(dev); @@ -195,7 +195,7 @@ struct device_operations pnp_ops = { /* PNP chip operations */ -static void pnp_get_ioresource(device_t dev, u8 index, struct io_info *info) +static void pnp_get_ioresource(struct device *dev, u8 index, struct io_info *info) { struct resource *resource; unsigned moving, gran, step; @@ -246,7 +246,7 @@ static void pnp_get_ioresource(device_t dev, u8 index, struct io_info *info) resource->size = 1 << gran; } -static void get_resources(device_t dev, struct pnp_info *info) +static void get_resources(struct device *dev, struct pnp_info *info) { struct resource *resource; @@ -312,11 +312,11 @@ static void get_resources(device_t dev, struct pnp_info *info) } } -void pnp_enable_devices(device_t base_dev, struct device_operations *ops, +void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info) { struct device_path path; - device_t dev; + struct device *dev; int i; path.type = DEVICE_PATH_PNP; diff --git a/src/device/root_device.c b/src/device/root_device.c index 49fa711..fb32151 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -35,7 +35,7 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_ * * @param root Pointer to the device structure for the system root device. */ -static void root_dev_read_resources(device_t root) +static void root_dev_read_resources(struct device *root) { printk(BIOS_ERR, "%s should never be called.\n", __func__); } @@ -48,7 +48,7 @@ static void root_dev_read_resources(device_t root) * * @param root Pointer to the device structure for the system root device. */ -static void root_dev_set_resources(device_t root) +static void root_dev_set_resources(struct device *root) { printk(BIOS_ERR, "%s should never be called.\n", __func__); } @@ -76,9 +76,9 @@ static void root_dev_set_resources(device_t root) * @return The largest bus number used. */ static int smbus_max = 0; -unsigned int scan_static_bus(device_t bus, unsigned int max) +unsigned int scan_static_bus(struct device *bus, unsigned int max) { - device_t child; + struct device *child; struct bus *link; printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); @@ -121,7 +121,7 @@ unsigned int scan_static_bus(device_t bus, unsigned int max) return max; } -static void root_dev_enable_resources(device_t dev) +static void root_dev_enable_resources(struct device *dev) { } @@ -134,12 +134,12 @@ static void root_dev_enable_resources(device_t dev) * @param max The current bus number scanned so far, usually 0x00. * @return The largest bus number used. */ -static unsigned int root_dev_scan_bus(device_t root, unsigned int max) +static unsigned int root_dev_scan_bus(struct device *root, unsigned int max) { return scan_static_bus(root, max); } -static void root_dev_init(device_t root) +static void root_dev_init(struct device *root) { } diff --git a/src/device/smbus_ops.c b/src/device/smbus_ops.c index 41b31ed..547d144 100644 --- a/src/device/smbus_ops.c +++ b/src/device/smbus_ops.c @@ -25,7 +25,7 @@ #include <device/path.h> #include <device/smbus.h> -struct bus *get_pbus_smbus(device_t dev) +struct bus *get_pbus_smbus(struct device *dev) { struct bus *pbus = dev->bus; @@ -51,7 +51,7 @@ struct bus *get_pbus_smbus(device_t dev) * * @param dev TODO. */ -int smbus_set_link(device_t dev) +int smbus_set_link(struct device *dev) { struct bus *pbus_a[4]; // 4 level mux only. Enough? struct bus *pbus = dev->bus; @@ -87,70 +87,70 @@ int smbus_set_link(device_t dev) } -int smbus_quick_read(device_t dev) +int smbus_quick_read(struct device *dev) { CHECK_PRESENCE(quick_read); return ops_smbus_bus(get_pbus_smbus(dev))->quick_read(dev); } -int smbus_quick_write(device_t dev) +int smbus_quick_write(struct device *dev) { CHECK_PRESENCE(quick_write); return ops_smbus_bus(get_pbus_smbus(dev))->quick_write(dev); } -int smbus_recv_byte(device_t dev) +int smbus_recv_byte(struct device *dev) { CHECK_PRESENCE(recv_byte); return ops_smbus_bus(get_pbus_smbus(dev))->recv_byte(dev); } -int smbus_send_byte(device_t dev, u8 byte) +int smbus_send_byte(struct device *dev, u8 byte) { CHECK_PRESENCE(send_byte); return ops_smbus_bus(get_pbus_smbus(dev))->send_byte(dev, byte); } -int smbus_read_byte(device_t dev, u8 addr) +int smbus_read_byte(struct device *dev, u8 addr) { CHECK_PRESENCE(read_byte); return ops_smbus_bus(get_pbus_smbus(dev))->read_byte(dev, addr); } -int smbus_write_byte(device_t dev, u8 addr, u8 val) +int smbus_write_byte(struct device *dev, u8 addr, u8 val) { CHECK_PRESENCE(write_byte); return ops_smbus_bus(get_pbus_smbus(dev))->write_byte(dev, addr, val); } -int smbus_read_word(device_t dev, u8 addr) +int smbus_read_word(struct device *dev, u8 addr) { CHECK_PRESENCE(read_word); return ops_smbus_bus(get_pbus_smbus(dev))->read_word(dev, addr); } -int smbus_write_word(device_t dev, u8 addr, u16 val) +int smbus_write_word(struct device *dev, u8 addr, u16 val) { CHECK_PRESENCE(write_word); return ops_smbus_bus(get_pbus_smbus(dev))->write_word(dev, addr, val); } -int smbus_process_call(device_t dev, u8 cmd, u16 data) +int smbus_process_call(struct device *dev, u8 cmd, u16 data) { CHECK_PRESENCE(process_call); return ops_smbus_bus(get_pbus_smbus(dev))->process_call(dev, cmd, data); } -int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer) +int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer) { CHECK_PRESENCE(block_read); @@ -158,7 +158,7 @@ int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer) bytes, buffer); } -int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer) +int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer) { CHECK_PRESENCE(block_write); diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index 1e85596..c3ef4e9 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -1,4 +1,5 @@ #include <arch/cpu.h> +#include <arch/io.h> int init_processor_name(void); @@ -59,7 +60,7 @@ static int is_e0_later_in_bsp(int nodeid) return !is_cpu_pre_e0(); } // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid,2); val_old = pci_read_config32(dev, 0x80); val = val_old; @@ -101,7 +102,7 @@ static inline int is_cpu_pre_f2(void) static inline int is_cpu_f0_in_bsp(int nodeid) { uint32_t dword; - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid, 3); dword = pci_read_config32(dev, 0xfc); return (dword & 0xfff00) == 0x40f00; @@ -109,7 +110,7 @@ static inline int is_cpu_f0_in_bsp(int nodeid) static inline int is_cpu_pre_f2_in_bsp(int nodeid) { uint32_t dword; - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid, 3); dword = pci_read_config32(dev, 0xfc); return (dword & 0xfff0f) < 0x40f02; diff --git a/src/include/device/agp.h b/src/include/device/agp.h index be2b833..b3791fe 100644 --- a/src/include/device/agp.h +++ b/src/include/device/agp.h @@ -7,7 +7,7 @@ unsigned int agp_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); -unsigned int agp_scan_bridge(device_t dev, unsigned int max); +unsigned int agp_scan_bridge(struct device *dev, unsigned int max); extern struct device_operations default_agp_ops_bus; diff --git a/src/include/device/cardbus.h b/src/include/device/cardbus.h index 45ae24f..4443c15 100644 --- a/src/include/device/cardbus.h +++ b/src/include/device/cardbus.h @@ -5,8 +5,8 @@ #include <device/device.h> -void cardbus_read_resources(device_t dev); -void cardbus_enable_resources(device_t dev); +void cardbus_read_resources(struct device *dev); +void cardbus_enable_resources(struct device *dev); extern struct device_operations default_cardbus_ops_bus; diff --git a/src/include/device/device.h b/src/include/device/device.h index c67205c..fe8dbed 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -41,19 +41,19 @@ struct smbios_type11; struct acpi_rsdp; struct device_operations { - void (*read_resources)(device_t dev); - void (*set_resources)(device_t dev); - void (*enable_resources)(device_t dev); - void (*init)(device_t dev); - void (*final)(device_t dev); - unsigned int (*scan_bus)(device_t bus, unsigned int _max); - void (*enable)(device_t dev); - void (*disable)(device_t dev); - void (*set_link)(device_t dev, unsigned int link); + void (*read_resources)(struct device *dev); + void (*set_resources)(struct device *dev); + void (*enable_resources)(struct device *dev); + void (*init)(struct device *dev); + void (*final)(struct device *dev); + unsigned int (*scan_bus)(struct device *bus, unsigned int _max); + void (*enable)(struct device *dev); + void (*disable)(struct device *dev); + void (*set_link)(struct device *dev, unsigned int link); void (*reset_bus)(struct bus *bus); #if CONFIG_GENERATE_SMBIOS_TABLES - int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current); - void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t); + int (*get_smbios_data)(struct device *dev, int *handle, unsigned long *current); + void (*get_smbios_strings)(struct device *dev, struct smbios_type11 *t); #endif #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) && IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES) unsigned long (*write_acpi_tables)(unsigned long start, struct acpi_rsdp *rsdp); @@ -62,7 +62,7 @@ struct device_operations { #endif const struct pci_operations *ops_pci; const struct smbus_bus_operations *ops_smbus_bus; - const struct pci_bus_operations * (*ops_pci_bus)(device_t dev); + const struct pci_bus_operations * (*ops_pci_bus)(struct device *dev); const struct pnp_mode_ops *ops_pnp_mode; }; @@ -76,9 +76,8 @@ static inline void device_noop(struct device *dev) {} struct bus { - - ROMSTAGE_CONST struct device * dev; /* This bridge device */ - ROMSTAGE_CONST struct device * children; /* devices behind this bridge */ + ROMSTAGE_CONST struct device *dev; /* This bridge device */ + ROMSTAGE_CONST struct device *children; /* devices behind this bridge */ ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */ unsigned bridge_ctrl; /* Bridge control register */ unsigned char link_num; /* The index of this link */ @@ -98,7 +97,7 @@ struct pci_irq_info { unsigned int ioapic_irq_pin; unsigned int ioapic_src_pin; unsigned int ioapic_dst_id; - unsigned int ioapic_flags; + unsigned int ioapic_flags; }; struct device { @@ -159,7 +158,7 @@ extern uint64_t uma_memory_size; #endif /* Generic device interface functions */ -device_t alloc_dev(struct bus *parent, struct device_path *path); +struct device *alloc_dev(struct bus *parent, struct device_path *path); void dev_initialize_chips(void); void dev_enumerate(void); void dev_configure(void); @@ -175,30 +174,30 @@ unsigned int scan_bus(struct device *bus, unsigned int _max); void assign_resources(struct bus *bus); void enumerate_static_device(void); void enumerate_static_devices(void); -const char *dev_name(device_t dev); -const char *dev_path(device_t dev); -u32 dev_path_encode(device_t dev); +const char *dev_name(struct device *dev); +const char *dev_path(struct device *dev); +u32 dev_path_encode(struct device *dev); const char *bus_path(struct bus *bus); -void dev_set_enabled(device_t dev, int enable); +void dev_set_enabled(struct device *dev, int enable); void disable_children(struct bus *bus); /* Option ROM helper functions */ void run_bios(struct device *dev, unsigned long addr); /* Helper functions */ -device_t find_dev_path(struct bus *parent, struct device_path *path); -device_t alloc_find_dev(struct bus *parent, struct device_path *path); -device_t dev_find_device (u16 vendor, u16 device, device_t from); -device_t dev_find_class (unsigned int class, device_t from); -device_t dev_find_slot (unsigned int bus, unsigned int devfn); -device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); -device_t dev_find_slot_pnp(u16 port, u16 device); -device_t dev_find_lapic(unsigned apic_id); +struct device *find_dev_path(struct bus *parent, struct device_path *path); +struct device *alloc_find_dev(struct bus *parent, struct device_path *path); +struct device *dev_find_device (u16 vendor, u16 device, struct device *from); +struct device *dev_find_class (unsigned int class, struct device *from); +struct device *dev_find_slot (unsigned int bus, unsigned int devfn); +struct device *dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); +struct device *dev_find_slot_pnp(u16 port, u16 device); +struct device *dev_find_lapic(unsigned apic_id); int dev_count_cpu(void); void remap_bsp_lapic(struct bus *cpu_bus); -device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled); -void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread); +struct device *add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled); +void set_cpu_topology(struct device *cpu, unsigned node, unsigned package, unsigned core, unsigned thread); #define amd_cpu_topology(cpu, node, core) \ set_cpu_topology(cpu, node, 0, core, 0) @@ -207,7 +206,7 @@ void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned co set_cpu_topology(cpu, 0, package, core, thread) /* Debug functions */ -void print_resource_tree(struct device * root, int debug_level, +void print_resource_tree(struct device *root, int debug_level, const char *msg); void show_devs_tree(struct device *dev, int debug_level, int depth, int linknum); void show_devs_subtree(struct device *root, int debug_level, const char *msg); @@ -226,9 +225,9 @@ void show_all_devs_resources(int debug_level, const char* msg); extern struct device_operations default_dev_ops_root; void pci_domain_read_resources(struct device *dev); unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max); -unsigned int scan_static_bus(device_t bus, unsigned int _max); +unsigned int scan_static_bus(struct device *bus, unsigned int _max); -void fixed_mem_resource(device_t dev, unsigned long index, +void fixed_mem_resource(struct device *dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type); @@ -257,7 +256,7 @@ u32 find_pci_tolm(struct bus *bus); ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus, unsigned int devfn); -ROMSTAGE_CONST struct device *dev_find_next_pci_device( +ROMSTAGE_CONST struct device * dev_find_next_pci_device( ROMSTAGE_CONST struct device *previous_dev); ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 0670da4..3688322 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -32,7 +32,7 @@ /* Common pci operations without a standard interface */ struct pci_operations { /* set the Subsystem IDs for the PCI device */ - void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device); + void (*set_subsystem)(struct device *dev, unsigned vendor, unsigned device); }; /* Common pci bus operations */ @@ -62,35 +62,35 @@ extern struct pci_driver epci_drivers[]; extern struct device_operations default_pci_ops_dev; extern struct device_operations default_pci_ops_bus; -void pci_dev_read_resources(device_t dev); -void pci_bus_read_resources(device_t dev); -void pci_dev_set_resources(device_t dev); -void pci_dev_enable_resources(device_t dev); -void pci_bus_enable_resources(device_t dev); +void pci_dev_read_resources(struct device *dev); +void pci_bus_read_resources(struct device *dev); +void pci_dev_set_resources(struct device *dev); +void pci_dev_enable_resources(struct device *dev); +void pci_bus_enable_resources(struct device *dev); void pci_bus_reset(struct bus *bus); -device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn); -unsigned int do_pci_scan_bridge(device_t bus, unsigned int max, +struct device *pci_probe_dev(struct device *dev, struct bus *bus, unsigned devfn); +unsigned int do_pci_scan_bridge(struct device *bus, unsigned int max, unsigned int (*do_scan_bus)(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max)); -unsigned int pci_scan_bridge(device_t bus, unsigned int max); +unsigned int pci_scan_bridge(struct device *bus, unsigned int max); unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); uint8_t pci_moving_config8(struct device *dev, unsigned reg); uint16_t pci_moving_config16(struct device *dev, unsigned reg); uint32_t pci_moving_config32(struct device *dev, unsigned reg); struct resource *pci_get_resource(struct device *dev, unsigned long index); -void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device); +void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device); void pci_dev_init(struct device *dev); -unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev); +unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev); const char * pin_to_str(int pin); -int get_pci_irq_pins(device_t dev, device_t *parent_bdg); +int get_pci_irq_pins(struct device *dev, struct device **parent_bdg); void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4]); #define PCI_IO_BRIDGE_ALIGN 4096 #define PCI_MEM_BRIDGE_ALIGN (1024*1024) -static inline const struct pci_operations *ops_pci(device_t dev) +static inline const struct pci_operations *ops_pci(struct device *dev) { const struct pci_operations *pops; pops = 0; @@ -106,8 +106,8 @@ static inline const struct pci_operations *ops_pci(device_t dev) unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last); unsigned pci_find_capability(pci_devfn_t dev, unsigned cap); #else /* !__PRE_RAM__ */ -unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); -unsigned pci_find_capability(device_t dev, unsigned cap); +unsigned pci_find_next_capability(struct device *dev, unsigned cap, unsigned last); +unsigned pci_find_capability(struct device *dev, unsigned cap); #endif /* __PRE_RAM__ */ void pci_early_bridge_init(void); diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 87a5002..c7ff4f5 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -11,7 +11,7 @@ enum aspm_type { unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max); -unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); +unsigned int pciexp_scan_bridge(struct device *dev, unsigned int max); extern struct device_operations default_pciexp_ops_bus; diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index 4ffab5b..8cc83df 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -4,7 +4,7 @@ unsigned int pcix_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max); -unsigned int pcix_scan_bridge(device_t dev, unsigned int max); +unsigned int pcix_scan_bridge(struct device *dev, unsigned int max); const char *pcix_speed(u16 sstatus); extern struct device_operations default_pcix_ops_bus; diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index d0d6fa3..9290056 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -9,21 +9,21 @@ #ifndef __SIMPLE_DEVICE__ /* Primitive PNP resource manipulation */ -void pnp_write_config(device_t dev, u8 reg, u8 value); -u8 pnp_read_config(device_t dev, u8 reg); -void pnp_set_logical_device(device_t dev); -void pnp_set_enable(device_t dev, int enable); -int pnp_read_enable(device_t dev); -void pnp_set_iobase(device_t dev, u8 index, u16 iobase); -void pnp_set_irq(device_t dev, u8 index, u8 irq); -void pnp_set_drq(device_t dev, u8 index, u8 drq); +void pnp_write_config(struct device *dev, u8 reg, u8 value); +u8 pnp_read_config(struct device *dev, u8 reg); +void pnp_set_logical_device(struct device *dev); +void pnp_set_enable(struct device *dev, int enable); +int pnp_read_enable(struct device *dev); +void pnp_set_iobase(struct device *dev, u8 index, u16 iobase); +void pnp_set_irq(struct device *dev, u8 index, u8 irq); +void pnp_set_drq(struct device *dev, u8 index, u8 drq); /* PNP device operations */ -void pnp_read_resources(device_t dev); -void pnp_set_resources(device_t dev); -void pnp_enable_resources(device_t dev); -void pnp_enable(device_t dev); -void pnp_alt_enable(device_t dev); +void pnp_read_resources(struct device *dev); +void pnp_set_resources(struct device *dev); +void pnp_enable_resources(struct device *dev); +void pnp_enable(struct device *dev); +void pnp_alt_enable(struct device *dev); extern struct device_operations pnp_ops; @@ -52,16 +52,16 @@ struct pnp_info { #define PNP_MSC10 0x1000 struct io_info io0, io1, io2, io3; }; -struct resource *pnp_get_resource(device_t dev, unsigned index); +struct resource *pnp_get_resource(struct device *dev, unsigned index); void pnp_enable_devices(struct device *dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info); struct pnp_mode_ops { - void (*enter_conf_mode)(device_t dev); - void (*exit_conf_mode)(device_t dev); + void (*enter_conf_mode)(struct device *dev); + void (*exit_conf_mode)(struct device *dev); }; -void pnp_enter_conf_mode(device_t dev); -void pnp_exit_conf_mode(device_t dev); +void pnp_enter_conf_mode(struct device *dev); +void pnp_exit_conf_mode(struct device *dev); #endif /* ! __SIMPLE_DEVICE__ */ -#endif /* DEVICE_PNP_H */ +#endif /*devICE_PNP_H */ diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h index 073d7e2..7002459 100644 --- a/src/include/device/smbus.h +++ b/src/include/device/smbus.h @@ -8,17 +8,17 @@ /* Common SMBus bus operations */ struct smbus_bus_operations { - int (*quick_read) (device_t dev); - int (*quick_write) (device_t dev); - int (*recv_byte) (device_t dev); - int (*send_byte) (device_t dev, u8 value); - int (*read_byte) (device_t dev, u8 addr); - int (*write_byte) (device_t dev, u8 addr, u8 value); - int (*read_word) (device_t dev, u8 addr); - int (*write_word) (device_t dev, u8 addr, u16 value); - int (*process_call)(device_t dev, u8 cmd, u16 data); - int (*block_read) (device_t dev, u8 cmd, u8 bytes, u8 *buffer); - int (*block_write) (device_t dev, u8 cmd, u8 bytes, const u8 *buffer); + int (*quick_read) (struct device *dev); + int (*quick_write) (struct device *dev); + int (*recv_byte) (struct device *dev); + int (*send_byte) (struct device *dev, u8 value); + int (*read_byte) (struct device *dev, u8 addr); + int (*write_byte) (struct device *dev, u8 addr, u8 value); + int (*read_word) (struct device *dev, u8 addr); + int (*write_word) (struct device *dev, u8 addr, u16 value); + int (*process_call)(struct device *dev, u8 cmd, u16 data); + int (*block_read) (struct device *dev, u8 cmd, u8 bytes, u8 *buffer); + int (*block_write) (struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); }; static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) @@ -32,19 +32,19 @@ static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) return bops; } -struct bus *get_pbus_smbus(device_t dev); -int smbus_set_link(device_t dev); - -int smbus_quick_read(device_t dev); -int smbus_quick_write(device_t dev); -int smbus_recv_byte(device_t dev); -int smbus_send_byte(device_t dev, u8 byte); -int smbus_read_byte(device_t dev, u8 addr); -int smbus_write_byte(device_t dev, u8 addr, u8 val); -int smbus_read_word(device_t dev, u8 addr); -int smbus_write_word(device_t dev, u8 addr, u16 val); -int smbus_process_call(device_t dev, u8 cmd, u16 data); -int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer); -int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer); - -#endif /* DEVICE_SMBUS_H */ +struct bus *get_pbus_smbus(struct device *dev); +int smbus_set_link(struct device *dev); + +int smbus_quick_read(struct device *dev); +int smbus_quick_write(struct device *dev); +int smbus_recv_byte(struct device *dev); +int smbus_send_byte(struct device *dev, u8 byte); +int smbus_read_byte(struct device *dev, u8 addr); +int smbus_write_byte(struct device *dev, u8 addr, u8 val); +int smbus_read_word(struct device *dev, u8 addr); +int smbus_write_word(struct device *dev, u8 addr, u16 val); +int smbus_process_call(struct device *dev, u8 cmd, u16 data); +int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer); +int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); + +#endif /*devICE_SMBUS_H */ diff --git a/src/include/reg_script.h b/src/include/reg_script.h index 97b4fb0..71be7c2 100644 --- a/src/include/reg_script.h +++ b/src/include/reg_script.h @@ -34,7 +34,7 @@ * are employed: * - Chaining of tables that allow runtime tables to chain to compile-time * tables. - * - Notion of current device (device_t) being worked on. This allows for + * - Notion of current device (struct device *) being worked on. This allows for * PCI config, io, and mmio on a particular device's resources. * * Note that when using REG_SCRIPT_COMMAND_NEXT there is an implicit push @@ -80,7 +80,7 @@ struct reg_script { union { uint32_t id; const struct reg_script *next; - device_t dev; + struct device *dev; unsigned int res_index; }; }; @@ -334,6 +334,6 @@ struct reg_script { _REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_END, 0, 0, 0, 0, 0, 0, 0) void reg_script_run(const struct reg_script *script); -void reg_script_run_on_dev(device_t dev, const struct reg_script *step); +void reg_script_run_on_dev(struct device *dev, const struct reg_script *step); #endif /* REG_SCRIPT_H */ diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c index 647723b..503c6c0 100644 --- a/src/lib/reg_script.c +++ b/src/lib/reg_script.c @@ -536,7 +536,7 @@ static void reg_script_run_next(struct reg_script_context *prev_ctx, reg_script_run_with_context(&ctx); } -void reg_script_run_on_dev(device_t dev, const struct reg_script *step) +void reg_script_run_on_dev(struct device *dev, const struct reg_script *step) { struct reg_script_context ctx;

1 0

Patch set updated for coreboot: a6f16ed device: Clarify correct typing of 'struct device *'
by Edward O'Callaghan 05 Nov '14

05 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7138 -gerrit commit a6f16eded01602623866673af7cf762d80a00853 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 1 13:55:04 2014 +1100 device: Clarify correct typing of 'struct device *' Disambiguate 'device_t' into 'struct device *', 'pci_devfn_t' and 'pnp_devfn_t' component types where appropriate. Change-Id: Ic4239efe0462d86694bf4ac0ec898f589b6adf1c Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/device/agp_device.c | 6 +-- src/device/cardbus_device.c | 8 ++-- src/device/cpu_device.c | 8 ++-- src/device/device.c | 14 +++---- src/device/device_romstage.c | 2 +- src/device/device_util.c | 35 ++++++++-------- src/device/hypertransport.c | 20 +++++---- src/device/oprom/yabel/biosemu.c | 2 +- src/device/oprom/yabel/compat/functions.c | 2 +- src/device/oprom/yabel/device.c | 2 +- src/device/oprom/yabel/io.c | 2 +- src/device/pci_device.c | 22 +++++----- src/device/pci_ops.c | 2 +- src/device/pci_rom.c | 2 +- src/device/pciexp_device.c | 22 +++++----- src/device/pcix_device.c | 6 +-- src/device/pnp_device.c | 40 +++++++++--------- src/device/root_device.c | 14 +++---- src/device/smbus_ops.c | 26 ++++++------ src/include/cpu/amd/model_fxx_rev.h | 7 ++-- src/include/device/agp.h | 2 +- src/include/device/cardbus.h | 4 +- src/include/device/device.h | 69 +++++++++++++++---------------- src/include/device/pci.h | 30 +++++++------- src/include/device/pciexp.h | 2 +- src/include/device/pcix.h | 2 +- src/include/device/pnp.h | 38 ++++++++--------- src/include/device/smbus.h | 54 ++++++++++++------------ src/include/reg_script.h | 6 +-- src/lib/reg_script.c | 6 +-- 30 files changed, 230 insertions(+), 225 deletions(-) diff --git a/src/device/agp_device.c b/src/device/agp_device.c index 550297a..fc23fe6 100644 --- a/src/device/agp_device.c +++ b/src/device/agp_device.c @@ -24,7 +24,7 @@ #include <device/pci_ids.h> #include <device/agp.h> -static void agp_tune_dev(device_t dev) +static void agp_tune_dev(struct device *dev) { unsigned int cap; @@ -38,7 +38,7 @@ static void agp_tune_dev(device_t dev) unsigned int agp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max) { - device_t child; + struct device *child; max = pci_scan_bus(bus, min_devfn, max_devfn, max); @@ -53,7 +53,7 @@ unsigned int agp_scan_bus(struct bus *bus, unsigned int min_devfn, return max; } -unsigned int agp_scan_bridge(device_t dev, unsigned int max) +unsigned int agp_scan_bridge(struct device *dev, unsigned int max) { return do_pci_scan_bridge(dev, max, agp_scan_bus); } diff --git a/src/device/cardbus_device.c b/src/device/cardbus_device.c index f25f96c..e32ece3 100644 --- a/src/device/cardbus_device.c +++ b/src/device/cardbus_device.c @@ -38,7 +38,7 @@ #define CARDBUS_IO_SIZE 4096 #define CARDBUS_MEM_SIZE (32 * 1024 * 1024) -static void cardbus_record_bridge_resource(device_t dev, resource_t moving, +static void cardbus_record_bridge_resource(struct device *dev, resource_t moving, resource_t min_size, unsigned int index, unsigned long type) { struct resource *resource; @@ -70,7 +70,7 @@ static void cardbus_record_bridge_resource(device_t dev, resource_t moving, resource->size = min_size; } -static void cardbus_size_bridge_resource(device_t dev, unsigned int index) +static void cardbus_size_bridge_resource(struct device *dev, unsigned int index) { struct resource *resource; resource_t min_size; @@ -87,7 +87,7 @@ static void cardbus_size_bridge_resource(device_t dev, unsigned int index) } } -void cardbus_read_resources(device_t dev) +void cardbus_read_resources(struct device *dev) { resource_t moving_base, moving_limit, moving; unsigned long type; @@ -153,7 +153,7 @@ void cardbus_read_resources(device_t dev) compact_resources(dev); } -void cardbus_enable_resources(device_t dev) +void cardbus_enable_resources(struct device *dev) { u16 ctrl; diff --git a/src/device/cpu_device.c b/src/device/cpu_device.c index e76b539..7152d02 100644 --- a/src/device/cpu_device.c +++ b/src/device/cpu_device.c @@ -25,7 +25,7 @@ void remap_bsp_lapic(struct bus *cpu_bus) { struct device_path cpu_path; - device_t cpu; + struct device *cpu; u32 bsp_lapic_id = lapicid(); if (bsp_lapic_id) { @@ -37,10 +37,10 @@ void remap_bsp_lapic(struct bus *cpu_bus) } } -device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled) +struct device *add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled) { struct device_path cpu_path; - device_t cpu; + struct device *cpu; /* Build the cpu device path */ cpu_path.type = DEVICE_PATH_APIC; @@ -61,7 +61,7 @@ device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled) return cpu; } -void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread) +void set_cpu_topology(struct device *cpu, unsigned node, unsigned package, unsigned core, unsigned thread) { cpu->path.apic.node_id = node; cpu->path.apic.package_id = package; diff --git a/src/device/device.c b/src/device/device.c index e068cee..04fc725 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -114,9 +114,9 @@ uint64_t uma_memory_size = 0; * * @see device_path */ -static device_t __alloc_dev(struct bus *parent, struct device_path *path) +static struct device *__alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev, child; + struct device *dev, *child; /* Find the last child of our parent. */ for (child = parent->children; child && child->sibling; /* */ ) @@ -148,9 +148,9 @@ static device_t __alloc_dev(struct bus *parent, struct device_path *path) return dev; } -device_t alloc_dev(struct bus *parent, struct device_path *path) +struct device *alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev; + struct device *dev; spin_lock(&dev_lock); dev = __alloc_dev(parent, path); spin_unlock(&dev_lock); @@ -164,9 +164,9 @@ device_t alloc_dev(struct bus *parent, struct device_path *path) * @param path The relative path from the bus to the appropriate device. * @return Pointer to a device structure for the device on bus at path. */ -device_t alloc_find_dev(struct bus *parent, struct device_path *path) +struct device *alloc_find_dev(struct bus *parent, struct device_path *path) { - device_t child; + struct device *child; spin_lock(&dev_lock); child = find_dev_path(parent, path); if (!child) @@ -750,7 +750,7 @@ static void avoid_fixed_resources(struct device *dev) } } -device_t vga_pri = 0; +struct device *vga_pri = NULL; static void set_vga_bridge_bits(void) { /* diff --git a/src/device/device_romstage.c b/src/device/device_romstage.c index 987fdad..0c81d60 100644 --- a/src/device/device_romstage.c +++ b/src/device/device_romstage.c @@ -28,7 +28,7 @@ #include <device/resource.h> /** Linked list of ALL devices */ -ROMSTAGE_CONST struct device * ROMSTAGE_CONST all_devices = &dev_root; +ROMSTAGE_CONST struct device *ROMSTAGE_CONST all_devices = &dev_root; /** * Given a PCI bus and a devfn number, find the device structure. diff --git a/src/device/device_util.c b/src/device/device_util.c index d5466cb..2bdaff3 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -37,9 +37,9 @@ * @return Pointer to a device structure for the device on bus at path * or 0/NULL if no device is found. */ -device_t find_dev_path(struct bus *parent, struct device_path *path) +struct device *find_dev_path(struct bus *parent, struct device_path *path) { - device_t child; + struct device *child; for (child = parent->children; child; child = child->sibling) { if (path_eq(path, &child->path)) break; @@ -120,9 +120,10 @@ struct device *dev_find_slot_pnp(u16 port, u16 device) * @param apic_id The Local APIC ID number. * @return Pointer to the device structure (if found), 0 otherwise. */ -device_t dev_find_lapic(unsigned apic_id) +struct device *dev_find_lapic(unsigned apic_id) { - device_t dev, result = NULL; + struct device *dev = NULL; + struct device *result = NULL; for (dev = all_devices; dev; dev = dev->next) { if (dev->path.type == DEVICE_PATH_APIC && @@ -185,7 +186,7 @@ struct device *dev_find_class(unsigned int class, struct device *from) * @param dev The device path to encode. * @return Device path encoded into lower 3 bytes of dword. */ -u32 dev_path_encode(device_t dev) +u32 dev_path_encode(struct device *dev) { u32 ret; @@ -238,7 +239,7 @@ u32 dev_path_encode(device_t dev) * Warning: This function uses a static buffer. Don't call it more than once * from the same print statement! */ -const char *dev_path(device_t dev) +const char *dev_path(struct device *dev) { static char buffer[DEVICE_PATH_MAX]; @@ -308,7 +309,7 @@ const char *dev_path(device_t dev) return buffer; } -const char *dev_name(device_t dev) +const char *dev_name(struct device *dev) { if (dev->name) return dev->name; @@ -405,7 +406,7 @@ static int allocate_more_resources(void) * @param prev TODO * @return TODO. */ -static void free_resource(device_t dev, struct resource *res, +static void free_resource(struct device *dev, struct resource *res, struct resource *prev) { if (prev) @@ -424,7 +425,7 @@ static void free_resource(device_t dev, struct resource *res, * * @param dev The device to find the resource on. */ -void compact_resources(device_t dev) +void compact_resources(struct device *dev) { struct resource *res, *next, *prev = NULL; @@ -445,7 +446,7 @@ void compact_resources(device_t dev) * @param index The index of the resource on the device. * @return The resource, if it already exists. */ -struct resource *probe_resource(device_t dev, unsigned index) +struct resource *probe_resource(struct device *dev, unsigned index) { struct resource *res; @@ -468,7 +469,7 @@ struct resource *probe_resource(device_t dev, unsigned index) * @param index The index of the resource on the device. * @return TODO. */ -struct resource *new_resource(device_t dev, unsigned index) +struct resource *new_resource(struct device *dev, unsigned index) { struct resource *resource, *tail; @@ -515,7 +516,7 @@ struct resource *new_resource(device_t dev, unsigned index) * @param index The index of the resource on the device. * return TODO. */ -struct resource *find_resource(device_t dev, unsigned index) +struct resource *find_resource(struct device *dev, unsigned index) { struct resource *resource; @@ -629,7 +630,7 @@ const char *resource_type(struct resource *resource) * @param resource The resource that was just stored. * @param comment TODO */ -void report_resource_stored(device_t dev, struct resource *resource, +void report_resource_stored(struct device *dev, struct resource *resource, const char *comment) { char buf[10]; @@ -721,7 +722,7 @@ void search_global_resources(unsigned long type_mask, unsigned long type, } } -void dev_set_enabled(device_t dev, int enable) +void dev_set_enabled(struct device *dev, int enable) { if (dev->enabled == enable) return; @@ -736,7 +737,7 @@ void dev_set_enabled(device_t dev, int enable) void disable_children(struct bus *bus) { - device_t child; + struct device *child; for (child = bus->children; child; child = child->sibling) { struct bus *link; @@ -890,7 +891,7 @@ void show_all_devs_resources(int debug_level, const char* msg) } } -void fixed_mem_resource(device_t dev, unsigned long index, +void fixed_mem_resource(struct device *dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type) { struct resource *resource; @@ -939,7 +940,7 @@ u32 find_pci_tolm(struct bus *bus) /* Count of enabled CPUs */ int dev_count_cpu(void) { - device_t cpu; + struct device *cpu; int count = 0; for (cpu = all_devices; cpu; cpu = cpu->next) { diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c index d9ab486..030ddea 100644 --- a/src/device/hypertransport.c +++ b/src/device/hypertransport.c @@ -41,9 +41,10 @@ #include <cpu/amd/model_fxx_rev.h> #endif -static device_t ht_scan_get_devs(device_t *old_devices) +static struct device *ht_scan_get_devs(struct device * *old_devices) { - device_t first, last; + struct device *first; + struct device *last; first = *old_devices; last = first; @@ -60,7 +61,7 @@ static device_t ht_scan_get_devs(device_t *old_devices) } if (first) { - device_t child; + struct device *child; /* Unlink the chain from the list of old devices. */ *old_devices = last->sibling; @@ -81,7 +82,7 @@ static device_t ht_scan_get_devs(device_t *old_devices) } #if OPT_HT_LINK == 1 -static unsigned ht_read_freq_cap(device_t dev, unsigned pos) +static unsigned ht_read_freq_cap(struct device *dev, unsigned pos) { /* Handle bugs in valid hypertransport frequency reporting. */ unsigned freq_cap; @@ -126,7 +127,7 @@ struct ht_link { unsigned char ctrl_off, config_off, freq_off, freq_cap_off; }; -static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos) +static int ht_setup_link(struct ht_link *prev, struct device *dev, unsigned pos) { #if OPT_HT_LINK == 1 static const u8 link_width_to_pow2[] = { 3, 4, 0, 5, 1, 2, 0, 0 }; @@ -420,7 +421,10 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, * optimize link. */ unsigned int next_unitid, last_unitid, min_unitid, max_unitid; - device_t old_devices, dev, func, last_func = 0; + struct device *old_devices; + struct device *dev; + struct device *func; + struct device *last_func = NULL; struct ht_link prev; int ht_dev_num = 0; @@ -433,7 +437,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn, */ unsigned int real_last_unitid = 0, end_used = 0; u8 real_last_pos = 0; - device_t real_last_dev = NULL; + struct device *real_last_dev = NULL; #endif /* Restore the hypertransport chain to it's uninitialized state. */ @@ -627,7 +631,7 @@ end_of_chain: * a problem in devicetree.cb. */ if (old_devices) { - device_t left; + struct device *left; for (left = old_devices; left; left = left->sibling) printk(BIOS_DEBUG, "%s\n", dev_path(left)); diff --git a/src/device/oprom/yabel/biosemu.c b/src/device/oprom/yabel/biosemu.c index d27a5f1..86197a8 100644 --- a/src/device/oprom/yabel/biosemu.c +++ b/src/device/oprom/yabel/biosemu.c @@ -62,7 +62,7 @@ mainboard_interrupt_handlers(int interrupt, yabel_handleIntFunc func) * will look for an ExpansionROM BAR and use the code from there. */ u32 -biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_addr) +biosemu(u8 *biosmem, u32 biosmem_size, struct device *dev, unsigned long rom_addr) { u8 *rom_image; int i = 0; diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index 27d0413..a132946 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -35,7 +35,7 @@ u8* vmem = NULL; extern u8 *biosmem; -void run_bios(struct device * dev, unsigned long addr) +void run_bios(struct device *dev, unsigned long addr) { biosmem = vmem; diff --git a/src/device/oprom/yabel/device.c b/src/device/oprom/yabel/device.c index 2f41847..37e6020 100644 --- a/src/device/oprom/yabel/device.c +++ b/src/device/oprom/yabel/device.c @@ -407,7 +407,7 @@ biosemu_dev_check_exprom(unsigned long rom_base_addr) } u8 -biosemu_dev_init(struct device * device) +biosemu_dev_init(struct device *device) { u8 rval = 0; //init bios_device struct diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index 08189a9..2d38ad7 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -390,7 +390,7 @@ u32 pci_cfg_read(X86EMU_pioAddr addr, u8 size) { u32 rval = 0xFFFFFFFF; - struct device * dev; + struct device *dev; if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) { // PCI Configuration Mechanism 1 step 1 // write to 0xCF8, sets bus, device, function and Config Space offset diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 8351e9c..e82cb5c 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -157,7 +157,7 @@ unsigned pci_find_next_capability(struct device *dev, unsigned cap, * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. * @return The next matching capability. */ -unsigned pci_find_capability(device_t dev, unsigned cap) +unsigned pci_find_capability(struct device *dev, unsigned cap) { return pci_find_next_capability(dev, cap, 0); } @@ -761,7 +761,7 @@ struct device_operations default_pci_ops_bus = { * @param dev Pointer to the device structure of the bridge. * @return Appropriate bridge operations. */ -static struct device_operations *get_pci_bridge_ops(device_t dev) +static struct device_operations *get_pci_bridge_ops(struct device *dev) { #if CONFIG_PCIX_PLUGIN_SUPPORT unsigned int pcixpos; @@ -959,7 +959,7 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) * @param devfn A device/function number to look at. * @return The device structure for the device (if found), NULL otherwise. */ -device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn) +struct device *pci_probe_dev(struct device * dev, struct bus *bus, unsigned devfn) { u32 id, class; u8 hdr_type; @@ -1066,7 +1066,7 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn) * @param sdev Simple device model identifier, created with PCI_DEV(). * @return Non-zero if bus:dev.fn of device matches. */ -unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev) +unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev) { return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) && dev->path.pci.devfn == PCI_DEV2DEVFN(sdev); @@ -1146,7 +1146,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, * There's probably a problem in devicetree.cb. */ if (old_devices) { - device_t left; + struct device *left; printk(BIOS_WARNING, "PCI: Left over static devices:\n"); for (left = old_devices; left; left = left->sibling) printk(BIOS_WARNING, "%s\n", dev_path(left)); @@ -1280,7 +1280,7 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max) * @param max The highest bus number assigned up to now. * @return The maximum bus number found, after scanning all subordinate busses. */ -unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max) { max = pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff, max); return max; @@ -1326,10 +1326,10 @@ const char *pin_to_str(int pin) * @return The interrupt pin number (1 - 4) that 'dev' will * trigger when generating an interrupt */ -static int swizzle_irq_pins(device_t dev, device_t *parent_bridge) +static int swizzle_irq_pins(struct device *dev, struct device * *parent_bridge) { - device_t parent; /* Our current device's parent device */ - device_t child; /* The child device of the parent */ + struct device *parent; /* Our current device's parent device */ + struct device *child; /* The child device of the parent */ uint8_t parent_bus = 0; /* Parent Bus number */ uint16_t parent_devfn = 0; /* Parent Device and Function number */ uint16_t child_devfn = 0; /* Child Device and Function number */ @@ -1394,7 +1394,7 @@ static int swizzle_irq_pins(device_t dev, device_t *parent_bridge) * Errors: -1 is returned if the device is not enabled * -2 is returned if a parent bridge could not be found. */ -int get_pci_irq_pins(device_t dev, device_t *parent_bdg) +int get_pci_irq_pins(struct device *dev, struct device * *parent_bdg) { uint8_t bus = 0; /* The bus this device is on */ uint16_t devfn = 0; /* This device's device and function numbers */ @@ -1456,7 +1456,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4]) { unsigned int funct; - device_t pdev; + struct device *pdev; u8 line, irq; /* Each slot may contain up to eight functions. */ diff --git a/src/device/pci_ops.c b/src/device/pci_ops.c index 6ddb493..73b4242 100644 --- a/src/device/pci_ops.c +++ b/src/device/pci_ops.c @@ -25,7 +25,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> -const struct pci_bus_operations *pci_bus_default_ops(device_t dev) +const struct pci_bus_operations *pci_bus_default_ops(struct device *dev) { #if CONFIG_MMCONF_SUPPORT_DEFAULT return &pci_ops_mmconf; diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 1bdccf0..b7fdde6 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -155,7 +155,7 @@ struct rom_header *pci_rom_load(struct device *dev, */ if (PCI_CLASS_DISPLAY_VGA == (dev->class >> 8)) { #if !CONFIG_MULTIPLE_VGA_ADAPTERS - extern device_t vga_pri; /* Primary VGA device (device.c). */ + extern struct device *vga_pri; /* Primary VGA device (device.c). */ if (dev != vga_pri) return NULL; /* Only one VGA supported. */ #endif if ((void *)PCI_VGA_RAM_IMAGE_START != rom_header) { diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 87aea67..a38da40 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -30,7 +30,7 @@ * Re-train a PCIe link */ #define PCIE_TRAIN_RETRY 10000 -static int pciexp_retrain_link(device_t dev, unsigned cap) +static int pciexp_retrain_link(struct device *dev, unsigned cap) { unsigned try = PCIE_TRAIN_RETRY; u16 lnk; @@ -57,8 +57,8 @@ static int pciexp_retrain_link(device_t dev, unsigned cap) * and enable Common Clock Configuration if possible. If CCC is * enabled the link must be retrained. */ -static void pciexp_enable_common_clock(device_t root, unsigned root_cap, - device_t endp, unsigned endp_cap) +static void pciexp_enable_common_clock(struct device *root, unsigned root_cap, + struct device *endp, unsigned endp_cap) { u16 root_scc, endp_scc, lnkctl; @@ -96,8 +96,8 @@ static void pciexp_enable_common_clock(device_t root, unsigned root_cap, * by checking both root port and endpoint and returning * the highest latency value. */ -static int pciexp_aspm_latency(device_t root, unsigned root_cap, - device_t endp, unsigned endp_cap, +static int pciexp_aspm_latency(struct device *root, unsigned root_cap, + struct device *endp, unsigned endp_cap, enum aspm_type type) { int root_lat = 0, endp_lat = 0; @@ -139,8 +139,8 @@ static int pciexp_aspm_latency(device_t root, unsigned root_cap, * 2 = L1 Enabled * 3 = L0s and L1 Enabled */ -static enum aspm_type pciexp_enable_aspm(device_t root, unsigned root_cap, - device_t endp, unsigned endp_cap) +static enum aspm_type pciexp_enable_aspm(struct device *root, unsigned root_cap, + struct device *endp, unsigned endp_cap) { const char *aspm_type_str[] = { "None", "L0s", "L1", "L0s and L1" }; enum aspm_type apmc = PCIE_ASPM_NONE; @@ -182,9 +182,9 @@ static enum aspm_type pciexp_enable_aspm(device_t root, unsigned root_cap, } #endif /* CONFIG_PCIEXP_ASPM */ -static void pciexp_tune_dev(device_t dev) +static void pciexp_tune_dev(struct device *dev) { - device_t root = dev->bus->dev; + struct device *root = dev->bus->dev; unsigned int root_cap, cap; cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); @@ -216,7 +216,7 @@ static void pciexp_tune_dev(device_t dev) unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max) { - device_t child; + struct device *child; max = pci_scan_bus(bus, min_devfn, max_devfn, max); @@ -230,7 +230,7 @@ unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, return max; } -unsigned int pciexp_scan_bridge(device_t dev, unsigned int max) +unsigned int pciexp_scan_bridge(struct device *dev, unsigned int max) { return do_pci_scan_bridge(dev, max, pciexp_scan_bus); } diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c index a20c3bf..59355b5 100644 --- a/src/device/pcix_device.c +++ b/src/device/pcix_device.c @@ -24,7 +24,7 @@ #include <device/pci_ids.h> #include <device/pcix.h> -static void pcix_tune_dev(device_t dev) +static void pcix_tune_dev(struct device *dev) { u32 status; u16 orig_cmd, cmd; @@ -65,7 +65,7 @@ static void pcix_tune_dev(device_t dev) static void pcix_tune_bus(struct bus *bus) { - device_t child; + struct device *child; for (child = bus->children; child; child = child->sibling) pcix_tune_dev(child); @@ -112,7 +112,7 @@ const char *pcix_speed(u16 sstatus) return result; } -unsigned int pcix_scan_bridge(device_t dev, unsigned int max) +unsigned int pcix_scan_bridge(struct device *dev, unsigned int max) { unsigned int pos; u16 sstatus; diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c index e4aa4d3..d49b7a9 100644 --- a/src/device/pnp_device.c +++ b/src/device/pnp_device.c @@ -32,13 +32,13 @@ /* PNP config mode wrappers */ -void pnp_enter_conf_mode(device_t dev) +void pnp_enter_conf_mode(struct device *dev) { if (dev->ops->ops_pnp_mode) dev->ops->ops_pnp_mode->enter_conf_mode(dev); } -void pnp_exit_conf_mode(device_t dev) +void pnp_exit_conf_mode(struct device *dev) { if (dev->ops->ops_pnp_mode) dev->ops->ops_pnp_mode->exit_conf_mode(dev); @@ -46,24 +46,24 @@ void pnp_exit_conf_mode(device_t dev) /* PNP fundamental operations */ -void pnp_write_config(device_t dev, u8 reg, u8 value) +void pnp_write_config(struct device *dev, u8 reg, u8 value) { outb(reg, dev->path.pnp.port); outb(value, dev->path.pnp.port + 1); } -u8 pnp_read_config(device_t dev, u8 reg) +u8 pnp_read_config(struct device *dev, u8 reg) { outb(reg, dev->path.pnp.port); return inb(dev->path.pnp.port + 1); } -void pnp_set_logical_device(device_t dev) +void pnp_set_logical_device(struct device *dev) { pnp_write_config(dev, 0x07, dev->path.pnp.device & 0xff); } -void pnp_set_enable(device_t dev, int enable) +void pnp_set_enable(struct device *dev, int enable) { u8 tmp, bitpos; @@ -80,7 +80,7 @@ void pnp_set_enable(device_t dev, int enable) pnp_write_config(dev, 0x30, tmp); } -int pnp_read_enable(device_t dev) +int pnp_read_enable(struct device *dev) { u8 tmp, bitpos; @@ -92,20 +92,20 @@ int pnp_read_enable(device_t dev) return !!(tmp & (1 << bitpos)); } -void pnp_set_iobase(device_t dev, u8 index, u16 iobase) +void pnp_set_iobase(struct device *dev, u8 index, u16 iobase) { /* Index == 0x60 or 0x62. */ pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff); pnp_write_config(dev, index + 1, iobase & 0xff); } -void pnp_set_irq(device_t dev, u8 index, u8 irq) +void pnp_set_irq(struct device *dev, u8 index, u8 irq) { /* Index == 0x70 or 0x72. */ pnp_write_config(dev, index, irq); } -void pnp_set_drq(device_t dev, u8 index, u8 drq) +void pnp_set_drq(struct device *dev, u8 index, u8 drq) { /* Index == 0x74. */ pnp_write_config(dev, index, drq & 0xff); @@ -113,12 +113,12 @@ void pnp_set_drq(device_t dev, u8 index, u8 drq) /* PNP device operations */ -void pnp_read_resources(device_t dev) +void pnp_read_resources(struct device *dev) { return; } -static void pnp_set_resource(device_t dev, struct resource *resource) +static void pnp_set_resource(struct device *dev, struct resource *resource) { if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx " @@ -144,7 +144,7 @@ static void pnp_set_resource(device_t dev, struct resource *resource) report_resource_stored(dev, resource, ""); } -void pnp_set_resources(device_t dev) +void pnp_set_resources(struct device *dev) { struct resource *res; @@ -160,7 +160,7 @@ void pnp_set_resources(device_t dev) pnp_exit_conf_mode(dev); } -void pnp_enable_resources(device_t dev) +void pnp_enable_resources(struct device *dev) { pnp_enter_conf_mode(dev); pnp_set_logical_device(dev); @@ -168,7 +168,7 @@ void pnp_enable_resources(device_t dev) pnp_exit_conf_mode(dev); } -void pnp_enable(device_t dev) +void pnp_enable(struct device *dev) { if (!dev->enabled) { pnp_enter_conf_mode(dev); @@ -178,7 +178,7 @@ void pnp_enable(device_t dev) } } -void pnp_alt_enable(device_t dev) +void pnp_alt_enable(struct device *dev) { pnp_enter_conf_mode(dev); pnp_set_logical_device(dev); @@ -195,7 +195,7 @@ struct device_operations pnp_ops = { /* PNP chip operations */ -static void pnp_get_ioresource(device_t dev, u8 index, struct io_info *info) +static void pnp_get_ioresource(struct device *dev, u8 index, struct io_info *info) { struct resource *resource; unsigned moving, gran, step; @@ -246,7 +246,7 @@ static void pnp_get_ioresource(device_t dev, u8 index, struct io_info *info) resource->size = 1 << gran; } -static void get_resources(device_t dev, struct pnp_info *info) +static void get_resources(struct device *dev, struct pnp_info *info) { struct resource *resource; @@ -312,11 +312,11 @@ static void get_resources(device_t dev, struct pnp_info *info) } } -void pnp_enable_devices(device_t base_dev, struct device_operations *ops, +void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info) { struct device_path path; - device_t dev; + struct device *dev; int i; path.type = DEVICE_PATH_PNP; diff --git a/src/device/root_device.c b/src/device/root_device.c index 49fa711..fb32151 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -35,7 +35,7 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_ * * @param root Pointer to the device structure for the system root device. */ -static void root_dev_read_resources(device_t root) +static void root_dev_read_resources(struct device *root) { printk(BIOS_ERR, "%s should never be called.\n", __func__); } @@ -48,7 +48,7 @@ static void root_dev_read_resources(device_t root) * * @param root Pointer to the device structure for the system root device. */ -static void root_dev_set_resources(device_t root) +static void root_dev_set_resources(struct device *root) { printk(BIOS_ERR, "%s should never be called.\n", __func__); } @@ -76,9 +76,9 @@ static void root_dev_set_resources(device_t root) * @return The largest bus number used. */ static int smbus_max = 0; -unsigned int scan_static_bus(device_t bus, unsigned int max) +unsigned int scan_static_bus(struct device *bus, unsigned int max) { - device_t child; + struct device *child; struct bus *link; printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); @@ -121,7 +121,7 @@ unsigned int scan_static_bus(device_t bus, unsigned int max) return max; } -static void root_dev_enable_resources(device_t dev) +static void root_dev_enable_resources(struct device *dev) { } @@ -134,12 +134,12 @@ static void root_dev_enable_resources(device_t dev) * @param max The current bus number scanned so far, usually 0x00. * @return The largest bus number used. */ -static unsigned int root_dev_scan_bus(device_t root, unsigned int max) +static unsigned int root_dev_scan_bus(struct device *root, unsigned int max) { return scan_static_bus(root, max); } -static void root_dev_init(device_t root) +static void root_dev_init(struct device *root) { } diff --git a/src/device/smbus_ops.c b/src/device/smbus_ops.c index 41b31ed..547d144 100644 --- a/src/device/smbus_ops.c +++ b/src/device/smbus_ops.c @@ -25,7 +25,7 @@ #include <device/path.h> #include <device/smbus.h> -struct bus *get_pbus_smbus(device_t dev) +struct bus *get_pbus_smbus(struct device *dev) { struct bus *pbus = dev->bus; @@ -51,7 +51,7 @@ struct bus *get_pbus_smbus(device_t dev) * * @param dev TODO. */ -int smbus_set_link(device_t dev) +int smbus_set_link(struct device *dev) { struct bus *pbus_a[4]; // 4 level mux only. Enough? struct bus *pbus = dev->bus; @@ -87,70 +87,70 @@ int smbus_set_link(device_t dev) } -int smbus_quick_read(device_t dev) +int smbus_quick_read(struct device *dev) { CHECK_PRESENCE(quick_read); return ops_smbus_bus(get_pbus_smbus(dev))->quick_read(dev); } -int smbus_quick_write(device_t dev) +int smbus_quick_write(struct device *dev) { CHECK_PRESENCE(quick_write); return ops_smbus_bus(get_pbus_smbus(dev))->quick_write(dev); } -int smbus_recv_byte(device_t dev) +int smbus_recv_byte(struct device *dev) { CHECK_PRESENCE(recv_byte); return ops_smbus_bus(get_pbus_smbus(dev))->recv_byte(dev); } -int smbus_send_byte(device_t dev, u8 byte) +int smbus_send_byte(struct device *dev, u8 byte) { CHECK_PRESENCE(send_byte); return ops_smbus_bus(get_pbus_smbus(dev))->send_byte(dev, byte); } -int smbus_read_byte(device_t dev, u8 addr) +int smbus_read_byte(struct device *dev, u8 addr) { CHECK_PRESENCE(read_byte); return ops_smbus_bus(get_pbus_smbus(dev))->read_byte(dev, addr); } -int smbus_write_byte(device_t dev, u8 addr, u8 val) +int smbus_write_byte(struct device *dev, u8 addr, u8 val) { CHECK_PRESENCE(write_byte); return ops_smbus_bus(get_pbus_smbus(dev))->write_byte(dev, addr, val); } -int smbus_read_word(device_t dev, u8 addr) +int smbus_read_word(struct device *dev, u8 addr) { CHECK_PRESENCE(read_word); return ops_smbus_bus(get_pbus_smbus(dev))->read_word(dev, addr); } -int smbus_write_word(device_t dev, u8 addr, u16 val) +int smbus_write_word(struct device *dev, u8 addr, u16 val) { CHECK_PRESENCE(write_word); return ops_smbus_bus(get_pbus_smbus(dev))->write_word(dev, addr, val); } -int smbus_process_call(device_t dev, u8 cmd, u16 data) +int smbus_process_call(struct device *dev, u8 cmd, u16 data) { CHECK_PRESENCE(process_call); return ops_smbus_bus(get_pbus_smbus(dev))->process_call(dev, cmd, data); } -int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer) +int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer) { CHECK_PRESENCE(block_read); @@ -158,7 +158,7 @@ int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer) bytes, buffer); } -int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer) +int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer) { CHECK_PRESENCE(block_write); diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index 1e85596..c3ef4e9 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -1,4 +1,5 @@ #include <arch/cpu.h> +#include <arch/io.h> int init_processor_name(void); @@ -59,7 +60,7 @@ static int is_e0_later_in_bsp(int nodeid) return !is_cpu_pre_e0(); } // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid,2); val_old = pci_read_config32(dev, 0x80); val = val_old; @@ -101,7 +102,7 @@ static inline int is_cpu_pre_f2(void) static inline int is_cpu_f0_in_bsp(int nodeid) { uint32_t dword; - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid, 3); dword = pci_read_config32(dev, 0xfc); return (dword & 0xfff00) == 0x40f00; @@ -109,7 +110,7 @@ static inline int is_cpu_f0_in_bsp(int nodeid) static inline int is_cpu_pre_f2_in_bsp(int nodeid) { uint32_t dword; - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid, 3); dword = pci_read_config32(dev, 0xfc); return (dword & 0xfff0f) < 0x40f02; diff --git a/src/include/device/agp.h b/src/include/device/agp.h index be2b833..b3791fe 100644 --- a/src/include/device/agp.h +++ b/src/include/device/agp.h @@ -7,7 +7,7 @@ unsigned int agp_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); -unsigned int agp_scan_bridge(device_t dev, unsigned int max); +unsigned int agp_scan_bridge(struct device *dev, unsigned int max); extern struct device_operations default_agp_ops_bus; diff --git a/src/include/device/cardbus.h b/src/include/device/cardbus.h index 45ae24f..4443c15 100644 --- a/src/include/device/cardbus.h +++ b/src/include/device/cardbus.h @@ -5,8 +5,8 @@ #include <device/device.h> -void cardbus_read_resources(device_t dev); -void cardbus_enable_resources(device_t dev); +void cardbus_read_resources(struct device *dev); +void cardbus_enable_resources(struct device *dev); extern struct device_operations default_cardbus_ops_bus; diff --git a/src/include/device/device.h b/src/include/device/device.h index c67205c..fe8dbed 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -41,19 +41,19 @@ struct smbios_type11; struct acpi_rsdp; struct device_operations { - void (*read_resources)(device_t dev); - void (*set_resources)(device_t dev); - void (*enable_resources)(device_t dev); - void (*init)(device_t dev); - void (*final)(device_t dev); - unsigned int (*scan_bus)(device_t bus, unsigned int _max); - void (*enable)(device_t dev); - void (*disable)(device_t dev); - void (*set_link)(device_t dev, unsigned int link); + void (*read_resources)(struct device *dev); + void (*set_resources)(struct device *dev); + void (*enable_resources)(struct device *dev); + void (*init)(struct device *dev); + void (*final)(struct device *dev); + unsigned int (*scan_bus)(struct device *bus, unsigned int _max); + void (*enable)(struct device *dev); + void (*disable)(struct device *dev); + void (*set_link)(struct device *dev, unsigned int link); void (*reset_bus)(struct bus *bus); #if CONFIG_GENERATE_SMBIOS_TABLES - int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current); - void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t); + int (*get_smbios_data)(struct device *dev, int *handle, unsigned long *current); + void (*get_smbios_strings)(struct device *dev, struct smbios_type11 *t); #endif #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) && IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES) unsigned long (*write_acpi_tables)(unsigned long start, struct acpi_rsdp *rsdp); @@ -62,7 +62,7 @@ struct device_operations { #endif const struct pci_operations *ops_pci; const struct smbus_bus_operations *ops_smbus_bus; - const struct pci_bus_operations * (*ops_pci_bus)(device_t dev); + const struct pci_bus_operations * (*ops_pci_bus)(struct device *dev); const struct pnp_mode_ops *ops_pnp_mode; }; @@ -76,9 +76,8 @@ static inline void device_noop(struct device *dev) {} struct bus { - - ROMSTAGE_CONST struct device * dev; /* This bridge device */ - ROMSTAGE_CONST struct device * children; /* devices behind this bridge */ + ROMSTAGE_CONST struct device *dev; /* This bridge device */ + ROMSTAGE_CONST struct device *children; /* devices behind this bridge */ ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */ unsigned bridge_ctrl; /* Bridge control register */ unsigned char link_num; /* The index of this link */ @@ -98,7 +97,7 @@ struct pci_irq_info { unsigned int ioapic_irq_pin; unsigned int ioapic_src_pin; unsigned int ioapic_dst_id; - unsigned int ioapic_flags; + unsigned int ioapic_flags; }; struct device { @@ -159,7 +158,7 @@ extern uint64_t uma_memory_size; #endif /* Generic device interface functions */ -device_t alloc_dev(struct bus *parent, struct device_path *path); +struct device *alloc_dev(struct bus *parent, struct device_path *path); void dev_initialize_chips(void); void dev_enumerate(void); void dev_configure(void); @@ -175,30 +174,30 @@ unsigned int scan_bus(struct device *bus, unsigned int _max); void assign_resources(struct bus *bus); void enumerate_static_device(void); void enumerate_static_devices(void); -const char *dev_name(device_t dev); -const char *dev_path(device_t dev); -u32 dev_path_encode(device_t dev); +const char *dev_name(struct device *dev); +const char *dev_path(struct device *dev); +u32 dev_path_encode(struct device *dev); const char *bus_path(struct bus *bus); -void dev_set_enabled(device_t dev, int enable); +void dev_set_enabled(struct device *dev, int enable); void disable_children(struct bus *bus); /* Option ROM helper functions */ void run_bios(struct device *dev, unsigned long addr); /* Helper functions */ -device_t find_dev_path(struct bus *parent, struct device_path *path); -device_t alloc_find_dev(struct bus *parent, struct device_path *path); -device_t dev_find_device (u16 vendor, u16 device, device_t from); -device_t dev_find_class (unsigned int class, device_t from); -device_t dev_find_slot (unsigned int bus, unsigned int devfn); -device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); -device_t dev_find_slot_pnp(u16 port, u16 device); -device_t dev_find_lapic(unsigned apic_id); +struct device *find_dev_path(struct bus *parent, struct device_path *path); +struct device *alloc_find_dev(struct bus *parent, struct device_path *path); +struct device *dev_find_device (u16 vendor, u16 device, struct device *from); +struct device *dev_find_class (unsigned int class, struct device *from); +struct device *dev_find_slot (unsigned int bus, unsigned int devfn); +struct device *dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); +struct device *dev_find_slot_pnp(u16 port, u16 device); +struct device *dev_find_lapic(unsigned apic_id); int dev_count_cpu(void); void remap_bsp_lapic(struct bus *cpu_bus); -device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled); -void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread); +struct device *add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled); +void set_cpu_topology(struct device *cpu, unsigned node, unsigned package, unsigned core, unsigned thread); #define amd_cpu_topology(cpu, node, core) \ set_cpu_topology(cpu, node, 0, core, 0) @@ -207,7 +206,7 @@ void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned co set_cpu_topology(cpu, 0, package, core, thread) /* Debug functions */ -void print_resource_tree(struct device * root, int debug_level, +void print_resource_tree(struct device *root, int debug_level, const char *msg); void show_devs_tree(struct device *dev, int debug_level, int depth, int linknum); void show_devs_subtree(struct device *root, int debug_level, const char *msg); @@ -226,9 +225,9 @@ void show_all_devs_resources(int debug_level, const char* msg); extern struct device_operations default_dev_ops_root; void pci_domain_read_resources(struct device *dev); unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max); -unsigned int scan_static_bus(device_t bus, unsigned int _max); +unsigned int scan_static_bus(struct device *bus, unsigned int _max); -void fixed_mem_resource(device_t dev, unsigned long index, +void fixed_mem_resource(struct device *dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type); @@ -257,7 +256,7 @@ u32 find_pci_tolm(struct bus *bus); ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus, unsigned int devfn); -ROMSTAGE_CONST struct device *dev_find_next_pci_device( +ROMSTAGE_CONST struct device * dev_find_next_pci_device( ROMSTAGE_CONST struct device *previous_dev); ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 0670da4..3688322 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -32,7 +32,7 @@ /* Common pci operations without a standard interface */ struct pci_operations { /* set the Subsystem IDs for the PCI device */ - void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device); + void (*set_subsystem)(struct device *dev, unsigned vendor, unsigned device); }; /* Common pci bus operations */ @@ -62,35 +62,35 @@ extern struct pci_driver epci_drivers[]; extern struct device_operations default_pci_ops_dev; extern struct device_operations default_pci_ops_bus; -void pci_dev_read_resources(device_t dev); -void pci_bus_read_resources(device_t dev); -void pci_dev_set_resources(device_t dev); -void pci_dev_enable_resources(device_t dev); -void pci_bus_enable_resources(device_t dev); +void pci_dev_read_resources(struct device *dev); +void pci_bus_read_resources(struct device *dev); +void pci_dev_set_resources(struct device *dev); +void pci_dev_enable_resources(struct device *dev); +void pci_bus_enable_resources(struct device *dev); void pci_bus_reset(struct bus *bus); -device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn); -unsigned int do_pci_scan_bridge(device_t bus, unsigned int max, +struct device *pci_probe_dev(struct device *dev, struct bus *bus, unsigned devfn); +unsigned int do_pci_scan_bridge(struct device *bus, unsigned int max, unsigned int (*do_scan_bus)(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max)); -unsigned int pci_scan_bridge(device_t bus, unsigned int max); +unsigned int pci_scan_bridge(struct device *bus, unsigned int max); unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); uint8_t pci_moving_config8(struct device *dev, unsigned reg); uint16_t pci_moving_config16(struct device *dev, unsigned reg); uint32_t pci_moving_config32(struct device *dev, unsigned reg); struct resource *pci_get_resource(struct device *dev, unsigned long index); -void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device); +void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device); void pci_dev_init(struct device *dev); -unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev); +unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev); const char * pin_to_str(int pin); -int get_pci_irq_pins(device_t dev, device_t *parent_bdg); +int get_pci_irq_pins(struct device *dev, struct device **parent_bdg); void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4]); #define PCI_IO_BRIDGE_ALIGN 4096 #define PCI_MEM_BRIDGE_ALIGN (1024*1024) -static inline const struct pci_operations *ops_pci(device_t dev) +static inline const struct pci_operations *ops_pci(struct device *dev) { const struct pci_operations *pops; pops = 0; @@ -106,8 +106,8 @@ static inline const struct pci_operations *ops_pci(device_t dev) unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last); unsigned pci_find_capability(pci_devfn_t dev, unsigned cap); #else /* !__PRE_RAM__ */ -unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); -unsigned pci_find_capability(device_t dev, unsigned cap); +unsigned pci_find_next_capability(struct device *dev, unsigned cap, unsigned last); +unsigned pci_find_capability(struct device *dev, unsigned cap); #endif /* __PRE_RAM__ */ void pci_early_bridge_init(void); diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 87a5002..c7ff4f5 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -11,7 +11,7 @@ enum aspm_type { unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max); -unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); +unsigned int pciexp_scan_bridge(struct device *dev, unsigned int max); extern struct device_operations default_pciexp_ops_bus; diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index 4ffab5b..8cc83df 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -4,7 +4,7 @@ unsigned int pcix_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max); -unsigned int pcix_scan_bridge(device_t dev, unsigned int max); +unsigned int pcix_scan_bridge(struct device *dev, unsigned int max); const char *pcix_speed(u16 sstatus); extern struct device_operations default_pcix_ops_bus; diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index d0d6fa3..9290056 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -9,21 +9,21 @@ #ifndef __SIMPLE_DEVICE__ /* Primitive PNP resource manipulation */ -void pnp_write_config(device_t dev, u8 reg, u8 value); -u8 pnp_read_config(device_t dev, u8 reg); -void pnp_set_logical_device(device_t dev); -void pnp_set_enable(device_t dev, int enable); -int pnp_read_enable(device_t dev); -void pnp_set_iobase(device_t dev, u8 index, u16 iobase); -void pnp_set_irq(device_t dev, u8 index, u8 irq); -void pnp_set_drq(device_t dev, u8 index, u8 drq); +void pnp_write_config(struct device *dev, u8 reg, u8 value); +u8 pnp_read_config(struct device *dev, u8 reg); +void pnp_set_logical_device(struct device *dev); +void pnp_set_enable(struct device *dev, int enable); +int pnp_read_enable(struct device *dev); +void pnp_set_iobase(struct device *dev, u8 index, u16 iobase); +void pnp_set_irq(struct device *dev, u8 index, u8 irq); +void pnp_set_drq(struct device *dev, u8 index, u8 drq); /* PNP device operations */ -void pnp_read_resources(device_t dev); -void pnp_set_resources(device_t dev); -void pnp_enable_resources(device_t dev); -void pnp_enable(device_t dev); -void pnp_alt_enable(device_t dev); +void pnp_read_resources(struct device *dev); +void pnp_set_resources(struct device *dev); +void pnp_enable_resources(struct device *dev); +void pnp_enable(struct device *dev); +void pnp_alt_enable(struct device *dev); extern struct device_operations pnp_ops; @@ -52,16 +52,16 @@ struct pnp_info { #define PNP_MSC10 0x1000 struct io_info io0, io1, io2, io3; }; -struct resource *pnp_get_resource(device_t dev, unsigned index); +struct resource *pnp_get_resource(struct device *dev, unsigned index); void pnp_enable_devices(struct device *dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info); struct pnp_mode_ops { - void (*enter_conf_mode)(device_t dev); - void (*exit_conf_mode)(device_t dev); + void (*enter_conf_mode)(struct device *dev); + void (*exit_conf_mode)(struct device *dev); }; -void pnp_enter_conf_mode(device_t dev); -void pnp_exit_conf_mode(device_t dev); +void pnp_enter_conf_mode(struct device *dev); +void pnp_exit_conf_mode(struct device *dev); #endif /* ! __SIMPLE_DEVICE__ */ -#endif /* DEVICE_PNP_H */ +#endif /*devICE_PNP_H */ diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h index 073d7e2..7002459 100644 --- a/src/include/device/smbus.h +++ b/src/include/device/smbus.h @@ -8,17 +8,17 @@ /* Common SMBus bus operations */ struct smbus_bus_operations { - int (*quick_read) (device_t dev); - int (*quick_write) (device_t dev); - int (*recv_byte) (device_t dev); - int (*send_byte) (device_t dev, u8 value); - int (*read_byte) (device_t dev, u8 addr); - int (*write_byte) (device_t dev, u8 addr, u8 value); - int (*read_word) (device_t dev, u8 addr); - int (*write_word) (device_t dev, u8 addr, u16 value); - int (*process_call)(device_t dev, u8 cmd, u16 data); - int (*block_read) (device_t dev, u8 cmd, u8 bytes, u8 *buffer); - int (*block_write) (device_t dev, u8 cmd, u8 bytes, const u8 *buffer); + int (*quick_read) (struct device *dev); + int (*quick_write) (struct device *dev); + int (*recv_byte) (struct device *dev); + int (*send_byte) (struct device *dev, u8 value); + int (*read_byte) (struct device *dev, u8 addr); + int (*write_byte) (struct device *dev, u8 addr, u8 value); + int (*read_word) (struct device *dev, u8 addr); + int (*write_word) (struct device *dev, u8 addr, u16 value); + int (*process_call)(struct device *dev, u8 cmd, u16 data); + int (*block_read) (struct device *dev, u8 cmd, u8 bytes, u8 *buffer); + int (*block_write) (struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); }; static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) @@ -32,19 +32,19 @@ static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) return bops; } -struct bus *get_pbus_smbus(device_t dev); -int smbus_set_link(device_t dev); - -int smbus_quick_read(device_t dev); -int smbus_quick_write(device_t dev); -int smbus_recv_byte(device_t dev); -int smbus_send_byte(device_t dev, u8 byte); -int smbus_read_byte(device_t dev, u8 addr); -int smbus_write_byte(device_t dev, u8 addr, u8 val); -int smbus_read_word(device_t dev, u8 addr); -int smbus_write_word(device_t dev, u8 addr, u16 val); -int smbus_process_call(device_t dev, u8 cmd, u16 data); -int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer); -int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer); - -#endif /* DEVICE_SMBUS_H */ +struct bus *get_pbus_smbus(struct device *dev); +int smbus_set_link(struct device *dev); + +int smbus_quick_read(struct device *dev); +int smbus_quick_write(struct device *dev); +int smbus_recv_byte(struct device *dev); +int smbus_send_byte(struct device *dev, u8 byte); +int smbus_read_byte(struct device *dev, u8 addr); +int smbus_write_byte(struct device *dev, u8 addr, u8 val); +int smbus_read_word(struct device *dev, u8 addr); +int smbus_write_word(struct device *dev, u8 addr, u16 val); +int smbus_process_call(struct device *dev, u8 cmd, u16 data); +int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer); +int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); + +#endif /*devICE_SMBUS_H */ diff --git a/src/include/reg_script.h b/src/include/reg_script.h index 97b4fb0..71be7c2 100644 --- a/src/include/reg_script.h +++ b/src/include/reg_script.h @@ -34,7 +34,7 @@ * are employed: * - Chaining of tables that allow runtime tables to chain to compile-time * tables. - * - Notion of current device (device_t) being worked on. This allows for + * - Notion of current device (struct device *) being worked on. This allows for * PCI config, io, and mmio on a particular device's resources. * * Note that when using REG_SCRIPT_COMMAND_NEXT there is an implicit push @@ -80,7 +80,7 @@ struct reg_script { union { uint32_t id; const struct reg_script *next; - device_t dev; + struct device *dev; unsigned int res_index; }; }; @@ -334,6 +334,6 @@ struct reg_script { _REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_END, 0, 0, 0, 0, 0, 0, 0) void reg_script_run(const struct reg_script *script); -void reg_script_run_on_dev(device_t dev, const struct reg_script *step); +void reg_script_run_on_dev(struct device *dev, const struct reg_script *step); #endif /* REG_SCRIPT_H */ diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c index 647723b..d8fe195 100644 --- a/src/lib/reg_script.c +++ b/src/lib/reg_script.c @@ -42,13 +42,13 @@ #endif struct reg_script_context { - device_t dev; + struct device *dev; struct resource *res; const struct reg_script *step; }; static inline void reg_script_set_dev(struct reg_script_context *ctx, - device_t dev) + struct device *dev) { ctx->dev = dev; ctx->res = NULL; @@ -536,7 +536,7 @@ static void reg_script_run_next(struct reg_script_context *prev_ctx, reg_script_run_with_context(&ctx); } -void reg_script_run_on_dev(device_t dev, const struct reg_script *step) +void reg_script_run_on_dev(struct device *dev, const struct reg_script *step) { struct reg_script_context ctx;

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Patch set updated for coreboot: 3ceac6a TESTing
by Edward O'Callaghan 05 Nov '14

05 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7333 -gerrit commit 3ceac6ae1adba143cb273c410561081a68371651 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Nov 5 11:07:57 2014 +1100 TESTing Change-Id: Ieee4a1505bcbdff5b5f91a65cae21080d585867e Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/device/device.c | 14 +++++++------- src/lib/reg_script.c | 6 +++--- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/device/device.c b/src/device/device.c index e068cee..04fc725 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -114,9 +114,9 @@ uint64_t uma_memory_size = 0; * * @see device_path */ -static device_t __alloc_dev(struct bus *parent, struct device_path *path) +static struct device *__alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev, child; + struct device *dev, *child; /* Find the last child of our parent. */ for (child = parent->children; child && child->sibling; /* */ ) @@ -148,9 +148,9 @@ static device_t __alloc_dev(struct bus *parent, struct device_path *path) return dev; } -device_t alloc_dev(struct bus *parent, struct device_path *path) +struct device *alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev; + struct device *dev; spin_lock(&dev_lock); dev = __alloc_dev(parent, path); spin_unlock(&dev_lock); @@ -164,9 +164,9 @@ device_t alloc_dev(struct bus *parent, struct device_path *path) * @param path The relative path from the bus to the appropriate device. * @return Pointer to a device structure for the device on bus at path. */ -device_t alloc_find_dev(struct bus *parent, struct device_path *path) +struct device *alloc_find_dev(struct bus *parent, struct device_path *path) { - device_t child; + struct device *child; spin_lock(&dev_lock); child = find_dev_path(parent, path); if (!child) @@ -750,7 +750,7 @@ static void avoid_fixed_resources(struct device *dev) } } -device_t vga_pri = 0; +struct device *vga_pri = NULL; static void set_vga_bridge_bits(void) { /* diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c index 647723b..d8fe195 100644 --- a/src/lib/reg_script.c +++ b/src/lib/reg_script.c @@ -42,13 +42,13 @@ #endif struct reg_script_context { - device_t dev; + struct device *dev; struct resource *res; const struct reg_script *step; }; static inline void reg_script_set_dev(struct reg_script_context *ctx, - device_t dev) + struct device *dev) { ctx->dev = dev; ctx->res = NULL; @@ -536,7 +536,7 @@ static void reg_script_run_next(struct reg_script_context *prev_ctx, reg_script_run_with_context(&ctx); } -void reg_script_run_on_dev(device_t dev, const struct reg_script *step) +void reg_script_run_on_dev(struct device *dev, const struct reg_script *step) { struct reg_script_context ctx;

1 0

Patch set updated for coreboot: 7ceebd9 TESTing
by Edward O'Callaghan 05 Nov '14

05 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7333 -gerrit commit 7ceebd90f283a88b9f1d2b716f62584646ad71a3 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Nov 5 11:07:57 2014 +1100 TESTing Change-Id: Ieee4a1505bcbdff5b5f91a65cae21080d585867e Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/device/device.c | 14 +++++++------- src/lib/reg_script.c | 6 +++--- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/device/device.c b/src/device/device.c index e068cee..5c5d4d9 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -114,9 +114,9 @@ uint64_t uma_memory_size = 0; * * @see device_path */ -static device_t __alloc_dev(struct bus *parent, struct device_path *path) +static struct device *__alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev, child; + struct device *dev, child; /* Find the last child of our parent. */ for (child = parent->children; child && child->sibling; /* */ ) @@ -148,9 +148,9 @@ static device_t __alloc_dev(struct bus *parent, struct device_path *path) return dev; } -device_t alloc_dev(struct bus *parent, struct device_path *path) +struct device *alloc_dev(struct bus *parent, struct device_path *path) { - device_t dev; + struct device *dev; spin_lock(&dev_lock); dev = __alloc_dev(parent, path); spin_unlock(&dev_lock); @@ -164,9 +164,9 @@ device_t alloc_dev(struct bus *parent, struct device_path *path) * @param path The relative path from the bus to the appropriate device. * @return Pointer to a device structure for the device on bus at path. */ -device_t alloc_find_dev(struct bus *parent, struct device_path *path) +struct device *alloc_find_dev(struct bus *parent, struct device_path *path) { - device_t child; + struct device *child; spin_lock(&dev_lock); child = find_dev_path(parent, path); if (!child) @@ -750,7 +750,7 @@ static void avoid_fixed_resources(struct device *dev) } } -device_t vga_pri = 0; +struct device *vga_pri = NULL; static void set_vga_bridge_bits(void) { /* diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c index 647723b..d8fe195 100644 --- a/src/lib/reg_script.c +++ b/src/lib/reg_script.c @@ -42,13 +42,13 @@ #endif struct reg_script_context { - device_t dev; + struct device *dev; struct resource *res; const struct reg_script *step; }; static inline void reg_script_set_dev(struct reg_script_context *ctx, - device_t dev) + struct device *dev) { ctx->dev = dev; ctx->res = NULL; @@ -536,7 +536,7 @@ static void reg_script_run_next(struct reg_script_context *prev_ctx, reg_script_run_with_context(&ctx); } -void reg_script_run_on_dev(device_t dev, const struct reg_script *step) +void reg_script_run_on_dev(struct device *dev, const struct reg_script *step) { struct reg_script_context ctx;

1 0

Patch set updated for coreboot: 063a065 arm/ti/am335x: use new arm bootblock infrastructure
by Alexander Couzens 05 Nov '14

05 Nov '14

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7189 -gerrit commit 063a065a81564c0991847763828b6f6562effeff Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Fri Oct 24 23:52:56 2014 +0200 arm/ti/am335x: use new arm bootblock infrastructure commit 8b685398 (ARM: Overhaul the ARM Makefile.) change config flags for cpu and mainboard bootblock initialization. Tested on beaglebone black. Change-Id: I70cbe3abad8443c5dc71c8ba76a35973a5284477 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- src/cpu/ti/am335x/Kconfig | 9 +-------- src/cpu/ti/am335x/Makefile.inc | 3 ++- src/cpu/ti/am335x/bootblock.c | 2 +- 3 files changed, 4 insertions(+), 10 deletions(-) diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index 1de871f..fae527d 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -5,19 +5,12 @@ config CPU_TI_AM335X select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE + select CPU_HAS_BOOTBLOCK_INIT bool default n if CPU_TI_AM335X -config BOOTBLOCK_CPU_INIT - string - default "cpu/ti/am335x/bootblock.c" - help - CPU/SoC-specific bootblock code. This is useful if the - bootblock must load microcode or copy data from ROM before - searching for the bootblock. - config BOOTBLOCK_BASE hex default 0x402f0400 diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index 032b1f4..24d2594 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -1,5 +1,6 @@ -bootblock-y += dmtimer.c +bootblock-y += bootblock.c bootblock-y += bootblock_media.c +bootblock-y += dmtimer.c bootblock-y += pinmux.c romstage-y += nand.c diff --git a/src/cpu/ti/am335x/bootblock.c b/src/cpu/ti/am335x/bootblock.c index e9434a1..04c9304 100644 --- a/src/cpu/ti/am335x/bootblock.c +++ b/src/cpu/ti/am335x/bootblock.c @@ -20,8 +20,8 @@ #include <types.h> #include <arch/cache.h> +#include <bootblock_common.h> -void bootblock_cpu_init(void); void bootblock_cpu_init(void) { uint32_t sctlr;

1 0

New patch to review for coreboot: 2b8c9ba inteltool: Add support for Sandy Bridge desktop processors
by Felix Held 05 Nov '14

05 Nov '14

Felix Held (felix-coreboot(a)felixheld.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7337 -gerrit commit 2b8c9ba5cda296cd33cf15cc6609687c025f0af1 Author: Felix Held <felix-coreboot(a)felixheld.de> Date: Wed Nov 5 03:18:44 2014 +0100 inteltool: Add support for Sandy Bridge desktop processors Change-Id: I5e68b89c30d5550e4bce5c3e4c7b0689c38756bc Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- util/inteltool/inteltool.c | 3 ++- util/inteltool/inteltool.h | 3 ++- util/inteltool/memory.c | 6 ++++-- util/inteltool/pcie.c | 3 ++- 4 files changed, 10 insertions(+), 5 deletions(-) diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 5e320e2..79f0f3c 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -73,7 +73,8 @@ static const struct { /* Host bridges /DRAM controllers integrated in CPUs */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_0TH_GEN, "0th generation (Nehalem family) Core Processor" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_1ST_GEN, "1st generation (Westmere family) Core Processor" }, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_2ND_GEN, "2nd generation (Sandy Bridge family) Core Processor" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_D, "2nd generation (Sandy Bridge family) Core Processor (Desktop)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_M, "2nd generation (Sandy Bridge family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_A, "3rd generation (Ivy Bridge family) Core Processor" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_B, "3rd generation (Ivy Bridge family) Core Processor" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_C, "3rd generation (Ivy Bridge family) Core Processor" }, diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index cfee808..e031df3 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -155,7 +155,8 @@ /* Intel starts counting these generations with the integration of the DRAM controller */ #define PCI_DEVICE_ID_INTEL_CORE_0TH_GEN 0xd132 /* Nehalem */ #define PCI_DEVICE_ID_INTEL_CORE_1ST_GEN 0x0044 /* Westmere */ -#define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN 0x0104 /* Sandy Bridge */ +#define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_D 0x0100 /* Sandy Bridge (Desktop) */ +#define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_M 0x0104 /* Sandy Bridge (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_A 0x0150 /* Ivy Bridge */ #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_B 0x0154 /* Ivy Bridge */ #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_C 0x0158 /* Ivy Bridge */ diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c index a0f0a65..e2b0ab4 100644 --- a/util/inteltool/memory.c +++ b/util/inteltool/memory.c @@ -205,7 +205,8 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc) mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32; mchbar_phys &= 0x0000000fffffc000UL; /* 35:14 */ break; - case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN: + case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_D: + case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_A: /* pretty printing not implemented yet */ case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_B: case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_C: @@ -251,7 +252,8 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc) case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_B: case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_C: case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_D: - case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN: + case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_D: + case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_M: ivybridge_dump_timings(); break; } diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c index c1d06f1..549ef4b 100644 --- a/util/inteltool/pcie.c +++ b/util/inteltool/pcie.c @@ -294,7 +294,8 @@ int print_dmibar(struct pci_dev *nb) dmi_registers = westmere_dmi_registers; size = ARRAY_SIZE(westmere_dmi_registers); break; - case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN: + case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_D: + case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_M: dmi_registers = sandybridge_dmi_registers; size = ARRAY_SIZE(sandybridge_dmi_registers); case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_A: /* pretty printing not implemented yet */

1 0

New patch to review for coreboot: a3d7fc2 mainboard/supermicro/x6d{ai_g, he_g, he_g2, hr_ig, hr_ig2}: EOL
by Edward O'Callaghan 05 Nov '14

05 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7336 -gerrit commit a3d7fc248bb5a06419bdf72a5daa126aedc8a96f Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Nov 5 12:53:12 2014 +1100 mainboard/supermicro/x6d{ai_g,he_g,he_g2,hr_ig,hr_ig2}: EOL Kill off old boards. Change-Id: I0f70deb27fe862afcc5d1fd3b9f2cc0ae8a87c68 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/supermicro/Kconfig | 15 - src/mainboard/supermicro/x6dai_g/Kconfig | 32 --- src/mainboard/supermicro/x6dai_g/board_info.txt | 2 - src/mainboard/supermicro/x6dai_g/cmos.layout | 78 ----- src/mainboard/supermicro/x6dai_g/debug.c | 328 ---------------------- src/mainboard/supermicro/x6dai_g/devicetree.cb | 65 ----- src/mainboard/supermicro/x6dai_g/irq_tables.c | 39 --- src/mainboard/supermicro/x6dai_g/mptable.c | 88 ------ src/mainboard/supermicro/x6dai_g/romstage.c | 98 ------- src/mainboard/supermicro/x6dai_g/watchdog.c | 41 --- src/mainboard/supermicro/x6dhe_g/Kconfig | 33 --- src/mainboard/supermicro/x6dhe_g/board_info.txt | 2 - src/mainboard/supermicro/x6dhe_g/cmos.layout | 78 ----- src/mainboard/supermicro/x6dhe_g/debug.c | 328 ---------------------- src/mainboard/supermicro/x6dhe_g/devicetree.cb | 81 ------ src/mainboard/supermicro/x6dhe_g/irq_tables.c | 39 --- src/mainboard/supermicro/x6dhe_g/mptable.c | 132 --------- src/mainboard/supermicro/x6dhe_g/romstage.c | 105 ------- src/mainboard/supermicro/x6dhe_g/watchdog.c | 98 ------- src/mainboard/supermicro/x6dhe_g2/Kconfig | 33 --- src/mainboard/supermicro/x6dhe_g2/board_info.txt | 2 - src/mainboard/supermicro/x6dhe_g2/cmos.layout | 78 ----- src/mainboard/supermicro/x6dhe_g2/debug.c | 328 ---------------------- src/mainboard/supermicro/x6dhe_g2/devicetree.cb | 81 ------ src/mainboard/supermicro/x6dhe_g2/irq_tables.c | 39 --- src/mainboard/supermicro/x6dhe_g2/mptable.c | 133 --------- src/mainboard/supermicro/x6dhe_g2/romstage.c | 107 ------- src/mainboard/supermicro/x6dhe_g2/watchdog.c | 98 ------- src/mainboard/supermicro/x6dhr_ig/Kconfig | 33 --- src/mainboard/supermicro/x6dhr_ig/board_info.txt | 2 - src/mainboard/supermicro/x6dhr_ig/cmos.layout | 78 ----- src/mainboard/supermicro/x6dhr_ig/debug.c | 328 ---------------------- src/mainboard/supermicro/x6dhr_ig/devicetree.cb | 85 ------ src/mainboard/supermicro/x6dhr_ig/irq_tables.c | 39 --- src/mainboard/supermicro/x6dhr_ig/mptable.c | 180 ------------ src/mainboard/supermicro/x6dhr_ig/romstage.c | 106 ------- src/mainboard/supermicro/x6dhr_ig/watchdog.c | 98 ------- src/mainboard/supermicro/x6dhr_ig2/Kconfig | 33 --- src/mainboard/supermicro/x6dhr_ig2/board_info.txt | 2 - src/mainboard/supermicro/x6dhr_ig2/cmos.layout | 78 ----- src/mainboard/supermicro/x6dhr_ig2/debug.c | 328 ---------------------- src/mainboard/supermicro/x6dhr_ig2/devicetree.cb | 76 ----- src/mainboard/supermicro/x6dhr_ig2/irq_tables.c | 39 --- src/mainboard/supermicro/x6dhr_ig2/mptable.c | 168 ----------- src/mainboard/supermicro/x6dhr_ig2/romstage.c | 104 ------- src/mainboard/supermicro/x6dhr_ig2/watchdog.c | 98 ------- 46 files changed, 4456 deletions(-) diff --git a/src/mainboard/supermicro/Kconfig b/src/mainboard/supermicro/Kconfig index ef4d3bc..aaa16b3 100644 --- a/src/mainboard/supermicro/Kconfig +++ b/src/mainboard/supermicro/Kconfig @@ -17,16 +17,6 @@ config BOARD_SUPERMICRO_H8SCM bool "H8SCM" config BOARD_SUPERMICRO_H8QGI bool "H8QGI" -config BOARD_SUPERMICRO_X6DAI_G - bool "X6DAi-G" -config BOARD_SUPERMICRO_X6DHE_G2 - bool "X6DHE-G2" -config BOARD_SUPERMICRO_X6DHE_G - bool "X6DHE-G" -config BOARD_SUPERMICRO_X6DHR_IG2 - bool "X6DHR-iG2" -config BOARD_SUPERMICRO_X6DHR_IG - bool "X6DHR-iG" config BOARD_SUPERMICRO_X7DB8 bool "X7DB8 / X7DB8+" @@ -39,11 +29,6 @@ source "src/mainboard/supermicro/h8qme_fam10/Kconfig" source "src/mainboard/supermicro/h8scm_fam10/Kconfig" source "src/mainboard/supermicro/h8scm/Kconfig" source "src/mainboard/supermicro/h8qgi/Kconfig" -source "src/mainboard/supermicro/x6dai_g/Kconfig" -source "src/mainboard/supermicro/x6dhe_g2/Kconfig" -source "src/mainboard/supermicro/x6dhe_g/Kconfig" -source "src/mainboard/supermicro/x6dhr_ig2/Kconfig" -source "src/mainboard/supermicro/x6dhr_ig/Kconfig" source "src/mainboard/supermicro/x7db8/Kconfig" config MAINBOARD_VENDOR diff --git a/src/mainboard/supermicro/x6dai_g/Kconfig b/src/mainboard/supermicro/x6dai_g/Kconfig deleted file mode 100644 index 4999320..0000000 --- a/src/mainboard/supermicro/x6dai_g/Kconfig +++ /dev/null @@ -1,32 +0,0 @@ -if BOARD_SUPERMICRO_X6DAI_G - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_INTEL_SOCKET_MPGA604 - select NORTHBRIDGE_INTEL_E7525 - select SOUTHBRIDGE_INTEL_ESB6300 - select SUPERIO_WINBOND_W83627HF - select ROMCC - select HAVE_HARD_RESET - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select BOARD_ROMSIZE_KB_1024 - -config MAINBOARD_DIR - string - default supermicro/x6dai_g - -config MAINBOARD_PART_NUMBER - string - default "X6DAi-G" - -config MAX_CPUS - int - default 4 - -config IRQ_SLOT_COUNT - int - default 15 - -endif # BOARD_SUPERMICRO_X6DAI_G diff --git a/src/mainboard/supermicro/x6dai_g/board_info.txt b/src/mainboard/supermicro/x6dai_g/board_info.txt deleted file mode 100644 index 5d4f089..0000000 --- a/src/mainboard/supermicro/x6dai_g/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: server -Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7525/X6DAi-G.cfm diff --git a/src/mainboard/supermicro/x6dai_g/cmos.layout b/src/mainboard/supermicro/x6dai_g/cmos.layout deleted file mode 100644 index 635555e..0000000 --- a/src/mainboard/supermicro/x6dai_g/cmos.layout +++ /dev/null @@ -1,78 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -395 1 e 2 hyper_threading -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -728 256 h 0 user_data -984 16 h 0 check_sum -# Reserve the extended AMD configuration registers -1000 24 r 0 amd_reserved - - - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 983 984 diff --git a/src/mainboard/supermicro/x6dai_g/debug.c b/src/mainboard/supermicro/x6dai_g/debug.c deleted file mode 100644 index 93199d7..0000000 --- a/src/mainboard/supermicro/x6dai_g/debug.c +++ /dev/null @@ -1,328 +0,0 @@ -#include <spd.h> - -static void print_reg(unsigned char index) -{ - unsigned char data; - - outb(index, 0x2e); - data = inb(0x2f); - print_debug("0x"); - print_debug_hex8(index); - print_debug(": 0x"); - print_debug_hex8(data); - print_debug("\n"); - return; -} - -static void xbus_en(void) -{ - /* select the XBUS function in the SIO */ - outb(0x07, 0x2e); - outb(0x0f, 0x2f); - outb(0x30, 0x2e); - outb(0x01, 0x2f); - return; -} - -static void setup_func(unsigned char func) -{ - /* select the function in the SIO */ - outb(0x07, 0x2e); - outb(func, 0x2f); - /* print out the regs */ - print_reg(0x30); - print_reg(0x60); - print_reg(0x61); - print_reg(0x62); - print_reg(0x63); - print_reg(0x70); - print_reg(0x71); - print_reg(0x74); - print_reg(0x75); - return; -} - -static void siodump(void) -{ - int i; - unsigned char data; - - print_debug("\n*** SERVER I/O REGISTERS ***\n"); - for (i=0x10; i<=0x2d; i++) { - print_reg((unsigned char)i); - } -#if 0 - print_debug("\n*** XBUS REGISTERS ***\n"); - setup_func(0x0f); - for (i=0xf0; i<=0xff; i++) { - print_reg((unsigned char)i); - } - - print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); - setup_func(0x03); - print_reg(0xf0); - - print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); - setup_func(0x02); - print_reg(0xf0); - -#endif - print_debug("\n*** GPIO REGISTERS ***\n"); - setup_func(0x07); - for (i=0xf0; i<=0xf8; i++) { - print_reg((unsigned char)i); - } - print_debug("\n*** GPIO VALUES ***\n"); - data = inb(0x68a); - print_debug("\nGPDO 4: 0x"); - print_debug_hex8(data); - data = inb(0x68b); - print_debug("\nGPDI 4: 0x"); - print_debug_hex8(data); - print_debug("\n"); - -#if 0 - - print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); - setup_func(0x0a); - print_reg(0xf0); - - print_debug("\n*** FAN CONTROL REGISTERS ***\n"); - setup_func(0x09); - print_reg(0xf0); - print_reg(0xf1); - - print_debug("\n*** RTC REGISTERS ***\n"); - setup_func(0x10); - print_reg(0xf0); - print_reg(0xf1); - print_reg(0xf3); - print_reg(0xf6); - print_reg(0xf7); - print_reg(0xfe); - print_reg(0xff); - - print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); - setup_func(0x14); - print_reg(0xf0); -#endif - return; -} - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - -static void dump_bar14(unsigned dev) -{ - int i; - unsigned long bar; - - print_debug("BAR 14 Dump\n"); - - bar = pci_read_config32(dev, 0x14); - for(i = 0; i <= 0x300; i+=4) { -#if 0 - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); -#endif - if((i%4)==0) { - print_debug("\n"); - print_debug_hex16(i); - print_debug_char(' '); - } - print_debug_hex32(read32(bar + i)); - print_debug_char(' '); - } - print_debug("\n"); -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - } -} -#endif - -void dump_spd_registers(void) -{ - unsigned device; - device = DIMM0; - while(device <= DIMM7) { - int status = 0; - int i; - print_debug("\n"); - print_debug("dimm "); - print_debug_hex8(device); - - for(i = 0; (i < 256) ; i++) { - unsigned char byte; - if ((i % 16) == 0) { - print_debug("\n"); - print_debug_hex8(i); - print_debug(": "); - } - status = smbus_read_byte(device, i); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} - -void dump_ipmi_registers(void) -{ - unsigned device; - device = 0x42; - while(device <= 0x42) { - int status = 0; - int i; - print_debug("\n"); - print_debug("ipmi "); - print_debug_hex8(device); - - for(i = 0; (i < 8) ; i++) { - unsigned char byte; - status = smbus_read_byte(device, 2); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} diff --git a/src/mainboard/supermicro/x6dai_g/devicetree.cb b/src/mainboard/supermicro/x6dai_g/devicetree.cb deleted file mode 100644 index 60508a3..0000000 --- a/src/mainboard/supermicro/x6dai_g/devicetree.cb +++ /dev/null @@ -1,65 +0,0 @@ -chip northbridge/intel/e7525 # mch - device domain 0 on - subsystemid 0x15d9 0x6780 inherit - chip southbridge/intel/esb6300 # esb6300 - register "pirq_a_d" = "0x0b0a0a05" - register "pirq_e_h" = "0x0a0b0c80" - - device pci 1c.0 on end - - device pci 1d.0 on end - device pci 1d.1 on end - device pci 1d.4 on end - device pci 1d.5 on end - device pci 1d.7 on end - - device pci 1e.0 on end - - device pci 1f.0 on - chip superio/winbond/w83627hf - device pnp 2e.0 off end - device pnp 2e.1 off end - device pnp 2e.2 on - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.4 off end - device pnp 2e.5 off end - device pnp 2e.6 off end - device pnp 2e.7 off end - device pnp 2e.9 off end - device pnp 2e.a on end - device pnp 2e.b off end - device pnp 2e.f off end - device pnp 2e.10 off end - device pnp 2e.14 off end - end - end - device pci 1f.1 on end - device pci 1f.2 on end - device pci 1f.3 on end - device pci 1f.5 off end - device pci 1f.6 on end - end - device pci 00.0 on end - device pci 00.1 on end - device pci 00.2 on end - device pci 02.0 on end - device pci 03.0 on end - device pci 04.0 on end - device pci 08.0 on end - end - device cpu_cluster 0 on - chip cpu/intel/socket_mPGA604 # cpu0 - device lapic 0 on end - end - chip cpu/intel/socket_mPGA604 # cpu1 - device lapic 6 on end - end - end -end - diff --git a/src/mainboard/supermicro/x6dai_g/irq_tables.c b/src/mainboard/supermicro/x6dai_g/irq_tables.c deleted file mode 100644 index 9cdf027..0000000 --- a/src/mainboard/supermicro/x6dai_g/irq_tables.c +++ /dev/null @@ -1,39 +0,0 @@ -/* PCI: Interrupt Routing Table found at 0x40163ed0 size = 272 */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - 0x52495024, /* u32 signature */ - 0x0100, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */ - 0x00, /* u8 Bus 0 */ - 0xf8, /* u8 Device 1, Function 0 */ - 0x0000, /* u16 reserve IRQ for PCI */ - 0x8086, /* u16 Vendor */ - 0x122e, /* Device ID */ - 0x00000000, /* u32 miniport_data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x78, /* u8 checksum - mod 256 checksum must give zero */ - { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, 0x00, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0x00}, - {0x00, 0x10, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00}, - {0x01, 0x00, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}}, 0x04, 0x00}, - {0x00, 0x20, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00}, - {0x02, 0x00, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}}, 0x06, 0x00}, - {0x00, 0xe0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00}, - {0x04, 0x08, {{0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}}, 0x01, 0x00}, - {0x04, 0x10, {{0x6a, 0x1ef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x07, 0x00}, - {0x04, 0x18, {{0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}}, 0x02, 0x00}, - {0x00, 0xf0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00}, - {0x05, 0x40, {{0x68, 0x1ef8}, {0x69, 0x1ef8}, {0x6a, 0x1ef8}, {0x6b, 0x1ef8}}, 0x03, 0x00}, - {0x05, 0x18, {{0x6a, 0x1ef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x08, 0x00}, - {0x05, 0x10, {{0x69, 0x1ef8}, {0x6a, 0x1ef8}, {0x6b, 0x1ef8}, {0x68, 0x1ef8}}, 0x05, 0x00}, - {0x00, 0xf8, {{0x62, 0x1ef8}, {0x61, 0x1ef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0x00}, - {0x00, 0xe8, {{0x60, 0x1ef8}, {0x63, 0x1ef8}, {0x00, 0xdef8}, {0x6b, 0x1ef8}}, 0x00, 0x00} - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/supermicro/x6dai_g/mptable.c b/src/mainboard/supermicro/x6dai_g/mptable.c deleted file mode 100644 index 0efae77..0000000 --- a/src/mainboard/supermicro/x6dai_g/mptable.c +++ /dev/null @@ -1,88 +0,0 @@ -#include <console/console.h> -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <device/pci.h> -#include <string.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int bus_isa; - unsigned char bus_6300; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - - { - device_t dev; - - /* southbridge */ - dev = dev_find_slot(0, PCI_DEVFN(0x1e,0)); - if (dev) { - bus_6300 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n"); - bus_6300 = 5; - } - } - - mptable_write_buses(mc, NULL, &bus_isa); - - /* IOAPIC handling */ - - smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); - smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000); - - mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0); - - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x74, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x77, 0x02, 0x17); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x75, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7c, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7d, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7d, 0x02, 0x11); - /* Slot 1 function 0 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 4, 0x04, 0x03, 0x00); - /* Slot 2 function 0 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 4, 0x0c, 0x03, 0x01); - /* Slot 3 function 0 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_6300, 0x20, 0x02, 0x14); - /* Slot 4 function 0 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_6300, 0x08, 0x02, 0x15); - /* On board NIC */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_6300, 0x0c, 0x02, 0x16); - - /* Standard local interrupt assignments */ -// smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, -// bus_isa, 0x00, MP_APIC_ALL, 0x00); - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, - bus_isa, 0x00, MP_APIC_ALL, 0x01); - - /* There is no extension information... */ - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c deleted file mode 100644 index 0385cad..0000000 --- a/src/mainboard/supermicro/x6dai_g/romstage.c +++ /dev/null @@ -1,98 +0,0 @@ -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <cpu/x86/lapic.h> -#include <stdlib.h> -#include <console/console.h> -#include "drivers/pc80/udelay_io.c" -#include "lib/delay.c" -#include "southbridge/intel/esb6300/early_smbus.c" -#include "northbridge/intel/e7525/raminit.h" -#include "cpu/x86/lapic/boot_cpu.c" -#include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" -#include "watchdog.c" -#include "southbridge/intel/esb6300/reset.c" -#include "superio/winbond/w83627hf/early_serial.c" -#include <superio/winbond/w83627hf/w83627hf.h> -#include "northbridge/intel/e7525/memory_initialized.c" -#include "cpu/x86/bist.h" -#include <spd.h> - -#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) -#define DUMMY_DEV PNP_DEV(0x2e, 0) - -#define DEVPRES_CONFIG ( \ - DEVPRES_D1F0 | \ - DEVPRES_D2F0 | \ - DEVPRES_D3F0 | \ - DEVPRES_D4F0 | \ - DEVPRES_D6F0 | \ - 0 ) -#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/intel/e7525/raminit.c" -#include "lib/generic_sdram.c" -#include "arch/x86/lib/stages.c" - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - static const struct mem_controller mch[] = { - { - .node_id = 0, - .f0 = PCI_DEV(0, 0x00, 0), - .f1 = PCI_DEV(0, 0x00, 1), - .f2 = PCI_DEV(0, 0x00, 2), - .f3 = PCI_DEV(0, 0x00, 3), - .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, }, - .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, }, - } - }; - - if (bist == 0) { - /* Skip this if there was a built in self test failure */ - early_mtrr_init(); - if (memory_initialized()) - skip_romstage(); - } - - w83627hf_set_clksel_48(DUMMY_DEV); - w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* MOVE ME TO A BETTER LOCATION !!! */ - /* config LPC decode for flash memory access */ - device_t dev; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) - die("Missing 6300ESB?"); - pci_write_config32(dev, 0xe8, 0x00000000); - pci_write_config8(dev, 0xf0, 0x00); - -#if 0 - display_cpuid_update_microcode(); - print_pci_devices(); -#endif -#if 1 - enable_smbus(); -#endif -#if 0 - int i; - for(i = 0; i < 1; i++) - dump_spd_registers(); -#endif - disable_watchdogs(); - sdram_initialize(ARRAY_SIZE(mch), mch); -#if 1 - dump_pci_device(PCI_DEV(0, 0x00, 0)); -// dump_bar14(PCI_DEV(0, 0x00, 0)); -#endif -} diff --git a/src/mainboard/supermicro/x6dai_g/watchdog.c b/src/mainboard/supermicro/x6dai_g/watchdog.c deleted file mode 100644 index 2fd3274..0000000 --- a/src/mainboard/supermicro/x6dai_g/watchdog.c +++ /dev/null @@ -1,41 +0,0 @@ -#include <device/pnp_def.h> - -#define NSC_WD_DEV PNP_DEV(0x2e, 0xa) -#define NSC_WDBASE 0x600 -#define ICH5_WDBASE 0x400 -#define ICH5_GPIOBASE 0x500 - -static void disable_esb6300_watchdog(void) -{ - /* FIXME move me somewhere more appropriate */ - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing 6300ESB?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 10); - pci_write_config16(dev, 0x04, value); - - /* Set and enable acpibase */ - pci_write_config32(dev, 0x40, ICH5_WDBASE | 1); - pci_write_config8(dev, 0x44, 0x10); - base = ICH5_WDBASE + 0x60; - - /* Set bit 11 in TCO1_CNT */ - value = inw(base + 0x08); - value |= 1 << 11; - outw(value, base + 0x08); - - /* Clear TCO timeout status */ - outw(0x0008, base + 0x04); - outw(0x0002, base + 0x06); -} - -static void disable_watchdogs(void) -{ - disable_esb6300_watchdog(); - print_debug("Watchdogs disabled\n"); -} diff --git a/src/mainboard/supermicro/x6dhe_g/Kconfig b/src/mainboard/supermicro/x6dhe_g/Kconfig deleted file mode 100644 index d520415..0000000 --- a/src/mainboard/supermicro/x6dhe_g/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -if BOARD_SUPERMICRO_X6DHE_G - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_INTEL_SOCKET_MPGA604 - select NORTHBRIDGE_INTEL_E7520 - select SOUTHBRIDGE_INTEL_ESB6300 - select SOUTHBRIDGE_INTEL_PXHD - select SUPERIO_WINBOND_W83627HF - select ROMCC - select HAVE_HARD_RESET - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select BOARD_ROMSIZE_KB_1024 - -config MAINBOARD_DIR - string - default supermicro/x6dhe_g - -config MAINBOARD_PART_NUMBER - string - default "X6DHE-G" - -config MAX_CPUS - int - default 4 - -config IRQ_SLOT_COUNT - int - default 15 - -endif # BOARD_SUPERMICRO_X6DHE_G diff --git a/src/mainboard/supermicro/x6dhe_g/board_info.txt b/src/mainboard/supermicro/x6dhe_g/board_info.txt deleted file mode 100644 index 5d4f089..0000000 --- a/src/mainboard/supermicro/x6dhe_g/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: server -Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7525/X6DAi-G.cfm diff --git a/src/mainboard/supermicro/x6dhe_g/cmos.layout b/src/mainboard/supermicro/x6dhe_g/cmos.layout deleted file mode 100644 index 635555e..0000000 --- a/src/mainboard/supermicro/x6dhe_g/cmos.layout +++ /dev/null @@ -1,78 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -395 1 e 2 hyper_threading -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -728 256 h 0 user_data -984 16 h 0 check_sum -# Reserve the extended AMD configuration registers -1000 24 r 0 amd_reserved - - - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 983 984 diff --git a/src/mainboard/supermicro/x6dhe_g/debug.c b/src/mainboard/supermicro/x6dhe_g/debug.c deleted file mode 100644 index 93199d7..0000000 --- a/src/mainboard/supermicro/x6dhe_g/debug.c +++ /dev/null @@ -1,328 +0,0 @@ -#include <spd.h> - -static void print_reg(unsigned char index) -{ - unsigned char data; - - outb(index, 0x2e); - data = inb(0x2f); - print_debug("0x"); - print_debug_hex8(index); - print_debug(": 0x"); - print_debug_hex8(data); - print_debug("\n"); - return; -} - -static void xbus_en(void) -{ - /* select the XBUS function in the SIO */ - outb(0x07, 0x2e); - outb(0x0f, 0x2f); - outb(0x30, 0x2e); - outb(0x01, 0x2f); - return; -} - -static void setup_func(unsigned char func) -{ - /* select the function in the SIO */ - outb(0x07, 0x2e); - outb(func, 0x2f); - /* print out the regs */ - print_reg(0x30); - print_reg(0x60); - print_reg(0x61); - print_reg(0x62); - print_reg(0x63); - print_reg(0x70); - print_reg(0x71); - print_reg(0x74); - print_reg(0x75); - return; -} - -static void siodump(void) -{ - int i; - unsigned char data; - - print_debug("\n*** SERVER I/O REGISTERS ***\n"); - for (i=0x10; i<=0x2d; i++) { - print_reg((unsigned char)i); - } -#if 0 - print_debug("\n*** XBUS REGISTERS ***\n"); - setup_func(0x0f); - for (i=0xf0; i<=0xff; i++) { - print_reg((unsigned char)i); - } - - print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); - setup_func(0x03); - print_reg(0xf0); - - print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); - setup_func(0x02); - print_reg(0xf0); - -#endif - print_debug("\n*** GPIO REGISTERS ***\n"); - setup_func(0x07); - for (i=0xf0; i<=0xf8; i++) { - print_reg((unsigned char)i); - } - print_debug("\n*** GPIO VALUES ***\n"); - data = inb(0x68a); - print_debug("\nGPDO 4: 0x"); - print_debug_hex8(data); - data = inb(0x68b); - print_debug("\nGPDI 4: 0x"); - print_debug_hex8(data); - print_debug("\n"); - -#if 0 - - print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); - setup_func(0x0a); - print_reg(0xf0); - - print_debug("\n*** FAN CONTROL REGISTERS ***\n"); - setup_func(0x09); - print_reg(0xf0); - print_reg(0xf1); - - print_debug("\n*** RTC REGISTERS ***\n"); - setup_func(0x10); - print_reg(0xf0); - print_reg(0xf1); - print_reg(0xf3); - print_reg(0xf6); - print_reg(0xf7); - print_reg(0xfe); - print_reg(0xff); - - print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); - setup_func(0x14); - print_reg(0xf0); -#endif - return; -} - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - -static void dump_bar14(unsigned dev) -{ - int i; - unsigned long bar; - - print_debug("BAR 14 Dump\n"); - - bar = pci_read_config32(dev, 0x14); - for(i = 0; i <= 0x300; i+=4) { -#if 0 - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); -#endif - if((i%4)==0) { - print_debug("\n"); - print_debug_hex16(i); - print_debug_char(' '); - } - print_debug_hex32(read32(bar + i)); - print_debug_char(' '); - } - print_debug("\n"); -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - } -} -#endif - -void dump_spd_registers(void) -{ - unsigned device; - device = DIMM0; - while(device <= DIMM7) { - int status = 0; - int i; - print_debug("\n"); - print_debug("dimm "); - print_debug_hex8(device); - - for(i = 0; (i < 256) ; i++) { - unsigned char byte; - if ((i % 16) == 0) { - print_debug("\n"); - print_debug_hex8(i); - print_debug(": "); - } - status = smbus_read_byte(device, i); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} - -void dump_ipmi_registers(void) -{ - unsigned device; - device = 0x42; - while(device <= 0x42) { - int status = 0; - int i; - print_debug("\n"); - print_debug("ipmi "); - print_debug_hex8(device); - - for(i = 0; (i < 8) ; i++) { - unsigned char byte; - status = smbus_read_byte(device, 2); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} diff --git a/src/mainboard/supermicro/x6dhe_g/devicetree.cb b/src/mainboard/supermicro/x6dhe_g/devicetree.cb deleted file mode 100644 index 322860b..0000000 --- a/src/mainboard/supermicro/x6dhe_g/devicetree.cb +++ /dev/null @@ -1,81 +0,0 @@ -chip northbridge/intel/e7520 # MCH - device domain 0 on - subsystemid 0x15d9 0x6080 inherit - chip southbridge/intel/esb6300 # ESB6300 - register "pirq_a_d" = "0x0b070a05" - register "pirq_e_h" = "0x0a808080" - - device pci 1c.0 on - chip drivers/generic/generic - device pci 01.0 on end # onboard gige1 - device pci 02.0 on end # onboard gige2 - end - end - - # USB ports - device pci 1d.0 on end - device pci 1d.1 on end - device pci 1d.4 on end # Southbridge Watchdog timer - device pci 1d.5 on end # Southbridge I/O apic1 - device pci 1d.7 on end - - # VGA / PCI 32-bit - device pci 1e.0 on - chip drivers/generic/generic - device pci 01.0 on end - end - end - - - device pci 1f.0 on # ISA bridge - chip superio/winbond/w83627hf - device pnp 2e.0 off end - device pnp 2e.2 on - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.4 off end - device pnp 2e.5 off end - device pnp 2e.6 off end - device pnp 2e.7 off end - device pnp 2e.9 off end - device pnp 2e.a on end - device pnp 2e.b off end - end - end - device pci 1f.1 on end - device pci 1f.2 off end - device pci 1f.3 on end # SMBus - device pci 1f.5 off end - device pci 1f.6 off end - end - - device pci 00.0 on end # Northbridge - device pci 00.1 on end # Northbridge Error reporting - device pci 01.0 on end - device pci 02.0 on - chip southbridge/intel/pxhd # PXHD 6700 - device pci 00.0 on end # bridge - device pci 00.1 on end # I/O apic - device pci 00.2 on end # bridge - device pci 00.3 on end # I/O apic - end - end -# device register "intrline" = "0x00070105" - device pci 04.0 on end - device pci 06.0 on end - end - - device cpu_cluster 0 on - chip cpu/intel/socket_mPGA604 # CPU 0 - device lapic 0 on end - end - chip cpu/intel/socket_mPGA604 # CPU 1 - device lapic 6 on end - end - end -end diff --git a/src/mainboard/supermicro/x6dhe_g/irq_tables.c b/src/mainboard/supermicro/x6dhe_g/irq_tables.c deleted file mode 100644 index 0d2f563..0000000 --- a/src/mainboard/supermicro/x6dhe_g/irq_tables.c +++ /dev/null @@ -1,39 +0,0 @@ -/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - 0x52495024, /* u32 signature */ - 0x0100, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */ - 0x00, /* u8 Bus 0 */ - 0xf8, /* u8 Device 1, Function 0 */ - 0x0000, /* u16 reserve IRQ for PCI */ - 0x8086, /* u16 Vendor */ - 0x25a1, /* Device ID */ - 0x00000000, /* u32 miniport_data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xc4, /* u8 checksum - mod 256 checksum must give zero */ - { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00}, - {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00} - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/supermicro/x6dhe_g/mptable.c b/src/mainboard/supermicro/x6dhe_g/mptable.c deleted file mode 100644 index ab73fc7..0000000 --- a/src/mainboard/supermicro/x6dhe_g/mptable.c +++ /dev/null @@ -1,132 +0,0 @@ -#include <console/console.h> -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <device/pci.h> -#include <string.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int bus_isa; - unsigned char bus_pxhd_1; - unsigned char bus_pxhd_2; - unsigned char bus_esb6300_1; - unsigned char bus_esb6300_2; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - - { - device_t dev; - - /* esb6300_2 */ - dev = dev_find_slot(0, PCI_DEVFN(0x1c,0)); - if (dev) { - bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n"); - bus_esb6300_1 = 6; - } - /* esb6300_1 */ - dev = dev_find_slot(0, PCI_DEVFN(0x1e,0)); - if (dev) { - bus_esb6300_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n"); - bus_esb6300_2 = 7; - } - /* pxhd-1 */ - dev = dev_find_slot(1, PCI_DEVFN(0x0,0)); - if (dev) { - bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n"); - bus_pxhd_1 = 2; - } - /* pxhd-2 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,2)); - if (dev) { - bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n"); - bus_pxhd_2 = 3; - } - } - - mptable_write_buses(mc, NULL, &bus_isa); - - /* IOAPIC handling */ - - smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); - smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000); - { - struct resource *res; - device_t dev; - /* PXHd apic 4 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x04, 0x20, res->base); - } - } else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n"); - printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev); - } - /* PXHd apic 5 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,3)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x05, 0x20, res->base); - } - } else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n"); - printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev); - } - } - - mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0); - - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x74, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x77, 0x02, 0x17); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x75, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7c, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7d, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - 0x03, 0x08, 0x05, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - 0x03, 0x08, 0x05, 0x04); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_1, 0x04, 0x03, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_1, 0x08, 0x03, 0x01); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_2, 0x04, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_2, 0x08, 0x02, 0x14); - - /* Standard local interrupt assignments */ - mptable_lintsrc(mc, bus_isa); - - /* FIXME verify I have the irqs handled for all of the risers */ - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c deleted file mode 100644 index 405a2bc..0000000 --- a/src/mainboard/supermicro/x6dhe_g/romstage.c +++ /dev/null @@ -1,105 +0,0 @@ -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <cpu/x86/lapic.h> -#include <stdlib.h> -#include <console/console.h> -#include "drivers/pc80/udelay_io.c" -#include "lib/delay.c" -#include "southbridge/intel/esb6300/early_smbus.c" -#include "northbridge/intel/e7520/raminit.h" -#include "cpu/x86/lapic/boot_cpu.c" -#include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" -#include "watchdog.c" -#include "southbridge/intel/esb6300/reset.c" -#include "superio/winbond/w83627hf/early_serial.c" -#include <superio/winbond/w83627hf/w83627hf.h> -#include "northbridge/intel/e7520/memory_initialized.c" -#include "cpu/x86/bist.h" -#include <spd.h> - -#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) -#define DUMMY_DEV PNP_DEV(0x2e, 0) - -#define DEVPRES_CONFIG ( \ - DEVPRES_D1F0 | \ - DEVPRES_D2F0 | \ - DEVPRES_D3F0 | \ - DEVPRES_D4F0 | \ - DEVPRES_D6F0 | \ - 0 ) -#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) - -static void mch_reset(void) {} -static void mainboard_set_e7520_pll(unsigned bits) {} -static void mainboard_set_e7520_leds(void) {} - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/intel/e7520/raminit.c" -#include "lib/generic_sdram.c" -#include "arch/x86/lib/stages.c" - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - static const struct mem_controller mch[] = { - { - .node_id = 0, - .channel0 = {DIMM0, DIMM1, DIMM2, DIMM3, }, - .channel1 = {DIMM4, DIMM5, DIMM6, DIMM7, }, - } - }; - - if (bist == 0) { - /* Skip this if there was a built in self test failure */ - early_mtrr_init(); - if (memory_initialized()) - skip_romstage(); - } - - w83627hf_set_clksel_48(DUMMY_DEV); - w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* Halt if there was a built in self test failure */ -// report_bist_failure(bist); - - /* MOVE ME TO A BETTER LOCATION !!! */ - /* config LPC decode for flash memory access */ - device_t dev; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) - die("Missing esb6300?"); - pci_write_config32(dev, 0xe8, 0x00000000); - pci_write_config8(dev, 0xf0, 0x00); - -#if 0 - display_cpuid_update_microcode(); - print_pci_devices(); -#endif -#if 1 - enable_smbus(); -#endif -#if 0 -// dump_spd_registers(&cpu[0]); - int i; - for(i = 0; i < 1; i++) - dump_spd_registers(); -#endif - disable_watchdogs(); -// dump_ipmi_registers(); -// mainboard_set_e7520_leds(); - sdram_initialize(ARRAY_SIZE(mch), mch); -#if 0 - dump_pci_devices(); - dump_pci_device(PCI_DEV(0, 0x00, 0)); - dump_bar14(PCI_DEV(0, 0x00, 0)); -#endif -} diff --git a/src/mainboard/supermicro/x6dhe_g/watchdog.c b/src/mainboard/supermicro/x6dhe_g/watchdog.c deleted file mode 100644 index 1d34f7d..0000000 --- a/src/mainboard/supermicro/x6dhe_g/watchdog.c +++ /dev/null @@ -1,98 +0,0 @@ -#include <device/pnp_def.h> - -#define NSC_WD_DEV PNP_DEV(0x2e, 0xa) -#define NSC_WDBASE 0x600 -#define ESB6300_WDBASE 0x400 -#define ESB6300_GPIOBASE 0x500 - -static void disable_sio_watchdog(device_t dev) -{ -#if 0 - /* FIXME move me somewhere more appropriate */ - pnp_set_logical_device(dev); - pnp_set_enable(dev, 1); - pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE); - /* disable the sio watchdog */ - outb(0, NSC_WDBASE + 0); - pnp_set_enable(dev, 0); -#endif -} - -static void disable_esb6300_watchdog(void) -{ - /* FIXME move me somewhere more appropriate */ - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing esb6300?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 10); - pci_write_config16(dev, 0x04, value); - - /* Set and enable acpibase */ - pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1); - pci_write_config8(dev, 0x44, 0x10); - base = ESB6300_WDBASE + 0x60; - - /* Set bit 11 in TCO1_CNT */ - value = inw(base + 0x08); - value |= 1 << 11; - outw(value, base + 0x08); - - /* Clear TCO timeout status */ - outw(0x0008, base + 0x04); - outw(0x0002, base + 0x06); -} - -static void disable_jarell_frb3(void) -{ -#if 0 - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing esb6300?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 0); - pci_write_config16(dev, 0x04, value); - - /* Set gpio base */ - pci_write_config32(dev, 0x58, ESB6300_GPIOBASE | 1); - base = ESB6300_GPIOBASE; - - /* Enable GPIO Bar */ - value = pci_read_config32(dev, 0x5c); - value |= 0x10; - pci_write_config32(dev, 0x5c, value); - - /* Configure GPIO 48 and 40 as GPIO */ - value = inl(base + 0x30); - value |= (1 << 16) | ( 1 << 8); - outl(value, base + 0x30); - - /* Configure GPIO 48 as Output */ - value = inl(base + 0x34); - value &= ~(1 << 16); - outl(value, base + 0x34); - - /* Toggle GPIO 48 high to low */ - value = inl(base + 0x38); - value |= (1 << 16); - outl(value, base + 0x38); - value &= ~(1 << 16); - outl(value, base + 0x38); -#endif -} - -static void disable_watchdogs(void) -{ -// disable_sio_watchdog(NSC_WD_DEV); - disable_esb6300_watchdog(); -// disable_jarell_frb3(); - print_debug("Watchdogs disabled\n"); -} diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig deleted file mode 100644 index 159c9c3..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -if BOARD_SUPERMICRO_X6DHE_G2 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_INTEL_SOCKET_MPGA604 - select NORTHBRIDGE_INTEL_E7520 - select SOUTHBRIDGE_INTEL_I82801EX - select SOUTHBRIDGE_INTEL_PXHD - select SUPERIO_NSC_PC87427 - select ROMCC - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select BOARD_ROMSIZE_KB_1024 - select USE_WATCHDOG_ON_BOOT - -config MAINBOARD_DIR - string - default supermicro/x6dhe_g2 - -config MAINBOARD_PART_NUMBER - string - default "X6DHE-G2" - -config MAX_CPUS - int - default 4 - -config IRQ_SLOT_COUNT - int - default 15 - -endif # BOARD_SUPERMICRO_X6DHE_G2 diff --git a/src/mainboard/supermicro/x6dhe_g2/board_info.txt b/src/mainboard/supermicro/x6dhe_g2/board_info.txt deleted file mode 100644 index 093f85f..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: server -Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7520/X6DHE-G2.cfm diff --git a/src/mainboard/supermicro/x6dhe_g2/cmos.layout b/src/mainboard/supermicro/x6dhe_g2/cmos.layout deleted file mode 100644 index 635555e..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/cmos.layout +++ /dev/null @@ -1,78 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -395 1 e 2 hyper_threading -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -728 256 h 0 user_data -984 16 h 0 check_sum -# Reserve the extended AMD configuration registers -1000 24 r 0 amd_reserved - - - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 983 984 diff --git a/src/mainboard/supermicro/x6dhe_g2/debug.c b/src/mainboard/supermicro/x6dhe_g2/debug.c deleted file mode 100644 index 93199d7..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/debug.c +++ /dev/null @@ -1,328 +0,0 @@ -#include <spd.h> - -static void print_reg(unsigned char index) -{ - unsigned char data; - - outb(index, 0x2e); - data = inb(0x2f); - print_debug("0x"); - print_debug_hex8(index); - print_debug(": 0x"); - print_debug_hex8(data); - print_debug("\n"); - return; -} - -static void xbus_en(void) -{ - /* select the XBUS function in the SIO */ - outb(0x07, 0x2e); - outb(0x0f, 0x2f); - outb(0x30, 0x2e); - outb(0x01, 0x2f); - return; -} - -static void setup_func(unsigned char func) -{ - /* select the function in the SIO */ - outb(0x07, 0x2e); - outb(func, 0x2f); - /* print out the regs */ - print_reg(0x30); - print_reg(0x60); - print_reg(0x61); - print_reg(0x62); - print_reg(0x63); - print_reg(0x70); - print_reg(0x71); - print_reg(0x74); - print_reg(0x75); - return; -} - -static void siodump(void) -{ - int i; - unsigned char data; - - print_debug("\n*** SERVER I/O REGISTERS ***\n"); - for (i=0x10; i<=0x2d; i++) { - print_reg((unsigned char)i); - } -#if 0 - print_debug("\n*** XBUS REGISTERS ***\n"); - setup_func(0x0f); - for (i=0xf0; i<=0xff; i++) { - print_reg((unsigned char)i); - } - - print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); - setup_func(0x03); - print_reg(0xf0); - - print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); - setup_func(0x02); - print_reg(0xf0); - -#endif - print_debug("\n*** GPIO REGISTERS ***\n"); - setup_func(0x07); - for (i=0xf0; i<=0xf8; i++) { - print_reg((unsigned char)i); - } - print_debug("\n*** GPIO VALUES ***\n"); - data = inb(0x68a); - print_debug("\nGPDO 4: 0x"); - print_debug_hex8(data); - data = inb(0x68b); - print_debug("\nGPDI 4: 0x"); - print_debug_hex8(data); - print_debug("\n"); - -#if 0 - - print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); - setup_func(0x0a); - print_reg(0xf0); - - print_debug("\n*** FAN CONTROL REGISTERS ***\n"); - setup_func(0x09); - print_reg(0xf0); - print_reg(0xf1); - - print_debug("\n*** RTC REGISTERS ***\n"); - setup_func(0x10); - print_reg(0xf0); - print_reg(0xf1); - print_reg(0xf3); - print_reg(0xf6); - print_reg(0xf7); - print_reg(0xfe); - print_reg(0xff); - - print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); - setup_func(0x14); - print_reg(0xf0); -#endif - return; -} - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - -static void dump_bar14(unsigned dev) -{ - int i; - unsigned long bar; - - print_debug("BAR 14 Dump\n"); - - bar = pci_read_config32(dev, 0x14); - for(i = 0; i <= 0x300; i+=4) { -#if 0 - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); -#endif - if((i%4)==0) { - print_debug("\n"); - print_debug_hex16(i); - print_debug_char(' '); - } - print_debug_hex32(read32(bar + i)); - print_debug_char(' '); - } - print_debug("\n"); -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - } -} -#endif - -void dump_spd_registers(void) -{ - unsigned device; - device = DIMM0; - while(device <= DIMM7) { - int status = 0; - int i; - print_debug("\n"); - print_debug("dimm "); - print_debug_hex8(device); - - for(i = 0; (i < 256) ; i++) { - unsigned char byte; - if ((i % 16) == 0) { - print_debug("\n"); - print_debug_hex8(i); - print_debug(": "); - } - status = smbus_read_byte(device, i); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} - -void dump_ipmi_registers(void) -{ - unsigned device; - device = 0x42; - while(device <= 0x42) { - int status = 0; - int i; - print_debug("\n"); - print_debug("ipmi "); - print_debug_hex8(device); - - for(i = 0; (i < 8) ; i++) { - unsigned char byte; - status = smbus_read_byte(device, 2); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb deleted file mode 100644 index 984814e..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb +++ /dev/null @@ -1,81 +0,0 @@ -chip northbridge/intel/e7520 # MCH - device domain 0 on - subsystemid 0x15d9 0x6080 inherit - chip southbridge/intel/i82801ex # ICH5R - register "pirq_a_d" = "0x0b070a05" - register "pirq_e_h" = "0x0a808080" - - device pci 1c.0 on - chip drivers/generic/generic - device pci 01.0 on end # onboard gige1 - device pci 02.0 on end # onboard gige2 - end - end - - # USB ports - device pci 1d.0 on end - device pci 1d.1 on end - device pci 1d.4 on end # Southbridge Watchdog timer - device pci 1d.5 on end # Southbridge I/O apic1 - device pci 1d.7 on end - - # VGA / PCI 32-bit - device pci 1e.0 on - chip drivers/generic/generic - device pci 01.0 on end - end - end - - - device pci 1f.0 on # ISA bridge - chip superio/nsc/pc87427 - device pnp 2e.0 off end - device pnp 2e.2 on - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.4 off end - device pnp 2e.5 off end - device pnp 2e.6 off end - device pnp 2e.7 off end - device pnp 2e.9 off end - device pnp 2e.a on end - device pnp 2e.b off end - end - end - device pci 1f.1 on end - device pci 1f.2 on end - device pci 1f.3 on end # SMBus - device pci 1f.5 off end - device pci 1f.6 off end - end - - device pci 00.0 on end # Northbridge - device pci 00.1 on end # Northbridge Error reporting - device pci 01.0 on end - device pci 02.0 on - chip southbridge/intel/pxhd # PXHD 6700 - device pci 00.0 on end # bridge - device pci 00.1 on end # I/O apic - device pci 00.2 on end # bridge - device pci 00.3 on end # I/O apic - end - end -# device register "intrline" = "0x00070105" - device pci 04.0 on end - device pci 06.0 on end - end - - device cpu_cluster 0 on - chip cpu/intel/socket_mPGA604 # CPU 0 - device lapic 0 on end - end - chip cpu/intel/socket_mPGA604 # CPU 1 - device lapic 6 on end - end - end -end diff --git a/src/mainboard/supermicro/x6dhe_g2/irq_tables.c b/src/mainboard/supermicro/x6dhe_g2/irq_tables.c deleted file mode 100644 index 0d2f563..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/irq_tables.c +++ /dev/null @@ -1,39 +0,0 @@ -/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - 0x52495024, /* u32 signature */ - 0x0100, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */ - 0x00, /* u8 Bus 0 */ - 0xf8, /* u8 Device 1, Function 0 */ - 0x0000, /* u16 reserve IRQ for PCI */ - 0x8086, /* u16 Vendor */ - 0x25a1, /* Device ID */ - 0x00000000, /* u32 miniport_data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xc4, /* u8 checksum - mod 256 checksum must give zero */ - { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00}, - {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00} - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c deleted file mode 100644 index a2b8c8d..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/mptable.c +++ /dev/null @@ -1,133 +0,0 @@ -#include <console/console.h> -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <device/pci.h> -#include <string.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int bus_isa; - unsigned char bus_pxhd_1; - unsigned char bus_pxhd_2; - unsigned char bus_esb6300_1; - unsigned char bus_esb6300_2; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - - { - device_t dev; - - /* esb6300_2 */ - dev = dev_find_slot(0, PCI_DEVFN(0x1c,0)); - if (dev) { - bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n"); - bus_esb6300_1 = 6; - } - /* esb6300_1 */ - dev = dev_find_slot(0, PCI_DEVFN(0x1e,0)); - if (dev) { - bus_esb6300_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n"); - bus_esb6300_2 = 7; - } - /* pxhd-1 */ - dev = dev_find_slot(1, PCI_DEVFN(0x0,0)); - if (dev) { - bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n"); - bus_pxhd_1 = 2; - } - /* pxhd-2 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,2)); - if (dev) { - bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n"); - bus_pxhd_2 = 3; - } - } - - mptable_write_buses(mc, NULL, &bus_isa); - - /* IOAPIC handling */ - - smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); - smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000); - { - struct resource *res; - device_t dev; - /* PXHd apic 4 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x04, 0x20, res->base); - } - } else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n"); - printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev); - } - /* PXHd apic 5 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,3)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x05, 0x20, res->base); - } - } else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n"); - printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev); - } - } - - mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0); - - /* ISA backward compatibility interrupts */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x74, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x77, 0x02, 0x17); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x75, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7c, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7d, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - 0x03, 0x08, 0x05, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - 0x03, 0x08, 0x05, 0x04); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_1, 0x04, 0x03, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_1, 0x08, 0x03, 0x01); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_2, 0x04, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added - bus_esb6300_2, 0x08, 0x02, 0x14); - - /* Standard local interrupt assignments */ - mptable_lintsrc(mc, bus_isa); - - /* FIXME verify I have the irqs handled for all of the risers */ - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c deleted file mode 100644 index 48945eb..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/romstage.c +++ /dev/null @@ -1,107 +0,0 @@ -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <cpu/x86/lapic.h> -#include <stdlib.h> -#include <console/console.h> -#include "southbridge/intel/i82801ex/early_smbus.c" -#include "northbridge/intel/e7520/raminit.h" -#include "superio/nsc/pc87427/pc87427.h" -#include "cpu/x86/lapic/boot_cpu.c" -#include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" -#include "watchdog.c" -#include "southbridge/intel/i82801ex/reset.c" -#include "superio/nsc/pc87427/early_init.c" -#include "northbridge/intel/e7520/memory_initialized.c" -#include "cpu/x86/bist.h" -#include <spd.h> - -#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP1) -#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP2) - -#define DEVPRES_CONFIG ( \ - DEVPRES_D1F0 | \ - DEVPRES_D2F0 | \ - DEVPRES_D3F0 | \ - DEVPRES_D4F0 | \ - DEVPRES_D6F0 | \ - 0 ) -#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) - -static void mch_reset(void) {} -static void mainboard_set_e7520_pll(unsigned bits) {} -static void mainboard_set_e7520_leds(void) {} - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/intel/e7520/raminit.c" -#include "lib/generic_sdram.c" -#include "arch/x86/lib/stages.c" - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - static const struct mem_controller mch[] = { - { - .node_id = 0, - .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, }, - .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, }, - } - }; - - if (bist == 0) { - /* Skip this if there was a built in self test failure */ - early_mtrr_init(); - if (memory_initialized()) - skip_romstage(); - } - - /* Setup the console */ - outb(0x87,0x2e); - outb(0x87,0x2e); - pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6)); - pc87427_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* Halt if there was a built in self test failure */ -// report_bist_failure(bist); - - /* MOVE ME TO A BETTER LOCATION !!! */ - /* config LPC decode for flash memory access */ - device_t dev; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) - die("Missing ich5r?"); - pci_write_config32(dev, 0xe8, 0x00000000); - pci_write_config8(dev, 0xf0, 0x00); - -#if 0 - display_cpuid_update_microcode(); - print_pci_devices(); -#endif -#if 1 - enable_smbus(); -#endif -#if 0 -// dump_spd_registers(&cpu[0]); - int i; - for(i = 0; i < 1; i++) - dump_spd_registers(); -#endif - disable_watchdogs(); -// dump_ipmi_registers(); -// mainboard_set_e7520_leds(); - sdram_initialize(ARRAY_SIZE(mch), mch); -#if 0 - dump_pci_devices(); -#endif -#if 1 - dump_pci_device(PCI_DEV(0, 0x00, 0)); - //dump_bar14(PCI_DEV(0, 0x00, 0)); -#endif -} diff --git a/src/mainboard/supermicro/x6dhe_g2/watchdog.c b/src/mainboard/supermicro/x6dhe_g2/watchdog.c deleted file mode 100644 index 1d34f7d..0000000 --- a/src/mainboard/supermicro/x6dhe_g2/watchdog.c +++ /dev/null @@ -1,98 +0,0 @@ -#include <device/pnp_def.h> - -#define NSC_WD_DEV PNP_DEV(0x2e, 0xa) -#define NSC_WDBASE 0x600 -#define ESB6300_WDBASE 0x400 -#define ESB6300_GPIOBASE 0x500 - -static void disable_sio_watchdog(device_t dev) -{ -#if 0 - /* FIXME move me somewhere more appropriate */ - pnp_set_logical_device(dev); - pnp_set_enable(dev, 1); - pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE); - /* disable the sio watchdog */ - outb(0, NSC_WDBASE + 0); - pnp_set_enable(dev, 0); -#endif -} - -static void disable_esb6300_watchdog(void) -{ - /* FIXME move me somewhere more appropriate */ - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing esb6300?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 10); - pci_write_config16(dev, 0x04, value); - - /* Set and enable acpibase */ - pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1); - pci_write_config8(dev, 0x44, 0x10); - base = ESB6300_WDBASE + 0x60; - - /* Set bit 11 in TCO1_CNT */ - value = inw(base + 0x08); - value |= 1 << 11; - outw(value, base + 0x08); - - /* Clear TCO timeout status */ - outw(0x0008, base + 0x04); - outw(0x0002, base + 0x06); -} - -static void disable_jarell_frb3(void) -{ -#if 0 - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing esb6300?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 0); - pci_write_config16(dev, 0x04, value); - - /* Set gpio base */ - pci_write_config32(dev, 0x58, ESB6300_GPIOBASE | 1); - base = ESB6300_GPIOBASE; - - /* Enable GPIO Bar */ - value = pci_read_config32(dev, 0x5c); - value |= 0x10; - pci_write_config32(dev, 0x5c, value); - - /* Configure GPIO 48 and 40 as GPIO */ - value = inl(base + 0x30); - value |= (1 << 16) | ( 1 << 8); - outl(value, base + 0x30); - - /* Configure GPIO 48 as Output */ - value = inl(base + 0x34); - value &= ~(1 << 16); - outl(value, base + 0x34); - - /* Toggle GPIO 48 high to low */ - value = inl(base + 0x38); - value |= (1 << 16); - outl(value, base + 0x38); - value &= ~(1 << 16); - outl(value, base + 0x38); -#endif -} - -static void disable_watchdogs(void) -{ -// disable_sio_watchdog(NSC_WD_DEV); - disable_esb6300_watchdog(); -// disable_jarell_frb3(); - print_debug("Watchdogs disabled\n"); -} diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig deleted file mode 100644 index e02b2dd..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -if BOARD_SUPERMICRO_X6DHR_IG - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_INTEL_SOCKET_MPGA604 - select NORTHBRIDGE_INTEL_E7520 - select SOUTHBRIDGE_INTEL_I82801EX - select SOUTHBRIDGE_INTEL_PXHD - select SUPERIO_WINBOND_W83627HF - select ROMCC - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select USE_WATCHDOG_ON_BOOT - select BOARD_ROMSIZE_KB_1024 - -config MAINBOARD_DIR - string - default supermicro/x6dhr_ig - -config MAINBOARD_PART_NUMBER - string - default "X6DHR-iG" - -config MAX_CPUS - int - default 4 - -config IRQ_SLOT_COUNT - int - default 15 - -endif # BOARD_SUPERMICRO_X6DHR_IG diff --git a/src/mainboard/supermicro/x6dhr_ig/board_info.txt b/src/mainboard/supermicro/x6dhr_ig/board_info.txt deleted file mode 100644 index f8d9fe3..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: server -Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7520/X6DHR-iG.cfm diff --git a/src/mainboard/supermicro/x6dhr_ig/cmos.layout b/src/mainboard/supermicro/x6dhr_ig/cmos.layout deleted file mode 100644 index 635555e..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/cmos.layout +++ /dev/null @@ -1,78 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -395 1 e 2 hyper_threading -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -728 256 h 0 user_data -984 16 h 0 check_sum -# Reserve the extended AMD configuration registers -1000 24 r 0 amd_reserved - - - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 983 984 diff --git a/src/mainboard/supermicro/x6dhr_ig/debug.c b/src/mainboard/supermicro/x6dhr_ig/debug.c deleted file mode 100644 index 93199d7..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/debug.c +++ /dev/null @@ -1,328 +0,0 @@ -#include <spd.h> - -static void print_reg(unsigned char index) -{ - unsigned char data; - - outb(index, 0x2e); - data = inb(0x2f); - print_debug("0x"); - print_debug_hex8(index); - print_debug(": 0x"); - print_debug_hex8(data); - print_debug("\n"); - return; -} - -static void xbus_en(void) -{ - /* select the XBUS function in the SIO */ - outb(0x07, 0x2e); - outb(0x0f, 0x2f); - outb(0x30, 0x2e); - outb(0x01, 0x2f); - return; -} - -static void setup_func(unsigned char func) -{ - /* select the function in the SIO */ - outb(0x07, 0x2e); - outb(func, 0x2f); - /* print out the regs */ - print_reg(0x30); - print_reg(0x60); - print_reg(0x61); - print_reg(0x62); - print_reg(0x63); - print_reg(0x70); - print_reg(0x71); - print_reg(0x74); - print_reg(0x75); - return; -} - -static void siodump(void) -{ - int i; - unsigned char data; - - print_debug("\n*** SERVER I/O REGISTERS ***\n"); - for (i=0x10; i<=0x2d; i++) { - print_reg((unsigned char)i); - } -#if 0 - print_debug("\n*** XBUS REGISTERS ***\n"); - setup_func(0x0f); - for (i=0xf0; i<=0xff; i++) { - print_reg((unsigned char)i); - } - - print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); - setup_func(0x03); - print_reg(0xf0); - - print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); - setup_func(0x02); - print_reg(0xf0); - -#endif - print_debug("\n*** GPIO REGISTERS ***\n"); - setup_func(0x07); - for (i=0xf0; i<=0xf8; i++) { - print_reg((unsigned char)i); - } - print_debug("\n*** GPIO VALUES ***\n"); - data = inb(0x68a); - print_debug("\nGPDO 4: 0x"); - print_debug_hex8(data); - data = inb(0x68b); - print_debug("\nGPDI 4: 0x"); - print_debug_hex8(data); - print_debug("\n"); - -#if 0 - - print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); - setup_func(0x0a); - print_reg(0xf0); - - print_debug("\n*** FAN CONTROL REGISTERS ***\n"); - setup_func(0x09); - print_reg(0xf0); - print_reg(0xf1); - - print_debug("\n*** RTC REGISTERS ***\n"); - setup_func(0x10); - print_reg(0xf0); - print_reg(0xf1); - print_reg(0xf3); - print_reg(0xf6); - print_reg(0xf7); - print_reg(0xfe); - print_reg(0xff); - - print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); - setup_func(0x14); - print_reg(0xf0); -#endif - return; -} - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - -static void dump_bar14(unsigned dev) -{ - int i; - unsigned long bar; - - print_debug("BAR 14 Dump\n"); - - bar = pci_read_config32(dev, 0x14); - for(i = 0; i <= 0x300; i+=4) { -#if 0 - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); -#endif - if((i%4)==0) { - print_debug("\n"); - print_debug_hex16(i); - print_debug_char(' '); - } - print_debug_hex32(read32(bar + i)); - print_debug_char(' '); - } - print_debug("\n"); -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - } -} -#endif - -void dump_spd_registers(void) -{ - unsigned device; - device = DIMM0; - while(device <= DIMM7) { - int status = 0; - int i; - print_debug("\n"); - print_debug("dimm "); - print_debug_hex8(device); - - for(i = 0; (i < 256) ; i++) { - unsigned char byte; - if ((i % 16) == 0) { - print_debug("\n"); - print_debug_hex8(i); - print_debug(": "); - } - status = smbus_read_byte(device, i); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} - -void dump_ipmi_registers(void) -{ - unsigned device; - device = 0x42; - while(device <= 0x42) { - int status = 0; - int i; - print_debug("\n"); - print_debug("ipmi "); - print_debug_hex8(device); - - for(i = 0; (i < 8) ; i++) { - unsigned char byte; - status = smbus_read_byte(device, 2); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb deleted file mode 100644 index 3a037fb..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb +++ /dev/null @@ -1,85 +0,0 @@ -chip northbridge/intel/e7520 # mch - device domain 0 on - subsystemid 0x15d9 0x5580 inherit - chip southbridge/intel/i82801ex # i82801er - # USB ports - device pci 1d.0 on end - device pci 1d.1 on end - device pci 1d.2 on end - device pci 1d.3 on end - device pci 1d.7 on end - - # -> VGA - device pci 1e.0 on end - - # -> IDE - device pci 1f.0 on - chip superio/winbond/w83627hf - device pnp 2e.0 off end - device pnp 2e.2 on - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.4 off end - device pnp 2e.5 off end - device pnp 2e.6 off end - device pnp 2e.7 off end - device pnp 2e.9 off end - device pnp 2e.a on end - device pnp 2e.b off end - end - end - device pci 1f.1 on end - device pci 1f.2 on end - device pci 1f.3 on end - - register "pirq_a_d" = "0x0b070a05" - register "pirq_e_h" = "0x0a808080" - end - device pci 00.0 on end - device pci 00.1 on end - device pci 01.0 on end - device pci 02.0 on end - device pci 03.0 on - chip southbridge/intel/pxhd # pxhd1 - # Bus bridges and ioapics usually bus 2 - device pci 0.0 on end - device pci 0.1 on end - device pci 0.2 on - # On board gig e1000 - chip drivers/generic/generic - device pci 02.0 on end - device pci 02.1 on end - end - end - device pci 0.3 on end - end - end - device pci 04.0 on - chip southbridge/intel/pxhd # pxhd2 - # Bus bridges and ioapics usually bus 5 - device pci 0.0 on end - # Slot 6 is usually 6:2.0 - device pci 0.1 on end - device pci 0.2 on end - # Slot 7 is usually 7:2.0 - device pci 0.3 on end - end - end - device pci 06.0 on end - end - device cpu_cluster 0 on - chip cpu/intel/socket_mPGA604 # cpu 0 - device lapic 0 on end - end - chip cpu/intel/socket_mPGA604 # cpu 1 - device lapic 6 on end - end - end - register "intrline" = "0x00070105" -end - diff --git a/src/mainboard/supermicro/x6dhr_ig/irq_tables.c b/src/mainboard/supermicro/x6dhr_ig/irq_tables.c deleted file mode 100644 index 72f4125..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/irq_tables.c +++ /dev/null @@ -1,39 +0,0 @@ -/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - 0x52495024, /* u32 signature */ - 0x0100, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */ - 0x00, /* u8 Bus 0 */ - 0xf8, /* u8 Device 1, Function 0 */ - 0x0000, /* u16 reserve IRQ for PCI */ - 0x8086, /* u16 Vendor */ - 0x24d0, /* Device ID */ - 0x00000000, /* u32 miniport_data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xc4, /* u8 checksum - mod 256 checksum must give zero */ - { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00}, - {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00} - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/supermicro/x6dhr_ig/mptable.c b/src/mainboard/supermicro/x6dhr_ig/mptable.c deleted file mode 100644 index f9165d6..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/mptable.c +++ /dev/null @@ -1,180 +0,0 @@ -#include <console/console.h> -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <device/pci.h> -#include <string.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int bus_isa; - unsigned char bus_pxhd_1; - unsigned char bus_pxhd_2; - unsigned char bus_pxhd_3; - unsigned char bus_pxhd_4; - unsigned char bus_ich5r_1; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - - { - device_t dev; - - /* ich5r */ - dev = dev_find_slot(0, PCI_DEVFN(0x1e,0)); - if (dev) { - bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1f.0, using defaults\n"); - - bus_ich5r_1 = 9; - } - /* pxhd-1 */ - dev = dev_find_slot(2, PCI_DEVFN(0x0,0)); - if (dev) { - bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n"); - - bus_pxhd_1 = 3; - } - /* pxhd-2 */ - dev = dev_find_slot(2, PCI_DEVFN(0x00,2)); - if (dev) { - bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n"); - - bus_pxhd_2 = 4; - } - - /* pxhd-3 */ - dev = dev_find_slot(5, PCI_DEVFN(0x0,0)); - if (dev) { - bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n"); - - bus_pxhd_3 = 6; - } - /* pxhd-4 */ - dev = dev_find_slot(5, PCI_DEVFN(0x00,2)); - if (dev) { - bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n"); - - bus_pxhd_4 = 7; - } - - } - - mptable_write_buses(mc, NULL, &bus_isa); - - /* IOAPIC handling */ - - smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); - { - struct resource *res; - device_t dev; - /* pxhd apic 3 */ - dev = dev_find_slot(2, PCI_DEVFN(0x00,1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x03, 0x20, res->base); - } - } - else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.1\n"); - } - /* pxhd apic 4 */ - dev = dev_find_slot(2, PCI_DEVFN(0x00,3)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x04, 0x20, res->base); - } - } - else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.3\n"); - } - /* pxhd apic 5 */ - dev = dev_find_slot(5, PCI_DEVFN(0x00,1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x05, 0x20, res->base); - } - } - else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.1\n"); - } - /* pxhd apic 8 */ - dev = dev_find_slot(5, PCI_DEVFN(0x00,3)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x08, 0x20, res->base); - } - } - else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.3\n"); - } - } - - mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0); - - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x74, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x76, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x77, 0x02, 0x17); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x75, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x74, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7c, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7d, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_2, 0x08, 0x04, 0x06); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_2, 0x09, 0x04, 0x07); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_3, 0x08, 0x05, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_4, 0x08, 0x08, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - (bus_isa - 1), 0x04, 0x02, 0x10); - - /* Standard local interrupt assignments */ - mptable_lintsrc(mc, bus_isa); - - /* There is no extension information... */ - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c deleted file mode 100644 index 08b0ccd..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/romstage.c +++ /dev/null @@ -1,106 +0,0 @@ -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <cpu/x86/lapic.h> -#include <stdlib.h> -#include <console/console.h> -#include "southbridge/intel/i82801ex/early_smbus.c" -#include "northbridge/intel/e7520/raminit.h" -#include "cpu/x86/lapic/boot_cpu.c" -#include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" -#include "watchdog.c" -#include "southbridge/intel/i82801ex/reset.c" -#include "superio/winbond/w83627hf/early_serial.c" -#include <superio/winbond/w83627hf/w83627hf.h> -#include "northbridge/intel/e7520/memory_initialized.c" -#include "cpu/x86/bist.h" -#include <spd.h> - -#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) -#define DUMMY_DEV PNP_DEV(0x2e, 0) - -#define DEVPRES_CONFIG ( \ - DEVPRES_D0F0 | \ - DEVPRES_D1F0 | \ - DEVPRES_D2F0 | \ - DEVPRES_D3F0 | \ - DEVPRES_D4F0 | \ - DEVPRES_D6F0 | \ - 0 ) -#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) - -static void mch_reset(void) {} -static void mainboard_set_e7520_pll(unsigned bits) {} -static void mainboard_set_e7520_leds(void) {} - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/intel/e7520/raminit.c" -#include "lib/generic_sdram.c" -#include "arch/x86/lib/stages.c" - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - static const struct mem_controller mch[] = { - { - .node_id = 0, - .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, }, - .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, }, - } - }; - - if (bist == 0) { - /* Skip this if there was a built in self test failure */ - early_mtrr_init(); - if (memory_initialized()) - skip_romstage(); - } - - w83627hf_set_clksel_48(DUMMY_DEV); - w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* Halt if there was a built in self test failure */ -// report_bist_failure(bist); - - /* MOVE ME TO A BETTER LOCATION !!! */ - /* config LPC decode for flash memory access */ - device_t dev; - dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0); - if (dev == PCI_DEV_INVALID) - die("Missing ich5?"); - pci_write_config32(dev, 0xe8, 0x00000000); - pci_write_config8(dev, 0xf0, 0x00); - -#if 0 - display_cpuid_update_microcode(); - print_pci_devices(); -#endif -#if 1 - enable_smbus(); -#endif -#if 0 -// dump_spd_registers(&cpu[0]); - int i; - for(i = 0; i < 1; i++) - dump_spd_registers(); -#endif - disable_watchdogs(); -// dump_ipmi_registers(); - mainboard_set_e7520_leds(); - sdram_initialize(ARRAY_SIZE(mch), mch); -#if 1 - dump_pci_devices(); -#endif -#if 0 - dump_pci_device(PCI_DEV(0, 0x00, 0)); - dump_bar14(PCI_DEV(0, 0x00, 0)); -#endif -} diff --git a/src/mainboard/supermicro/x6dhr_ig/watchdog.c b/src/mainboard/supermicro/x6dhr_ig/watchdog.c deleted file mode 100644 index a451c32..0000000 --- a/src/mainboard/supermicro/x6dhr_ig/watchdog.c +++ /dev/null @@ -1,98 +0,0 @@ -#include <device/pnp_def.h> - -#define NSC_WD_DEV PNP_DEV(0x2e, 0xa) -#define NSC_WDBASE 0x600 -#define ICH5_WDBASE 0x400 -#define ICH5_GPIOBASE 0x500 - -static void disable_sio_watchdog(device_t dev) -{ -#if 0 - /* FIXME move me somewhere more appropriate */ - pnp_set_logical_device(dev); - pnp_set_enable(dev, 1); - pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE); - /* disable the sio watchdog */ - outb(0, NSC_WDBASE + 0); - pnp_set_enable(dev, 0); -#endif -} - -static void disable_ich5_watchdog(void) -{ - /* FIXME move me somewhere more appropriate */ - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing ich5?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 10); - pci_write_config16(dev, 0x04, value); - - /* Set and enable acpibase */ - pci_write_config32(dev, 0x40, ICH5_WDBASE | 1); - pci_write_config8(dev, 0x44, 0x10); - base = ICH5_WDBASE + 0x60; - - /* Set bit 11 in TCO1_CNT */ - value = inw(base + 0x08); - value |= 1 << 11; - outw(value, base + 0x08); - - /* Clear TCO timeout status */ - outw(0x0008, base + 0x04); - outw(0x0002, base + 0x06); -} - -static void disable_jarell_frb3(void) -{ -#if 0 - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing ich5?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 0); - pci_write_config16(dev, 0x04, value); - - /* Set gpio base */ - pci_write_config32(dev, 0x58, ICH5_GPIOBASE | 1); - base = ICH5_GPIOBASE; - - /* Enable GPIO Bar */ - value = pci_read_config32(dev, 0x5c); - value |= 0x10; - pci_write_config32(dev, 0x5c, value); - - /* Configure GPIO 48 and 40 as GPIO */ - value = inl(base + 0x30); - value |= (1 << 16) | ( 1 << 8); - outl(value, base + 0x30); - - /* Configure GPIO 48 as Output */ - value = inl(base + 0x34); - value &= ~(1 << 16); - outl(value, base + 0x34); - - /* Toggle GPIO 48 high to low */ - value = inl(base + 0x38); - value |= (1 << 16); - outl(value, base + 0x38); - value &= ~(1 << 16); - outl(value, base + 0x38); -#endif -} - -static void disable_watchdogs(void) -{ -// disable_sio_watchdog(NSC_WD_DEV); - disable_ich5_watchdog(); -// disable_jarell_frb3(); - print_debug("Watchdogs disabled\n"); -} diff --git a/src/mainboard/supermicro/x6dhr_ig2/Kconfig b/src/mainboard/supermicro/x6dhr_ig2/Kconfig deleted file mode 100644 index 9c8e4a6..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -if BOARD_SUPERMICRO_X6DHR_IG2 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_INTEL_SOCKET_MPGA604 - select NORTHBRIDGE_INTEL_E7520 - select SOUTHBRIDGE_INTEL_I82801EX - select SOUTHBRIDGE_INTEL_PXHD - select SUPERIO_WINBOND_W83627HF - select ROMCC - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select USE_WATCHDOG_ON_BOOT - select BOARD_ROMSIZE_KB_1024 - -config MAINBOARD_DIR - string - default supermicro/x6dhr_ig2 - -config MAINBOARD_PART_NUMBER - string - default "X6DHR-iG2" - -config MAX_CPUS - int - default 4 - -config IRQ_SLOT_COUNT - int - default 15 - -endif # BOARD_SUPERMICRO_X6DHR_IG2 diff --git a/src/mainboard/supermicro/x6dhr_ig2/board_info.txt b/src/mainboard/supermicro/x6dhr_ig2/board_info.txt deleted file mode 100644 index 7b89c5a..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: server -Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7520/X6DHR-iG2.cfm diff --git a/src/mainboard/supermicro/x6dhr_ig2/cmos.layout b/src/mainboard/supermicro/x6dhr_ig2/cmos.layout deleted file mode 100644 index 635555e..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/cmos.layout +++ /dev/null @@ -1,78 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -395 1 e 2 hyper_threading -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -728 256 h 0 user_data -984 16 h 0 check_sum -# Reserve the extended AMD configuration registers -1000 24 r 0 amd_reserved - - - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 983 984 diff --git a/src/mainboard/supermicro/x6dhr_ig2/debug.c b/src/mainboard/supermicro/x6dhr_ig2/debug.c deleted file mode 100644 index 93199d7..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/debug.c +++ /dev/null @@ -1,328 +0,0 @@ -#include <spd.h> - -static void print_reg(unsigned char index) -{ - unsigned char data; - - outb(index, 0x2e); - data = inb(0x2f); - print_debug("0x"); - print_debug_hex8(index); - print_debug(": 0x"); - print_debug_hex8(data); - print_debug("\n"); - return; -} - -static void xbus_en(void) -{ - /* select the XBUS function in the SIO */ - outb(0x07, 0x2e); - outb(0x0f, 0x2f); - outb(0x30, 0x2e); - outb(0x01, 0x2f); - return; -} - -static void setup_func(unsigned char func) -{ - /* select the function in the SIO */ - outb(0x07, 0x2e); - outb(func, 0x2f); - /* print out the regs */ - print_reg(0x30); - print_reg(0x60); - print_reg(0x61); - print_reg(0x62); - print_reg(0x63); - print_reg(0x70); - print_reg(0x71); - print_reg(0x74); - print_reg(0x75); - return; -} - -static void siodump(void) -{ - int i; - unsigned char data; - - print_debug("\n*** SERVER I/O REGISTERS ***\n"); - for (i=0x10; i<=0x2d; i++) { - print_reg((unsigned char)i); - } -#if 0 - print_debug("\n*** XBUS REGISTERS ***\n"); - setup_func(0x0f); - for (i=0xf0; i<=0xff; i++) { - print_reg((unsigned char)i); - } - - print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); - setup_func(0x03); - print_reg(0xf0); - - print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); - setup_func(0x02); - print_reg(0xf0); - -#endif - print_debug("\n*** GPIO REGISTERS ***\n"); - setup_func(0x07); - for (i=0xf0; i<=0xf8; i++) { - print_reg((unsigned char)i); - } - print_debug("\n*** GPIO VALUES ***\n"); - data = inb(0x68a); - print_debug("\nGPDO 4: 0x"); - print_debug_hex8(data); - data = inb(0x68b); - print_debug("\nGPDI 4: 0x"); - print_debug_hex8(data); - print_debug("\n"); - -#if 0 - - print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); - setup_func(0x0a); - print_reg(0xf0); - - print_debug("\n*** FAN CONTROL REGISTERS ***\n"); - setup_func(0x09); - print_reg(0xf0); - print_reg(0xf1); - - print_debug("\n*** RTC REGISTERS ***\n"); - setup_func(0x10); - print_reg(0xf0); - print_reg(0xf1); - print_reg(0xf3); - print_reg(0xf6); - print_reg(0xf7); - print_reg(0xfe); - print_reg(0xff); - - print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); - setup_func(0x14); - print_reg(0xf0); -#endif - return; -} - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - -static void dump_bar14(unsigned dev) -{ - int i; - unsigned long bar; - - print_debug("BAR 14 Dump\n"); - - bar = pci_read_config32(dev, 0x14); - for(i = 0; i <= 0x300; i+=4) { -#if 0 - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); -#endif - if((i%4)==0) { - print_debug("\n"); - print_debug_hex16(i); - print_debug_char(' '); - } - print_debug_hex32(read32(bar + i)); - print_debug_char(' '); - } - print_debug("\n"); -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\n"); - } - } -} -#endif - -void dump_spd_registers(void) -{ - unsigned device; - device = DIMM0; - while(device <= DIMM7) { - int status = 0; - int i; - print_debug("\n"); - print_debug("dimm "); - print_debug_hex8(device); - - for(i = 0; (i < 256) ; i++) { - unsigned char byte; - if ((i % 16) == 0) { - print_debug("\n"); - print_debug_hex8(i); - print_debug(": "); - } - status = smbus_read_byte(device, i); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} - -void dump_ipmi_registers(void) -{ - unsigned device; - device = 0x42; - while(device <= 0x42) { - int status = 0; - int i; - print_debug("\n"); - print_debug("ipmi "); - print_debug_hex8(device); - - for(i = 0; (i < 8) ; i++) { - unsigned char byte; - status = smbus_read_byte(device, 2); - if (status < 0) { - print_debug("bad device: "); - print_debug_hex8(-status); - print_debug("\n"); - break; - } - print_debug_hex8(status); - print_debug_char(' '); - } - device++; - print_debug("\n"); - } -} diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb deleted file mode 100644 index ca8650b..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb +++ /dev/null @@ -1,76 +0,0 @@ -chip northbridge/intel/e7520 # mch - device domain 0 on - subsystemid 0x15d9 0x5580 inherit - chip southbridge/intel/i82801ex # i82801er - # USB ports - device pci 1d.0 on end - device pci 1d.1 on end - device pci 1d.2 on end - device pci 1d.3 on end - device pci 1d.7 on end - - # -> Bridge - device pci 1e.0 on end - - # -> ISA - device pci 1f.0 on - chip superio/winbond/w83627hf - device pnp 2e.0 off end - device pnp 2e.2 on - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.4 off end - device pnp 2e.5 off end - device pnp 2e.6 off end - device pnp 2e.7 off end - device pnp 2e.9 off end - device pnp 2e.a on end - device pnp 2e.b off end - end - end - # -> IDE - device pci 1f.1 on end - # -> SATA - device pci 1f.2 on end - device pci 1f.3 on end - - register "pirq_a_d" = "0x0b070a05" - register "pirq_e_h" = "0x0a808080" - end - device pci 00.0 on end - device pci 00.1 on end - device pci 01.0 on end - device pci 02.0 on - chip southbridge/intel/pxhd # pxhd1 - # Bus bridges and ioapics usually bus 1 - device pci 0.0 on - # On board gig e1000 - chip drivers/generic/generic - device pci 03.0 on end - device pci 03.1 on end - end - end - device pci 0.1 on end - device pci 0.2 on end - device pci 0.3 on end - end - end - device pci 04.0 on end - device pci 06.0 on end - end - device cpu_cluster 0 on - chip cpu/intel/socket_mPGA604 # cpu 0 - device lapic 0 on end - end - chip cpu/intel/socket_mPGA604 # cpu 1 - device lapic 6 on end - end - end - register "intrline" = "0x00070105" -end - diff --git a/src/mainboard/supermicro/x6dhr_ig2/irq_tables.c b/src/mainboard/supermicro/x6dhr_ig2/irq_tables.c deleted file mode 100644 index 72f4125..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/irq_tables.c +++ /dev/null @@ -1,39 +0,0 @@ -/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - 0x52495024, /* u32 signature */ - 0x0100, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */ - 0x00, /* u8 Bus 0 */ - 0xf8, /* u8 Device 1, Function 0 */ - 0x0000, /* u16 reserve IRQ for PCI */ - 0x8086, /* u16 Vendor */ - 0x24d0, /* Device ID */ - 0x00000000, /* u32 miniport_data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xc4, /* u8 checksum - mod 256 checksum must give zero */ - { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00}, - {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00}, - {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00} - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c deleted file mode 100644 index b5ba6b1..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c +++ /dev/null @@ -1,168 +0,0 @@ -#include <console/console.h> -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <device/pci.h> -#include <string.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int bus_isa; - unsigned char bus_pxhd_1; - unsigned char bus_pxhd_2; - unsigned char bus_pxhd_3; - unsigned char bus_pxhd_4; - unsigned char bus_ich5r_1; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - - { - device_t dev; - - /* ich5r */ - dev = dev_find_slot(0, PCI_DEVFN(0x1e,0)); - if (dev) { - bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n"); - - bus_ich5r_1 = 7; - } - /* pxhd-1 */ - dev = dev_find_slot(1, PCI_DEVFN(0x0,0)); - if (dev) { - bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.0, using defaults\n"); - - bus_pxhd_1 = 2; - } - /* pxhd-2 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,2)); - if (dev) { - bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.2, using defaults\n"); - - bus_pxhd_2 = 3; - } - - /* pxhd-3 */ - dev = dev_find_slot(0, PCI_DEVFN(0x4,0)); - if (dev) { - bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0, using defaults\n"); - - bus_pxhd_3 = 5; - } - /* pxhd-4 */ - dev = dev_find_slot(0, PCI_DEVFN(0x06,0)); - if (dev) { - bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk(BIOS_DEBUG, "ERROR - could not find PCI 0:06.0, using defaults\n"); - - bus_pxhd_4 = 6; - } - - } - - mptable_write_buses(mc, NULL, &bus_isa); - - /* IOAPIC handling */ - - smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); - { - struct resource *res; - device_t dev; - /* pxhd apic 3 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x03, 0x20, res->base); - } - } - else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n"); - } - /* pxhd apic 4 */ - dev = dev_find_slot(1, PCI_DEVFN(0x00,3)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 0x04, 0x20, res->base); - } - } - else { - printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n"); - } - } - mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0); - - /* ISA backward compatibility interrupts */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x74, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x76, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x77, 0x02, 0x17); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x75, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x74, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7c, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - 0x00, 0x7d, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_1, 0x08, 0x03, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_1, 0x0c, 0x03, 0x06); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_1, 0x0d, 0x03, 0x07); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_2, 0x08, 0x04, 0x00); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_ich5r_1, 0x04, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - bus_pxhd_4, 0x00, 0x02, 0x10); -#if 0 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, - (bus_isa - 1), 0x04, 0x02, 0x10); -#endif - /* Standard local interrupt assignments */ -#if 0 - smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, - bus_isa, 0x00, MP_APIC_ALL, 0x00); -#endif - smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, - bus_isa, 0x00, MP_APIC_ALL, 0x01); - - /* There is no extension information... */ - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c deleted file mode 100644 index dfe0da2..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c +++ /dev/null @@ -1,104 +0,0 @@ -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <cpu/x86/lapic.h> -#include <stdlib.h> -#include <console/console.h> -#include "southbridge/intel/i82801ex/early_smbus.c" -#include "northbridge/intel/e7520/raminit.h" -#include "cpu/x86/lapic/boot_cpu.c" -#include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" -#include "watchdog.c" -#include "southbridge/intel/i82801ex/reset.c" -#include "superio/winbond/w83627hf/early_serial.c" -#include <superio/winbond/w83627hf/w83627hf.h> -#include "northbridge/intel/e7520/memory_initialized.c" -#include "cpu/x86/bist.h" -#include <spd.h> - -#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) -#define DUMMY_DEV PNP_DEV(0x2e, 0) - -#define DEVPRES_CONFIG ( \ - DEVPRES_D0F0 | \ - DEVPRES_D1F0 | \ - DEVPRES_D2F0 | \ - DEVPRES_D3F0 | \ - DEVPRES_D4F0 | \ - DEVPRES_D6F0 | \ - 0 ) -#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) - -static void mch_reset(void) {} -static void mainboard_set_e7520_pll(unsigned bits) {} -static void mainboard_set_e7520_leds(void) {} - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/intel/e7520/raminit.c" -#include "lib/generic_sdram.c" -#include "arch/x86/lib/stages.c" - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - static const struct mem_controller mch[] = { - { - .node_id = 0, - .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, }, - .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, }, - } - }; - - if (bist == 0) { - /* Skip this if there was a built in self test failure */ - early_mtrr_init(); - if (memory_initialized()) - skip_romstage(); - } - - w83627hf_set_clksel_48(DUMMY_DEV); - w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - /* Halt if there was a built in self test failure */ -// report_bist_failure(bist); - - /* MOVE ME TO A BETTER LOCATION !!! */ - /* config LPC decode for flash memory access */ - device_t dev; - dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0); - if (dev == PCI_DEV_INVALID) - die("Missing ich5?"); - pci_write_config32(dev, 0xe8, 0x00000000); - pci_write_config8(dev, 0xf0, 0x00); - -#if 0 - display_cpuid_update_microcode(); - print_pci_devices(); -#endif -#if 1 - enable_smbus(); -#endif -#if 0 -// dump_spd_registers(&cpu[0]); - int i; - for(i = 0; i < 1; i++) - dump_spd_registers(); -#endif - disable_watchdogs(); -// dump_ipmi_registers(); - mainboard_set_e7520_leds(); - sdram_initialize(ARRAY_SIZE(mch), mch); -#if 0 - dump_pci_devices(); - dump_pci_device(PCI_DEV(0, 0x00, 0)); - dump_bar14(PCI_DEV(0, 0x00, 0)); -#endif -} diff --git a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c b/src/mainboard/supermicro/x6dhr_ig2/watchdog.c deleted file mode 100644 index a451c32..0000000 --- a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c +++ /dev/null @@ -1,98 +0,0 @@ -#include <device/pnp_def.h> - -#define NSC_WD_DEV PNP_DEV(0x2e, 0xa) -#define NSC_WDBASE 0x600 -#define ICH5_WDBASE 0x400 -#define ICH5_GPIOBASE 0x500 - -static void disable_sio_watchdog(device_t dev) -{ -#if 0 - /* FIXME move me somewhere more appropriate */ - pnp_set_logical_device(dev); - pnp_set_enable(dev, 1); - pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE); - /* disable the sio watchdog */ - outb(0, NSC_WDBASE + 0); - pnp_set_enable(dev, 0); -#endif -} - -static void disable_ich5_watchdog(void) -{ - /* FIXME move me somewhere more appropriate */ - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing ich5?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 10); - pci_write_config16(dev, 0x04, value); - - /* Set and enable acpibase */ - pci_write_config32(dev, 0x40, ICH5_WDBASE | 1); - pci_write_config8(dev, 0x44, 0x10); - base = ICH5_WDBASE + 0x60; - - /* Set bit 11 in TCO1_CNT */ - value = inw(base + 0x08); - value |= 1 << 11; - outw(value, base + 0x08); - - /* Clear TCO timeout status */ - outw(0x0008, base + 0x04); - outw(0x0002, base + 0x06); -} - -static void disable_jarell_frb3(void) -{ -#if 0 - device_t dev; - unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0); - if (dev == PCI_DEV_INVALID) { - die("Missing ich5?"); - } - /* Enable I/O space */ - value = pci_read_config16(dev, 0x04); - value |= (1 << 0); - pci_write_config16(dev, 0x04, value); - - /* Set gpio base */ - pci_write_config32(dev, 0x58, ICH5_GPIOBASE | 1); - base = ICH5_GPIOBASE; - - /* Enable GPIO Bar */ - value = pci_read_config32(dev, 0x5c); - value |= 0x10; - pci_write_config32(dev, 0x5c, value); - - /* Configure GPIO 48 and 40 as GPIO */ - value = inl(base + 0x30); - value |= (1 << 16) | ( 1 << 8); - outl(value, base + 0x30); - - /* Configure GPIO 48 as Output */ - value = inl(base + 0x34); - value &= ~(1 << 16); - outl(value, base + 0x34); - - /* Toggle GPIO 48 high to low */ - value = inl(base + 0x38); - value |= (1 << 16); - outl(value, base + 0x38); - value &= ~(1 << 16); - outl(value, base + 0x38); -#endif -} - -static void disable_watchdogs(void) -{ -// disable_sio_watchdog(NSC_WD_DEV); - disable_ich5_watchdog(); -// disable_jarell_frb3(); - print_debug("Watchdogs disabled\n"); -}

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Patch set updated for coreboot: 508ad60 arm/allwinner/a10: use new arm bootblock infrastructure
by Alexander Couzens 05 Nov '14

05 Nov '14

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7187 -gerrit commit 508ad602b69aff06621dda370584aa8c795c036f Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Fri Oct 24 23:34:39 2014 +0200 arm/allwinner/a10: use new arm bootblock infrastructure commit 8b685398 (ARM: Overhaul the ARM Makefile.) changes config flags for cpu and mainboard bootblock initialization. Tested on a20/cubieboard2. Change-Id: I753aa60ff66de9a3352a3a0759e4d0be9d8ae1c7 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- src/cpu/allwinner/a10/Kconfig | 9 +-------- src/cpu/allwinner/a10/Makefile.inc | 1 + src/cpu/allwinner/a10/bootblock.c | 2 +- 3 files changed, 3 insertions(+), 9 deletions(-) diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index 387964f..2bf32ec 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -12,14 +12,7 @@ config CPU_SPECIFIC_OPTIONS select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE - -config BOOTBLOCK_CPU_INIT - string - default "cpu/allwinner/a10/bootblock.c" - help - CPU/SoC-specific bootblock code. This is useful if the - bootblock must load microcode or copy data from ROM before - searching for the bootblock. + select CPU_HAS_BOOTBLOCK_INIT # The "eGON.BT0" header takes 32 bytes config BOOTBLOCK_BASE diff --git a/src/cpu/allwinner/a10/Makefile.inc b/src/cpu/allwinner/a10/Makefile.inc index 716e463..152d765 100644 --- a/src/cpu/allwinner/a10/Makefile.inc +++ b/src/cpu/allwinner/a10/Makefile.inc @@ -1,3 +1,4 @@ +bootblock-y += bootblock.c bootblock-y += bootblock_media.c bootblock-y += clock.c bootblock-y += gpio.c diff --git a/src/cpu/allwinner/a10/bootblock.c b/src/cpu/allwinner/a10/bootblock.c index 38fe953..d470755 100644 --- a/src/cpu/allwinner/a10/bootblock.c +++ b/src/cpu/allwinner/a10/bootblock.c @@ -8,8 +8,8 @@ #include <types.h> #include <arch/cache.h> +#include <bootblock_common.h> -void bootblock_cpu_init(void); void bootblock_cpu_init(void) { uint32_t sctlr;

1 0

New patch to review for coreboot: 9022a71 Intel Baytrail Gold2 and earlier FSP Staying Supported
by York Yang 05 Nov '14

05 Nov '14

York Yang (york.yang(a)intel.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7335 -gerrit commit 9022a71a2d033b667bc955389b3318119608ddd1 Author: York Yang <york.yang(a)intel.com> Date: Tue Nov 4 17:20:46 2014 -0700 Intel Baytrail Gold2 and earlier FSP Staying Supported UPD_DATA_REGION structure has been updated to support Baytrail Gold3 FSP, but incompatible with previous FSP. Adjust the offset of those changed fields if FSP version is early than Gold3. Change-Id: Ia77431d31bed424ae25f297df893e45157a288a0 Signed-off-by: York Yang <york.yang(a)intel.com> --- src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 11 +++++++++++ src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.h | 4 ++++ 2 files changed, 15 insertions(+) diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index c4b781a..297ccf9 100755 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -48,6 +48,17 @@ static void GetUpdDefaultFromFsp (FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U VpdDataRgnPtr = (VPD_DATA_REGION *)(UINT32)(FspInfo->CfgRegionOffset + FspInfo->ImageBase); UpdDataRgnPtr = (UPD_DATA_REGION *)(UINT32)(VpdDataRgnPtr->PcdUpdRegionOffset + FspInfo->ImageBase); memcpy((void*)UpdData, (void*)UpdDataRgnPtr, sizeof(UPD_DATA_REGION)); + + /* adjust struct UPD_DATA_REGION content for Gold2 and earlier FSP */ + /* Gold3 FSP changes the UPD_DATA_REGION fields, adjust the struct */ + /* content in order to backward compatible with older FSP */ + /* */ + /* ISPEnable and PcdRegionTerminator are following PcdGttSize in */ + /* Gold2 and older FSP */ + if (FspInfo->ImageRevision < FSP_GOLD3_REV_ID) { + *(&(UpdData->PcdGttSize)+sizeof(UINT8)) = UpdData->ISPEnable; + *(&(UpdData->PcdGttSize)+sizeof(UINT8)+sizeof(UINT8)) = UpdData->PcdRegionTerminator; + } } /* default to just enabling HDMI audio */ diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.h b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.h old mode 100644 new mode 100755 index 1b60398..3861ac1 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.h +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. + * Copyright (C) 2014 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -46,4 +47,7 @@ #define FSP_IMAGE_ID_DWORD0 0x56594C56 /* 'VLYV' */ #define FSP_IMAGE_ID_DWORD1 0x30574549 /* 'IEW0' */ +/* Revision of the FSP binary */ +#define FSP_GOLD3_REV_ID 0x00000303 + #endif /* CHIPSET_FSP_UTIL_H */

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New patch to review for coreboot: a477c12 Intel Baytrail Gold3 FSP Support
by York Yang 05 Nov '14

05 Nov '14

York Yang (york.yang(a)intel.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7334 -gerrit commit a477c124d31077ba827e1d97eb3c032da4d68da9 Author: York Yang <york.yang(a)intel.com> Date: Tue Nov 4 17:04:37 2014 -0700 Intel Baytrail Gold3 FSP Support Baytrail Gold3 FSP added a couple of parameters in UPD_DATA_REGION to accept the platform settings being inputted from coreboot. Update the UPD_DATA_REGION structure and give settings into FSP. Change-Id: Ia2d2d0595328ac771762a84da40697a3b7e900c6 Signed-off-by: York Yang <york.yang(a)intel.com> --- src/soc/intel/fsp_baytrail/chip.h | 22 ++++ src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 19 ++++ src/vendorcode/intel/fsp/baytrail/include/fspvpd.h | 116 ++++++++++++--------- 3 files changed, 110 insertions(+), 47 deletions(-) diff --git a/src/soc/intel/fsp_baytrail/chip.h b/src/soc/intel/fsp_baytrail/chip.h old mode 100644 new mode 100755 index 7e86862..96b73ba --- a/src/soc/intel/fsp_baytrail/chip.h +++ b/src/soc/intel/fsp_baytrail/chip.h @@ -3,6 +3,7 @@ * * Copyright (C) 2013 Google Inc. * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. + * Copyright (C) 2014 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,6 +30,27 @@ struct soc_intel_fsp_baytrail_config { /* ***** UPD Configuration ***** */ + /* GFX render standby */ + uint8_t IgdRenderStandby; + #define IGD_RENDER_STANDBY_DEFAULT 0x00 + + /* Memory down data */ + uint8_t EnableMemoryDown; + uint8_t DRAMSpeed; + uint8_t DRAMType; + uint8_t DIMM0Enable; + uint8_t DIMM1Enable; + uint8_t DIMMDWidth; + uint8_t DIMMDensity; + uint8_t DIMMBusWidth; + uint8_t DIMMSides; + uint8_t DIMMtCL; + uint8_t DIMMtRPtRCD; + uint8_t DIMMtWR; + uint8_t DIMMtWTR; + uint8_t DIMMtRRD; + uint8_t DIMMtRTP; + uint8_t DIMMtFAW; /* Spd addresses */ uint8_t MrcInitSPDAddr1; diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c old mode 100644 new mode 100755 index 82f83a9..c4b781a --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. + * Copyright (C) 2014 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -78,6 +79,24 @@ static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData) dev = dev_find_slot(0, SOC_DEV_FUNC); config = dev->chip_info; + /* Populate the given memory down parameters */ + UpdData->PcdMemoryParameters.EnableMemoryDown = config->EnableMemoryDown; + UpdData->PcdMemoryParameters.DRAMSpeed = config->DRAMSpeed; + UpdData->PcdMemoryParameters.DRAMType = config->DRAMType; + UpdData->PcdMemoryParameters.DIMM0Enable = config->DIMM0Enable; + UpdData->PcdMemoryParameters.DIMM1Enable = config->DIMM1Enable; + UpdData->PcdMemoryParameters.DIMMDWidth = config->DIMMDWidth; + UpdData->PcdMemoryParameters.DIMMDensity = config->DIMMDensity; + UpdData->PcdMemoryParameters.DIMMBusWidth = config->DIMMBusWidth; + UpdData->PcdMemoryParameters.DIMMSides = config->DIMMSides; + UpdData->PcdMemoryParameters.DIMMtCL = config->DIMMtCL; + UpdData->PcdMemoryParameters.DIMMtRPtRCD = config->DIMMtRPtRCD; + UpdData->PcdMemoryParameters.DIMMtWR = config->DIMMtWR; + UpdData->PcdMemoryParameters.DIMMtWTR = config->DIMMtWTR; + UpdData->PcdMemoryParameters.DIMMtRRD = config->DIMMtRRD; + UpdData->PcdMemoryParameters.DIMMtRTP = config->DIMMtRTP; + UpdData->PcdMemoryParameters.DIMMtFAW = config->DIMMtFAW; + /* Set up default verb tables - Just HDMI audio */ UpdData->AzaliaConfigPtr = (UINT32)&mAzaliaConfig; diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspvpd.h b/src/vendorcode/intel/fsp/baytrail/include/fspvpd.h old mode 100644 new mode 100755 index 1b820a8..b001cdb --- a/src/vendorcode/intel/fsp/baytrail/include/fspvpd.h +++ b/src/vendorcode/intel/fsp/baytrail/include/fspvpd.h @@ -1,6 +1,6 @@ /** -Copyright (C) 2013, Intel Corporation +Copyright (C) 2013-2014 Intel Corporation Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -28,56 +28,78 @@ are permitted provided that the following conditions are met: **/ -/** - -This file is auto-generated, please DO NOT modify. +#ifndef __FSPVPD_H__ +#define __FSPVPD_H__ -**/ +#pragma pack(1) -#ifndef __VPDHEADER_H__ -#define __VPDHEADER_H__ +typedef struct { + UINT8 EnableMemoryDown; + UINT8 DRAMSpeed; /* DRAM Speed */ + UINT8 DRAMType; /* DRAM Type */ + UINT8 DIMM0Enable; /* DIMM 0 Enable */ + UINT8 DIMM1Enable; /* DIMM 1 Enable */ + UINT8 DIMMDWidth; /* DRAM device data width */ + UINT8 DIMMDensity; /* DRAM device data density */ + UINT8 DIMMBusWidth; /* DIMM Bus Width */ + UINT8 DIMMSides; /* Ranks Per DIMM */ + UINT8 DIMMtCL; /* tCL */ + UINT8 DIMMtRPtRCD; /* tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc. */ + UINT8 DIMMtWR; /* tWR in DRAM clk */ + UINT8 DIMMtWTR; /* tWTR in DRAM clk */ + UINT8 DIMMtRRD; /* tRRD in DRAM clk */ + UINT8 DIMMtRTP; /* tRTP in DRAM clk */ + UINT8 DIMMtFAW; /* tFAW in DRAM clk */ +} MEMORY_DOWN_DATA; -#pragma pack(1) typedef struct _UPD_DATA_REGION { - UINT64 Signature; /* Offset 0x0000 */ - UINT32 RESERVED1; /* Offset 0x0008 */ - UINT8 Padding0[20]; /* Offset 0x000C */ - UINT16 PcdMrcInitTsegSize; /* Offset 0x0014 */ - UINT16 PcdMrcInitMmioSize; /* Offset 0x0016 */ - UINT8 PcdMrcInitSPDAddr1; /* Offset 0x0018 */ - UINT8 PcdMrcInitSPDAddr2; /* Offset 0x0019 */ - UINT8 PcdeMMCBootMode; /* Offset 0x001B */ - UINT8 PcdEnableSdio; /* Offset 0x001C */ - UINT8 PcdEnableSdcard; /* Offset 0x001D */ - UINT8 PcdEnableHsuart0; /* Offset 0x001E */ - UINT8 PcdEnableHsuart1; /* Offset 0x001F */ - UINT8 PcdEnableSpi; /* Offset 0x0020 */ - UINT8 PcdEnableLan; /* Offset 0x0021 */ - UINT8 PcdEnableSata; /* Offset 0x0023 */ - UINT8 PcdSataMode; /* Offset 0x002E */ - UINT8 PcdEnableAzalia; /* Offset 0x002F */ - UINT32 AzaliaConfigPtr; /* Offset 0x0030 */ - UINT8 PcdEnableXhci; /* Offset 0x0034 */ - UINT8 PcdEnableLpe; /* Offset 0x0029 */ - UINT8 PcdLpssSioEnablePciMode; /* Offset 0x002A */ - UINT8 PcdEnableDma0; /* Offset 0x002B */ - UINT8 PcdEnableDma1; /* Offset 0x002C */ - UINT8 PcdEnableI2C0; /* Offset 0x002D */ - UINT8 PcdEnableI2C1; /* Offset 0x002E */ - UINT8 PcdEnableI2C2; /* Offset 0x002F */ - UINT8 PcdEnableI2C3; /* Offset 0x0030 */ - UINT8 PcdEnableI2C4; /* Offset 0x0031 */ - UINT8 PcdEnableI2C5; /* Offset 0x0032 */ - UINT8 PcdEnableI2C6; /* Offset 0x0033 */ - UINT8 PcdEnablePwm0; /* Offset 0x0034 */ - UINT8 PcdEnablePwm1; /* Offset 0x0035 */ - UINT8 PcdEnableHsi; /* Offset 0x0036 */ - UINT8 PcdIgdDvmt50PreAlloc; /* Offset 0x0043 */ - UINT8 PcdApertureSize; /* Offset 0x0044 */ - UINT8 PcdGttSize; /* Offset 0x0045 */ - UINT8 ISPEnable; /* Offset 0x0046 */ - UINT16 PcdRegionTerminator; /* Offset 0x0047 */ + UINT64 Signature; /* Offset 0x0000 */ + UINT32 RESERVED1; /* Offset 0x0008 */ + UINT8 Padding0[20]; /* Offset 0x000C */ + UINT16 PcdMrcInitTsegSize; /* Offset 0x0020 */ + UINT16 PcdMrcInitMmioSize; /* Offset 0x0022 */ + UINT8 PcdMrcInitSPDAddr1; /* Offset 0x0024 */ + UINT8 PcdMrcInitSPDAddr2; /* Offset 0x0025 */ + UINT8 PcdeMMCBootMode; /* Offset 0x0026 */ + UINT8 PcdEnableSdio; /* Offset 0x0027 */ + UINT8 PcdEnableSdcard; /* Offset 0x0028 */ + UINT8 PcdEnableHsuart0; /* Offset 0x0029 */ + UINT8 PcdEnableHsuart1; /* Offset 0x002A */ + UINT8 PcdEnableSpi; /* Offset 0x002B */ + UINT8 PcdEnableLan; /* Offset 0x002C */ + UINT8 PcdEnableSata; /* Offset 0x002D */ + UINT8 PcdSataMode; /* Offset 0x002E */ + UINT8 PcdEnableAzalia; /* Offset 0x002F */ + UINT32 AzaliaConfigPtr; /* Offset 0x0030 */ + UINT8 PcdEnableXhci; /* Offset 0x0034 */ + UINT8 PcdEnableLpe; /* Offset 0x0035 */ + UINT8 PcdLpssSioEnablePciMode; /* Offset 0x0036 */ + UINT8 PcdEnableDma0; /* Offset 0x0037 */ + UINT8 PcdEnableDma1; /* Offset 0x0038 */ + UINT8 PcdEnableI2C0; /* Offset 0x0039 */ + UINT8 PcdEnableI2C1; /* Offset 0x003A */ + UINT8 PcdEnableI2C2; /* Offset 0x003B */ + UINT8 PcdEnableI2C3; /* Offset 0x003C */ + UINT8 PcdEnableI2C4; /* Offset 0x003D */ + UINT8 PcdEnableI2C5; /* Offset 0x003E */ + UINT8 PcdEnableI2C6; /* Offset 0x003F */ + UINT8 PcdEnablePwm0; /* Offset 0x0040 */ + UINT8 PcdEnablePwm1; /* Offset 0x0041 */ + UINT8 PcdEnableHsi; /* Offset 0x0042 */ + UINT8 PcdIgdDvmt50PreAlloc; /* Offset 0x0043 */ + UINT8 PcdApertureSize; /* Offset 0x0044 */ + UINT8 PcdGttSize; /* Offset 0x0045 */ + UINT32 SerialDebugPortAddress; /* Offset 0x0046 */ + UINT8 SerialDebugPortType; /* Offset 0x004A */ + UINT8 PcdMrcDebugMsg; /* Offset 0x004B */ + UINT8 ISPEnable; /* Offset 0x004C */ + UINT8 PcdSccEnablePciMode; /* Offset 0x004D */ + UINT8 IgdRenderStandby; /* Offset 0x004E */ + UINT8 TxeUmaEnable; /* Offset 0x004F */ + UINT8 UnusedUpdSpace1[160]; /* Offset 0x0050 */ + MEMORY_DOWN_DATA PcdMemoryParameters; /* Offset 0x00F0 */ + UINT16 PcdRegionTerminator; /* Offset 0x0100 */ } UPD_DATA_REGION; @@ -86,7 +108,7 @@ typedef struct _VPD_DATA_REGION { UINT32 PcdImageRevision; /* Offset 0x0008 */ UINT32 PcdUpdRegionOffset; /* Offset 0x000C */ UINT8 Padding0[16]; /* Offset 0x0010 */ - UINT32 RESERVED1; /* Offset 0x0020 */ + UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */ UINT8 PcdPlatformType; /* Offset 0x0024 */ UINT8 PcdEnableSecureBoot; /* Offset 0x0025 */ UINT8 PcdMemoryParameters[16]; /* Offset 0x0026 */

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coreboot-gerrit November 2014