coreboot-gerrit April 2013

coreboot-gerrit@coreboot.org

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506 discussions

New patch to review for coreboot: 7ca5f57 google/snow: enable clock gating to save power
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3110 -gerrit commit 7ca5f576ae9174c0289a3f562db64361e8d93d7e Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 13:49:57 2013 -0700 google/snow: enable clock gating to save power This enables clock gating to save power on unused IPs. Change-Id: I9ab2a2535ebb91bb4110390a6f055a67146bdbf9 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/snow/ramstage.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index bacf3e9..fa8c70b 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -227,6 +227,9 @@ static void mainboard_init(device_t dev) i2c_init(TPS69050_BUS, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(7, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + /* Clock Gating all the unused IP's to save power */ + clock_gate(); + /* Disable USB3.0 PLL to save 250mW of power */ disable_usb30_pll();

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New patch to review for coreboot: 4bc04a6 google/snow: disable unused USB3.0 PLL to save power
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3109 -gerrit commit 4bc04a601e0ea318023ae0488994d7eda3b6037b Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 13:46:00 2013 -0700 google/snow: disable unused USB3.0 PLL to save power This PLL is unused and can be disabled to save about 250mW. Change-Id: I1be37304d6ea5ff78696e05ad1023ce3c57f636c Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/snow/ramstage.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index 962c79b..bacf3e9 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -205,6 +205,16 @@ static struct video_info snow_dp_video_info = { #define EXYNOS5250_DP1_BASE 0x145b0000 #define SNOW_MAX_DP_TRIES 5 +/* + * This functions disable the USB3.0 PLL to save power + */ +static void disable_usb30_pll(void) +{ + enum exynos5_gpio_pin usb3_pll_l = GPIO_Y11; + + gpio_direction_output(usb3_pll_l, 0); +} + /* this happens after cpu_init where exynos resources are set */ static void mainboard_init(device_t dev) { @@ -217,6 +227,9 @@ static void mainboard_init(device_t dev) i2c_init(TPS69050_BUS, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(7, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + /* Disable USB3.0 PLL to save 250mW of power */ + disable_usb30_pll(); + snow_lcd_vdd(); do { udelay(50);

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Patch set updated for coreboot: 2dd5e52 [3/3] google/snow: enable TMU
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3108 -gerrit commit 2dd5e525a201b73c63b36cb577a5f044fd5f41ca Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 15:19:40 2013 -0700 [3/3] google/snow: enable TMU This enables the thermal management unit (TMU) on Snow. Change-Id: Idd76af40bf0a5408baf61ef2665fd52ae4e260ba Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/snow/ramstage.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index 962c79b..f3dad4a 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -26,6 +26,7 @@ #include <arch/cache.h> #include <arch/exception.h> #include <arch/gpio.h> +#include <cpu/samsung/exynos5-common/exynos-tmu.h> #include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/gpio.h> @@ -217,6 +218,8 @@ static void mainboard_init(device_t dev) i2c_init(TPS69050_BUS, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(7, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + tmu_init(&exynos5250_tmu_info); + snow_lcd_vdd(); do { udelay(50);

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Patch set updated for coreboot: 46716c3 [2/3] exynos5: modify thermal management unit code for coreboot
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3107 -gerrit commit 46716c3c0cce248aec40f2e96ca4c9b8eac71fb1 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 14:21:15 2013 -0700 [2/3] exynos5: modify thermal management unit code for coreboot This updates the Exynos TMU code for coreboot: - Remove dependency on device tree - Add Makefile entries Change-Id: I55e1b624d7c7b695b1253ec55f6ae3de8dc671bc Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/Makefile.inc | 1 + src/cpu/samsung/exynos5-common/exynos-tmu.c | 167 ++++------------------------ src/cpu/samsung/exynos5-common/exynos-tmu.h | 132 ++++++++++++++++++++++ src/cpu/samsung/exynos5250/Makefile.inc | 1 + src/cpu/samsung/exynos5250/cpu.h | 2 + src/cpu/samsung/exynos5250/exynos-tmu.h | 82 -------------- src/cpu/samsung/exynos5250/exynos5250-tmu.c | 45 ++++++++ 7 files changed, 203 insertions(+), 227 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/Makefile.inc b/src/cpu/samsung/exynos5-common/Makefile.inc index 6911b70..6331863 100644 --- a/src/cpu/samsung/exynos5-common/Makefile.inc +++ b/src/cpu/samsung/exynos5-common/Makefile.inc @@ -21,3 +21,4 @@ ramstage-y += gpio.c ramstage-y += i2c.c ramstage-y += s5p-dp-reg.c ramstage-y += exynos-fb.c +ramstage-y += exynos-tmu.c diff --git a/src/cpu/samsung/exynos5-common/exynos-tmu.c b/src/cpu/samsung/exynos5-common/exynos-tmu.c index f908076..26777fc 100644 --- a/src/cpu/samsung/exynos5-common/exynos-tmu.c +++ b/src/cpu/samsung/exynos5-common/exynos-tmu.c @@ -2,11 +2,12 @@ * Copyright (c) 2012 Samsung Electronics Co., Ltd. * http://www.samsung.com * Akshay Saraswat <Akshay.s(a)samsung.com> + * Copyright (c) 2013 Google Inc. * * EXYNOS - Thermal Management Unit * - * See file CREDITS for list of people who contributed to this - * project. + * This file was originally imported from Das U-Boot and then re-factored + * for coreboot. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -17,11 +18,11 @@ * MA 02111-1307 USA */ -#include <common.h> -#include <errno.h> -#include <fdtdec.h> -#include <asm/arch/exynos-tmu.h> -#include <asm/arch/power.h> +#include <arch/io.h> +#include <cpu/samsung/exynos5-common/power.h> +#include <cpu/samsung/exynos5-common/exynos-tmu.h> + +#include <console/console.h> #define TRIMINFO_RELOAD 1 #define CORE_EN 1 @@ -46,55 +47,6 @@ INTCLEAR_RISE2 | INTCLEAR_FALL0 | \ INTCLEAR_FALL1 | INTCLEAR_FALL2) -/* Tmeperature threshold values for various thermal events */ -struct temperature_params { - /* minimum value in temperature code range */ - unsigned int min_val; - /* maximum value in temperature code range */ - unsigned int max_val; - /* temperature threshold to start warning */ - unsigned int start_warning; - /* temperature threshold CPU tripping */ - unsigned int start_tripping; - /* temperature threshold for HW tripping */ - unsigned int hardware_tripping; -}; - -/* Pre-defined values and thresholds for calibration of current temperature */ -struct tmu_data { - /* pre-defined temperature thresholds */ - struct temperature_params ts; - /* pre-defined efuse range minimum value */ - unsigned int efuse_min_value; - /* pre-defined efuse value for temperature calibration */ - unsigned int efuse_value; - /* pre-defined efuse range maximum value */ - unsigned int efuse_max_value; - /* current temperature sensing slope */ - unsigned int slope; -}; - -/* TMU device specific details and status */ -struct tmu_info { - /* base Address for the TMU */ - unsigned tmu_base; - /* mux Address for the TMU */ - int tmu_mux; - /* pre-defined values for calibration and thresholds */ - struct tmu_data data; - /* value required for triminfo_25 calibration */ - unsigned int te1; - /* value required for triminfo_85 calibration */ - unsigned int te2; - /* TMU DC value for threshold calculation */ - int dc_value; - /* enum value indicating status of the TMU */ - int tmu_state; -}; - -/* Global struct tmu_info variable to store init values */ -static struct tmu_info gbl_info; - /* * After reading temperature code from register, compensating * its value and calculating celsius temperatue, @@ -102,7 +54,7 @@ static struct tmu_info gbl_info; * * @return current temperature of the chip as sensed by TMU */ -int get_cur_temp(struct tmu_info *info) +static int get_cur_temp(struct tmu_info *info) { int cur_temp; struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base; @@ -120,19 +72,20 @@ int get_cur_temp(struct tmu_info *info) /* * Monitors status of the TMU device and exynos temperature * - * @param temp pointer to the current temperature value + * @info TMU info + * @temp pointer to the current temperature value * @return enum tmu_status_t value, code indicating event to execute */ -enum tmu_status_t tmu_monitor(int *temp) +enum tmu_status_t tmu_monitor(struct tmu_info *info, int *temp) { - if (gbl_info.tmu_state == TMU_STATUS_INIT) + if (info->tmu_state == TMU_STATUS_INIT) return -1; int cur_temp; - struct tmu_data *data = &gbl_info.data; + struct tmu_data *data = &info->data; /* Read current temperature of the SOC */ - cur_temp = get_cur_temp(&gbl_info); + cur_temp = get_cur_temp(info); *temp = cur_temp; /* Temperature code lies between min 25 and max 125 */ @@ -146,93 +99,20 @@ enum tmu_status_t tmu_monitor(int *temp) return TMU_STATUS_NORMAL; /* Temperature code does not lie between min 25 and max 125 */ else { - gbl_info.tmu_state = TMU_STATUS_INIT; - debug("EXYNOS_TMU: Thermal reading failed\n"); + info->tmu_state = TMU_STATUS_INIT; + printk(BIOS_DEBUG, "EXYNOS_TMU: Thermal reading failed\n"); return -1; } return 0; } /* - * Get TMU specific pre-defined values from FDT - * - * @param info pointer to the tmu_info struct - * @param blob FDT blob - * @return int value, 0 for success - */ -int get_tmu_fdt_values(struct tmu_info *info, const void *blob) -{ - int node; - int error = 0; - - /* Get the node from FDT for TMU */ - node = fdtdec_next_compatible(blob, 0, - COMPAT_SAMSUNG_EXYNOS_TMU); - if (node < 0) { - debug("EXYNOS_TMU: No node for tmu in device tree\n"); - return -1; - } - - /* - * Get the pre-defined TMU specific values from FDT. - * All of these are expected to be correct otherwise - * miscalculation of register values in tmu_setup_parameters - * may result in misleading current temperature. - */ - info->tmu_base = fdtdec_get_addr(blob, node, "reg"); - if (info->tmu_base == FDT_ADDR_T_NONE) { - debug("%s: Missing tmu-base\n", __func__); - return -1; - } - info->tmu_mux = fdtdec_get_int(blob, - node, "samsung,mux", -1); - error |= info->tmu_mux; - info->data.ts.min_val = fdtdec_get_int(blob, - node, "samsung,min-temp", -1); - error |= info->data.ts.min_val; - info->data.ts.max_val = fdtdec_get_int(blob, - node, "samsung,max-temp", -1); - error |= info->data.ts.max_val; - info->data.ts.start_warning = fdtdec_get_int(blob, - node, "samsung,start-warning", -1); - error |= info->data.ts.start_warning; - info->data.ts.start_tripping = fdtdec_get_int(blob, - node, "samsung,start-tripping", -1); - error |= info->data.ts.start_tripping; - info->data.ts.hardware_tripping = fdtdec_get_int(blob, - node, "samsung,hw-tripping", -1); - error |= info->data.ts.hardware_tripping; - info->data.efuse_min_value = fdtdec_get_int(blob, - node, "samsung,efuse-min-value", -1); - error |= info->data.efuse_min_value; - info->data.efuse_value = fdtdec_get_int(blob, - node, "samsung,efuse-value", -1); - error |= info->data.efuse_value; - info->data.efuse_max_value = fdtdec_get_int(blob, - node, "samsung,efuse-max-value", -1); - error |= info->data.efuse_max_value; - info->data.slope = fdtdec_get_int(blob, - node, "samsung,slope", -1); - error |= info->data.slope; - info->dc_value = fdtdec_get_int(blob, - node, "samsung,dc-value", -1); - error |= info->dc_value; - - if (error == -1) { - debug("fail to get tmu node properties\n"); - return -1; - } - - return 0; -} - -/* * Calibrate and calculate threshold values and * enable interrupt levels * * @param info pointer to the tmu_info struct */ -void tmu_setup_parameters(struct tmu_info *info) +static void tmu_setup_parameters(struct tmu_info *info) { unsigned int te_temp, con; unsigned int warning_code, trip_code, hwtrip_code; @@ -302,17 +182,14 @@ void tmu_setup_parameters(struct tmu_info *info) /* * Initialize TMU device * - * @param blob FDT blob * @return int value, 0 for success */ -int tmu_init(const void *blob) +int tmu_init(struct tmu_info *info) { - gbl_info.tmu_state = TMU_STATUS_INIT; - if (get_tmu_fdt_values(&gbl_info, blob) < 0) - return -1; + info->tmu_state = TMU_STATUS_INIT; - tmu_setup_parameters(&gbl_info); - gbl_info.tmu_state = TMU_STATUS_NORMAL; + tmu_setup_parameters(info); + info->tmu_state = TMU_STATUS_NORMAL; return 0; } diff --git a/src/cpu/samsung/exynos5-common/exynos-tmu.h b/src/cpu/samsung/exynos5-common/exynos-tmu.h new file mode 100644 index 0000000..40eda56 --- /dev/null +++ b/src/cpu/samsung/exynos5-common/exynos-tmu.h @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Akshay Saraswat <Akshay.s(a)samsung.com> + * + * EXYNOS - Thermal Management Unit + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __EXYNOS_TMU_H +#define __EXYNOS_TMU_H + +struct tmu_reg { + unsigned triminfo; + unsigned rsvd1; + unsigned rsvd2; + unsigned rsvd3; + unsigned rsvd4; + unsigned triminfo_control; + unsigned rsvd5; + unsigned rsvd6; + unsigned tmu_control; + unsigned rsvd7; + unsigned tmu_status; + unsigned sampling_internal; + unsigned counter_value0; + unsigned counter_value1; + unsigned rsvd8; + unsigned rsvd9; + unsigned current_temp; + unsigned rsvd10; + unsigned rsvd11; + unsigned rsvd12; + unsigned threshold_temp_rise; + unsigned threshold_temp_fall; + unsigned rsvd13; + unsigned rsvd14; + unsigned past_temp3_0; + unsigned past_temp7_4; + unsigned past_temp11_8; + unsigned past_temp15_12; + unsigned inten; + unsigned intstat; + unsigned intclear; + unsigned rsvd15; + unsigned emul_con; +}; + +enum tmu_status_t { + TMU_STATUS_INIT = 0, + TMU_STATUS_NORMAL, + TMU_STATUS_WARNING, + TMU_STATUS_TRIPPED, +}; + +/* Tmeperature threshold values for various thermal events */ +struct temperature_params { + /* minimum value in temperature code range */ + unsigned int min_val; + /* maximum value in temperature code range */ + unsigned int max_val; + /* temperature threshold to start warning */ + unsigned int start_warning; + /* temperature threshold CPU tripping */ + unsigned int start_tripping; + /* temperature threshold for HW tripping */ + unsigned int hardware_tripping; +}; + +/* Pre-defined values and thresholds for calibration of current temperature */ +struct tmu_data { + /* pre-defined temperature thresholds */ + struct temperature_params ts; + /* pre-defined efuse range minimum value */ + unsigned int efuse_min_value; + /* pre-defined efuse value for temperature calibration */ + unsigned int efuse_value; + /* pre-defined efuse range maximum value */ + unsigned int efuse_max_value; + /* current temperature sensing slope */ + unsigned int slope; +}; + +/* TMU device specific details and status */ +struct tmu_info { + /* base Address for the TMU */ + unsigned tmu_base; + /* mux Address for the TMU */ + int tmu_mux; + /* pre-defined values for calibration and thresholds */ + struct tmu_data data; + /* value required for triminfo_25 calibration */ + unsigned int te1; + /* value required for triminfo_85 calibration */ + unsigned int te2; + /* TMU DC value for threshold calculation */ + int dc_value; + /* enum value indicating status of the TMU */ + int tmu_state; +}; + +extern struct tmu_info *tmu_info; + +/* + * Monitors status of the TMU device and exynos temperature + * + * @info pointer to TMU info struct + * @temp pointer to the current temperature value + * @return enum tmu_status_t value, code indicating event to execute + * and -1 on error + */ +enum tmu_status_t tmu_monitor(struct tmu_info *info, int *temp); + +/* + * Initialize TMU device + * + * @info pointer to TMU info struct + * @return int value, 0 for success + */ +int tmu_init(struct tmu_info *info); + +#endif /* EXYNOS_TMU_H */ diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 1046b8b..8788a6c 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -28,6 +28,7 @@ ramstage-y += power.c ramstage-y += soc.c ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c ramstage-y += cpu.c +ramstage-y += exynos5250-tmu.c ramstage-y += mct.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c diff --git a/src/cpu/samsung/exynos5250/cpu.h b/src/cpu/samsung/exynos5250/cpu.h index a356e19..cff966e 100644 --- a/src/cpu/samsung/exynos5250/cpu.h +++ b/src/cpu/samsung/exynos5250/cpu.h @@ -120,4 +120,6 @@ enum periph_id exynos5_get_periph_id(unsigned base_addr); void exynos5250_config_l2_cache(void); +extern struct tmu_info exynos5250_tmu_info; + #endif /* _EXYNOS5250_CPU_H */ diff --git a/src/cpu/samsung/exynos5250/exynos-tmu.h b/src/cpu/samsung/exynos5250/exynos-tmu.h deleted file mode 100644 index ad9e394..0000000 --- a/src/cpu/samsung/exynos5250/exynos-tmu.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * Akshay Saraswat <Akshay.s(a)samsung.com> - * - * EXYNOS - Thermal Management Unit - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_THERMAL_H -#define __ASM_ARCH_THERMAL_H - -struct tmu_reg { - unsigned triminfo; - unsigned rsvd1; - unsigned rsvd2; - unsigned rsvd3; - unsigned rsvd4; - unsigned triminfo_control; - unsigned rsvd5; - unsigned rsvd6; - unsigned tmu_control; - unsigned rsvd7; - unsigned tmu_status; - unsigned sampling_internal; - unsigned counter_value0; - unsigned counter_value1; - unsigned rsvd8; - unsigned rsvd9; - unsigned current_temp; - unsigned rsvd10; - unsigned rsvd11; - unsigned rsvd12; - unsigned threshold_temp_rise; - unsigned threshold_temp_fall; - unsigned rsvd13; - unsigned rsvd14; - unsigned past_temp3_0; - unsigned past_temp7_4; - unsigned past_temp11_8; - unsigned past_temp15_12; - unsigned inten; - unsigned intstat; - unsigned intclear; - unsigned rsvd15; - unsigned emul_con; -}; - -enum tmu_status_t { - TMU_STATUS_INIT = 0, - TMU_STATUS_NORMAL, - TMU_STATUS_WARNING, - TMU_STATUS_TRIPPED, -}; - -/* - * Monitors status of the TMU device and exynos temperature - * - * @param temp pointer to the current temperature value - * @return enum tmu_status_t value, code indicating event to execute - * and -1 on error - */ -enum tmu_status_t tmu_monitor(int *temp); - -/* - * Initialize TMU device - * - * @param blob FDT blob - * @return int value, 0 for success - */ -int tmu_init(const void *blob); -#endif diff --git a/src/cpu/samsung/exynos5250/exynos5250-tmu.c b/src/cpu/samsung/exynos5250/exynos5250-tmu.c new file mode 100644 index 0000000..7d8397c --- /dev/null +++ b/src/cpu/samsung/exynos5250/exynos5250-tmu.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Google Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * This file contains Exynos5250-specific TMU information. + */ + +#include <cpu/samsung/exynos5-common/exynos-tmu.h> +#include <cpu/samsung/exynos5250/cpu.h> + +struct tmu_info exynos5250_tmu_info = { + .tmu_base = 0x10060000, + .tmu_mux = 6, + .data = { + .ts = { + .min_val = 25, + .max_val = 125, + .start_warning = 95, + .start_tripping = 105, + .hardware_tripping = 110, + }, + .efuse_min_value = 40, + .efuse_value = 55, + .efuse_max_value = 100, + .slope = 0x10008802, + }, + .dc_value = 25, +};

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New patch to review for coreboot: a4e76e6 [3/3] google/snow: enable TMU
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3108 -gerrit commit a4e76e601443447a638482e1ed78583cb6f6b9b5 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 15:19:40 2013 -0700 [3/3] google/snow: enable TMU This enables the thermal management unit (TMU) on Snow. Change-Id: Idd76af40bf0a5408baf61ef2665fd52ae4e260ba Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/snow/ramstage.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index 962c79b..f3dad4a 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -26,6 +26,7 @@ #include <arch/cache.h> #include <arch/exception.h> #include <arch/gpio.h> +#include <cpu/samsung/exynos5-common/exynos-tmu.h> #include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/gpio.h> @@ -217,6 +218,8 @@ static void mainboard_init(device_t dev) i2c_init(TPS69050_BUS, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(7, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + tmu_init(&exynos5250_tmu_info); + snow_lcd_vdd(); do { udelay(50);

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New patch to review for coreboot: 69853d0 [2/3] exynos5: modify thermal management unit code for coreboot
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3107 -gerrit commit 69853d056d6a4d052fa01bac90267fdb1bad0826 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 14:21:15 2013 -0700 [2/3] exynos5: modify thermal management unit code for coreboot This updates the Exynos TMU code for coreboot: - Remove dependency on device tree - Add Makefile entries Change-Id: I55e1b624d7c7b695b1253ec55f6ae3de8dc671bc Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/Makefile.inc | 1 + src/cpu/samsung/exynos5-common/exynos-tmu.c | 167 ++++------------------------ src/cpu/samsung/exynos5-common/exynos-tmu.h | 132 ++++++++++++++++++++++ src/cpu/samsung/exynos5250/Makefile.inc | 1 + src/cpu/samsung/exynos5250/cpu.h | 2 + src/cpu/samsung/exynos5250/exynos-tmu.h | 3 +- src/cpu/samsung/exynos5250/exynos5250-tmu.c | 45 ++++++++ 7 files changed, 204 insertions(+), 147 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/Makefile.inc b/src/cpu/samsung/exynos5-common/Makefile.inc index 6911b70..6331863 100644 --- a/src/cpu/samsung/exynos5-common/Makefile.inc +++ b/src/cpu/samsung/exynos5-common/Makefile.inc @@ -21,3 +21,4 @@ ramstage-y += gpio.c ramstage-y += i2c.c ramstage-y += s5p-dp-reg.c ramstage-y += exynos-fb.c +ramstage-y += exynos-tmu.c diff --git a/src/cpu/samsung/exynos5-common/exynos-tmu.c b/src/cpu/samsung/exynos5-common/exynos-tmu.c index f908076..26777fc 100644 --- a/src/cpu/samsung/exynos5-common/exynos-tmu.c +++ b/src/cpu/samsung/exynos5-common/exynos-tmu.c @@ -2,11 +2,12 @@ * Copyright (c) 2012 Samsung Electronics Co., Ltd. * http://www.samsung.com * Akshay Saraswat <Akshay.s(a)samsung.com> + * Copyright (c) 2013 Google Inc. * * EXYNOS - Thermal Management Unit * - * See file CREDITS for list of people who contributed to this - * project. + * This file was originally imported from Das U-Boot and then re-factored + * for coreboot. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -17,11 +18,11 @@ * MA 02111-1307 USA */ -#include <common.h> -#include <errno.h> -#include <fdtdec.h> -#include <asm/arch/exynos-tmu.h> -#include <asm/arch/power.h> +#include <arch/io.h> +#include <cpu/samsung/exynos5-common/power.h> +#include <cpu/samsung/exynos5-common/exynos-tmu.h> + +#include <console/console.h> #define TRIMINFO_RELOAD 1 #define CORE_EN 1 @@ -46,55 +47,6 @@ INTCLEAR_RISE2 | INTCLEAR_FALL0 | \ INTCLEAR_FALL1 | INTCLEAR_FALL2) -/* Tmeperature threshold values for various thermal events */ -struct temperature_params { - /* minimum value in temperature code range */ - unsigned int min_val; - /* maximum value in temperature code range */ - unsigned int max_val; - /* temperature threshold to start warning */ - unsigned int start_warning; - /* temperature threshold CPU tripping */ - unsigned int start_tripping; - /* temperature threshold for HW tripping */ - unsigned int hardware_tripping; -}; - -/* Pre-defined values and thresholds for calibration of current temperature */ -struct tmu_data { - /* pre-defined temperature thresholds */ - struct temperature_params ts; - /* pre-defined efuse range minimum value */ - unsigned int efuse_min_value; - /* pre-defined efuse value for temperature calibration */ - unsigned int efuse_value; - /* pre-defined efuse range maximum value */ - unsigned int efuse_max_value; - /* current temperature sensing slope */ - unsigned int slope; -}; - -/* TMU device specific details and status */ -struct tmu_info { - /* base Address for the TMU */ - unsigned tmu_base; - /* mux Address for the TMU */ - int tmu_mux; - /* pre-defined values for calibration and thresholds */ - struct tmu_data data; - /* value required for triminfo_25 calibration */ - unsigned int te1; - /* value required for triminfo_85 calibration */ - unsigned int te2; - /* TMU DC value for threshold calculation */ - int dc_value; - /* enum value indicating status of the TMU */ - int tmu_state; -}; - -/* Global struct tmu_info variable to store init values */ -static struct tmu_info gbl_info; - /* * After reading temperature code from register, compensating * its value and calculating celsius temperatue, @@ -102,7 +54,7 @@ static struct tmu_info gbl_info; * * @return current temperature of the chip as sensed by TMU */ -int get_cur_temp(struct tmu_info *info) +static int get_cur_temp(struct tmu_info *info) { int cur_temp; struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base; @@ -120,19 +72,20 @@ int get_cur_temp(struct tmu_info *info) /* * Monitors status of the TMU device and exynos temperature * - * @param temp pointer to the current temperature value + * @info TMU info + * @temp pointer to the current temperature value * @return enum tmu_status_t value, code indicating event to execute */ -enum tmu_status_t tmu_monitor(int *temp) +enum tmu_status_t tmu_monitor(struct tmu_info *info, int *temp) { - if (gbl_info.tmu_state == TMU_STATUS_INIT) + if (info->tmu_state == TMU_STATUS_INIT) return -1; int cur_temp; - struct tmu_data *data = &gbl_info.data; + struct tmu_data *data = &info->data; /* Read current temperature of the SOC */ - cur_temp = get_cur_temp(&gbl_info); + cur_temp = get_cur_temp(info); *temp = cur_temp; /* Temperature code lies between min 25 and max 125 */ @@ -146,93 +99,20 @@ enum tmu_status_t tmu_monitor(int *temp) return TMU_STATUS_NORMAL; /* Temperature code does not lie between min 25 and max 125 */ else { - gbl_info.tmu_state = TMU_STATUS_INIT; - debug("EXYNOS_TMU: Thermal reading failed\n"); + info->tmu_state = TMU_STATUS_INIT; + printk(BIOS_DEBUG, "EXYNOS_TMU: Thermal reading failed\n"); return -1; } return 0; } /* - * Get TMU specific pre-defined values from FDT - * - * @param info pointer to the tmu_info struct - * @param blob FDT blob - * @return int value, 0 for success - */ -int get_tmu_fdt_values(struct tmu_info *info, const void *blob) -{ - int node; - int error = 0; - - /* Get the node from FDT for TMU */ - node = fdtdec_next_compatible(blob, 0, - COMPAT_SAMSUNG_EXYNOS_TMU); - if (node < 0) { - debug("EXYNOS_TMU: No node for tmu in device tree\n"); - return -1; - } - - /* - * Get the pre-defined TMU specific values from FDT. - * All of these are expected to be correct otherwise - * miscalculation of register values in tmu_setup_parameters - * may result in misleading current temperature. - */ - info->tmu_base = fdtdec_get_addr(blob, node, "reg"); - if (info->tmu_base == FDT_ADDR_T_NONE) { - debug("%s: Missing tmu-base\n", __func__); - return -1; - } - info->tmu_mux = fdtdec_get_int(blob, - node, "samsung,mux", -1); - error |= info->tmu_mux; - info->data.ts.min_val = fdtdec_get_int(blob, - node, "samsung,min-temp", -1); - error |= info->data.ts.min_val; - info->data.ts.max_val = fdtdec_get_int(blob, - node, "samsung,max-temp", -1); - error |= info->data.ts.max_val; - info->data.ts.start_warning = fdtdec_get_int(blob, - node, "samsung,start-warning", -1); - error |= info->data.ts.start_warning; - info->data.ts.start_tripping = fdtdec_get_int(blob, - node, "samsung,start-tripping", -1); - error |= info->data.ts.start_tripping; - info->data.ts.hardware_tripping = fdtdec_get_int(blob, - node, "samsung,hw-tripping", -1); - error |= info->data.ts.hardware_tripping; - info->data.efuse_min_value = fdtdec_get_int(blob, - node, "samsung,efuse-min-value", -1); - error |= info->data.efuse_min_value; - info->data.efuse_value = fdtdec_get_int(blob, - node, "samsung,efuse-value", -1); - error |= info->data.efuse_value; - info->data.efuse_max_value = fdtdec_get_int(blob, - node, "samsung,efuse-max-value", -1); - error |= info->data.efuse_max_value; - info->data.slope = fdtdec_get_int(blob, - node, "samsung,slope", -1); - error |= info->data.slope; - info->dc_value = fdtdec_get_int(blob, - node, "samsung,dc-value", -1); - error |= info->dc_value; - - if (error == -1) { - debug("fail to get tmu node properties\n"); - return -1; - } - - return 0; -} - -/* * Calibrate and calculate threshold values and * enable interrupt levels * * @param info pointer to the tmu_info struct */ -void tmu_setup_parameters(struct tmu_info *info) +static void tmu_setup_parameters(struct tmu_info *info) { unsigned int te_temp, con; unsigned int warning_code, trip_code, hwtrip_code; @@ -302,17 +182,14 @@ void tmu_setup_parameters(struct tmu_info *info) /* * Initialize TMU device * - * @param blob FDT blob * @return int value, 0 for success */ -int tmu_init(const void *blob) +int tmu_init(struct tmu_info *info) { - gbl_info.tmu_state = TMU_STATUS_INIT; - if (get_tmu_fdt_values(&gbl_info, blob) < 0) - return -1; + info->tmu_state = TMU_STATUS_INIT; - tmu_setup_parameters(&gbl_info); - gbl_info.tmu_state = TMU_STATUS_NORMAL; + tmu_setup_parameters(info); + info->tmu_state = TMU_STATUS_NORMAL; return 0; } diff --git a/src/cpu/samsung/exynos5-common/exynos-tmu.h b/src/cpu/samsung/exynos5-common/exynos-tmu.h new file mode 100644 index 0000000..40eda56 --- /dev/null +++ b/src/cpu/samsung/exynos5-common/exynos-tmu.h @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Akshay Saraswat <Akshay.s(a)samsung.com> + * + * EXYNOS - Thermal Management Unit + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __EXYNOS_TMU_H +#define __EXYNOS_TMU_H + +struct tmu_reg { + unsigned triminfo; + unsigned rsvd1; + unsigned rsvd2; + unsigned rsvd3; + unsigned rsvd4; + unsigned triminfo_control; + unsigned rsvd5; + unsigned rsvd6; + unsigned tmu_control; + unsigned rsvd7; + unsigned tmu_status; + unsigned sampling_internal; + unsigned counter_value0; + unsigned counter_value1; + unsigned rsvd8; + unsigned rsvd9; + unsigned current_temp; + unsigned rsvd10; + unsigned rsvd11; + unsigned rsvd12; + unsigned threshold_temp_rise; + unsigned threshold_temp_fall; + unsigned rsvd13; + unsigned rsvd14; + unsigned past_temp3_0; + unsigned past_temp7_4; + unsigned past_temp11_8; + unsigned past_temp15_12; + unsigned inten; + unsigned intstat; + unsigned intclear; + unsigned rsvd15; + unsigned emul_con; +}; + +enum tmu_status_t { + TMU_STATUS_INIT = 0, + TMU_STATUS_NORMAL, + TMU_STATUS_WARNING, + TMU_STATUS_TRIPPED, +}; + +/* Tmeperature threshold values for various thermal events */ +struct temperature_params { + /* minimum value in temperature code range */ + unsigned int min_val; + /* maximum value in temperature code range */ + unsigned int max_val; + /* temperature threshold to start warning */ + unsigned int start_warning; + /* temperature threshold CPU tripping */ + unsigned int start_tripping; + /* temperature threshold for HW tripping */ + unsigned int hardware_tripping; +}; + +/* Pre-defined values and thresholds for calibration of current temperature */ +struct tmu_data { + /* pre-defined temperature thresholds */ + struct temperature_params ts; + /* pre-defined efuse range minimum value */ + unsigned int efuse_min_value; + /* pre-defined efuse value for temperature calibration */ + unsigned int efuse_value; + /* pre-defined efuse range maximum value */ + unsigned int efuse_max_value; + /* current temperature sensing slope */ + unsigned int slope; +}; + +/* TMU device specific details and status */ +struct tmu_info { + /* base Address for the TMU */ + unsigned tmu_base; + /* mux Address for the TMU */ + int tmu_mux; + /* pre-defined values for calibration and thresholds */ + struct tmu_data data; + /* value required for triminfo_25 calibration */ + unsigned int te1; + /* value required for triminfo_85 calibration */ + unsigned int te2; + /* TMU DC value for threshold calculation */ + int dc_value; + /* enum value indicating status of the TMU */ + int tmu_state; +}; + +extern struct tmu_info *tmu_info; + +/* + * Monitors status of the TMU device and exynos temperature + * + * @info pointer to TMU info struct + * @temp pointer to the current temperature value + * @return enum tmu_status_t value, code indicating event to execute + * and -1 on error + */ +enum tmu_status_t tmu_monitor(struct tmu_info *info, int *temp); + +/* + * Initialize TMU device + * + * @info pointer to TMU info struct + * @return int value, 0 for success + */ +int tmu_init(struct tmu_info *info); + +#endif /* EXYNOS_TMU_H */ diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 1046b8b..8788a6c 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -28,6 +28,7 @@ ramstage-y += power.c ramstage-y += soc.c ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c ramstage-y += cpu.c +ramstage-y += exynos5250-tmu.c ramstage-y += mct.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c diff --git a/src/cpu/samsung/exynos5250/cpu.h b/src/cpu/samsung/exynos5250/cpu.h index a356e19..cff966e 100644 --- a/src/cpu/samsung/exynos5250/cpu.h +++ b/src/cpu/samsung/exynos5250/cpu.h @@ -120,4 +120,6 @@ enum periph_id exynos5_get_periph_id(unsigned base_addr); void exynos5250_config_l2_cache(void); +extern struct tmu_info exynos5250_tmu_info; + #endif /* _EXYNOS5250_CPU_H */ diff --git a/src/cpu/samsung/exynos5250/exynos-tmu.h b/src/cpu/samsung/exynos5250/exynos-tmu.h index ad9e394..e0d94eb 100644 --- a/src/cpu/samsung/exynos5250/exynos-tmu.h +++ b/src/cpu/samsung/exynos5250/exynos-tmu.h @@ -75,8 +75,7 @@ enum tmu_status_t tmu_monitor(int *temp); /* * Initialize TMU device * - * @param blob FDT blob * @return int value, 0 for success */ -int tmu_init(const void *blob); +int tmu_init(void); #endif diff --git a/src/cpu/samsung/exynos5250/exynos5250-tmu.c b/src/cpu/samsung/exynos5250/exynos5250-tmu.c new file mode 100644 index 0000000..76b3335 --- /dev/null +++ b/src/cpu/samsung/exynos5250/exynos5250-tmu.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Google Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * This file contains Exynos5250-specific TMU information. + */ + +#include <cpu/samsung/exynos5-common/exynos-tmu.h> +#include <cpu/samsung/exynos5250/cpu.h> + +struct tmu_info exynos5250_tmu_info = { + .tmu_base = 0x10060000, + .tmu_mux = 6, + .data = { + .ts = { + .min_val = 25, + .max_val = 125, + .start_warning = 95, + .start_tripping = 105, + .hardware_tripping = 110, + }, + .efuse_min_value = 40, + .efuse_value = 55, + .efuse_max_value = 100, + .slope = 0x10008802, + }, + .dc_value = 25, +};

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New patch to review for coreboot: a0b0ea5 [1/3] exynos5: import thermal management unit code
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3106 -gerrit commit a0b0ea55540de1ccdbafa256773f022aeba39098 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 14:01:45 2013 -0700 [1/3] exynos5: import thermal management unit code This simply imports the Exynos TMU driver from u-boot. It is not built and thus should not break anything. Change-Id: I7861132fbf97f864e4250ffbda1ef3843f296ddc Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/exynos-tmu.c | 318 ++++++++++++++++++++++++++++ 1 file changed, 318 insertions(+) diff --git a/src/cpu/samsung/exynos5-common/exynos-tmu.c b/src/cpu/samsung/exynos5-common/exynos-tmu.c new file mode 100644 index 0000000..f908076 --- /dev/null +++ b/src/cpu/samsung/exynos5-common/exynos-tmu.c @@ -0,0 +1,318 @@ +/* + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Akshay Saraswat <Akshay.s(a)samsung.com> + * + * EXYNOS - Thermal Management Unit + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <errno.h> +#include <fdtdec.h> +#include <asm/arch/exynos-tmu.h> +#include <asm/arch/power.h> + +#define TRIMINFO_RELOAD 1 +#define CORE_EN 1 +#define THERM_TRIP_EN (1 << 12) + +#define INTEN_RISE0 1 +#define INTEN_RISE1 (1 << 4) +#define INTEN_RISE2 (1 << 8) +#define INTEN_FALL0 (1 << 16) +#define INTEN_FALL1 (1 << 20) +#define INTEN_FALL2 (1 << 24) + +#define TRIM_INFO_MASK 0xff + +#define INTCLEAR_RISE0 1 +#define INTCLEAR_RISE1 (1 << 4) +#define INTCLEAR_RISE2 (1 << 8) +#define INTCLEAR_FALL0 (1 << 16) +#define INTCLEAR_FALL1 (1 << 20) +#define INTCLEAR_FALL2 (1 << 24) +#define INTCLEARALL (INTCLEAR_RISE0 | INTCLEAR_RISE1 | \ + INTCLEAR_RISE2 | INTCLEAR_FALL0 | \ + INTCLEAR_FALL1 | INTCLEAR_FALL2) + +/* Tmeperature threshold values for various thermal events */ +struct temperature_params { + /* minimum value in temperature code range */ + unsigned int min_val; + /* maximum value in temperature code range */ + unsigned int max_val; + /* temperature threshold to start warning */ + unsigned int start_warning; + /* temperature threshold CPU tripping */ + unsigned int start_tripping; + /* temperature threshold for HW tripping */ + unsigned int hardware_tripping; +}; + +/* Pre-defined values and thresholds for calibration of current temperature */ +struct tmu_data { + /* pre-defined temperature thresholds */ + struct temperature_params ts; + /* pre-defined efuse range minimum value */ + unsigned int efuse_min_value; + /* pre-defined efuse value for temperature calibration */ + unsigned int efuse_value; + /* pre-defined efuse range maximum value */ + unsigned int efuse_max_value; + /* current temperature sensing slope */ + unsigned int slope; +}; + +/* TMU device specific details and status */ +struct tmu_info { + /* base Address for the TMU */ + unsigned tmu_base; + /* mux Address for the TMU */ + int tmu_mux; + /* pre-defined values for calibration and thresholds */ + struct tmu_data data; + /* value required for triminfo_25 calibration */ + unsigned int te1; + /* value required for triminfo_85 calibration */ + unsigned int te2; + /* TMU DC value for threshold calculation */ + int dc_value; + /* enum value indicating status of the TMU */ + int tmu_state; +}; + +/* Global struct tmu_info variable to store init values */ +static struct tmu_info gbl_info; + +/* + * After reading temperature code from register, compensating + * its value and calculating celsius temperatue, + * get current temperatue. + * + * @return current temperature of the chip as sensed by TMU + */ +int get_cur_temp(struct tmu_info *info) +{ + int cur_temp; + struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base; + + /* Temperature code range between min 25 and max 125 */ + cur_temp = readl(&reg->current_temp) & 0xff; + + /* Calibrate current temperature */ + if (cur_temp) + cur_temp = cur_temp - info->te1 + info->dc_value; + + return cur_temp; +} + +/* + * Monitors status of the TMU device and exynos temperature + * + * @param temp pointer to the current temperature value + * @return enum tmu_status_t value, code indicating event to execute + */ +enum tmu_status_t tmu_monitor(int *temp) +{ + if (gbl_info.tmu_state == TMU_STATUS_INIT) + return -1; + + int cur_temp; + struct tmu_data *data = &gbl_info.data; + + /* Read current temperature of the SOC */ + cur_temp = get_cur_temp(&gbl_info); + *temp = cur_temp; + + /* Temperature code lies between min 25 and max 125 */ + if (cur_temp >= data->ts.start_tripping && + cur_temp <= data->ts.max_val) + return TMU_STATUS_TRIPPED; + else if (cur_temp >= data->ts.start_warning) + return TMU_STATUS_WARNING; + else if (cur_temp < data->ts.start_warning && + cur_temp >= data->ts.min_val) + return TMU_STATUS_NORMAL; + /* Temperature code does not lie between min 25 and max 125 */ + else { + gbl_info.tmu_state = TMU_STATUS_INIT; + debug("EXYNOS_TMU: Thermal reading failed\n"); + return -1; + } + return 0; +} + +/* + * Get TMU specific pre-defined values from FDT + * + * @param info pointer to the tmu_info struct + * @param blob FDT blob + * @return int value, 0 for success + */ +int get_tmu_fdt_values(struct tmu_info *info, const void *blob) +{ + int node; + int error = 0; + + /* Get the node from FDT for TMU */ + node = fdtdec_next_compatible(blob, 0, + COMPAT_SAMSUNG_EXYNOS_TMU); + if (node < 0) { + debug("EXYNOS_TMU: No node for tmu in device tree\n"); + return -1; + } + + /* + * Get the pre-defined TMU specific values from FDT. + * All of these are expected to be correct otherwise + * miscalculation of register values in tmu_setup_parameters + * may result in misleading current temperature. + */ + info->tmu_base = fdtdec_get_addr(blob, node, "reg"); + if (info->tmu_base == FDT_ADDR_T_NONE) { + debug("%s: Missing tmu-base\n", __func__); + return -1; + } + info->tmu_mux = fdtdec_get_int(blob, + node, "samsung,mux", -1); + error |= info->tmu_mux; + info->data.ts.min_val = fdtdec_get_int(blob, + node, "samsung,min-temp", -1); + error |= info->data.ts.min_val; + info->data.ts.max_val = fdtdec_get_int(blob, + node, "samsung,max-temp", -1); + error |= info->data.ts.max_val; + info->data.ts.start_warning = fdtdec_get_int(blob, + node, "samsung,start-warning", -1); + error |= info->data.ts.start_warning; + info->data.ts.start_tripping = fdtdec_get_int(blob, + node, "samsung,start-tripping", -1); + error |= info->data.ts.start_tripping; + info->data.ts.hardware_tripping = fdtdec_get_int(blob, + node, "samsung,hw-tripping", -1); + error |= info->data.ts.hardware_tripping; + info->data.efuse_min_value = fdtdec_get_int(blob, + node, "samsung,efuse-min-value", -1); + error |= info->data.efuse_min_value; + info->data.efuse_value = fdtdec_get_int(blob, + node, "samsung,efuse-value", -1); + error |= info->data.efuse_value; + info->data.efuse_max_value = fdtdec_get_int(blob, + node, "samsung,efuse-max-value", -1); + error |= info->data.efuse_max_value; + info->data.slope = fdtdec_get_int(blob, + node, "samsung,slope", -1); + error |= info->data.slope; + info->dc_value = fdtdec_get_int(blob, + node, "samsung,dc-value", -1); + error |= info->dc_value; + + if (error == -1) { + debug("fail to get tmu node properties\n"); + return -1; + } + + return 0; +} + +/* + * Calibrate and calculate threshold values and + * enable interrupt levels + * + * @param info pointer to the tmu_info struct + */ +void tmu_setup_parameters(struct tmu_info *info) +{ + unsigned int te_temp, con; + unsigned int warning_code, trip_code, hwtrip_code; + unsigned int cooling_temp; + unsigned int rising_value; + struct tmu_data *data = &info->data; + struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base; + + /* Must reload for using efuse value at EXYNOS */ + writel(TRIMINFO_RELOAD, &reg->triminfo_control); + + /* Get the compensation parameter */ + te_temp = readl(&reg->triminfo); + info->te1 = te_temp & TRIM_INFO_MASK; + info->te2 = ((te_temp >> 8) & TRIM_INFO_MASK); + + if ((data->efuse_min_value > info->te1) || + (info->te1 > data->efuse_max_value) + || (info->te2 != 0)) + info->te1 = data->efuse_value; + + /* Get RISING & FALLING Threshold value */ + warning_code = data->ts.start_warning + + info->te1 - info->dc_value; + trip_code = data->ts.start_tripping + + info->te1 - info->dc_value; + hwtrip_code = data->ts.hardware_tripping + + info->te1 - info->dc_value; + + cooling_temp = 0; + + rising_value = ((warning_code << 8) | + (trip_code << 16) | + (hwtrip_code << 24)); + + /* Set interrupt level */ + writel(rising_value, &reg->threshold_temp_rise); + writel(cooling_temp, &reg->threshold_temp_fall); + + /* + * Need to init all register settings after getting parameter info + * [28:23] vref [11:8] slope - Tuning parameter + * + * WARNING: this slope value writes into many bits in the tmu_control + * register, with the default FDT value of 268470274 (0x10008802) + * we are using this essentially sets the default register setting + * from the TRM for tmu_control. + * TODO(bhthompson): rewrite this code such that we are not performing + * a hard wipe of tmu_control and re verify functionality. + */ + writel(data->slope, &reg->tmu_control); + + writel(INTCLEARALL, &reg->intclear); + /* TMU core enable */ + con = readl(&reg->tmu_control); + con |= (info->tmu_mux << 20) | THERM_TRIP_EN | CORE_EN; + + writel(con, &reg->tmu_control); + + /* Enable HW thermal trip */ + power_enable_hw_thermal_trip(); + + /* LEV1 LEV2 interrupt enable */ + writel(INTEN_RISE1 | INTEN_RISE2, &reg->inten); +} + +/* + * Initialize TMU device + * + * @param blob FDT blob + * @return int value, 0 for success + */ +int tmu_init(const void *blob) +{ + gbl_info.tmu_state = TMU_STATUS_INIT; + if (get_tmu_fdt_values(&gbl_info, blob) < 0) + return -1; + + tmu_setup_parameters(&gbl_info); + gbl_info.tmu_state = TMU_STATUS_NORMAL; + + return 0; +}

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New patch to review for coreboot: 108eebc exynos5: move power_enable_hw_thermal_trip() prototype
by David Hendricks 19 Apr '13

19 Apr '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3105 -gerrit commit 108eebc10bc79b912207387ac896e0361f41f788 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Apr 18 15:04:43 2013 -0700 exynos5: move power_enable_hw_thermal_trip() prototype This moves the prototype for power_enable_hw_thermal_trip() to a generic location so it can be used by generalized thermal management code. The implementation will still be CPU-specific. Change-Id: Iae449cb8c72c8441dedaf65b73db9898b4730cef Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5-common/power.h | 3 +++ src/cpu/samsung/exynos5250/power.c | 1 + src/cpu/samsung/exynos5250/power.h | 3 --- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/power.h b/src/cpu/samsung/exynos5-common/power.h index 57e2a2b..ff98123 100644 --- a/src/cpu/samsung/exynos5-common/power.h +++ b/src/cpu/samsung/exynos5-common/power.h @@ -39,4 +39,7 @@ #define S5PC110_USB_PHY_CON 0xE010E80C #define S5PC110_INFORM0 0xE010F000 +/* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */ +void power_enable_hw_thermal_trip(void); + #endif diff --git a/src/cpu/samsung/exynos5250/power.c b/src/cpu/samsung/exynos5250/power.c index ffba8c5..8aba0e8 100644 --- a/src/cpu/samsung/exynos5250/power.c +++ b/src/cpu/samsung/exynos5250/power.c @@ -27,6 +27,7 @@ #include <arch/io.h> #include <arch/hlt.h> #include <console/console.h> +#include <cpu/samsung/exynos5-common/power.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/power.h> #include <cpu/samsung/exynos5250/sysreg.h> diff --git a/src/cpu/samsung/exynos5250/power.h b/src/cpu/samsung/exynos5250/power.h index 59a0257..20a884e 100644 --- a/src/cpu/samsung/exynos5250/power.h +++ b/src/cpu/samsung/exynos5250/power.h @@ -71,9 +71,6 @@ void power_enable_dp_phy(void); void power_enable_usb_phy(void); void power_disable_usb_phy(void); -/* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */ -void power_enable_hw_thermal_trip(void); - /* Initialize the pmic voltages to power up the system */ int power_init(void);

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Patch merged into coreboot/master: 45988da spkmodem console
by gerrit＠coreboot.org 18 Apr '13

18 Apr '13

the following patch was just integrated into master: commit 45988dab6bfbc480443979081a3260b7bce04fd8 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat Mar 30 02:02:13 2013 +0100 spkmodem console Change-Id: Ie497e4c8da05001ffe67c4a541bd24aa859ac0e2 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/2987 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Sat Mar 30 14:09:03 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Apr 18 22:47:58 2013, giving +2 See http://review.coreboot.org/2987 for details. -gerrit

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Patch merged into coreboot/master: 8a6f7a7 AMD/SB800: Define the GPP PCIe lane distribution
by gerrit＠coreboot.org 18 Apr '13

18 Apr '13

the following patch was just integrated into master: commit 8a6f7a77f3ab169480b8d22caf1a8d70e3188c62 Author: Dave Frodin <dave.frodin(a)se-eng.com> Date: Wed Apr 17 18:21:09 2013 -0600 AMD/SB800: Define the GPP PCIe lane distribution Commit 23023a5 correctly enabled the SB800 GPP PCIe ports but didn't distribute the 4 GPP PCIe lanes amongst the enabled PCIe ports. This fix was verified by openvoid on a AsRock E350M1 motherboard. Change-Id: I0116c5f518e0d000be609013446e53da4112f586 Signed-off-by: Dave Frodin <dave.frodin(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3104 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Apr 18 03:17:59 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Apr 18 18:35:09 2013, giving +2 See http://review.coreboot.org/3104 for details. -gerrit

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coreboot-gerrit April 2013