coreboot-gerrit December 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: caa0f7d exynos5420: set L2ACTLR parameters for A15 cores
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit caa0f7d56bee6765c90b0739bc0bb349a9616f59 Author: David Hendricks <dhendrix(a)chromium.org> Date: Tue Aug 6 18:05:55 2013 -0700 exynos5420: set L2ACTLR parameters for A15 cores This patch does the following for the A15 cores: - Disable clean/evict push to external - Enable hazard detect timout - Prevent gating the L2 logic clock This is ported from https://gerrit.chromium.org/gerrit/#/c/60154 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Change-Id: I7ac9f40acecfa7daee6fb81772676bf5119d0536 Reviewed-on: https://gerrit.chromium.org/gerrit/64862 Commit-Queue: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Tested-by: David Hendricks <dhendrix(a)chromium.org> See http://review.coreboot.org/4441 for details. -gerrit

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Patch merged into coreboot/master: c0a5876 snow: Set up the i2s0 pins during boot
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit c0a5876f628597f96ed737a0f2d95ab3ef04bf73 Author: Gabe Black <gabeblack(a)google.com> Date: Mon Aug 5 22:19:36 2013 -0700 snow: Set up the i2s0 pins during boot Change-Id: I6729a139091b40d8fd9ba2aa7a8c4e14216d95c5 Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/64879 Reviewed-by: Stefan Reinauer <reinauer(a)google.com> Commit-Queue: Stefan Reinauer <reinauer(a)google.com> Tested-by: Stefan Reinauer <reinauer(a)google.com> See http://review.coreboot.org/4440 for details. -gerrit

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Patch merged into coreboot/master: db8a295 exynos5250: Add a pinmux function to set up i2s bus 0
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit db8a2952d8f68c9f32fb37f30e3e3033dabb38f2 Author: Gabe Black <gabeblack(a)google.com> Date: Mon Aug 5 22:15:21 2013 -0700 exynos5250: Add a pinmux function to set up i2s bus 0 This bus is hooked up on snow and, as it's the only bus hooked up on some other boards, having it available in firmware to test is handy. Change-Id: Icb48b9af4a67d382bd6fbce1e4c6a320d811d365 Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/64877 Reviewed-by: Ronald G. Minnich <rminnich(a)chromium.org> Commit-Queue: Stefan Reinauer <reinauer(a)google.com> Tested-by: Stefan Reinauer <reinauer(a)google.com> See http://review.coreboot.org/4438 for details. -gerrit

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Patch merged into coreboot/master: 0149c9c armv7: add wrappers to read/write L2ACTLR
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit 0149c9cc031f06bdeb06423c87ef0e82274c59ff Author: David Hendricks <dhendrix(a)chromium.org> Date: Tue Aug 6 17:32:41 2013 -0700 armv7: add wrappers to read/write L2ACTLR This adds inline wrappers to read the L2 cache auxiliary control register (L2ACTLR). Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Change-Id: Iec603d7c738426232f7ce3a4a474d01c85fa3f2f Reviewed-on: https://gerrit.chromium.org/gerrit/64861 Commit-Queue: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Tested-by: David Hendricks <dhendrix(a)chromium.org> See http://review.coreboot.org/4437 for details. -gerrit

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Patch merged into coreboot/master: 1e3a861 ARM: Don't inject nobits since we actually want to load these bits
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit 1e3a861eaad2d44a45e5389c5723055e14a7c22e Author: Gabe Black <gabeblack(a)google.com> Date: Tue Aug 6 15:36:44 2013 -0700 ARM: Don't inject nobits since we actually want to load these bits Change-Id: I128e3ecc3773fe7c28616e93ef60b48c5862f302 Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/64839 Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Stefan Reinauer <reinauer(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> See http://review.coreboot.org/4436 for details. -gerrit

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Patch merged into coreboot/master: c79a913 ARM: Remove (NOLOAD) from the .car section
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit c79a913d967f136a4db1b9d35e54b5cb5844c0ff Author: Gabe Black <gabeblack(a)google.com> Date: Tue Aug 6 04:30:13 2013 -0700 ARM: Remove (NOLOAD) from the .car section On ARM, if the .car section is marked as NOLOAD, there's nothing that sets it to zero. Some code in the cbmem console depends on a global variable being zero initially, and if that's not true bad things happen. Change-Id: Ic72a9fb0ee0c5a608190be6f24d0d7de7c34fc1f Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/64769 Reviewed-by: Stefan Reinauer <reinauer(a)google.com> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> See http://review.coreboot.org/4435 for details. -gerrit

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Patch merged into coreboot/master: bf3fe26 exynos5420: minor correction to CPU frequency print
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit bf3fe26e1f400fa2f37076e7a25ae552d14787ca Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Aug 5 18:53:15 2013 -0700 exynos5420: minor correction to CPU frequency print This divides the CPU frequency by 1,000,000 instead of 2^20. serial console shows "CPU: S5P5420 @ 800MHz" instead of claiming 762MHz. Change-Id: I70cc5b62f689c5553b57c82be61233fb9f733f6e Reviewed-on: https://gerrit.chromium.org/gerrit/64743 Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-by: Ronald G. Minnich <rminnich(a)chromium.org> Commit-Queue: David Hendricks <dhendrix(a)chromium.org> Tested-by: David Hendricks <dhendrix(a)chromium.org> See http://review.coreboot.org/4434 for details. -gerrit

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Patch merged into coreboot/master: db9f37c armv7/exynos: Fix and remove memory reset workarounds
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit db9f37cebf202a79835fb849686637de712721c3 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Tue Aug 6 10:48:48 2013 +0800 armv7/exynos: Fix and remove memory reset workarounds The memory corruption problem in Exynos suspend/resume process is caused by two things together: PHY_RESET and MRS command. After stop sending MRS on resume, we can now remove the workaround of skipping PHY_RESET. Change-Id: I64acc27c1d2bb549ae6ad7d32ecda94b0355972c Reviewed-on: https://gerrit.chromium.org/gerrit/64736 Tested-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Commit-Queue: Hung-Te Lin <hungte(a)chromium.org> See http://review.coreboot.org/4433 for details. -gerrit

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Patch merged into coreboot/master: 92708c1 Pit: graphics
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit 92708c146b91680e3598c16636c0af364425a3ce Author: Ronald G. Minnich <rminnich(a)google.com> Date: Thu Aug 1 11:38:05 2013 -0700 Pit: graphics This includes the new dp code, which is better, and the fimd code, which is changed and improved. We took the chance to remove un-needed files, and also to remove some foolish u-boot habits, but not all of them. That will take time. With these changes we get graphics. Since the only mainboards we have with 16 bit graphics are 5:6:5, adjust edid.c to just use that format. If at some future time we need 4:4:4, which seems unlikely, we'll need to add a function to adjust the lb_framebuffer. Note that you can't just divine this from the EDID, as the graphics pipe format need not match the actual final format used. The EDID reading works. We've been requested to support hard-coded EDIDs and that will come in the next revision. Currently the hard-coded EDID is ignored for testing. Change-Id: Ib4d06dc3388ab90c834f94808a51133e5b515a4d Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/64240 Reviewed-by: Stefan Reinauer <reinauer(a)google.com> Tested-by: Ronald G. Minnich <rminnich(a)chromium.org> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> See http://review.coreboot.org/4432 for details. -gerrit

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Patch merged into coreboot/master: 988179e kirby is dead. long live the arm pit.
by gerrit＠coreboot.org 21 Dec '13

21 Dec '13

the following patch was just integrated into master: commit 988179e215128fdecefaff0f9dc3294c7f8ab0c5 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Nov 6 16:38:21 2013 -0800 kirby is dead. long live the arm pit. Remove kirby from our tree. It's dead. BUG=none BRANCH=none TEST=none Change-Id: I0768a9ea40be5d70d845a46f6e28036a133b7aa6 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/176030 Reviewed-by: Ronald Minnich <rminnich(a)chromium.org> Commit-Queue: Stefan Reinauer <reinauer(a)chromium.org> Tested-by: Stefan Reinauer <reinauer(a)chromium.org> See http://review.coreboot.org/4548 for details. -gerrit

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coreboot-gerrit December 2013