July 2013 - SerialICE - mail.coreboot.org

Patch merged into serialice/master: db0ccdc Move VX900 filters from epia_m_850.lua to via_bars.lua
by gerrit＠coreboot.org July 23, 2013

July 23, 2013

the following patch was just integrated into master: commit db0ccdced6e5264a48ac2bb9827861486e2df534 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 16:32:09 2013 -0500 Move VX900 filters from epia_m_850.lua to via_bars.lua As the comment said, "MOVE THIS TO CHIPSET FILE". Now we can remove that comment and be happy that VX900 filtering is done properly. Change-Id: I47294211be073aad205c6727b2649ec0b38ba2c4 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/3803 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/3803 for details. -gerrit

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Patch merged into serialice/master: 382d2ce VX900: Rename northbridge_vx900 to enable_hooks_vx900
by gerrit＠coreboot.org July 23, 2013

July 23, 2013

the following patch was just integrated into master: commit 382d2ce58f89958252d2c88b1a16caeafd7020a6 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 16:16:06 2013 -0500 VX900: Rename northbridge_vx900 to enable_hooks_vx900 The VX900 is not just a northbridge, and the function enables hooks for both the north and south modules of the chipset, so rename it for better readability. Change-Id: If851652830f178668dd3fa9ea85b8d72790b40ed Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/3802 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/3802 for details. -gerrit

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Patch merged into serialice/master: a3fd6de VX900: Add hook for PCI MMIO accesses
by gerrit＠coreboot.org July 23, 2013

July 23, 2013

the following patch was just integrated into master: commit a3fd6de5dda9f9b2164c333783ef34680ba422db Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 02:27:53 2013 -0500 VX900: Add hook for PCI MMIO accesses Add a hook that enables decoding of PCI MMIO base on the VIA VX900. Change-Id: I5a66366fc4dbaf4e2f60f58febad90f7bb7cd2ff Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/3795 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/3795 for details. -gerrit

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Patch set updated for serialice: 1e4f073 VX900: Rename northbridge_vx900 to enable_hooks_vx900
by Alexandru Gagniuc July 23, 2013

July 23, 2013

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3802 -gerrit commit 1e4f07380dea71f36489611d327b05b91be4adfd Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 16:16:06 2013 -0500 VX900: Rename northbridge_vx900 to enable_hooks_vx900 The VX900 is not just a northbridge, and the function enables hooks for both the north and south modules of the chipset, so rename it for better readability. Change-Id: If851652830f178668dd3fa9ea85b8d72790b40ed Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- SerialICE/simba/chipset/via_bars.lua | 2 +- SerialICE/simba/mainboard/via_epia_m_850.lua | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/SerialICE/simba/chipset/via_bars.lua b/SerialICE/simba/chipset/via_bars.lua index bafc53b..8bbff35 100644 --- a/SerialICE/simba/chipset/via_bars.lua +++ b/SerialICE/simba/chipset/via_bars.lua @@ -33,7 +33,7 @@ function sb_mmio_bar(f, action) generic_mmio_bar(f.dev.mmio) end -function northbridge_vx900() +function enable_hooks_vx900() pci_cfg8_hook(dev_nb_traf_ctl, 0x61, "PCI", vx900_pcie_bar) pci_cfg32_hook(dev_sb, 0xbc, "SB_MMIO", sb_mmio_bar) end diff --git a/SerialICE/simba/mainboard/via_epia_m_850.lua b/SerialICE/simba/mainboard/via_epia_m_850.lua index 6737399..fb908b2 100644 --- a/SerialICE/simba/mainboard/via_epia_m_850.lua +++ b/SerialICE/simba/mainboard/via_epia_m_850.lua @@ -156,7 +156,7 @@ function do_mainboard_setup() enable_hook_pc80() enable_hook_superio(0x4e, 0x07) - northbridge_vx900() + enable_hooks_vx900() pci_cfg16_hook(dev_power, 0x88, "PM", pm_io_bar) pci_cfg16_hook(dev_power, 0xd0, "SMBus", smbus_bar_hook)

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Patch set updated for serialice: 50772a1 Move VX900 filters from epia_m_850.lua to via_bars.lua
by Alexandru Gagniuc July 23, 2013

July 23, 2013

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3803 -gerrit commit 50772a1896fb40a906e85d5bced39d8114318d10 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 16:32:09 2013 -0500 Move VX900 filters from epia_m_850.lua to via_bars.lua As the comment said, "MOVE THIS TO CHIPSET FILE". Now we can remove that comment and be happy that VX900 filtering is done properly. Change-Id: I47294211be073aad205c6727b2649ec0b38ba2c4 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- SerialICE/simba/chipset/via_bars.lua | 44 ++++++++++++++++++++++++++++ SerialICE/simba/mainboard/via_epia_m_850.lua | 39 +----------------------- 2 files changed, 45 insertions(+), 38 deletions(-) diff --git a/SerialICE/simba/chipset/via_bars.lua b/SerialICE/simba/chipset/via_bars.lua index 8bbff35..5610230 100644 --- a/SerialICE/simba/chipset/via_bars.lua +++ b/SerialICE/simba/chipset/via_bars.lua @@ -1,3 +1,32 @@ +-- SerialICE +-- +-- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> +-- Copyright (c) 2013 Alexandru Gagniuc <mr.nuke.me(a)gmail.com> +-- +-- Permission is hereby granted, free of charge, to any person obtaining a copy +-- of this software and associated documentation files (the "Software"), to deal +-- in the Software without restriction, including without limitation the rights +-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +-- copies of the Software, and to permit persons to whom the Software is +-- furnished to do so, subject to the following conditions: +-- +-- The above copyright notice and this permission notice shall be included in +-- all copies or substantial portions of the Software. +-- +-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +-- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +-- THE SOFTWARE. +-- + + +-- ********************************************************** +-- + +load_filter("intel_smbus") dev_nb_traf_ctl = { pci_dev = pci_bdf(0,0,5,0), @@ -22,6 +51,7 @@ dev_sb = { name = "sb", bar = {}, mmio = { f = nil }, + acpi = { f = nil }, } function sb_mmio_bar(f, action) @@ -33,7 +63,21 @@ function sb_mmio_bar(f, action) generic_mmio_bar(f.dev.mmio) end +function pm_io_bar(f, action) + f.dev.acpi.name = "ACPI" + f.dev.acpi.val = bit32.band(action.data, 0xff80) + f.dev.acpi.size = 0x80 + generic_io_bar(f.dev.acpi) +end + +function smbus_bar_hook(f, action) + local base = bit32.band(action.data, 0xfff0) + intel_smbus_setup(base, 0x10) +end + function enable_hooks_vx900() pci_cfg8_hook(dev_nb_traf_ctl, 0x61, "PCI", vx900_pcie_bar) pci_cfg32_hook(dev_sb, 0xbc, "SB_MMIO", sb_mmio_bar) + pci_cfg16_hook(dev_sb, 0x88, "PM", pm_io_bar) + pci_cfg16_hook(dev_sb, 0xd0, "SMBus", smbus_bar_hook) end diff --git a/SerialICE/simba/mainboard/via_epia_m_850.lua b/SerialICE/simba/mainboard/via_epia_m_850.lua index fb908b2..4f5dc14 100644 --- a/SerialICE/simba/mainboard/via_epia_m_850.lua +++ b/SerialICE/simba/mainboard/via_epia_m_850.lua @@ -1,6 +1,7 @@ -- SerialICE -- -- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> +-- Copyright (c) 2013 Alexandru Gagniuc <mr.nuke.me(a)gmail.com> -- -- Permission is hereby granted, free of charge, to any person obtaining a copy -- of this software and associated documentation files (the "Software"), to deal @@ -104,43 +105,8 @@ filter_mainboard = { size = 0x10000 } - - --- MOVE THIS TO CHIPSET FILE - -load_filter("intel_smbus") load_filter("via_bars") -function smbus_bar_hook(f, action) - local base = bit32.band(action.data, 0xfff0) - intel_smbus_setup(base, 0x10) -end - -dev_sb_lpc = { - pci_dev = pci_bdf(0x0,0x1f,0x3,0x0), - name = "Smbus", - bar = {}, -} - -dev_power = { - pci_dev = pci_bdf(0x0,0x11,0x0,0x0), - name = "SYS", - bar = {}, - acpi = { f = nil }, - tco = { f = nil }, -} - -function pm_io_bar(f, action) - f.dev.acpi.name = "ACPI" - f.dev.acpi.val = bit32.band(action.data, 0xff80) - f.dev.acpi.size = 0x80 - generic_io_bar(f.dev.acpi) -end - - - --- **************** - function do_mainboard_setup() enable_hook(io_hooks, filter_pci_io_cfg) enable_hook(mem_hooks, filter_lapic) @@ -155,10 +121,7 @@ function do_mainboard_setup() enable_hook_pc80() enable_hook_superio(0x4e, 0x07) - enable_hooks_vx900() - pci_cfg16_hook(dev_power, 0x88, "PM", pm_io_bar) - pci_cfg16_hook(dev_power, 0xd0, "SMBus", smbus_bar_hook) -- Apply mainboard hooks last, so they are the first ones to check enable_hook(io_hooks, filter_mainboard)

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Patch set updated for serialice: 4f5a345 VX900: Add hook for PCI MMIO accesses
by Alexandru Gagniuc July 23, 2013

July 23, 2013

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3795 -gerrit commit 4f5a345f6810f9c47bd020b6f4e0237e92622543 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 02:27:53 2013 -0500 VX900: Add hook for PCI MMIO accesses Add a hook that enables decoding of PCI MMIO base on the VIA VX900. Change-Id: I5a66366fc4dbaf4e2f60f58febad90f7bb7cd2ff Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- SerialICE/simba/chipset/via_bars.lua | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/SerialICE/simba/chipset/via_bars.lua b/SerialICE/simba/chipset/via_bars.lua index 8bf58e7..bafc53b 100644 --- a/SerialICE/simba/chipset/via_bars.lua +++ b/SerialICE/simba/chipset/via_bars.lua @@ -1,11 +1,20 @@ -function sb_mmio_bar(f, action) - -- This MMIO space is used for SPI and CEC control - f.dev.mmio.name = "SB_MMIO" - f.dev.mmio.val = bit32.lshift(bit32.band(action.data, 0xfff0), 8) - f.dev.mmio.size = 0x10000 +dev_nb_traf_ctl = { + pci_dev = pci_bdf(0,0,5,0), + name = "trf", + bar = {}, +} - generic_mmio_bar(f.dev.mmio) +function vx900_pcie_bar(f, action) + local baseaddr = bit32.lshift(action.data, 28) + local size = 256*1024*1024 + + -- enable is 0:00.5 [060] .10 + if baseaddr then + pcie_mm_enable(f.dev, f.reg, baseaddr, size) + else + pcie_mm_disable(f.dev, f.reg, baseaddr, size) + end end dev_sb = { @@ -15,6 +24,16 @@ dev_sb = { mmio = { f = nil }, } +function sb_mmio_bar(f, action) + -- This MMIO space is used for SPI and CEC control + f.dev.mmio.name = "SB_MMIO" + f.dev.mmio.val = bit32.lshift(bit32.band(action.data, 0xfff0), 8) + f.dev.mmio.size = 0x10000 + + generic_mmio_bar(f.dev.mmio) +end + function northbridge_vx900() + pci_cfg8_hook(dev_nb_traf_ctl, 0x61, "PCI", vx900_pcie_bar) pci_cfg32_hook(dev_sb, 0xbc, "SB_MMIO", sb_mmio_bar) end

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Patch merged into serialice/master: f480055 VX900: Remove filters for PCI device 0:00.0
by gerrit＠coreboot.org July 23, 2013

July 23, 2013

the following patch was just integrated into master: commit f480055c1358ada89daf59770467f41aa69a44f7 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 16:06:57 2013 -0500 VX900: Remove filters for PCI device 0:00.0 This BDF does not have any writable MMIO or IO BARs, so don't bother filtering it. Change-Id: I2f8f82bb51f5ffa175e7dd37b0fc20ad9c26f57d Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/3800 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/3800 for details. -gerrit

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Patch merged into serialice/master: 076492f VX900: Fix decoding of southbridge MMIO BAR
by gerrit＠coreboot.org July 23, 2013

July 23, 2013

the following patch was just integrated into master: commit 076492f67909311f34da2772bf229e74e1026fa0 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 16:00:34 2013 -0500 VX900: Fix decoding of southbridge MMIO BAR Change-Id: I94ef658fb90e0c36a038e4f87a0b25e444af7e40 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/3799 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/3799 for details. -gerrit

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Patch merged into serialice/master: 28b0d82 EPIA-M850: Fix decoding of SMBus IO BAR to prevent 'nil' error
by gerrit＠coreboot.org July 23, 2013

July 23, 2013

the following patch was just integrated into master: commit 28b0d82d9a203bbe8e042abfd470d0cba8152e9c Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 14:41:57 2013 -0500 EPIA-M850: Fix decoding of SMBus IO BAR to prevent 'nil' error The filter seems to have been using an obsolete form, thus causing a 'nil' error when SerialICE tried to run it. Fix this error. Change-Id: Ib650e9bd1661574a1f7987803cfc131c12035a5d Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/3798 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/3798 for details. -gerrit

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Patch merged into serialice/master: 3591198 EPIA-M850: Fix decoding of ACPI IO BAR to prevent 'nil' error
by gerrit＠coreboot.org July 23, 2013

July 23, 2013

the following patch was just integrated into master: commit 3591198e0264ee2a1e8a1e55baad44a1c80c915d Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Mon Jul 22 14:06:12 2013 -0500 EPIA-M850: Fix decoding of ACPI IO BAR to prevent 'nil' error When SerialICE got to the ACPI IO filter, it complained about a 'nil' value and died. Make this filter work again. Change-Id: Id8ff78e2f94d3f4d55d00824a8eb2e5ccecd23f4 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/3797 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/3797 for details. -gerrit

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