March 2012 - SerialICE - mail.coreboot.org

New patch to review for serialice: fe9b4cf Add mainboard AOpen DXPL Plus
by Kyösti Mälkki March 31, 2012

March 31, 2012

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/835 -gerrit commit fe9b4cf949649a6e161eb7e215efd2336051729c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 31 14:03:58 2012 +0300 Add mainboard AOpen DXPL Plus Change-Id: Ic23e99f50e1d1acddccd90f3791c872c3e22023a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/Kconfig | 4 ++ SerialICE/mainboard/aopen_dxpl-plus.c | 70 +++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+), 0 deletions(-) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index ac53de1..b645309 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -102,6 +102,9 @@ config BOARD_ASROCK_P4I65GV config BOARD_ASUS_P4P800_VM bool "ASUS P4P800-VM" +config BOARD_AOPEN_DXPL_PLUS + bool "AOpen DXPL Plus" + endchoice config BOARD_INIT @@ -128,6 +131,7 @@ config BOARD_INIT default "wyse_s50.c" if BOARD_WYSE_S50 default "asrock_p4i65gv.c" if BOARD_ASROCK_P4I65GV default "asus_p4p800-vm.c" if BOARD_ASUS_P4P800_VM + default "aopen_dxpl-plus.c" if BOARD_AOPEN_DXPL_PLUS config SOUTHBRIDGE_INIT string diff --git a/SerialICE/mainboard/aopen_dxpl-plus.c b/SerialICE/mainboard/aopen_dxpl-plus.c new file mode 100644 index 0000000..d8c6bea --- /dev/null +++ b/SerialICE/mainboard/aopen_dxpl-plus.c @@ -0,0 +1,70 @@ +/* + * SerialICE + * + * Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="AOpen DXPL Plus "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void southbridge_init(void) +{ + /* Set NO_REBOOT flag */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xd4), 0x02); + + /* Set SuperIO GPIO decode range. */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe4), 0x0e01); + + /* Select COM1 COM2 I/O ranges. */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x10); + + /* Enable COM1, COM2, KBD, SIO config registers 0x2e. */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1403); + + /* Enable Serial IRQ */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x64), 0xd0); +} + +static void superio_init(void) +{ + pnp_enter_ext_func_mode_alt(SUPERIO_CONFIG_PORT); + + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 4); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + +#if 0 + /* Must route GPIO to UART2 before enabling this */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 5); /* COM2 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x2f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 3); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); +#endif + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + southbridge_init(); + superio_init(); +} +

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Re: [SerialICE] lua script shows WARNING: undefined load(/store) operation @<location>
by Idwer Vollering March 26, 2012

March 26, 2012

Attaching a compressed logfile: qemu_serialice_logfile_1332720505.log.tar.gz Op 26 maart 2012 01:52 heeft Idwer Vollering <vidwer(a)gmail.com> het volgende geschreven: > Memory initialization registers reside in the address range > 0xfecf0000:0xfecffff but serialice (from git code) shows lines like > this: > "WARNING: undefined load operation @fecf0000" and "WARNING: undefined > store operation @fecf0000" > > To filter these registers I have edited serialice.lua, then added the > following filter to SerialICE_memory_read_filter: > if (addr >= 0xfecf0000 and addr <= 0xfecffff) then Typo; this should ofcourse be 0xfecfffff. > return false, true, 0 > > and SerialICE_memory_write_filter: > if (addr >= 0xfecf0000 and addr <= 0xfecffff) then Dito, 0xfecfffff. > return false, true, data > > > So the above filters aren't applied. Help? > > Idwer

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lua script shows WARNING: undefined load(/store) operation @<location>
by Idwer Vollering March 25, 2012

March 25, 2012

Memory initialization registers reside in the address range 0xfecf0000:0xfecffff but serialice (from git code) shows lines like this: "WARNING: undefined load operation @fecf0000" and "WARNING: undefined store operation @fecf0000" To filter these registers I have edited serialice.lua, then added the following filter to SerialICE_memory_read_filter: if (addr >= 0xfecf0000 and addr <= 0xfecffff) then return false, true, 0 and SerialICE_memory_write_filter: if (addr >= 0xfecf0000 and addr <= 0xfecffff) then return false, true, data So the above filters aren't applied. Help? Idwer

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Re: [SerialICE] [coreboot] [ANNOUNCE] libhwremote 0.1
by Carl-Daniel Hailfinger March 10, 2012

March 10, 2012

Am 10.03.2012 17:52 schrieb Idwer Vollering: > 2012/3/10 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>: >> I'm glad to announce libhwremote 0.1, a library which forwards hardware >> accesses over a serial line to a machine running SerialICE. No QEMU needed! >> All you have to do to run lspci/superiotool/... against a remote >> SerialICE target is to compile those tools against libhwremote, and then >> just run them like you would run them natively. >> >> libhwremote is an early prototype. Due to that it has quite a few quirks: >> - Each run of a libhwremote enabled application requires the application >> to be started before SerialICE prints its banner, i.e. start the >> application, then hit reset on the SerialICE target. The reason is the >> init code which expects "newline,serialice_banner,newline" to do >> anything useful. If that banner is not there, the results are undefined. >> - The error handling is mostly working but not really nice. >> - /dev/ttyUSB0 is hardcoded for serial line access, you may want to >> change that. >> - MMIO functions are totally untested, I didn't find any code which >> needed it (except for flashrom, but probing for flash chips might >> interfere with SerialICE functionality if SerialICE runs from ROM). >> - The pciutils patch is totally untested, but I expect it to work. >> >> A big THANK YOU goes to Idwer Vollering who tested a dozen iterations of >> this code until I had figured out the very surprising and unique >> properties of the SerialICE protocol. >> >> Another big THANK YOU goes to Ron Minnich who sent a mail titled >> "[SerialICE] an idea" which motivated me to start this little project: >> http://serialice.com/pipermail/serialice/2009-November/000043.html >> >> This code sat unfinished on my disk since December 2009, and it's about >> time I finished it enough to be usable. >> >> Notes:: >> - superiotool support is tested and stable >> - pciutils (lspci/setpci/...) support is untested, but should work. >> >> Please fetch latest superiotool from the coreboot git tree and latest >> pciutils from the pciutils git tree to apply the patches. > git clone'd from git://git.kernel.org/pub/scm/utils/pciutils/pciutils.git > >> libhwremote is available at: >> http://ra.openbios.org/~carldani/libhwremote-0.1.tar.gz >> >> superiotool patch is available at: >> http://ra.openbios.org/~carldani/superiotool_hwremote.diff >> >> pciutils patch is available at: >> http://ra.openbios.org/~carldani/pciutils_hwremote.diff >> >> I plan to check this code into a source code repository really soon, but >> for now a tarball and separate patch downloads have to suffice. >> >> Tests and bug reports appreciated. > Where is i386-io-libhwremote.h? > > $ make distclean ; make > [...] > gcc -O2 -Wall -W -Wno-parentheses -Wstrict-prototypes > -Wmissing-prototypes -c -o i386-ports.o i386-ports.c > i386-ports.c:30:33: fatal error: i386-io-libhwremote.h: No such file > or directory Ouch. I forgot to git add that file. Please download the updated http://ra.openbios.org/~carldani/pciutils_hwremote.diff Regards, Carl-Daniel -- http://www.hailfinger.org/

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[ANNOUNCE] libhwremote 0.1
by Carl-Daniel Hailfinger March 10, 2012

March 10, 2012

I'm glad to announce libhwremote 0.1, a library which forwards hardware accesses over a serial line to a machine running SerialICE. No QEMU needed! All you have to do to run lspci/superiotool/... against a remote SerialICE target is to compile those tools against libhwremote, and then just run them like you would run them natively. libhwremote is an early prototype. Due to that it has quite a few quirks: - Each run of a libhwremote enabled application requires the application to be started before SerialICE prints its banner, i.e. start the application, then hit reset on the SerialICE target. The reason is the init code which expects "newline,serialice_banner,newline" to do anything useful. If that banner is not there, the results are undefined. - The error handling is mostly working but not really nice. - /dev/ttyUSB0 is hardcoded for serial line access, you may want to change that. - MMIO functions are totally untested, I didn't find any code which needed it (except for flashrom, but probing for flash chips might interfere with SerialICE functionality if SerialICE runs from ROM). - The pciutils patch is totally untested, but I expect it to work. A big THANK YOU goes to Idwer Vollering who tested a dozen iterations of this code until I had figured out the very surprising and unique properties of the SerialICE protocol. Another big THANK YOU goes to Ron Minnich who sent a mail titled "[SerialICE] an idea" which motivated me to start this little project: http://serialice.com/pipermail/serialice/2009-November/000043.html This code sat unfinished on my disk since December 2009, and it's about time I finished it enough to be usable. Notes:: - superiotool support is tested and stable - pciutils (lspci/setpci/...) support is untested, but should work. Please fetch latest superiotool from the coreboot git tree and latest pciutils from the pciutils git tree to apply the patches. libhwremote is available at: http://ra.openbios.org/~carldani/libhwremote-0.1.tar.gz superiotool patch is available at: http://ra.openbios.org/~carldani/superiotool_hwremote.diff pciutils patch is available at: http://ra.openbios.org/~carldani/pciutils_hwremote.diff I plan to check this code into a source code repository really soon, but for now a tarball and separate patch downloads have to suffice. Tests and bug reports appreciated. Regards, Carl-Daniel -- http://www.hailfinger.org/

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