November 2011 - SerialICE - mail.coreboot.org

Patch set updated for serialice: 2d86782 Add SerialICE support for ASUS P4P800-VM.
by Idwer Vollering Nov. 10, 2011

Nov. 10, 2011

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/418 -gerrit commit 2d867827e3f2a8afb062fc1231b034e8d89d894f Author: Idwer Vollering <vidwer(a)gmail.com> Date: Sun Nov 6 01:05:40 2011 +0100 Add SerialICE support for ASUS P4P800-VM. Change-Id: I0ce304c7be28f24c5612603720ae470353a4a3cb Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- SerialICE/Kconfig | 10 +++++- SerialICE/mainboard/asrock_p4i65gv.c | 57 ++++++++++++++++++++++++++++++++++ SerialICE/mainboard/asus_p4p800-vm.c | 57 ++++++++++++++++++++++++++++++++++ 3 files changed, 122 insertions(+), 2 deletions(-) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 655e3f4..d950f04 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -96,6 +96,12 @@ config BOARD_HP_DL165_G6 config BOARD_WYSE_S50 bool "WYSE S50" +config BOARD_ASROCK_P4I65GV + bool "ASRock P4i65GV" + +config BOARD_ASUS_P4P800_VM + bool "ASUS P4P800-VM" + endchoice config BOARD_INIT @@ -120,6 +126,8 @@ config BOARD_INIT default "tyan_s2912.c" if BOARD_TYAN_S2912 default "hp_dl165_g6.c" if BOARD_HP_DL165_G6 default "wyse_s50.c" if BOARD_WYSE_S50 + default "asrock_p4i65gv.c" if BOARD_ASROCK_P4I65GV + default "asus_p4p800-vm.c" if BOARD_ASUS_P4P800_VM choice prompt "Target communication" @@ -309,5 +317,3 @@ config BUILD_XMMSTACK bool select HAVE_SSE depends on !EXPERT - - diff --git a/SerialICE/mainboard/asrock_p4i65gv.c b/SerialICE/mainboard/asrock_p4i65gv.c new file mode 100644 index 0000000..d0f46f4 --- /dev/null +++ b/SerialICE/mainboard/asrock_p4i65gv.c @@ -0,0 +1,57 @@ +/* + * SerialICE + * + * Copyright (C) 2011 Idwer Vollering <vidwer(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="ASRock P4i65GV "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void mainboard_set_ich5(void) +{ + /* COM_DEC */ /* COMA at 0x3f8, COMB at 0x3f8 */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x0); + /* LPC_EN */ /* FDD_LPC_EN=1, KBC_LPC_EN=1, CNF1_LPC_EN=1 */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1408); + /* FB_DEC_EN1 */ /* FN_F8_EN=1, decode two 512 kilobyte flash ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0x80); + /* FB_DEC_EN2 */ /* don't decode two 1 megabyte ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0); + /* FUNC_DIS */ /* D31_F6_DISABLE=1 (AC97 modem) */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xf2), 0x0040); +} + +/* Winbond W83627HG */ +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + /* Set the clock to 48MHz */ + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc0); + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + mainboard_set_ich5(); + superio_init(); +} diff --git a/SerialICE/mainboard/asus_p4p800-vm.c b/SerialICE/mainboard/asus_p4p800-vm.c new file mode 100644 index 0000000..4109bc0 --- /dev/null +++ b/SerialICE/mainboard/asus_p4p800-vm.c @@ -0,0 +1,57 @@ +/* + * SerialICE + * + * Copyright (C) 2011 Idwer Vollering <vidwer(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="ASUS P4P800-VM "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void mainboard_set_ich5(void) +{ + /* COM_DEC */ /* COMA at 0x3f8, COMB at 0x3f8 */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x0); + /* LPC_EN */ /* FDD_LPC_EN=1, KBC_LPC_EN=1, CNF1_LPC_EN=1 */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1408); + /* FB_DEC_EN1 */ /* FN_F8_EN=1, decode two 512 kilobyte flash ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0x80); + /* FB_DEC_EN2 */ /* don't decode two 1 megabyte ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0); + /* FUNC_DIS */ /* D31_F6_DISABLE=1 (AC97 modem) */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xf2), 0x0040); +} + +/* Winbond W83627THF */ +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + /* Set the clock to 48MHz */ + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0x42); + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + mainboard_set_ich5(); + superio_init(); +}

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Patch merged into serialice/master: fb4c69c Add SerialICE support for ASRock P4i65GV.
by gerrit＠coreboot.org Nov. 6, 2011

Nov. 6, 2011

the following patch was just integrated into master: commit fb4c69ccb8ba9884963f23e5f23986498272008b Author: Idwer Vollering <vidwer(a)gmail.com> Date: Sun Nov 6 01:05:40 2011 +0100 Add SerialICE support for ASRock P4i65GV. Change-Id: I67c5e999675d0bd29fab890f905407b0259f9c2c Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Build-Tested: build bot (Jenkins) at Sun Nov 6 02:32:17 2011, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sun Nov 6 18:08:44 2011, giving +2 See http://review.coreboot.org/419 for details. -gerrit

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Patch set updated for serialice: fb4c69c Add SerialICE support for ASRock P4i65GV.
by Idwer Vollering Nov. 5, 2011

Nov. 5, 2011

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/419 -gerrit commit fb4c69ccb8ba9884963f23e5f23986498272008b Author: Idwer Vollering <vidwer(a)gmail.com> Date: Sun Nov 6 01:05:40 2011 +0100 Add SerialICE support for ASRock P4i65GV. Change-Id: I67c5e999675d0bd29fab890f905407b0259f9c2c Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- SerialICE/Kconfig | 6 ++- SerialICE/mainboard/asrock_p4i65gv.c | 57 ++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 2 deletions(-) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 655e3f4..a28b4c5 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -96,6 +96,9 @@ config BOARD_HP_DL165_G6 config BOARD_WYSE_S50 bool "WYSE S50" +config BOARD_ASROCK_P4I65GV + bool "ASRock P4i65GV" + endchoice config BOARD_INIT @@ -120,6 +123,7 @@ config BOARD_INIT default "tyan_s2912.c" if BOARD_TYAN_S2912 default "hp_dl165_g6.c" if BOARD_HP_DL165_G6 default "wyse_s50.c" if BOARD_WYSE_S50 + default "asrock_p4i65gv.c" if BOARD_ASROCK_P4I65GV choice prompt "Target communication" @@ -309,5 +313,3 @@ config BUILD_XMMSTACK bool select HAVE_SSE depends on !EXPERT - - diff --git a/SerialICE/mainboard/asrock_p4i65gv.c b/SerialICE/mainboard/asrock_p4i65gv.c new file mode 100644 index 0000000..d0f46f4 --- /dev/null +++ b/SerialICE/mainboard/asrock_p4i65gv.c @@ -0,0 +1,57 @@ +/* + * SerialICE + * + * Copyright (C) 2011 Idwer Vollering <vidwer(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="ASRock P4i65GV "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void mainboard_set_ich5(void) +{ + /* COM_DEC */ /* COMA at 0x3f8, COMB at 0x3f8 */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x0); + /* LPC_EN */ /* FDD_LPC_EN=1, KBC_LPC_EN=1, CNF1_LPC_EN=1 */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1408); + /* FB_DEC_EN1 */ /* FN_F8_EN=1, decode two 512 kilobyte flash ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0x80); + /* FB_DEC_EN2 */ /* don't decode two 1 megabyte ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0); + /* FUNC_DIS */ /* D31_F6_DISABLE=1 (AC97 modem) */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xf2), 0x0040); +} + +/* Winbond W83627HG */ +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + /* Set the clock to 48MHz */ + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc0); + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + mainboard_set_ich5(); + superio_init(); +}

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New patch to review for serialice: e5ded32 Add SerialICE support for ASRock P4i65GV.
by Idwer Vollering Nov. 5, 2011

Nov. 5, 2011

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/419 -gerrit commit e5ded32a903c7b283702080df0acd26d332ca791 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Sun Nov 6 01:05:40 2011 +0100 Add SerialICE support for ASRock P4i65GV. Change-Id: I67c5e999675d0bd29fab890f905407b0259f9c2c Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- SerialICE/Kconfig | 12 ++----- SerialICE/mainboard/asrock_p4i65gv.c | 57 ++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 8 deletions(-) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 655e3f4..111a12f 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -50,11 +50,6 @@ config BOARD_ASUS_M2V_MX_SE select VIA_ROMSTRAP select BUILD_XMMSTACK -config BOARD_ASUS_K8V_X - bool "ASUS K8V-X" - select VIA_ROMSTRAP - select BUILD_XMMSTACK - config BOARD_ASUS_M4A77TD_PRO bool "ASUS M4A77TD-PRO" select BUILD_XMMSTACK @@ -96,6 +91,9 @@ config BOARD_HP_DL165_G6 config BOARD_WYSE_S50 bool "WYSE S50" +config BOARD_ASROCK_P4I65GV + bool "ASRock P4i65GV" + endchoice config BOARD_INIT @@ -107,7 +105,6 @@ config BOARD_INIT default "intel_d945gclf.c" if BOARD_INTEL_D945GCLF default "dell_s1850.c" if BOARD_DELL_S1850 default "asus_m2v-mx_se.c" if BOARD_ASUS_M2V_MX_SE - default "asus_k8v-x.c" if BOARD_ASUS_K8V_X default "msi_ms6178.c" if BOARD_MSI_MS6178 default "rca_rm4100.c" if BOARD_RCA_RM4100 default "thomson_ip1000.c" if BOARD_THOMSON_IP1000 @@ -120,6 +117,7 @@ config BOARD_INIT default "tyan_s2912.c" if BOARD_TYAN_S2912 default "hp_dl165_g6.c" if BOARD_HP_DL165_G6 default "wyse_s50.c" if BOARD_WYSE_S50 + default "asrock_p4i65gv.c" if BOARD_ASROCK_P4I65GV choice prompt "Target communication" @@ -309,5 +307,3 @@ config BUILD_XMMSTACK bool select HAVE_SSE depends on !EXPERT - - diff --git a/SerialICE/mainboard/asrock_p4i65gv.c b/SerialICE/mainboard/asrock_p4i65gv.c new file mode 100644 index 0000000..d0f46f4 --- /dev/null +++ b/SerialICE/mainboard/asrock_p4i65gv.c @@ -0,0 +1,57 @@ +/* + * SerialICE + * + * Copyright (C) 2011 Idwer Vollering <vidwer(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="ASRock P4i65GV "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void mainboard_set_ich5(void) +{ + /* COM_DEC */ /* COMA at 0x3f8, COMB at 0x3f8 */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x0); + /* LPC_EN */ /* FDD_LPC_EN=1, KBC_LPC_EN=1, CNF1_LPC_EN=1 */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1408); + /* FB_DEC_EN1 */ /* FN_F8_EN=1, decode two 512 kilobyte flash ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0x80); + /* FB_DEC_EN2 */ /* don't decode two 1 megabyte ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0); + /* FUNC_DIS */ /* D31_F6_DISABLE=1 (AC97 modem) */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xf2), 0x0040); +} + +/* Winbond W83627HG */ +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + /* Set the clock to 48MHz */ + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc0); + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + mainboard_set_ich5(); + superio_init(); +}

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New patch to review for serialice: 1a37808 Add SerialICE support for ASUS P4P800-VM.
by Idwer Vollering Nov. 5, 2011

Nov. 5, 2011

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/418 -gerrit commit 1a37808d00a6e41aa5b4f5ff7382759ced191929 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Sun Nov 6 00:26:57 2011 +0100 Add SerialICE support for ASUS P4P800-VM. Change-Id: I0ce304c7be28f24c5612603720ae470353a4a3cb Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- SerialICE/Kconfig | 3 ++ SerialICE/mainboard/asus_p4p800-vm.c | 57 ++++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 0 deletions(-) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index fc2601a..c19d14a 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -91,6 +91,8 @@ config BOARD_HP_DL165_G6 config BOARD_WYSE_S50 bool "WYSE S50" +config BOARD_ASUS_P4P800_VM + bool "P4P800-VM" endchoice config BOARD_INIT @@ -114,6 +116,7 @@ config BOARD_INIT default "tyan_s2912.c" if BOARD_TYAN_S2912 default "hp_dl165_g6.c" if BOARD_HP_DL165_G6 default "wyse_s50.c" if BOARD_WYSE_S50 + default "asus_p4p800-vm.c" if BOARD_ASUS_P4P800_VM choice prompt "Target communication" diff --git a/SerialICE/mainboard/asus_p4p800-vm.c b/SerialICE/mainboard/asus_p4p800-vm.c new file mode 100644 index 0000000..88f5c6d --- /dev/null +++ b/SerialICE/mainboard/asus_p4p800-vm.c @@ -0,0 +1,57 @@ +/* + * SerialICE + * + * Copyright (C) 2011 Idwer Vollering <vidwer(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="ASUS P4P800-VM "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void mainboard_set_ich5(void) +{ + /* COM_DEC */ /* COMA at 0x3f8, COMB at 0x3f8 */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x0); + /* LPC_EN */ /* FDD_LPC_EN=1, KBC_LPC_EN=1, CNF1_LPC_EN=1 */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1408); + /* FB_DEC_EN1 */ /* FN_F8_EN=1, decode two 512 kilobyte flash ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0x80); + /* FB_DEC_EN2 */ /* don't decode two 1 megabyte ranges */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0); + /* FUNC_DIS */ /* D31_F6_DISABLE=1 (AC97 modem) */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xf2), 0x0040); +} + +/* Winbond W83627THF */ +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + /* Set the clock to 48MHz */ + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0x42); + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + mainboard_set_ich5(); + superio_init(); +}

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Patch merged into serialice/master: 0cd917b add support for Asus K8V-X
by gerrit＠coreboot.org Nov. 2, 2011

Nov. 2, 2011

the following patch was just integrated into master: commit 0cd917b5c88d6118f2babb54470be825caa0c287 Author: Florian Zumbiehl <florz(a)florz.de> Date: Wed Nov 2 11:29:24 2011 +0100 add support for Asus K8V-X Change-Id: I9c0d1a7335872c06a5f2599ba2570d1c66ba21d4 Signed-off-by: Florian Zumbiehl <florz(a)florz.de> Build-Tested: build bot (Jenkins) at Wed Nov 2 11:55:22 2011, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Wed Nov 2 21:25:51 2011, giving +2 See http://review.coreboot.org/392 for details. -gerrit

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New patch to review for serialice: 0cd917b add support for Asus K8V-X
by Florian Zumbiehl Nov. 2, 2011

Nov. 2, 2011

Florian Zumbiehl just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/392 -gerrit commit 0cd917b5c88d6118f2babb54470be825caa0c287 Author: Florian Zumbiehl <florz(a)florz.de> Date: Wed Nov 2 11:29:24 2011 +0100 add support for Asus K8V-X Change-Id: I9c0d1a7335872c06a5f2599ba2570d1c66ba21d4 Signed-off-by: Florian Zumbiehl <florz(a)florz.de> --- SerialICE/Kconfig | 6 +++ SerialICE/mainboard/asus_k8v-x.c | 68 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+), 0 deletions(-) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index fc2601a..655e3f4 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -50,6 +50,11 @@ config BOARD_ASUS_M2V_MX_SE select VIA_ROMSTRAP select BUILD_XMMSTACK +config BOARD_ASUS_K8V_X + bool "ASUS K8V-X" + select VIA_ROMSTRAP + select BUILD_XMMSTACK + config BOARD_ASUS_M4A77TD_PRO bool "ASUS M4A77TD-PRO" select BUILD_XMMSTACK @@ -102,6 +107,7 @@ config BOARD_INIT default "intel_d945gclf.c" if BOARD_INTEL_D945GCLF default "dell_s1850.c" if BOARD_DELL_S1850 default "asus_m2v-mx_se.c" if BOARD_ASUS_M2V_MX_SE + default "asus_k8v-x.c" if BOARD_ASUS_K8V_X default "msi_ms6178.c" if BOARD_MSI_MS6178 default "rca_rm4100.c" if BOARD_RCA_RM4100 default "thomson_ip1000.c" if BOARD_THOMSON_IP1000 diff --git a/SerialICE/mainboard/asus_k8v-x.c b/SerialICE/mainboard/asus_k8v-x.c new file mode 100644 index 0000000..bc3dbe9 --- /dev/null +++ b/SerialICE/mainboard/asus_k8v-x.c @@ -0,0 +1,68 @@ +/* + * SerialICE + * + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2009 Rudolf Marek <r.marek(a)assembler.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="ASUS K8V-X "; + +#define SUPERIO_CONFIG_PORT 0x2e + +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + + /* Disable the watchdog. */ +// pnp_set_logical_device(SUPERIO_CONFIG_PORT, 7); +// pnp_write_register(SUPERIO_CONFIG_PORT, 0x72, 0x00); + + /* Enable the serial port. */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + superio_init(); + + __asm__ __volatile__("\ + jmp skip\n\ + .align 128\n\ + .global via_romstrap\n\ + via_romstrap:\n\ + .long 0x50220000, 0X619707C2\n\ + .long 0x50220000, 0X619707C2\n\ + .long 0x50220000, 0X619707C2\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + .long 0x0\n\ + skip:\n"); +}

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