January 2010 - SerialICE - mail.coreboot.org

r95 - trunk/SerialICE/mainboard
by svn＠coresystems.de Jan. 26, 2010

Jan. 26, 2010

Author: uwe Date: 2010-01-26 02:49:02 +0100 (Tue, 26 Jan 2010) New Revision: 95 Modified: trunk/SerialICE/mainboard/roda_rk886ex.c Log: Add missing "boardname" value for the Roda RK886EX to make it build (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/SerialICE/mainboard/roda_rk886ex.c =================================================================== --- trunk/SerialICE/mainboard/roda_rk886ex.c 2010-01-26 01:38:26 UTC (rev 94) +++ trunk/SerialICE/mainboard/roda_rk886ex.c 2010-01-26 01:49:02 UTC (rev 95) @@ -20,6 +20,7 @@ /* * This is an example chipset init file for the Roda RK886EX (Rocky 3+) */ +const char boardname[33]="Roda RK886EX (Rocky III+) "; /* Hardware specific functions */

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SerialICE dumping coreboot images
by Joseph Smith Jan. 25, 2010

Jan. 25, 2010

Hello, I am trying to dump some coreboot image with serialice. It seems to be looping (restarting) right after the serial port is initialized in coreboot. I have to admit these are older coreboot images. I think the serialice and coreboot serial ports are conflicting. Do I need to build a coreboot image without serial console output to get it to work? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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Re: [SerialICE] SerialICE Segmentation fault (core dumped)
by Joseph Smith Jan. 21, 2010

Jan. 21, 2010

On Tue, 19 Jan 2010 23:50:05 +0100, Stefan Reinauer <stepan(a)coresystems.de> wrote: > On 1/19/10 11:17 PM, Alexander Graf wrote: >> On 19.01.2010, at 23:12, Stefan Reinauer wrote >>> On 1/19/10 10:17 PM, Joseph Smith wrote: >>> >>>> (gdb) bt >>>> #0 cpu_register_physical_memory_offset (start_addr=4292345856, >>>> size=524288, >>>> phys_offset=0, region_offset=0) at /home/joe/qemu-0.11.0/exec.c:2327 >>>> #1 0x080715b8 in cpu_register_physical_memory ( >>>> phys_offset=<value optimized out>, size=<value optimized out>, >>>> start_addr=<value optimized out>) at ../cpu-common.h:33 >>>> #2 serialice_register_physical (phys_offset=<value optimized out>, >>>> size=<value optimized out>, start_addr=<value optimized out>) >>>> at /home/joe/qemu-0.11.0/serialice.c:93 >>>> >>>> >>> This is almost there... >>> >>> Can you recompile Qemu and add "-g" to CFLAGS and try again? It does >>> look suspicious that phys_offset and size are optimized out, though.. >>> >>> BTW, I just tried SerialICE on an x86-64 OpenSUSE 11.2 system and it >>> works nicely without a segfault. Maybe Fedora is using a buggy compiler >>> or a specific compiler option that breaks things? >>> >> The trace says you're using env before it's initialized. >> > Thanks for spotting this, you're of course right. > > It's caused by some oddness in how KQEMU is initialized. > > Joseph: > Please add --disable-kqemu to your Qemu configure options and the > problem will go away. > Ok that seems to be a little better, but if I use the command in the "SerialICE Qemu README" I just get this: [root@smitty2 qemu-0.11.0]# ./i386-softmmu/qemu -M -serialice /dev/ttyS0 -hda /dev/zero -L ./bios Supported machines are: pc Standard PC (alias of pc-0.11) pc-0.11 Standard PC (default) pc-0.10 Standard PC, qemu 0.10 isapc ISA-only PC If I use the older command listed on the website it seems to get a little further: [root@smitty2 qemu-0.11.0]# ./i386-softmmu/qemu -serialice /dev/ttyS0 -hda /dev/zero -L ./bios SerialICE: Open connection to target hardware... SerialICE: Waiting for handshake with target... target alife! SerialICE: LUA init... SerialICE: Starting LUA script SerialICE: Registering physical memory areas for Cache-As-Ram: Registering physical memory at 0xffd80000 (0x00080000 bytes) Registering physical memory at 0xffbc0000 (0x00040000 bytes) SerialICE: LUA script initialized. VNC server running on `127.0.0.1:5900' IO: outb 0080 <= 00 IO: outb 002e <= 55 IO: outb 002e <= 07 IO: outb 002f <= 07 IO: outb 002e <= 30 IO: outb 002f <= 01 IO: outb 002e <= aa IO: inb 0064 => 00 IO: outb 0064 <= 60 IO: outb 0060 <= 45 IO: outb 0080 <= 08 CPU: CPUID eax: 00000000; ecx: 00000000 => 00000002.756e6547.6c65746e.49656e69 CPU: CPUID eax: 00000000; ecx: 6c65746e => 00000002.756e6547.6c65746e.49656e69 Failed to run function SerialICE_msr_read_filter: serialice.lua:474: bad argument #2 to 'band' (number expected, got nil) [root@smitty2 qemu-0.11.0]# Help? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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SerialICE Segmentation fault (core dumped)
by Joseph Smith Jan. 19, 2010

Jan. 19, 2010

Well, I thought the issue was with x86_64 but the same thing is happening on my 32 bit machine too. [root@smitty2 qemu-0.11.0]# ./i386-softmmu/qemu -serialice /dev/ttyS0 -hda /dev/zero -L ../bios > /home/joe/serialice_dumps/ipmsnorg.txt Segmentation fault (core dumped) And the log just stops after: SerialICE: Open connection to target hardware... SerialICE: Waiting for handshake with target... target alife! SerialICE: LUA init... SerialICE: Starting LUA script SerialICE: Registering physical memory areas for Cache-As-Ram: Registering physical memory at 0xffd80000 (0x00080000 bytes) Any ideas??? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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Distro Notes on serialice.com
by Joseph Smith Jan. 17, 2010

Jan. 17, 2010

Hello, I was wondering if we could add some distro notes to the website for reference. Installation on Fedora Core 11 x86_64 ------------------------------------- 1. SerialICE builds fine. 2. For Lua you need to: in lua-5.1.4/src/Makefile change this line CFLAGS= -O2 -Wall $(MYCFLAGS) to CFLAGS= -O2 -Wall -fPIC $(MYCFLAGS) 3. bitlib builds fine with change to Lua. 4. For qemu you need to: in qemu-0.11.0/build.sh change this line ./configure --disable-kvm --disable-sdl --enable-serialice \ to ./configure --disable-kvm --disable-sdl --enable-serialice --extra-ldflags=-lm \ Hopefully this will help others. -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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qemu can not find lua pkg
by Joseph Smith Jan. 17, 2010

Jan. 17, 2010

Ok next promlem when building qemu: ---------------------------------- [joe@smitty2m qemu-0.11.0]$ sh build.sh Package lua was not found in the pkg-config search path. Perhaps you should add the directory containing `lua.pc' to the PKG_CONFIG_PATH environment variable No package 'lua' found Package lua was not found in the pkg-config search path. Perhaps you should add the directory containing `lua.pc' to the PKG_CONFIG_PATH environment variable No package 'lua' found Error LUA not found, can't build with SerialICE support. Please call configure before running make! make: *** [config-host.mak] Error 1 ---------------------------------- Any ideas? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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r93 - in trunk/SerialICE: . mainboard
by svn＠coresystems.de Jan. 16, 2010

Jan. 16, 2010

Author: stepan Date: 2010-01-17 00:47:13 +0100 (Sun, 17 Jan 2010) New Revision: 93 Added: trunk/SerialICE/mainboard/roda_rk886ex.c Modified: trunk/SerialICE/Kconfig Log: Add Roda RK886EX support Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/SerialICE/Kconfig =================================================================== --- trunk/SerialICE/Kconfig 2010-01-02 23:35:27 UTC (rev 92) +++ trunk/SerialICE/Kconfig 2010-01-16 23:47:13 UTC (rev 93) @@ -30,6 +30,9 @@ config BOARD_KONTRON_986LCD_M bool "Kontron 986LCD-M/mITX" +config BOARD_RODA_RK886EX + bool "Roda RK886EX" + config BOARD_INTEL_D945GCLF bool "Intel D945GCLF" @@ -62,6 +65,7 @@ config BOARD_INIT string default "kontron_986lcd-m.c" if BOARD_KONTRON_986LCD_M + default "roda_rk886ex.c" if BOARD_RODA_RK886EX default "intel_d945gclf.c" if BOARD_INTEL_D945GCLF default "dell_s1850.c" if BOARD_DELL_S1850 default "asus_m2v-mx_se.c" if BOARD_ASUS_M2V_MX_SE Added: trunk/SerialICE/mainboard/roda_rk886ex.c =================================================================== --- trunk/SerialICE/mainboard/roda_rk886ex.c (rev 0) +++ trunk/SerialICE/mainboard/roda_rk886ex.c 2010-01-16 23:47:13 UTC (rev 93) @@ -0,0 +1,105 @@ +/* + * SerialICE + * + * Copyright (C) 2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * This is an example chipset init file for the Roda RK886EX (Rocky 3+) + */ + +/* Hardware specific functions */ + +#define RCBA 0xfed1c000 +#define GCS 0x3410 +#define RCBA32(x) *((volatile u32 *)(RCBA + x)) + +static void southbridge_init(void) +{ + u16 reg16; + u32 reg32; + + // Set up RCBA + pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0xf0), RCBA | 1); + +#if 0 + // port80 writes go to LPC: + reg32 = RCBA32(GCS); + reg32 = reg32 & ~0x04; + RCBA32(GCS) = reg32; + outb(0x23, 0x80); +#endif + + // Set up SuperIO LPC forwards + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x64), 0xd0); + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0x80), 0x0007); + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0x82), 0x3f0f); + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0x84), 0x02e1); + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0x86), 0x001c); + pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0x88), 0x00fc0601); + pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0x8c), 0x00040069); + + // Disable watchdog +#define PMBASE 0x500 +#define TCOBASE (PMBASE + 0x60) + pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0x40), PMBASE | 1); + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x44), 0x80); + reg16 = inw(TCOBASE + 0x08); + reg16 |= (1 << 11); + outw(reg16, TCOBASE + 0x08); + outw(0x0008, TCOBASE + 0x04); + outw(0x0002, TCOBASE + 0x06); +} + +static void superio_init(void) +{ + pnp_enter_ext_func_mode_alt(0x2e); + + pnp_write_register(0x2e, 0x01, 0x94); // Extended Parport modes + pnp_write_register(0x2e, 0x02, 0x88); // UART power on + pnp_write_register(0x2e, 0x03, 0x72); // Floppy + pnp_write_register(0x2e, 0x04, 0x01); // EPP + SPP + pnp_write_register(0x2e, 0x14, 0x03); // Floppy + pnp_write_register(0x2e, 0x20, (0x3f0 >> 2)); // Floppy + pnp_write_register(0x2e, 0x23, (0x378 >> 2)); // PP base + pnp_write_register(0x2e, 0x24, (0x3f8 >> 2)); // UART1 base + pnp_write_register(0x2e, 0x25, (0x2f8 >> 2)); // UART2 base + pnp_write_register(0x2e, 0x26, (2 << 4) | 0); // FDC + PP DMA + pnp_write_register(0x2e, 0x27, (6 << 4) | 7); // FDC + PP DMA + pnp_write_register(0x2e, 0x28, (4 << 4) | 3); // UART1,2 IRQ + + /* These are the SMI status registers in the SIO: */ + pnp_write_register(0x2e, 0x30, (0x600 >> 4)); // Runtime Register Block Base + + pnp_write_register(0x2e, 0x31, 0x00); // GPIO1 DIR + pnp_write_register(0x2e, 0x32, 0x00); // GPIO1 POL + pnp_write_register(0x2e, 0x33, 0x40); // GPIO2 DIR + pnp_write_register(0x2e, 0x34, 0x00); // GPIO2 POL + pnp_write_register(0x2e, 0x35, 0xff); // GPIO3 DIR + pnp_write_register(0x2e, 0x36, 0x00); // GPIO3 POL + pnp_write_register(0x2e, 0x37, 0xe0); // GPIO4 DIR + pnp_write_register(0x2e, 0x38, 0x00); // GPIO4 POL + pnp_write_register(0x2e, 0x39, 0x80); // GPIO4 POL + + pnp_exit_ext_func_mode(0x2e); +} + +static void chipset_init(void) +{ + southbridge_init(); + superio_init(); +} +

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bitlib build error
by Joseph Smith Jan. 15, 2010

Jan. 15, 2010

Keep getting this error when trying to build bitlib on my x86_64 laptop, any ideas? ----------------------- /usr/bin/ld: /usr/local/lib/liblua.a(lapi.o): relocation R_X86_64_32 against `luaO_nilobject_' can not be used when making a shared object; recompile with -fPIC /usr/local/lib/liblua.a: could not read symbols: Bad value collect2: ld returned 1 exit status make[1]: *** [bit.la] Error 1 make[1]: Leaving directory `/home/joe/lua-5.1.4/bitlib-25' make: *** [all] Error 2 ----------------------- I even tried configuring it with: ./configure --with-lua=/usr/local CXXFLAGS=-fPIC CFLAGS=-fPIC CPPFLAGS=-fPIC But still same error.... -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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[PATCH] Add Asrock 939A785GMH
by Rudolf Marek Jan. 2, 2010

Jan. 2, 2010

Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Thanks, Rudolf

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r92 - in trunk/SerialICE: . mainboard
by svn＠coresystems.de Jan. 2, 2010

Jan. 2, 2010

Author: stepan Date: 2010-01-03 00:35:27 +0100 (Sun, 03 Jan 2010) New Revision: 92 Added: trunk/SerialICE/mainboard/asrock_939a785gmh.c Modified: trunk/SerialICE/Kconfig Log: Add support for Asrock 939A785GMH Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Modified: trunk/SerialICE/Kconfig =================================================================== --- trunk/SerialICE/Kconfig 2009-12-12 23:43:38 UTC (rev 91) +++ trunk/SerialICE/Kconfig 2010-01-02 23:35:27 UTC (rev 92) @@ -41,6 +41,10 @@ select VIA_ROMSTRAP select BUILD_XMMSTACK +config BOARD_ASROCK_939A785GMH + bool "Asrock 939A785GMH" + select BUILD_XMMSTACK + config BOARD_MSI_MS6178 bool "MSI MS6178" @@ -65,7 +69,7 @@ default "rca_rm4100.c" if BOARD_RCA_RM4100 default "thomson_ip1000.c" if BOARD_THOMSON_IP1000 default "asus_p2b.c" if BOARD_ASUS_P2B - + default "asrock_939a785gmh.c" if BOARD_ASROCK_939A785GMH choice prompt "Target communication" Added: trunk/SerialICE/mainboard/asrock_939a785gmh.c =================================================================== --- trunk/SerialICE/mainboard/asrock_939a785gmh.c (rev 0) +++ trunk/SerialICE/mainboard/asrock_939a785gmh.c 2010-01-02 23:35:27 UTC (rev 92) @@ -0,0 +1,47 @@ +/* + * SerialICE + * + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2009 Rudolf Marek <r.marek(a)assembler.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="Asrock 939a785gmh "; + +#define SUPERIO_CONFIG_PORT 0x2e + +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + + /* Enable the serial port. */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + + /* Enable LPC decoding */ + pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x44), (1<<6)); + pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x48), (1 << 1) | (1 << 0)); + + superio_init(); +}

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