[PATCH v15 2/2] patch dsdt to use passed-in pvpanic ioport

Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- src/acpi-dsdt-isa.dsl | 14 ++++++++++++-- src/acpi.c | 9 +++++++++ 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 87a31b9..43fe719 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -102,7 +102,9 @@ Scope(\_SB.PCI0.ISA) { Device(PEVT) { Name(_HID, "QEMU0001") - OperationRegion(PEOR, SystemIO, 0x0505, 0x01) + ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest + Name(PEST, 0x505) + OperationRegion(PEOR, SystemIO, PEST, 0x01) Field(PEOR, ByteAcc, NoLock, Preserve) { PEPT, 8, } @@ -126,7 +128,15 @@ Scope(\_SB.PCI0.ISA) { } Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0505, 0x0505, 0x01, 0x01) + IO(Decode16, 0x0505, 0x0505, 0x01, 0x01, IO) }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } } } diff --git a/src/acpi.c b/src/acpi.c index 119d1c1..42fa06e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -286,11 +286,20 @@ static const struct pci_device_id fadt_init_tbl[] = { PCI_DEVICE_END }; +static void patch_dsdt(void *dsdt) +{ + u8 *dsdt_ptr = dsdt; + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x505); + + *(u16 *)(dsdt_ptr + *dsdt_isa_pest) = pvpanic_port; +} + static void fill_dsdt(struct fadt_descriptor_rev1 *fadt, void *dsdt) { if (fadt->dsdt) { free((void *)le32_to_cpu(fadt->dsdt)); } + patch_dsdt(dsdt); fadt->dsdt = cpu_to_le32((u32)dsdt); fadt->checksum -= checksum(fadt, sizeof(*fadt)); dprintf(1, "ACPI DSDT=%p\n", dsdt); -- 1.8.1.4

Il 21/03/2013 10:08, Hu Tao ha scritto:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- src/acpi-dsdt-isa.dsl | 14 ++++++++++++-- src/acpi.c | 9 +++++++++ 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 87a31b9..43fe719 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -102,7 +102,9 @@ Scope(\_SB.PCI0.ISA) {
Device(PEVT) { Name(_HID, "QEMU0001") - OperationRegion(PEOR, SystemIO, 0x0505, 0x01) + ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest + Name(PEST, 0x505) + OperationRegion(PEOR, SystemIO, PEST, 0x01) Field(PEOR, ByteAcc, NoLock, Preserve) { PEPT, 8, } @@ -126,7 +128,15 @@ Scope(\_SB.PCI0.ISA) { }
Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0505, 0x0505, 0x01, 0x01) + IO(Decode16, 0x0505, 0x0505, 0x01, 0x01, IO) }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } } } diff --git a/src/acpi.c b/src/acpi.c index 119d1c1..42fa06e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -286,11 +286,20 @@ static const struct pci_device_id fadt_init_tbl[] = { PCI_DEVICE_END };
+static void patch_dsdt(void *dsdt) +{ + u8 *dsdt_ptr = dsdt; + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x505);
The default must be 0. Also, here: + + Method(_STA, 0, NotSerialized) { + Store(PEPT, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } + You must change it to look at PEST instead of PEPT (i.e. do not probe, just see if you have a meaningful address). Just squash the patches, it's simpler that way probably. Paolo
+ *(u16 *)(dsdt_ptr + *dsdt_isa_pest) = pvpanic_port; +} + static void fill_dsdt(struct fadt_descriptor_rev1 *fadt, void *dsdt) { if (fadt->dsdt) { free((void *)le32_to_cpu(fadt->dsdt)); } + patch_dsdt(dsdt); fadt->dsdt = cpu_to_le32((u32)dsdt); fadt->checksum -= checksum(fadt, sizeof(*fadt)); dprintf(1, "ACPI DSDT=%p\n", dsdt);

On Thu, Mar 21, 2013 at 10:11:54AM +0100, Paolo Bonzini wrote:
Il 21/03/2013 10:08, Hu Tao ha scritto:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- src/acpi-dsdt-isa.dsl | 14 ++++++++++++-- src/acpi.c | 9 +++++++++ 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 87a31b9..43fe719 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -102,7 +102,9 @@ Scope(\_SB.PCI0.ISA) {
Device(PEVT) { Name(_HID, "QEMU0001") - OperationRegion(PEOR, SystemIO, 0x0505, 0x01) + ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest + Name(PEST, 0x505) + OperationRegion(PEOR, SystemIO, PEST, 0x01) Field(PEOR, ByteAcc, NoLock, Preserve) { PEPT, 8, } @@ -126,7 +128,15 @@ Scope(\_SB.PCI0.ISA) { }
Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0505, 0x0505, 0x01, 0x01) + IO(Decode16, 0x0505, 0x0505, 0x01, 0x01, IO) }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } } } diff --git a/src/acpi.c b/src/acpi.c index 119d1c1..42fa06e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -286,11 +286,20 @@ static const struct pci_device_id fadt_init_tbl[] = { PCI_DEVICE_END };
+static void patch_dsdt(void *dsdt) +{ + u8 *dsdt_ptr = dsdt; + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x505);
The default must be 0.
Also, here:
+ + Method(_STA, 0, NotSerialized) { + Store(PEPT, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } +
You must change it to look at PEST instead of PEPT (i.e. do not probe, just see if you have a meaningful address).
Just squash the patches, it's simpler that way probably.
I forgot to add RFC to the title. This patch doesn't work for q35 with custom ioport.
Paolo
+ *(u16 *)(dsdt_ptr + *dsdt_isa_pest) = pvpanic_port; +} + static void fill_dsdt(struct fadt_descriptor_rev1 *fadt, void *dsdt) { if (fadt->dsdt) { free((void *)le32_to_cpu(fadt->dsdt)); } + patch_dsdt(dsdt); fadt->dsdt = cpu_to_le32((u32)dsdt); fadt->checksum -= checksum(fadt, sizeof(*fadt)); dprintf(1, "ACPI DSDT=%p\n", dsdt);

On Thu, Mar 21, 2013 at 05:17:11PM +0800, Hu Tao wrote:
On Thu, Mar 21, 2013 at 10:11:54AM +0100, Paolo Bonzini wrote:
Il 21/03/2013 10:08, Hu Tao ha scritto:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- src/acpi-dsdt-isa.dsl | 14 ++++++++++++-- src/acpi.c | 9 +++++++++ 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 87a31b9..43fe719 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -102,7 +102,9 @@ Scope(\_SB.PCI0.ISA) {
Device(PEVT) { Name(_HID, "QEMU0001") - OperationRegion(PEOR, SystemIO, 0x0505, 0x01) + ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest + Name(PEST, 0x505) + OperationRegion(PEOR, SystemIO, PEST, 0x01) Field(PEOR, ByteAcc, NoLock, Preserve) { PEPT, 8, } @@ -126,7 +128,15 @@ Scope(\_SB.PCI0.ISA) { }
Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0505, 0x0505, 0x01, 0x01) + IO(Decode16, 0x0505, 0x0505, 0x01, 0x01, IO) }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } } } diff --git a/src/acpi.c b/src/acpi.c index 119d1c1..42fa06e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -286,11 +286,20 @@ static const struct pci_device_id fadt_init_tbl[] = { PCI_DEVICE_END };
+static void patch_dsdt(void *dsdt) +{ + u8 *dsdt_ptr = dsdt; + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x505);
The default must be 0.
Also, here:
+ + Method(_STA, 0, NotSerialized) { + Store(PEPT, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } +
You must change it to look at PEST instead of PEPT (i.e. do not probe, just see if you have a meaningful address).
Just squash the patches, it's simpler that way probably.
I forgot to add RFC to the title. This patch doesn't work for q35 with custom ioport.
Why doesn't it work with q35? -- Gleb.

On Fri, Mar 22, 2013 at 09:48:18AM +0200, Gleb Natapov wrote:
On Thu, Mar 21, 2013 at 05:17:11PM +0800, Hu Tao wrote:
On Thu, Mar 21, 2013 at 10:11:54AM +0100, Paolo Bonzini wrote:
Il 21/03/2013 10:08, Hu Tao ha scritto:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- src/acpi-dsdt-isa.dsl | 14 ++++++++++++-- src/acpi.c | 9 +++++++++ 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 87a31b9..43fe719 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -102,7 +102,9 @@ Scope(\_SB.PCI0.ISA) {
Device(PEVT) { Name(_HID, "QEMU0001") - OperationRegion(PEOR, SystemIO, 0x0505, 0x01) + ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest + Name(PEST, 0x505) + OperationRegion(PEOR, SystemIO, PEST, 0x01) Field(PEOR, ByteAcc, NoLock, Preserve) { PEPT, 8, } @@ -126,7 +128,15 @@ Scope(\_SB.PCI0.ISA) { }
Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0505, 0x0505, 0x01, 0x01) + IO(Decode16, 0x0505, 0x0505, 0x01, 0x01, IO) }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } } } diff --git a/src/acpi.c b/src/acpi.c index 119d1c1..42fa06e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -286,11 +286,20 @@ static const struct pci_device_id fadt_init_tbl[] = { PCI_DEVICE_END };
+static void patch_dsdt(void *dsdt) +{ + u8 *dsdt_ptr = dsdt; + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x505);
The default must be 0.
Also, here:
+ + Method(_STA, 0, NotSerialized) { + Store(PEPT, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } +
You must change it to look at PEST instead of PEPT (i.e. do not probe, just see if you have a meaningful address).
Just squash the patches, it's simpler that way probably.
I forgot to add RFC to the title. This patch doesn't work for q35 with custom ioport.
Why doesn't it work with q35?
ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest generates two dsdt_isa_pest, one in out/acpi-dsdt.hex the other in out/q35-acpi-dsdt.hex. We should use the one in q35-acpi-dsdt.hex to patch DSDT for q35. But including q35-acpi-dsdt.hex, along with acpi-dsdt.hex, will result in redefinition of dsdt_isa_pest. I didn't see a simple way to solve this. -- Regards, Hu Tao

Il 26/03/2013 02:59, Hu Tao ha scritto:
Why doesn't it work with q35? ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest generates two dsdt_isa_pest, one in out/acpi-dsdt.hex the other in out/q35-acpi-dsdt.hex. We should use the one in q35-acpi-dsdt.hex to patch DSDT for q35. But including q35-acpi-dsdt.hex, along with acpi-dsdt.hex, will result in redefinition of dsdt_isa_pest. I didn't see a simple way to solve this.
Compile it in a separate file and include it in the SSDT (build_ssdt in src/acpi.c). Paolo

On Tue, Mar 26, 2013 at 08:03:09AM +0100, Paolo Bonzini wrote:
Il 26/03/2013 02:59, Hu Tao ha scritto:
Why doesn't it work with q35? ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest generates two dsdt_isa_pest, one in out/acpi-dsdt.hex the other in out/q35-acpi-dsdt.hex. We should use the one in q35-acpi-dsdt.hex to patch DSDT for q35. But including q35-acpi-dsdt.hex, along with acpi-dsdt.hex, will result in redefinition of dsdt_isa_pest. I didn't see a simple way to solve this.
Compile it in a separate file and include it in the SSDT (build_ssdt in src/acpi.c).
Doesn't work. iasl gives an error: Data Table Compiler is not available yet Even though it compiles, I think the generated offset (*dsdt_isa_pest) won't be correct because it depends on acpi-dsdt.dsl/q35-acpi-dsdt.dsl. -- Regards, Hu Tao

Il 26/03/2013 08:24, Hu Tao ha scritto:
ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest generates two dsdt_isa_pest, one in out/acpi-dsdt.hex the other in out/q35-acpi-dsdt.hex. We should use the one in q35-acpi-dsdt.hex to patch DSDT for q35. But including q35-acpi-dsdt.hex, along with acpi-dsdt.hex, will result in redefinition of dsdt_isa_pest. I didn't see a simple way to solve this.
Compile it in a separate file and include it in the SSDT (build_ssdt in src/acpi.c). Doesn't work. iasl gives an error:
Data Table Compiler is not available yet
Even though it compiles, I think the generated offset (*dsdt_isa_pest) won't be correct because it depends on acpi-dsdt.dsl/q35-acpi-dsdt.dsl.
See how it is done for ssdt-misc.aml (in fact, you can simply extend ssdt-misc.aml). Paolo

pvpanic device is used to notify host(qemu) when guest panic happens. Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- Paolo, Can I add your Signed-off-by? Since the original code is given by you. Thank you, Paolo :) src/acpi.c | 3 +++ src/ssdt-misc.dsl | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/src/acpi.c b/src/acpi.c index bc4d8ea..fe504f0 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -534,6 +534,9 @@ build_ssdt(void) ssdt_ptr[acpi_pci64_valid[0]] = 0; } + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x0); + *(u16 *)(ssdt_ptr + *ssdt_isa_pest) = pvpanic_port; + ssdt_ptr += sizeof(ssdp_misc_aml); // build Scope(_SB_) header diff --git a/src/ssdt-misc.dsl b/src/ssdt-misc.dsl index 679422b..acc850e 100644 --- a/src/ssdt-misc.dsl +++ b/src/ssdt-misc.dsl @@ -55,4 +55,50 @@ DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1) Zero /* reserved */ }) } + + External(\_SB.PCI0, DeviceObj) + External(\_SB.PCI0.ISA, DeviceObj) + + Scope(\_SB.PCI0.ISA) { + Device(PEVT) { + Name(_HID, "QEMU0001") + /* PEST will be patched to be Zero if no such device */ + ACPI_EXTRACT_NAME_WORD_CONST ssdt_isa_pest + Name(PEST, 0xFFFF) + OperationRegion(PEOR, SystemIO, PEST, 0x01) + Field(PEOR, ByteAcc, NoLock, Preserve) { + PEPT, 8, + } + + Method(_STA, 0, NotSerialized) { + Store(PEST, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } + + Method(RDPT, 0, NotSerialized) { + Store(PEPT, Local0) + Return (Local0) + } + + Method(WRPT, 1, NotSerialized) { + Store(Arg0, PEPT) + } + + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x00, 0x00, 0x01, 0x01, IO) + }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } + } + } } -- 1.8.1.4

Il 26/03/2013 09:52, Hu Tao ha scritto:
pvpanic device is used to notify host(qemu) when guest panic happens.
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> ---
Paolo,
Can I add your Signed-off-by? Since the original code is given by you.
Sure, as you prefer. Paolo
src/acpi.c | 3 +++ src/ssdt-misc.dsl | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+)
diff --git a/src/acpi.c b/src/acpi.c index bc4d8ea..fe504f0 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -534,6 +534,9 @@ build_ssdt(void) ssdt_ptr[acpi_pci64_valid[0]] = 0; }
+ int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x0); + *(u16 *)(ssdt_ptr + *ssdt_isa_pest) = pvpanic_port; + ssdt_ptr += sizeof(ssdp_misc_aml);
// build Scope(_SB_) header diff --git a/src/ssdt-misc.dsl b/src/ssdt-misc.dsl index 679422b..acc850e 100644 --- a/src/ssdt-misc.dsl +++ b/src/ssdt-misc.dsl @@ -55,4 +55,50 @@ DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1) Zero /* reserved */ }) } + + External(\_SB.PCI0, DeviceObj) + External(\_SB.PCI0.ISA, DeviceObj) + + Scope(\_SB.PCI0.ISA) { + Device(PEVT) { + Name(_HID, "QEMU0001") + /* PEST will be patched to be Zero if no such device */ + ACPI_EXTRACT_NAME_WORD_CONST ssdt_isa_pest + Name(PEST, 0xFFFF) + OperationRegion(PEOR, SystemIO, PEST, 0x01) + Field(PEOR, ByteAcc, NoLock, Preserve) { + PEPT, 8, + } + + Method(_STA, 0, NotSerialized) { + Store(PEST, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } + + Method(RDPT, 0, NotSerialized) { + Store(PEPT, Local0) + Return (Local0) + } + + Method(WRPT, 1, NotSerialized) { + Store(Arg0, PEPT) + } + + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x00, 0x00, 0x01, 0x01, IO) + }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } + } + } }

pvpanic device is used to notify host(qemu) when guest panic happens. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> --- src/acpi.c | 3 +++ src/ssdt-misc.dsl | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/src/acpi.c b/src/acpi.c index bc4d8ea..fe504f0 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -534,6 +534,9 @@ build_ssdt(void) ssdt_ptr[acpi_pci64_valid[0]] = 0; } + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x0); + *(u16 *)(ssdt_ptr + *ssdt_isa_pest) = pvpanic_port; + ssdt_ptr += sizeof(ssdp_misc_aml); // build Scope(_SB_) header diff --git a/src/ssdt-misc.dsl b/src/ssdt-misc.dsl index 679422b..acc850e 100644 --- a/src/ssdt-misc.dsl +++ b/src/ssdt-misc.dsl @@ -55,4 +55,50 @@ DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1) Zero /* reserved */ }) } + + External(\_SB.PCI0, DeviceObj) + External(\_SB.PCI0.ISA, DeviceObj) + + Scope(\_SB.PCI0.ISA) { + Device(PEVT) { + Name(_HID, "QEMU0001") + /* PEST will be patched to be Zero if no such device */ + ACPI_EXTRACT_NAME_WORD_CONST ssdt_isa_pest + Name(PEST, 0xFFFF) + OperationRegion(PEOR, SystemIO, PEST, 0x01) + Field(PEOR, ByteAcc, NoLock, Preserve) { + PEPT, 8, + } + + Method(_STA, 0, NotSerialized) { + Store(PEST, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } + + Method(RDPT, 0, NotSerialized) { + Store(PEPT, Local0) + Return (Local0) + } + + Method(WRPT, 1, NotSerialized) { + Store(Arg0, PEPT) + } + + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x00, 0x00, 0x01, 0x01, IO) + }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } + } + } } -- 1.8.1.4

On Thu, Mar 21, 2013 at 05:08:34PM +0800, Hu Tao wrote:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
OK now you need to ACK GPLv2+ relicensing too :) Could you please review that message "make acpi bits GPLv2 compatible" and respond?
--- src/acpi-dsdt-isa.dsl | 14 ++++++++++++-- src/acpi.c | 9 +++++++++ 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 87a31b9..43fe719 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -102,7 +102,9 @@ Scope(\_SB.PCI0.ISA) {
Device(PEVT) { Name(_HID, "QEMU0001") - OperationRegion(PEOR, SystemIO, 0x0505, 0x01) + ACPI_EXTRACT_NAME_WORD_CONST dsdt_isa_pest + Name(PEST, 0x505) + OperationRegion(PEOR, SystemIO, PEST, 0x01) Field(PEOR, ByteAcc, NoLock, Preserve) { PEPT, 8, } @@ -126,7 +128,15 @@ Scope(\_SB.PCI0.ISA) { }
Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0505, 0x0505, 0x01, 0x01) + IO(Decode16, 0x0505, 0x0505, 0x01, 0x01, IO) }) + + CreateWordField(_CRS, IO._MIN, IOMN) + CreateWordField(_CRS, IO._MAX, IOMX) + + Method(_INI, 0, NotSerialized) { + Store(PEST, IOMN) + Store(PEST, IOMX) + } } } diff --git a/src/acpi.c b/src/acpi.c index 119d1c1..42fa06e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -286,11 +286,20 @@ static const struct pci_device_id fadt_init_tbl[] = { PCI_DEVICE_END };
+static void patch_dsdt(void *dsdt) +{ + u8 *dsdt_ptr = dsdt; + int pvpanic_port = romfile_loadint("etc/pvpanic-port", 0x505); + + *(u16 *)(dsdt_ptr + *dsdt_isa_pest) = pvpanic_port; +} + static void fill_dsdt(struct fadt_descriptor_rev1 *fadt, void *dsdt) { if (fadt->dsdt) { free((void *)le32_to_cpu(fadt->dsdt)); } + patch_dsdt(dsdt); fadt->dsdt = cpu_to_le32((u32)dsdt); fadt->checksum -= checksum(fadt, sizeof(*fadt)); dprintf(1, "ACPI DSDT=%p\n", dsdt); -- 1.8.1.4

On Thu, Mar 21, 2013 at 11:54:25AM +0200, Michael S. Tsirkin wrote:
On Thu, Mar 21, 2013 at 05:08:34PM +0800, Hu Tao wrote:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
OK now you need to ACK GPLv2+ relicensing too :)
Could you please review that message "make acpi bits GPLv2 compatible" and respond?
Done. Thanks for reminding!

On Thu, Mar 21, 2013 at 05:08:34PM +0800, Hu Tao wrote:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
I don't think it is a good idea to dynamically modify the DSDT. We've been using the SSDT for that. In any case, I think this would be a good candidate for merging after the ACPI stuff is moved into QEMU. -Kevin

On Thu, Mar 21, 2013 at 06:54:59PM -0400, Kevin O'Connor wrote:
On Thu, Mar 21, 2013 at 05:08:34PM +0800, Hu Tao wrote:
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
I don't think it is a good idea to dynamically modify the DSDT. We've been using the SSDT for that.
In any case, I think this would be a good candidate for merging after the ACPI stuff is moved into QEMU.
Agreed. What do you think about patch 1? (of course with Paolo's suggestion applied)
-Kevin
participants (5)
-
Gleb Natapov
-
Hu Tao
-
Kevin O'Connor
-
Michael S. Tsirkin
-
Paolo Bonzini