June 2021 - SeaBIOS - mail.coreboot.org

[PATCH] fw/coreboot.c: Use coreboot table to find cbfs
by Arthur Heymans April 21, 2022

April 21, 2022

The "cbfs master header" cbfs file is considered a legacy feature in coreboot and is planned for removal in the master branch. Since 2015 the coreboot tables have exported info about the active cbfs. This change uses the cbfs information in the coreboot tables instead of following the cbfs master header pointer in the bootblock to find cbfs. This change makes it possible to access CBFS fmap regions that don't feature a "cbfs master header", which is the case with Googles VBOOT solution. This breaks compatibility with very old coreboot build (build before fb5d5b16 "2015-07-14, cbtable: describe boot media"). Keeping backward compatibility with the "cbfs master header" would complicate the code. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> diff --git a/src/Kconfig b/src/Kconfig index 3a8ffa1..51ba827 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -93,15 +93,6 @@ endchoice help Support CBFS files compressed using the lzma decompression algorithm. - config CBFS_LOCATION - depends on COREBOOT_FLASH - hex "CBFS memory end location" - default 0 - help - Memory address of where the CBFS data ends. This should - be zero for normal builds. It may be a non-zero value if - the CBFS filesystem is at a non-standard location (eg, - 0xffe00000 if CBFS ends 2Meg below the end of flash). config MULTIBOOT depends on COREBOOT diff --git a/src/fw/coreboot.c b/src/fw/coreboot.c index 7c0954b..8a35c1d 100644 --- a/src/fw/coreboot.c +++ b/src/fw/coreboot.c @@ -88,6 +88,18 @@ struct cbmem_console { #define CBMC_OVERFLOW (1 << 31) static struct cbmem_console *cbcon = NULL; +#define CB_TAG_BOOT_MEDIA_PARAMS 0x30 + +struct cb_boot_media_params { + u32 tag; + u32 size; + /* offsets are relative to start of boot media */ + u64 fmap_offset; + u64 cbfs_offset; + u64 cbfs_size; + u64 boot_media_size; +}; + static u16 ipchksum(char *buf, int count) { @@ -146,7 +158,12 @@ find_cb_subtable(struct cb_header *cbh, u32 tag) struct cb_header * find_cb_table(void) { - struct cb_header *cbh = find_cb_header(0, 0x1000); + static struct cb_header *cbh; + + if (cbh) + return cbh; + + cbh= find_cb_header(0, 0x1000); if (!cbh) return NULL; struct cb_forward *cbf = find_cb_subtable(cbh, CB_TAG_FORWARD); @@ -317,20 +334,8 @@ ulzma(u8 *dst, u32 maxlen, const u8 *src, u32 srclen) * Coreboot flash format ****************************************************************/ -#define CBFS_HEADER_MAGIC 0x4F524243 -#define CBFS_VERSION1 0x31313131 - -struct cbfs_header { - u32 magic; - u32 version; - u32 romsize; - u32 bootblocksize; - u32 align; - u32 offset; - u32 pad[2]; -} PACKED; - #define CBFS_FILE_MAGIC 0x455649484352414cLL // LARCHIVE +#define CBFS_ALIGNMENT 64 struct cbfs_file { u64 magic; @@ -429,30 +434,50 @@ coreboot_cbfs_init(void) if (!CONFIG_COREBOOT_FLASH) return; - struct cbfs_header *hdr = *(void **)(CONFIG_CBFS_LOCATION - 4); - if ((u32)hdr & 0x03) { - dprintf(1, "Invalid CBFS pointer %p\n", hdr); + dprintf(3, "Attempting to initialize coreboot cbfs\n"); + + struct cb_header *cbh = find_cb_table(); + if (!cbh) { + dprintf(1, "cbfs_init: unable to find cb table\n"); return; } - if (CONFIG_CBFS_LOCATION && (u32)hdr > CONFIG_CBFS_LOCATION) - // Looks like the pointer is relative to CONFIG_CBFS_LOCATION - hdr = (void*)hdr + CONFIG_CBFS_LOCATION; - if (hdr->magic != cpu_to_be32(CBFS_HEADER_MAGIC)) { - dprintf(1, "Unable to find CBFS (ptr=%p; got %x not %x)\n" - , hdr, hdr->magic, cpu_to_be32(CBFS_HEADER_MAGIC)); + + struct cb_boot_media_params *cbbmp = + find_cb_subtable(cbh, CB_TAG_BOOT_MEDIA_PARAMS); + + if (!cbbmp) { + dprintf(1, "cbfs_init: unable to find boot media params\n"); return; } - dprintf(1, "Found CBFS header at %p\n", hdr); - u32 romsize = be32_to_cpu(hdr->romsize); - u32 romstart = CONFIG_CBFS_LOCATION - romsize; - struct cbfs_file *fhdr = (void*)romstart + be32_to_cpu(hdr->offset); + const u32 romsize = cbbmp->boot_media_size; + const u32 cbfs_start = cbbmp->cbfs_offset - romsize; + const u32 cbfs_end = cbfs_start + cbbmp->cbfs_size - 1; + + dprintf(3, "cbfs_init: cbfs_start=0x%08x, cbfs_end=0x%08x\n", cbfs_start, + cbfs_end); + + u32 offset = cbfs_start; + for (;;) { - if ((u32)fhdr - romstart > romsize) - break; - u64 magic = fhdr->magic; - if (magic != CBFS_FILE_MAGIC) + if (offset > cbfs_end || offset < cbfs_start) break; + + struct cbfs_file *fhdr = (void*)offset; + + if (fhdr->magic != CBFS_FILE_MAGIC) { + offset++; + offset = ALIGN(offset, CBFS_ALIGNMENT); + continue; + } + + /* Skip empty space */ + if (strcmp(fhdr->filename, "") == 0) { + offset += ALIGN(be32_to_cpu(fhdr->offset) + be32_to_cpu(fhdr->len) + , CBFS_ALIGNMENT); + continue; + } + struct cbfs_romfile_s *cfile = malloc_tmp(sizeof(*cfile)); if (!cfile) { warn_noalloc(); @@ -473,8 +498,8 @@ coreboot_cbfs_init(void) } romfile_add(&cfile->file); - fhdr = (void*)ALIGN((u32)cfile->data + cfile->rawsize - , be32_to_cpu(hdr->align)); + offset = ALIGN((u32)cfile->data + cfile->rawsize + , CBFS_ALIGNMENT); } process_links_file(); -- 2.30.2

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[PATCH v3 0/4] nvme: Add PRP List support
by Alexander Graf Jan. 18, 2022

Jan. 18, 2022

While looking at VM bootup times, we stumbled over the fact that the NVMe code only does I/O operations of up to 4kb at a given point in time. This is usually ok, but if you have an OS that loads a lot of data on boot in combination to network backed storage, it shows in bootup times. There is no need to restrict ourselves to 4kb though. The INT13 call we receive gives us much larger chunks which we can just map into a native bigger NVMe I/O call if the request buffer is page aligned. This patch implements all logic required to do the above and gives a substantial performance boost on boot. v1 -> v2: - fix dprintf - Fix bounds check on PRP list add logic - Reduce PRP list to 15 entries embedded in the ns struct. This reduces BIOS reserved memory footprint by 4kb. v2 -> v3: - new patch: nvme: Split requests by maximum allowed size - Adjust the maximum request size to sector units. The hardware field describes it in pages. Alexander Graf (4): nvme: Record maximum allowed request size nvme: Allow to set PRP2 nvme: Pass large I/O requests as PRP lists nvme: Split requests by maximum allowed size src/hw/nvme-int.h | 16 ++++++- src/hw/nvme.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++------- 2 files changed, 121 insertions(+), 17 deletions(-) -- 2.16.4 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879

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[PATCH 00/19] Support SMBIOS 3.0 entry points
by Eduardo Habkost Dec. 18, 2021

Dec. 18, 2021

This series implements support for SMBIOS 3.0 entry points in SeaBIOS. The main advantage of SMBIOS 3.0 entry points is the higher limit for total table size. The SMBIOS 2.1 64435 bytes limit can be easily hit in QEMU if creating virtual machines with more than 720 VCPUs. Eduardo Habkost (19): biostables: copy_fseg_table() function util.h: Delete unused get_smbios_entry_point() prototype smbios: Rename code specific for SMBIOS 2.1 entry points smbios: Generic smbios_next() function smbios: smbios_get_tables() function smbios: Use smbios_get_tables()/smbios_next() at display_uuid() smbios: smbios_major_version()/smbios_minor_version() helpers tpm: Use smbios_get_tables() csm: Don't check SMBios21Addr before calling copy_smbios_21() smbios: Make SMBios21Addr variable static smbios: Use smbios_next() at smbios_romfile_setup() smbios: Extract SMBIOS table building code to separate function smbios: Make smbios_build_tables() more generic smbios: smbios_21_setup_entry_point() function smbios: Make some smbios_build_tables() arguments optional smbios: Make smbios_build_tables() ready for 64-bit tables smbios: copy_smbios_30() function smbios: Support SMBIOS 3.0 entry point at copy_table() smbios: Support SMBIOS 3.0 entry point at smbios_romfile_setup() src/std/smbios.h | 17 ++- src/util.h | 5 +- src/fw/biostables.c | 259 +++++++++++++++++++++++++++++++++----------- src/fw/csm.c | 6 +- src/fw/smbios.c | 12 +- src/tcgbios.c | 12 +- 6 files changed, 227 insertions(+), 84 deletions(-) -- 2.28.0

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[PATCH] vgasrc/svgamodes: added 4k resolution
by vitaly＠cyberhaven.com Dec. 13, 2021

Dec. 13, 2021

From: Vitaly Chipounov <vitaly(a)cyberhaven.com> This requires at least 32MB of video memory. Tested with Windows 10's default display driver and virtio-vga. Signed-off-by: Vitaly Chipounov <vitaly(a)cyberhaven.com> --- vgasrc/bochsvga.h | 4 ++-- vgasrc/svgamodes.c | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/vgasrc/bochsvga.h b/vgasrc/bochsvga.h index ae5f75d..f08219f 100644 --- a/vgasrc/bochsvga.h +++ b/vgasrc/bochsvga.h @@ -6,8 +6,8 @@ #define VBE_DISPI_BANK_ADDRESS 0xA0000 #define VBE_DISPI_BANK_SIZE_KB 64 -#define VBE_DISPI_MAX_XRES 2560 -#define VBE_DISPI_MAX_YRES 1600 +#define VBE_DISPI_MAX_XRES 3840 +#define VBE_DISPI_MAX_YRES 2160 #define VBE_DISPI_IOPORT_INDEX 0x01CE #define VBE_DISPI_IOPORT_DATA 0x01CF diff --git a/vgasrc/svgamodes.c b/vgasrc/svgamodes.c index 6e494c7..63ef040 100644 --- a/vgasrc/svgamodes.c +++ b/vgasrc/svgamodes.c @@ -92,5 +92,6 @@ struct generic_svga_mode svga_modes[] VAR16 = { { 0x196, { MM_DIRECT, 2560, 1440, 16, 8, 16, SEG_GRAPH } }, { 0x197, { MM_DIRECT, 2560, 1440, 24, 8, 16, SEG_GRAPH } }, { 0x198, { MM_DIRECT, 2560, 1440, 32, 8, 16, SEG_GRAPH } }, + { 0x199, { MM_DIRECT, 3840, 2160, 32, 8, 16, SEG_GRAPH } }, }; unsigned int svga_mcount VAR16 = ARRAY_SIZE(svga_modes); -- 2.25.1

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[PATCH v3 0/5] Make seabios linkable with lld
by Fangrui Song Aug. 11, 2021

Aug. 11, 2021

This patch series make seabios linkable with lld. This is beneficial for FreeBSD ports as well https://svnweb.freebsd.org/ports/head/misc/seabios/Makefile as they can drop an LLD_UNSAFE As a maintainer of lld ELF, I have triaged numerous pieces of software. seabios is the only one making use of This drops the only instance https://sourceware.org/bugzilla/show_bug.cgi?id=12726 1, 2, 3 and 4 are really independent and can be applied in arbitrary order. 5 depends on 4. I originally combined 4 and 5 and that was why I don't think a patch series made sense. Fangrui Song (5): romlayout.S: Add missing SHF_ALLOC flag to .fixedaddr.\addr Make rom16.o linkable with lld Makefile: Change ET_EXEC to ET_REL so that lld can link bios.bin.elf romlayout32flag.lds: Use `. +=` instead of `. =` test-build.sh: Delete unneeded LD capability test Makefile | 4 ++++ scripts/layoutrom.py | 13 ++++++++++--- scripts/test-build.sh | 42 +----------------------------------------- src/romlayout.S | 2 +- 4 files changed, 16 insertions(+), 45 deletions(-) -- 2.26.0.292.g33ef6b2f38-goog

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[PATCH] nvme: fix missing newline on sq full print
by Alex Martens June 30, 2021

June 30, 2021

Signed-off-by: Alex Martens <alexmgit(a)protonmail.com> --- src/hw/nvme.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/nvme.c b/src/hw/nvme.c index 746e468..f035fa2 100644 --- a/src/hw/nvme.c +++ b/src/hw/nvme.c @@ -155,7 +155,7 @@ static struct nvme_sqe * nvme_get_next_sqe(struct nvme_sq *sq, u8 opc, void *metadata, void *data, void *data2) { if (((sq->head + 1) & sq->common.mask) == sq->tail) { - dprintf(3, "submission queue is full"); + dprintf(3, "submission queue is full\n"); return NULL; } -- 2.31.1

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[PATCH] tcgbios: Fix details in log entries
by Stefan Berger June 30, 2021

June 30, 2021

Fix two details of the logs: - Set the field 'SpecErrata' to 2 as required by specs. - Write the separator into the log entry's event field. Signed-off-by: Stefan Berger <stefanb(a)linux.ibm.com> --- src/tcgbios.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/tcgbios.c b/src/tcgbios.c index 82894f5..4150aa0 100644 --- a/src/tcgbios.c +++ b/src/tcgbios.c @@ -274,7 +274,7 @@ tpm20_write_EfiSpecIdEventStruct(void) .hdr.platformClass = TPM_TCPA_ACPI_CLASS_CLIENT, .hdr.specVersionMinor = 0, .hdr.specVersionMajor = 2, - .hdr.specErrata = 0, + .hdr.specErrata = 2, .hdr.uintnSize = 2, }; @@ -1016,7 +1016,8 @@ tpm_add_event_separators(void) u32 pcrIndex; for (pcrIndex = 0; pcrIndex <= 7; pcrIndex++) tpm_add_measurement_to_log(pcrIndex, EV_SEPARATOR, - NULL, 0, + (const char *)evt_separator, + sizeof(evt_separator), evt_separator, sizeof(evt_separator)); } -- 2.31.1

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[PATCH 0/2] tcgbios: Use the proper hashes for the TPM 2 PCR banks
by Stefan Berger June 30, 2021

June 30, 2021

This PR adds the implementations for sha{256, 384, 512} and makes use of the hash implementation when extending the PCRs of the respective banks rather than always using the sha1 and zero-padding it for the PCR banks of a TPM 2. Regards, Stefan Stefan Berger (2): Add implementations for sha256, sha384, and sha512 tcgbios: Use The proper sha function for each PCR bank Makefile | 2 +- src/sha.h | 11 +++ src/sha1.c | 8 +- src/sha1.h | 8 -- src/sha256.c | 211 +++++++++++++++++++++++++++++++++++++++++++ src/sha512.c | 244 ++++++++++++++++++++++++++++++++++++++++++++++++++ src/tcgbios.c | 60 +++++++++---- src/x86.h | 7 ++ 8 files changed, 522 insertions(+), 29 deletions(-) create mode 100644 src/sha.h delete mode 100644 src/sha1.h create mode 100644 src/sha256.c create mode 100644 src/sha512.c -- 2.31.1

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Re: INT 14H
by Paul Edwards June 28, 2021

June 28, 2021

Hi Peter. Thanks for your reply. > Sure. Implement a driver for that redirection which behaves as an > int14h handler and place the address of its entry point at address > 0000:0080. (14h*4) > The method works with any BIOS. I would like it to work with any OS that uses INT 14H (regardless of how many of those exist), rather than any BIOS. For now I am happy if it only works with SeaBIOS, and I will simply buy a PC that allows me to flash SeaBIOS onto it. Other manufacturers can do other things with INT 14H, redirecting it to some other device, such as HAM radio. > If suitable for your hardware you could do all of it in an option ROM. I'm not familiar with this terminology. Is this something that goes into SeaBIOS? I'm expecting it to be something that is set up (and even configured by the end user in the BIOS) before my OS is even loaded. Thanks. Paul.

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INT 14H
by Paul Edwards June 28, 2021

June 28, 2021

Hi. INT 14H is designed to read/write to a serial port. I would like my software (OS) that uses this interface to, on a machine that doesn't have a serial port, be directed to some other device, like bluetooth to my phone or Wifi to my router. Is this possible? Thanks. Paul.

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