September 2020 - SeaBIOS - mail.coreboot.org

[PATCH v3 0/4] nvme: Add PRP List support
by Alexander Graf Jan. 18, 2022

Jan. 18, 2022

While looking at VM bootup times, we stumbled over the fact that the NVMe code only does I/O operations of up to 4kb at a given point in time. This is usually ok, but if you have an OS that loads a lot of data on boot in combination to network backed storage, it shows in bootup times. There is no need to restrict ourselves to 4kb though. The INT13 call we receive gives us much larger chunks which we can just map into a native bigger NVMe I/O call if the request buffer is page aligned. This patch implements all logic required to do the above and gives a substantial performance boost on boot. v1 -> v2: - fix dprintf - Fix bounds check on PRP list add logic - Reduce PRP list to 15 entries embedded in the ns struct. This reduces BIOS reserved memory footprint by 4kb. v2 -> v3: - new patch: nvme: Split requests by maximum allowed size - Adjust the maximum request size to sector units. The hardware field describes it in pages. Alexander Graf (4): nvme: Record maximum allowed request size nvme: Allow to set PRP2 nvme: Pass large I/O requests as PRP lists nvme: Split requests by maximum allowed size src/hw/nvme-int.h | 16 ++++++- src/hw/nvme.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++------- 2 files changed, 121 insertions(+), 17 deletions(-) -- 2.16.4 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879

6 16

[PATCH v3 0/5] Make seabios linkable with lld
by Fangrui Song Aug. 11, 2021

Aug. 11, 2021

This patch series make seabios linkable with lld. This is beneficial for FreeBSD ports as well https://svnweb.freebsd.org/ports/head/misc/seabios/Makefile as they can drop an LLD_UNSAFE As a maintainer of lld ELF, I have triaged numerous pieces of software. seabios is the only one making use of This drops the only instance https://sourceware.org/bugzilla/show_bug.cgi?id=12726 1, 2, 3 and 4 are really independent and can be applied in arbitrary order. 5 depends on 4. I originally combined 4 and 5 and that was why I don't think a patch series made sense. Fangrui Song (5): romlayout.S: Add missing SHF_ALLOC flag to .fixedaddr.\addr Make rom16.o linkable with lld Makefile: Change ET_EXEC to ET_REL so that lld can link bios.bin.elf romlayout32flag.lds: Use `. +=` instead of `. =` test-build.sh: Delete unneeded LD capability test Makefile | 4 ++++ scripts/layoutrom.py | 13 ++++++++++--- scripts/test-build.sh | 42 +----------------------------------------- src/romlayout.S | 2 +- 4 files changed, 16 insertions(+), 45 deletions(-) -- 2.26.0.292.g33ef6b2f38-goog

4 16

[PATCH] AHCI: The attached ATA device cannot be detected when binding AHCI controller to Virtual Machine
by RunaGuo-oc＠zhaoxin.com March 29, 2021

March 29, 2021

When binding AHCI controller to virtual machine, the attached ATA device cannot be recognized for the following reason: The first Identify PACKET CMD will be failed without dobut which will lead PORT_IRQ_TF_ERR be set in PxIS due to ERR bit set to 1 in D2H Register FIS(PxTFD.STS.ERR=1). In this case, the first CMD will be timeout for seabios only polling PORT_IRQ_D2H_REG_FIS & PORT_IRQ_PIOS_FIS before triggering error handling which leads AHCI controller is an error state, then the second IDENTIFY CMD cannot be issued by AHCI controller, no ATA device will be detected. In AHCI spec HBA Port State Machine section(5.3.8.1 and 5.3.16.5), we can see this sequence: RegFIS:Entry --> ERR:FatalTaskfile (PxTFD.STS.ERR=1) --> ERR:WaitForClear, no entry for PORT_IRQ_D2H_REG_FIS/PORT_IRQ_PIOS_FIS to be set at this time. May be we can also add PORT_IRQ_TF_ERR bit check when polling command completion status? fail log: 02.386: |bffa6000| AHCI/1: link up 02.387: |bffa6000| AHCI/1: send cmd ... 02.387: |bffa7000| phys_free bffa9c00 (detail=0xbffaa320) 02.396: |bffa7000| phys_free bffaa200 (detail=0xbffaa1d0) 02.396: |bffa7000| phys_free bffaa000 (detail=0xbffaa1a0) 02.396: |bffa7000| phys_free bffaa380 (detail=0xbffaa350) 02.400: \bffa7000/ End thread 02.401: phys_free bffa7000 (detail=0xbffaa170) 34.391: |bffa6000| WARNING - Timeout at ahci_command:153! 34.392: |bffa6000| AHCI/1: send cmd ... 66.397: |bffa6000| WARNING - Timeout at ahci_command:153! Signed-off-by: zhaoxin\runaguooc <RunaGuo-oc(a)zhaoxin.com> --- src/hw/ahci.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/hw/ahci.c b/src/hw/ahci.c index d45b430..bab5c35 100644 --- a/src/hw/ahci.c +++ b/src/hw/ahci.c @@ -104,7 +104,7 @@ static void ahci_port_writel(struct ahci_ctrl_s *ctrl, u32 pnr, u32 reg, u32 val static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, void *buffer, u32 bsize) { - u32 val, status, success, flags, intbits, error; + u32 val, status, success, flags, intbits, error, tf; struct ahci_ctrl_s *ctrl = port_gf->ctrl; struct ahci_cmd_s *cmd = port_gf->cmd; struct ahci_fis_s *fis = port_gf->fis; @@ -148,6 +148,14 @@ static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, error = GET_LOWFLAT(fis->rfis[3]); break; } + + if(intbits & PORT_IRQ_TF_ERR){ + tf = ahci_port_readl(ctrl,pnr,PORT_TFDATA); + status = tf & 0xff; + error = tf & 0xff00; + break; + } + } if (timer_check(end)) { warn_timeout(); -- 2.17.1

6 9

[PATCH 0/3] usb/xhci: add support for mmio host adapters (via acpi).
by Gerd Hoffmann Oct. 13, 2020

Oct. 13, 2020

Gerd Hoffmann (3): usb: add boot prio support for mmio host adapters usb/xhci: split xhci setup into generic and pci parts usb/xhci: add support for mmio host adapters (via acpi). src/hw/usb.h | 1 + src/boot.c | 10 ++++++- src/hw/usb-xhci.c | 71 ++++++++++++++++++++++++++++++++++++++--------- 3 files changed, 68 insertions(+), 14 deletions(-) -- 2.27.0

2 7

[PATCH 0/2] dsdt: add support for pnp ids as strings
by Gerd Hoffmann Oct. 13, 2020

Oct. 13, 2020

Gerd Hoffmann (2): output: add support for uppercase hex numbers dsdt: add support for pnp ids as strings src/fw/dsdt_parser.c | 21 +++++++++++-------- src/output.c | 49 ++++++++++++++++++++++++-------------------- 2 files changed, 40 insertions(+), 30 deletions(-) -- 2.27.0

3 6

[PATCH] nvme: Split requests by maximum allowed size
by Alexander Graf Sept. 30, 2020

Sept. 30, 2020

Some NVMe controllers only support small maximum request sizes, such as the AWS EBS NVMe implementation which only supports NVMe requests of up to 64 sectors at once. BIOS callers can easily exceed those request sizes by defining sector counts above this threshold. Currently we fall back to the bounce buffer implementation for those. This is slow. This patch introduces splitting logic to the NVMe I/O request code so that every NVMe I/O request gets handled in a chunk size that is consumable by the NVMe adapter, while maintaining the fast path PRPL logic we just introduced. Signed-off-by: Alexander Graf <graf(a)amazon.com> --- This patch is a follow-up to the NVMe PRP list patch set --- src/hw/nvme.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/hw/nvme.c b/src/hw/nvme.c index ec05836..4eb9a02 100644 --- a/src/hw/nvme.c +++ b/src/hw/nvme.c @@ -727,6 +727,22 @@ nvme_cmd_readwrite(struct nvme_namespace *ns, struct disk_op_s *op, int write) u16 const max_blocks = NVME_PAGE_SIZE / ns->block_size; u16 i; + /* Split up requests that are larger than the device can handle */ + if (op->count > ns->max_req_size) { + u16 count = op->count; + + /* Handle the first max_req_size elements */ + op->count = ns->max_req_size; + if (nvme_cmd_readwrite(ns, op, write)) + return res; + + /* Handle the remainder of the request */ + op->count = count - ns->max_req_size; + op->lba += ns->max_req_size; + op->buf_fl += (ns->max_req_size * ns->block_size); + return nvme_cmd_readwrite(ns, op, write); + } + if (!nvme_build_prpl(ns, op)) { /* Request goes via PRP List logic */ return nvme_io_readwrite(ns, op->lba, ns->prp1, op->count, write); -- 2.16.4 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879

1 0

[PATCH v2 0/3] nvme: Add PRP List support
by Alexander Graf Sept. 30, 2020

Sept. 30, 2020

While looking at VM bootup times, we stumbled over the fact that the NVMe code only does I/O operations of up to 4kb at a given point in time. This is usually ok, but if you have an OS that loads a lot of data on boot in combination to network backed storage, it shows in bootup times. There is no need to restrict ourselves to 4kb though. The INT13 call we receive gives us much larger chunks which we can just map into a native bigger NVMe I/O call if the request buffer is page aligned. This patch implements all logic required to do the above and gives a substantial performance boost on boot. v1 -> v2: - fix dprintf - Fix bounds check on PRP list add logic - Reduce PRP list to 15 entries embedded in the ns struct. This reduces BIOS reserved memory footprint by 4kb. Alexander Graf (3): nvme: Record maximum allowed request size nvme: Allow to set PRP2 nvme: Pass large I/O requests as PRP lists src/hw/nvme-int.h | 16 ++++++++- src/hw/nvme.c | 106 +++++++++++++++++++++++++++++++++++++++++++++--------- 2 files changed, 105 insertions(+), 17 deletions(-) -- 2.16.4 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879

1 3

[PATCH 0/3] nvme: Add PRP List support
by Alexander Graf Sept. 30, 2020

Sept. 30, 2020

While looking at VM bootup times, we stumbled over the fact that the NVMe code only does I/O operations of up to 4kb at a given point in time. This is usually ok, but if you have an OS that loads a lot of data on boot in combination to network backed storage, it shows in bootup times. There is no need to restrict ourselves to 4kb though. The INT13 call we receive gives us much larger chunks which we can just map into a native bigger NVMe I/O call if the request buffer is page aligned. This patch implements all logic required to do the above and gives a substantial performance boost on boot. Alexander Graf (3): nvme: Record maximum allowed request size nvme: Allow to set PRP2 nvme: Pass large I/O requests as PRP lists src/hw/nvme-int.h | 14 ++++++- src/hw/nvme.c | 107 ++++++++++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 104 insertions(+), 17 deletions(-) -- 2.16.4 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879

3 6

[SeaBIOS][PATCH] USB:Fix xHCI initail fail by using longer reset and CNR clear timeout value
by weitaowang-oc＠zhaoxin.com Sept. 30, 2020

Sept. 30, 2020

Some xHCI controller's reset time than 100ms,such as 120ms. On the on hand, xHCI spec has not specified a timeout value. Maybe setting xHCI HCRST and CNR bit clear timeout value larger is a nice thing.As a compromise between compatibility and latency,we can take 1000ms as a timeout value. Signed-off-by: WeitaoWangoc <WeitaoWang-oc(a)zhaoxin.com> --- src/hw/usb-xhci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/hw/usb-xhci.c b/src/hw/usb-xhci.c index 08d1e32..21d091f 100644 --- a/src/hw/usb-xhci.c +++ b/src/hw/usb-xhci.c @@ -467,9 +467,9 @@ configure_xhci(void *data) dprintf(3, "%s: resetting\n", __func__); writel(&xhci->op->usbcmd, XHCI_CMD_HCRST); - if (wait_bit(&xhci->op->usbcmd, XHCI_CMD_HCRST, 0, 100) != 0) + if (wait_bit(&xhci->op->usbcmd, XHCI_CMD_HCRST, 0, 1000) != 0) goto fail; - if (wait_bit(&xhci->op->usbsts, XHCI_STS_CNR, 0, 100) != 0) + if (wait_bit(&xhci->op->usbsts, XHCI_STS_CNR, 0, 1000) != 0) goto fail; writel(&xhci->op->config, xhci->slots); -- 2.7.4

3 3

[PATCH] Add all HD and QXGA resolutions
by Elliot Killick Sept. 30, 2020

Sept. 30, 2020

From: Elliot Killick <elliotkillick(a)zohomail.eu> Add support for all high-definition and quad extended graphics array resolutions as listed on Wikipedia. https://en.wikipedia.org/wiki/Graphics_display_resolution Signed-off-by: Elliot Killick <elliotkillick(a)zohomail.eu> --- Also fixed some indentation so the mode values would all align and changed a few of the hex identifiers at the start of the list to use lowercase instead of uppercase letters to comply with the style of the the rest of the modes in the struct. vgasrc/svgamodes.c | 222 +++++++++++++++++++++++++++++---------------- 1 file changed, 145 insertions(+), 77 deletions(-) diff --git a/vgasrc/svgamodes.c b/vgasrc/svgamodes.c index 6e494c7..a22cdf7 100644 --- a/vgasrc/svgamodes.c +++ b/vgasrc/svgamodes.c @@ -13,84 +13,152 @@ struct generic_svga_mode svga_modes[] VAR16 = { /* standard modes */ - { 0x100, { MM_PACKED, 640, 400, 8, 8, 16, SEG_GRAPH } }, - { 0x101, { MM_PACKED, 640, 480, 8, 8, 16, SEG_GRAPH } }, - { 0x102, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH } }, - { 0x103, { MM_PACKED, 800, 600, 8, 8, 16, SEG_GRAPH } }, - { 0x104, { MM_PLANAR, 1024, 768, 4, 8, 16, SEG_GRAPH } }, - { 0x105, { MM_PACKED, 1024, 768, 8, 8, 16, SEG_GRAPH } }, - { 0x106, { MM_PLANAR, 1280, 1024, 4, 8, 16, SEG_GRAPH } }, - { 0x107, { MM_PACKED, 1280, 1024, 8, 8, 16, SEG_GRAPH } }, - { 0x10D, { MM_DIRECT, 320, 200, 15, 8, 16, SEG_GRAPH } }, - { 0x10E, { MM_DIRECT, 320, 200, 16, 8, 16, SEG_GRAPH } }, - { 0x10F, { MM_DIRECT, 320, 200, 24, 8, 16, SEG_GRAPH } }, - { 0x110, { MM_DIRECT, 640, 480, 15, 8, 16, SEG_GRAPH } }, - { 0x111, { MM_DIRECT, 640, 480, 16, 8, 16, SEG_GRAPH } }, - { 0x112, { MM_DIRECT, 640, 480, 24, 8, 16, SEG_GRAPH } }, - { 0x113, { MM_DIRECT, 800, 600, 15, 8, 16, SEG_GRAPH } }, - { 0x114, { MM_DIRECT, 800, 600, 16, 8, 16, SEG_GRAPH } }, - { 0x115, { MM_DIRECT, 800, 600, 24, 8, 16, SEG_GRAPH } }, - { 0x116, { MM_DIRECT, 1024, 768, 15, 8, 16, SEG_GRAPH } }, - { 0x117, { MM_DIRECT, 1024, 768, 16, 8, 16, SEG_GRAPH } }, - { 0x118, { MM_DIRECT, 1024, 768, 24, 8, 16, SEG_GRAPH } }, - { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } }, - { 0x11A, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } }, - { 0x11B, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } }, - { 0x11C, { MM_PACKED, 1600, 1200, 8, 8, 16, SEG_GRAPH } }, - { 0x11D, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } }, - { 0x11E, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } }, - { 0x11F, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } }, + { 0x100, { MM_PACKED, 640, 400, 8, 8, 16, SEG_GRAPH } }, + { 0x101, { MM_PACKED, 640, 480, 8, 8, 16, SEG_GRAPH } }, + { 0x102, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH } }, + { 0x103, { MM_PACKED, 800, 600, 8, 8, 16, SEG_GRAPH } }, + { 0x104, { MM_PLANAR, 1024, 768, 4, 8, 16, SEG_GRAPH } }, + { 0x105, { MM_PACKED, 1024, 768, 8, 8, 16, SEG_GRAPH } }, + { 0x106, { MM_PLANAR, 1280, 1024, 4, 8, 16, SEG_GRAPH } }, + { 0x107, { MM_PACKED, 1280, 1024, 8, 8, 16, SEG_GRAPH } }, + { 0x10d, { MM_DIRECT, 320, 200, 15, 8, 16, SEG_GRAPH } }, + { 0x10e, { MM_DIRECT, 320, 200, 16, 8, 16, SEG_GRAPH } }, + { 0x10f, { MM_DIRECT, 320, 200, 24, 8, 16, SEG_GRAPH } }, + { 0x110, { MM_DIRECT, 640, 480, 15, 8, 16, SEG_GRAPH } }, + { 0x111, { MM_DIRECT, 640, 480, 16, 8, 16, SEG_GRAPH } }, + { 0x112, { MM_DIRECT, 640, 480, 24, 8, 16, SEG_GRAPH } }, + { 0x113, { MM_DIRECT, 800, 600, 15, 8, 16, SEG_GRAPH } }, + { 0x114, { MM_DIRECT, 800, 600, 16, 8, 16, SEG_GRAPH } }, + { 0x115, { MM_DIRECT, 800, 600, 24, 8, 16, SEG_GRAPH } }, + { 0x116, { MM_DIRECT, 1024, 768, 15, 8, 16, SEG_GRAPH } }, + { 0x117, { MM_DIRECT, 1024, 768, 16, 8, 16, SEG_GRAPH } }, + { 0x118, { MM_DIRECT, 1024, 768, 24, 8, 16, SEG_GRAPH } }, + { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } }, + { 0x11a, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } }, + { 0x11b, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } }, + { 0x11c, { MM_PACKED, 1600, 1200, 8, 8, 16, SEG_GRAPH } }, + { 0x11d, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } }, + { 0x11e, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } }, + { 0x11f, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } }, /* other modes */ - { 0x140, { MM_DIRECT, 320, 200, 32, 8, 16, SEG_GRAPH } }, - { 0x141, { MM_DIRECT, 640, 400, 32, 8, 16, SEG_GRAPH } }, - { 0x142, { MM_DIRECT, 640, 480, 32, 8, 16, SEG_GRAPH } }, - { 0x143, { MM_DIRECT, 800, 600, 32, 8, 16, SEG_GRAPH } }, - { 0x144, { MM_DIRECT, 1024, 768, 32, 8, 16, SEG_GRAPH } }, - { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } }, - { 0x146, { MM_PACKED, 320, 200, 8, 8, 16, SEG_GRAPH } }, - { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } }, - { 0x148, { MM_PACKED, 1152, 864, 8, 8, 16, SEG_GRAPH } }, - { 0x149, { MM_DIRECT, 1152, 864, 15, 8, 16, SEG_GRAPH } }, - { 0x14a, { MM_DIRECT, 1152, 864, 16, 8, 16, SEG_GRAPH } }, - { 0x14b, { MM_DIRECT, 1152, 864, 24, 8, 16, SEG_GRAPH } }, - { 0x14c, { MM_DIRECT, 1152, 864, 32, 8, 16, SEG_GRAPH } }, - { 0x175, { MM_DIRECT, 1280, 768, 16, 8, 16, SEG_GRAPH } }, - { 0x176, { MM_DIRECT, 1280, 768, 24, 8, 16, SEG_GRAPH } }, - { 0x177, { MM_DIRECT, 1280, 768, 32, 8, 16, SEG_GRAPH } }, - { 0x178, { MM_DIRECT, 1280, 800, 16, 8, 16, SEG_GRAPH } }, - { 0x179, { MM_DIRECT, 1280, 800, 24, 8, 16, SEG_GRAPH } }, - { 0x17a, { MM_DIRECT, 1280, 800, 32, 8, 16, SEG_GRAPH } }, - { 0x17b, { MM_DIRECT, 1280, 960, 16, 8, 16, SEG_GRAPH } }, - { 0x17c, { MM_DIRECT, 1280, 960, 24, 8, 16, SEG_GRAPH } }, - { 0x17d, { MM_DIRECT, 1280, 960, 32, 8, 16, SEG_GRAPH } }, - { 0x17e, { MM_DIRECT, 1440, 900, 16, 8, 16, SEG_GRAPH } }, - { 0x17f, { MM_DIRECT, 1440, 900, 24, 8, 16, SEG_GRAPH } }, - { 0x180, { MM_DIRECT, 1440, 900, 32, 8, 16, SEG_GRAPH } }, - { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } }, - { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } }, - { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } }, - { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } }, - { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } }, - { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } }, - { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } }, - { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } }, - { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } }, - { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } }, - { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } }, - { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } }, - { 0x18d, { MM_DIRECT, 1280, 720, 16, 8, 16, SEG_GRAPH } }, - { 0x18e, { MM_DIRECT, 1280, 720, 24, 8, 16, SEG_GRAPH } }, - { 0x18f, { MM_DIRECT, 1280, 720, 32, 8, 16, SEG_GRAPH } }, - { 0x190, { MM_DIRECT, 1920, 1080, 16, 8, 16, SEG_GRAPH } }, - { 0x191, { MM_DIRECT, 1920, 1080, 24, 8, 16, SEG_GRAPH } }, - { 0x192, { MM_DIRECT, 1920, 1080, 32, 8, 16, SEG_GRAPH } }, + { 0x140, { MM_DIRECT, 320, 200, 32, 8, 16, SEG_GRAPH } }, + { 0x141, { MM_DIRECT, 640, 400, 32, 8, 16, SEG_GRAPH } }, + { 0x142, { MM_DIRECT, 640, 480, 32, 8, 16, SEG_GRAPH } }, + { 0x143, { MM_DIRECT, 800, 600, 32, 8, 16, SEG_GRAPH } }, + { 0x144, { MM_DIRECT, 1024, 768, 32, 8, 16, SEG_GRAPH } }, + { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } }, + { 0x146, { MM_PACKED, 320, 200, 8, 8, 16, SEG_GRAPH } }, + { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } }, + { 0x148, { MM_PACKED, 1152, 864, 8, 8, 16, SEG_GRAPH } }, + { 0x149, { MM_DIRECT, 1152, 864, 15, 8, 16, SEG_GRAPH } }, + { 0x14a, { MM_DIRECT, 1152, 864, 16, 8, 16, SEG_GRAPH } }, + { 0x14b, { MM_DIRECT, 1152, 864, 24, 8, 16, SEG_GRAPH } }, + { 0x14c, { MM_DIRECT, 1152, 864, 32, 8, 16, SEG_GRAPH } }, + { 0x175, { MM_DIRECT, 1280, 768, 16, 8, 16, SEG_GRAPH } }, + { 0x176, { MM_DIRECT, 1280, 768, 24, 8, 16, SEG_GRAPH } }, + { 0x177, { MM_DIRECT, 1280, 768, 32, 8, 16, SEG_GRAPH } }, + { 0x178, { MM_DIRECT, 1280, 800, 16, 8, 16, SEG_GRAPH } }, + { 0x179, { MM_DIRECT, 1280, 800, 24, 8, 16, SEG_GRAPH } }, + { 0x17a, { MM_DIRECT, 1280, 800, 32, 8, 16, SEG_GRAPH } }, + { 0x17b, { MM_DIRECT, 1280, 960, 16, 8, 16, SEG_GRAPH } }, + { 0x17c, { MM_DIRECT, 1280, 960, 24, 8, 16, SEG_GRAPH } }, + { 0x17d, { MM_DIRECT, 1280, 960, 32, 8, 16, SEG_GRAPH } }, + { 0x17e, { MM_DIRECT, 1440, 900, 16, 8, 16, SEG_GRAPH } }, + { 0x17f, { MM_DIRECT, 1440, 900, 24, 8, 16, SEG_GRAPH } }, + { 0x180, { MM_DIRECT, 1440, 900, 32, 8, 16, SEG_GRAPH } }, + { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } }, + { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } }, + { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } }, + { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } }, + { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } }, + { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } }, + { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } }, + { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } }, + { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } }, + { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } }, + { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } }, + { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } }, + { 0x18d, { MM_DIRECT, 1280, 720, 16, 8, 16, SEG_GRAPH } }, + { 0x18e, { MM_DIRECT, 1280, 720, 24, 8, 16, SEG_GRAPH } }, + { 0x18f, { MM_DIRECT, 1280, 720, 32, 8, 16, SEG_GRAPH } }, + { 0x190, { MM_DIRECT, 1920, 1080, 16, 8, 16, SEG_GRAPH } }, + { 0x191, { MM_DIRECT, 1920, 1080, 24, 8, 16, SEG_GRAPH } }, + { 0x192, { MM_DIRECT, 1920, 1080, 32, 8, 16, SEG_GRAPH } }, + { 0x193, { MM_DIRECT, 1600, 900, 16, 8, 16, SEG_GRAPH } }, + { 0x194, { MM_DIRECT, 1600, 900, 24, 8, 16, SEG_GRAPH } }, + { 0x195, { MM_DIRECT, 1600, 900, 32, 8, 16, SEG_GRAPH } }, - /* custom resolutions for 16:9 displays */ - { 0x193, { MM_DIRECT, 1600, 900, 16, 8, 16, SEG_GRAPH } }, - { 0x194, { MM_DIRECT, 1600, 900, 24, 8, 16, SEG_GRAPH } }, - { 0x195, { MM_DIRECT, 1600, 900, 32, 8, 16, SEG_GRAPH } }, - { 0x196, { MM_DIRECT, 2560, 1440, 16, 8, 16, SEG_GRAPH } }, - { 0x197, { MM_DIRECT, 2560, 1440, 24, 8, 16, SEG_GRAPH } }, - { 0x198, { MM_DIRECT, 2560, 1440, 32, 8, 16, SEG_GRAPH } }, + /* other high-definition resolutions */ + { 0x196, { MM_DIRECT, 960, 540, 16, 8, 16, SEG_GRAPH } }, + { 0x197, { MM_DIRECT, 960, 540, 24, 8, 16, SEG_GRAPH } }, + { 0x198, { MM_DIRECT, 960, 540, 32, 8, 16, SEG_GRAPH } }, + { 0x199, { MM_DIRECT, 1280, 1080, 16, 8, 16, SEG_GRAPH } }, + { 0x19a, { MM_DIRECT, 1280, 1080, 24, 8, 16, SEG_GRAPH } }, + { 0x19b, { MM_DIRECT, 1280, 1080, 32, 8, 16, SEG_GRAPH } }, + { 0x19c, { MM_DIRECT, 2048, 1080, 16, 8, 16, SEG_GRAPH } }, + { 0x19d, { MM_DIRECT, 2048, 1080, 24, 8, 16, SEG_GRAPH } }, + { 0x19e, { MM_DIRECT, 2048, 1080, 32, 8, 16, SEG_GRAPH } }, + { 0x19f, { MM_DIRECT, 2160, 1080, 16, 8, 16, SEG_GRAPH } }, + { 0x1a0, { MM_DIRECT, 2160, 1080, 24, 8, 16, SEG_GRAPH } }, + { 0x1a1, { MM_DIRECT, 2160, 1080, 32, 8, 16, SEG_GRAPH } }, + { 0x1a2, { MM_DIRECT, 2560, 1080, 16, 8, 16, SEG_GRAPH } }, + { 0x1a3, { MM_DIRECT, 2560, 1080, 24, 8, 16, SEG_GRAPH } }, + { 0x1a4, { MM_DIRECT, 2560, 1080, 32, 8, 16, SEG_GRAPH } }, + { 0x1a5, { MM_DIRECT, 2560, 1440, 16, 8, 16, SEG_GRAPH } }, + { 0x1a6, { MM_DIRECT, 2560, 1440, 24, 8, 16, SEG_GRAPH } }, + { 0x1a7, { MM_DIRECT, 2560, 1440, 32, 8, 16, SEG_GRAPH } }, + { 0x1a8, { MM_DIRECT, 3200, 1800, 16, 8, 16, SEG_GRAPH } }, + { 0x1a9, { MM_DIRECT, 3200, 1800, 24, 8, 16, SEG_GRAPH } }, + { 0x1aa, { MM_DIRECT, 3200, 1800, 32, 8, 16, SEG_GRAPH } }, + { 0x1ab, { MM_DIRECT, 3440, 1440, 16, 8, 16, SEG_GRAPH } }, + { 0x1ac, { MM_DIRECT, 3440, 1440, 24, 8, 16, SEG_GRAPH } }, + { 0x1ad, { MM_DIRECT, 3440, 1440, 32, 8, 16, SEG_GRAPH } }, + { 0x1ae, { MM_DIRECT, 3840, 1080, 16, 8, 16, SEG_GRAPH } }, + { 0x1af, { MM_DIRECT, 3840, 1080, 24, 8, 16, SEG_GRAPH } }, + { 0x1b0, { MM_DIRECT, 3840, 1080, 32, 8, 16, SEG_GRAPH } }, + { 0x1b1, { MM_DIRECT, 3840, 1600, 16, 8, 16, SEG_GRAPH } }, + { 0x1b2, { MM_DIRECT, 3840, 1600, 24, 8, 16, SEG_GRAPH } }, + { 0x1b3, { MM_DIRECT, 3840, 1600, 32, 8, 16, SEG_GRAPH } }, + { 0x1b4, { MM_DIRECT, 3840, 2160, 16, 8, 16, SEG_GRAPH } }, + { 0x1b5, { MM_DIRECT, 3840, 2160, 24, 8, 16, SEG_GRAPH } }, + { 0x1b6, { MM_DIRECT, 3840, 2160, 32, 8, 16, SEG_GRAPH } }, + { 0x1b7, { MM_DIRECT, 4096, 2160, 16, 8, 16, SEG_GRAPH } }, + { 0x1b8, { MM_DIRECT, 4096, 2160, 24, 8, 16, SEG_GRAPH } }, + { 0x1b9, { MM_DIRECT, 4096, 2160, 32, 8, 16, SEG_GRAPH } }, + { 0x1ba, { MM_DIRECT, 5120, 2160, 16, 8, 16, SEG_GRAPH } }, + { 0x1bb, { MM_DIRECT, 5120, 2160, 24, 8, 16, SEG_GRAPH } }, + { 0x1bc, { MM_DIRECT, 5120, 2160, 32, 8, 16, SEG_GRAPH } }, + { 0x1bd, { MM_DIRECT, 5120, 2880, 16, 8, 16, SEG_GRAPH } }, + { 0x1be, { MM_DIRECT, 5120, 2880, 24, 8, 16, SEG_GRAPH } }, + { 0x1bf, { MM_DIRECT, 5120, 2880, 32, 8, 16, SEG_GRAPH } }, + { 0x1c0, { MM_DIRECT, 7680, 4320, 16, 8, 16, SEG_GRAPH } }, + { 0x1c1, { MM_DIRECT, 7680, 4320, 24, 8, 16, SEG_GRAPH } }, + { 0x1c2, { MM_DIRECT, 7680, 4320, 32, 8, 16, SEG_GRAPH } }, + { 0x1c3, { MM_DIRECT, 17280, 4320, 16, 8, 16, SEG_GRAPH } }, + { 0x1c4, { MM_DIRECT, 17280, 4320, 24, 8, 16, SEG_GRAPH } }, + { 0x1c5, { MM_DIRECT, 17280, 4320, 32, 8, 16, SEG_GRAPH } }, + + /* quad extended graphics array resolutions */ + { 0x1c6, { MM_DIRECT, 2048, 1152, 16, 8, 16, SEG_GRAPH } }, + { 0x1c7, { MM_DIRECT, 2048, 1152, 24, 8, 16, SEG_GRAPH } }, + { 0x1c8, { MM_DIRECT, 2048, 1152, 32, 8, 16, SEG_GRAPH } }, + { 0x1c9, { MM_DIRECT, 2048, 1536, 16, 8, 16, SEG_GRAPH } }, + { 0x1ca, { MM_DIRECT, 2048, 1536, 24, 8, 16, SEG_GRAPH } }, + { 0x1cb, { MM_DIRECT, 2048, 1536, 32, 8, 16, SEG_GRAPH } }, + { 0x1cc, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } }, + { 0x1cd, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } }, + { 0x1ce, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } }, + { 0x1cf, { MM_DIRECT, 2560, 2048, 16, 8, 16, SEG_GRAPH } }, + { 0x1d0, { MM_DIRECT, 2560, 2048, 24, 8, 16, SEG_GRAPH } }, + { 0x1d1, { MM_DIRECT, 2560, 2048, 32, 8, 16, SEG_GRAPH } }, + { 0x1d2, { MM_DIRECT, 3200, 2048, 16, 8, 16, SEG_GRAPH } }, + { 0x1d3, { MM_DIRECT, 3200, 2048, 24, 8, 16, SEG_GRAPH } }, + { 0x1d4, { MM_DIRECT, 3200, 2048, 32, 8, 16, SEG_GRAPH } }, + { 0x1d5, { MM_DIRECT, 3200, 2400, 16, 8, 16, SEG_GRAPH } }, + { 0x1d6, { MM_DIRECT, 3200, 2400, 24, 8, 16, SEG_GRAPH } }, + { 0x1d7, { MM_DIRECT, 3200, 2400, 32, 8, 16, SEG_GRAPH } }, + { 0x1d8, { MM_DIRECT, 3840, 2400, 16, 8, 16, SEG_GRAPH } }, + { 0x1d9, { MM_DIRECT, 3840, 2400, 24, 8, 16, SEG_GRAPH } }, + { 0x1da, { MM_DIRECT, 3840, 2400, 32, 8, 16, SEG_GRAPH } }, }; unsigned int svga_mcount VAR16 = ARRAY_SIZE(svga_modes); -- 2.28.0

2 1