December 2016 - SeaBIOS - mail.coreboot.org

[PATCH 0/3] SeaVGABIOS serial console test
by Kevin O'Connor Sept. 5, 2017

Sept. 5, 2017

Hi Gerd, I was curious to see what the "sercon" stuff would look like in SeaVGABIOS instead of in SeaBIOS. So, I put together a quick prototype. The code is also at: https://github.com/KevinOConnor/seabios/tree/testing This is just a proof-of-concept thing - I didn't implement any of the useful features you have in your series. Specifically, it doesn't unclutter the serial output, doesn't implement cp437 translations, and doesn't handle multi-byte input. It does does have basic input, output, and split-output handling though. I'm not sure if this is better than a SeaBIOS implementation. I suspect it will be easier to handle vga quirks this way. However, handling exotic serial outputs (eg, mmio and usb based) would be better suited in SeaBIOS. Thoughts? -Kevin Kevin O'Connor (3): sercon: Initial support for VGA emulation over serial port sercon: Add basic keyboard input support sercon: Support "split output" mode Makefile | 2 +- vgasrc/Kconfig | 6 + vgasrc/sercon.c | 356 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/vgabios.c | 15 ++- vgasrc/vgabios.h | 5 + vgasrc/vgaentry.S | 7 ++ vgasrc/vgahw.h | 72 ++++++++++- vgasrc/vgainit.c | 12 +- vgasrc/vgautil.h | 24 ++++ 9 files changed, 482 insertions(+), 17 deletions(-) create mode 100644 vgasrc/sercon.c -- 2.5.5

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how to enter into cmos-setup of seabios in qemu/kvm
by dw Jan. 4, 2017

Jan. 4, 2017

Hi: I'm running a VM with qemu/kvm and libvirt,I want to know how to enter into cmos-setup of seabios. Anyone knows how to? Or there is not cmos-setup in seabios? please help me. thanks! dw

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More than 9 boot devices
by Аладышев Константин Jan. 3, 2017

Jan. 3, 2017

Is it possible in SeaBIOS to have working boot menu with amount of boot devices more than 9? I mean in this case we have boot device numbers with two digits, which is impossible to select. If I want to select string 12 and try to enter "12", SeaBIOS recognizes "1" and boot from device "1"...

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Re: [SeaBIOS] [PATCH v2] serialio: Support for mmap serial ports
by Kevin O'Connor Dec. 30, 2016

Dec. 30, 2016

On Thu, Dec 29, 2016 at 10:03:06AM +0100, Ricardo Ribalda Delgado wrote: > Hi Kevin > > On Thu, Dec 29, 2016 at 1:45 AM, Kevin O'Connor <kevin(a)koconnor.net> wrote: > > Thanks. I'm a little concerned about overloading the meaning of > > CONFIG_DEBUG_SERIAL_PORT to mean either port or memory address. How > > about the modified patch below instead? > > Completely agree, the new version looks much better. I have also tried > it on my bettong-alike board > > You may add > > Tested-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> Thanks. I committed this change. -Kevin

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[PATCH v2] serialio: Support for mmap serial ports
by Ricardo Ribalda Delgado Dec. 29, 2016

Dec. 29, 2016

Some chipsets have memory mapped serial ports. The protocol is the same as an standard uart, but with memory read/write instead of inb/outb. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- v2: Fix typos Suggested by: Kevin O'Connor <kevin(a)koconnor.net>: -Only operate in 32bit mode if !MODESEGMENT src/Kconfig | 3 +++ src/hw/serialio.c | 32 +++++++++++++++++++++++++------- src/serial.c | 2 +- 3 files changed, 29 insertions(+), 8 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index e767be1351c3..e53713f2c527 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -532,6 +532,9 @@ menu "Debugging" default 0x3f8 help Base port for serial - generally 0x3f8, 0x2f8, 0x3e8, or 0x2e8. + On some chipsets the serial port is memory mapped, in those cases + provide the 32 bit address. E.g. 0xFEDC6000 for the AMD Kern + (a.k.a Hudson UART). config DEBUG_IO depends on QEMU_HARDWARE && DEBUG_LEVEL != 0 diff --git a/src/hw/serialio.c b/src/hw/serialio.c index 6486fc086b1c..6ed8e7b1880d 100644 --- a/src/hw/serialio.c +++ b/src/hw/serialio.c @@ -17,6 +17,24 @@ #define DEBUG_TIMEOUT 100000 +static void +serial_outb(u8 val, u32 port, u8 offset){ + if (port < 0x10000) + return outb(val, port + offset); + if (MODESEGMENT) + return; + writeb((void *)port + 4*offset, val); +} + +static u8 +serial_inb(u32 port, u8 offset){ + if (port < 0x10000) + return inb(port + offset); + if (MODESEGMENT) + return 0xff; + return readb((void *)port + 4*offset); +} + // Setup the debug serial port for output. void serial_debug_preinit(void) @@ -25,12 +43,12 @@ serial_debug_preinit(void) return; // setup for serial logging: 8N1 u8 oldparam, newparam = 0x03; - oldparam = inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LCR); - outb(newparam, CONFIG_DEBUG_SERIAL_PORT+SEROFF_LCR); + oldparam = serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LCR); + serial_outb(newparam, CONFIG_DEBUG_SERIAL_PORT, SEROFF_LCR); // Disable irqs u8 oldier, newier = 0; - oldier = inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_IER); - outb(newier, CONFIG_DEBUG_SERIAL_PORT+SEROFF_IER); + oldier = serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_IER); + serial_outb(newier, CONFIG_DEBUG_SERIAL_PORT, SEROFF_IER); if (oldparam != newparam || oldier != newier) dprintf(1, "Changing serial settings was %x/%x now %x/%x\n" @@ -44,11 +62,11 @@ serial_debug(char c) if (!CONFIG_DEBUG_SERIAL) return; int timeout = DEBUG_TIMEOUT; - while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x20) != 0x20) + while ((serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LSR) & 0x20) != 0x20) if (!timeout--) // Ran out of time. return; - outb(c, CONFIG_DEBUG_SERIAL_PORT+SEROFF_DATA); + serial_outb(c, CONFIG_DEBUG_SERIAL_PORT, SEROFF_DATA); } void @@ -66,7 +84,7 @@ serial_debug_flush(void) if (!CONFIG_DEBUG_SERIAL) return; int timeout = DEBUG_TIMEOUT; - while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x60) != 0x60) + while ((serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LSR) & 0x60) != 0x60) if (!timeout--) // Ran out of time. return; diff --git a/src/serial.c b/src/serial.c index 88349c8a9267..27710cb19af9 100644 --- a/src/serial.c +++ b/src/serial.c @@ -21,7 +21,7 @@ static u16 detect_serial(u16 port, u8 timeout, u8 count) { - if (CONFIG_DEBUG_SERIAL && port == CONFIG_DEBUG_SERIAL_PORT + if (CONFIG_DEBUG_SERIAL && port == (u16) CONFIG_DEBUG_SERIAL_PORT && !romfile_loadint("etc/advertise-serial-debug-port", 1)) return 0; outb(0x02, port+SEROFF_IER); -- 2.10.2

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Problems with parallel build and SeaVGABIOS
by Paul Menzel Dec. 28, 2016

Dec. 28, 2016

Dear SeaBIOS folks, building SeaBIOS for coreboot with SeaVGABIOS in parallel, I get an error. > $ nproc > 8 > $ git log --oneline -1 > b98c658 drop "etc/boot-cpus" fw_cfg file and reuse legacy QEMU_CFG_NB_CPUS > $ grep VGA_COREBOOT .config > CONFIG_VGA_COREBOOT=y > $ make menuconfig && make clean && make -j > scripts/kconfig/mconf /home/pmenzel/src/seabios/src/Kconfig > > > *** End of the configuration. > *** Execute 'make' to start the build or try 'make help'. > > Compiling to assembler out/src/asm-offsets.s > Precompiling out/vgasrc/vgalayout.lds > cc1: fatal error: opening output file out/vgasrc/vgalayout.lds: No such file or directory > compilation terminated. > Makefile:138: recipe for target 'out/vgasrc/vgalayout.lds' failed > make: *** [out/vgasrc/vgalayout.lds] Error 1 > make: *** Waiting for unfinished jobs.... > Build Kconfig config file Probably the Makefile just needs some tweaking. Please find the configuration file attached. Kind regards, Paul

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iPXE on multiple chips with the same PCI ID
by Аладышев Константин Dec. 28, 2016

Dec. 28, 2016

I have a board with multiple external PCIe Ethernet I350 chips. In my lspci I have: 03.00.0 (4-port I350) 03.00.1 03.00.2 03.00.3 04.00.0 (4-port I350) 04.00.1 04.00.2 04.00.3 05.00.0 (2-port I350) 05.00.1 I builtin iPXE image to coreboot and I have all of these devices in Seabios bootmenu. But the problem is that I can only boot from ports of the first appeared chip. In the example above it will be 03.00.x boot devices. If I'll physically unplug 03.00.x chip, I'll be able to boot from 04.00.x boot devices. And if I'll unplug 03.00.x and 04.00.x chip, I'll be able to boot from 05.00.x boot devices. Does someone had the same problem and is there any idea of how to solve it? Coreboot+SeaBIOS log is in attachment (it has some additional printk's)

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[PATCH] searialio: Support for mmap serial ports
by Ricardo Ribalda Delgado Dec. 20, 2016

Dec. 20, 2016

Some chipsets have memory mapped serial ports. The protocol is the same as an standard uart, but with memory read/write instead of inb/outb. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- src/Kconfig | 3 +++ src/hw/serialio.c | 28 +++++++++++++++++++++------- src/serial.c | 2 +- 3 files changed, 25 insertions(+), 8 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index e767be1351c3..ff1f960ef361 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -532,6 +532,9 @@ menu "Debugging" default 0x3f8 help Base port for serial - generally 0x3f8, 0x2f8, 0x3e8, or 0x2e8. + On some boards the serial port is memory mapped, in those cases + provide the 32 bit address. E.g. 0xFEDC6000 for the AMD Kern + (a.k.a Hudson UART). config DEBUG_IO depends on QEMU_HARDWARE && DEBUG_LEVEL != 0 diff --git a/src/hw/serialio.c b/src/hw/serialio.c index 6486fc086b1c..d02ab65f6e9b 100644 --- a/src/hw/serialio.c +++ b/src/hw/serialio.c @@ -17,6 +17,20 @@ #define DEBUG_TIMEOUT 100000 +static void +serial_outb(u8 val, u32 port, u8 offset){ + if (port < 0x10000) + return outb(val, port + offset); + writeb((void *)port + 4*offset, val); +} + +static u8 +serial_inb(u32 port, u8 offset){ + if (port < 0x10000) + return inb(port + offset); + return readb((void *)port + 4*offset); +} + // Setup the debug serial port for output. void serial_debug_preinit(void) @@ -25,12 +39,12 @@ serial_debug_preinit(void) return; // setup for serial logging: 8N1 u8 oldparam, newparam = 0x03; - oldparam = inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LCR); - outb(newparam, CONFIG_DEBUG_SERIAL_PORT+SEROFF_LCR); + oldparam = serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LCR); + serial_outb(newparam, CONFIG_DEBUG_SERIAL_PORT, SEROFF_LCR); // Disable irqs u8 oldier, newier = 0; - oldier = inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_IER); - outb(newier, CONFIG_DEBUG_SERIAL_PORT+SEROFF_IER); + oldier = serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_IER); + serial_outb(newier, CONFIG_DEBUG_SERIAL_PORT, SEROFF_IER); if (oldparam != newparam || oldier != newier) dprintf(1, "Changing serial settings was %x/%x now %x/%x\n" @@ -44,11 +58,11 @@ serial_debug(char c) if (!CONFIG_DEBUG_SERIAL) return; int timeout = DEBUG_TIMEOUT; - while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x20) != 0x20) + while ((serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LSR) & 0x20) != 0x20) if (!timeout--) // Ran out of time. return; - outb(c, CONFIG_DEBUG_SERIAL_PORT+SEROFF_DATA); + serial_outb(c, CONFIG_DEBUG_SERIAL_PORT, SEROFF_DATA); } void @@ -66,7 +80,7 @@ serial_debug_flush(void) if (!CONFIG_DEBUG_SERIAL) return; int timeout = DEBUG_TIMEOUT; - while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x60) != 0x60) + while ((serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LSR) & 0x60) != 0x60) if (!timeout--) // Ran out of time. return; diff --git a/src/serial.c b/src/serial.c index 88349c8a9267..27710cb19af9 100644 --- a/src/serial.c +++ b/src/serial.c @@ -21,7 +21,7 @@ static u16 detect_serial(u16 port, u8 timeout, u8 count) { - if (CONFIG_DEBUG_SERIAL && port == CONFIG_DEBUG_SERIAL_PORT + if (CONFIG_DEBUG_SERIAL && port == (u16) CONFIG_DEBUG_SERIAL_PORT && !romfile_loadint("etc/advertise-serial-debug-port", 1)) return 0; outb(0x02, port+SEROFF_IER); -- 2.10.2

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[PATCH] tpm: Log TPM 2 digest structure in little endian format
by Stefan Berger Dec. 2, 2016

Dec. 2, 2016

The parameters for extending the PCRs of a TPM 2 are written in big endian format when sent to the TPM. However, the log needs to be written in little endian format, so we cannot just copy the structure into the log as-is. To support the little endian format in the log, we extend the function writing the TPM 2 digest structure with a parameter that allows us to choose the endianess of a few parameters. We then rewrite the digest structure in little endian format for the log. Signed-off-by: Stefan Berger <stefanb(a)linux.vnet.ibm.com> --- src/tcgbios.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/src/tcgbios.c b/src/tcgbios.c index 4cff4ce..fea88a6 100644 --- a/src/tcgbios.c +++ b/src/tcgbios.c @@ -311,11 +311,13 @@ tpm20_write_EfiSpecIdEventStruct(void) * * le: the log entry to build the digest in * sha1: the sha1 hash value to use + * bigEndian: whether to build in big endian format for the TPM or + * little endian for the log * * Returns the digest size; -1 on fatal error */ static int -tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1) +tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1, int bigEndian) { if (!tpm20_pcr_selection) return -1; @@ -346,7 +348,11 @@ tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1) return -1; } - v->hashAlg = sel->hashAlg; + if (bigEndian) + v->hashAlg = sel->hashAlg; + else + v->hashAlg = be16_to_cpu(sel->hashAlg); + memset(v->hash, 0, hsize); memcpy(v->hash, sha1, hsize > SHA1_BUFSIZE ? SHA1_BUFSIZE : hsize); @@ -360,7 +366,10 @@ tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1) } struct tpm2_digest_values *v = (void*)le->hdr.digest; - v->count = cpu_to_be32(count); + if (bigEndian) + v->count = cpu_to_be32(count); + else + v->count = count; return dest - (void*)le->hdr.digest; } @@ -374,13 +383,13 @@ tpm12_build_digest(struct tpm_log_entry *le, const u8 *sha1) } static int -tpm_build_digest(struct tpm_log_entry *le, const u8 *sha1) +tpm_build_digest(struct tpm_log_entry *le, const u8 *sha1, int bigEndian) { switch (TPM_version) { case TPM_VERSION_1_2: return tpm12_build_digest(le, sha1); case TPM_VERSION_2: - return tpm20_build_digest(le, sha1); + return tpm20_build_digest(le, sha1, bigEndian); } return -1; } @@ -709,7 +718,7 @@ tpm_add_measurement_to_log(u32 pcrindex, u32 event_type, .hdr.pcrindex = pcrindex, .hdr.eventtype = event_type, }; - int digest_len = tpm_build_digest(&le, hash); + int digest_len = tpm_build_digest(&le, hash, 1); if (digest_len < 0) return; int ret = tpm_extend(&le, digest_len); @@ -717,6 +726,7 @@ tpm_add_measurement_to_log(u32 pcrindex, u32 event_type, tpm_set_failure(); return; } + tpm_build_digest(&le, hash, 0); tpm_log_event(&le.hdr, digest_len, event, event_length); } @@ -1249,7 +1259,7 @@ hash_log_extend(struct pcpes *pcpes, const void *hashdata, u32 hashdata_length .hdr.pcrindex = pcpes->pcrindex, .hdr.eventtype = pcpes->eventtype, }; - int digest_len = tpm_build_digest(&le, pcpes->digest); + int digest_len = tpm_build_digest(&le, pcpes->digest, 1); if (digest_len < 0) return TCG_GENERAL_ERROR; if (extend) { @@ -1257,6 +1267,7 @@ hash_log_extend(struct pcpes *pcpes, const void *hashdata, u32 hashdata_length if (ret) return TCG_TCG_COMMAND_ERROR; } + tpm_build_digest(&le, pcpes->digest, 0); int ret = tpm_log_event(&le.hdr, digest_len , pcpes->event, pcpes->eventdatasize); if (ret) -- 2.5.5

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[PATCH 0/6] Misc tpm updates
by Kevin O'Connor Dec. 2, 2016

Dec. 2, 2016

Hi Stefan, I dusted off some TPM patches I had worked on earlier in the year. Mostly just code movement, but the last patch I think helps simplify tpm_build_and_send_cmd(). Do they look okay to you? -Kevin Kevin O'Connor (6): tpm: Add comment banners to tcg.c separating major parts of spec tpm: Don't call tpm_set_failure() from tpm12_get_capability() tpm: Move code around in tcgbios.c to keep like code together acpi: Generalize find_fadt() and find_tcpa_by_rsdp() into find_acpi_table() tpm: Don't call tpm_build_and_send_cmd() from tpm20_stirrandom() tpm: Rework tpm_build_and_send_cmd() into tpm_simple_cmd() src/fw/biostables.c | 18 +- src/std/acpi.h | 7 - src/std/tcg.h | 199 +++++++++-------- src/tcgbios.c | 611 ++++++++++++++++++++++------------------------------ src/util.h | 1 + 5 files changed, 369 insertions(+), 467 deletions(-) -- 2.5.5

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