February 2009 - OpenBIOS - mail.coreboot.org

[RFC PATCH] ppc correctly replace &device; and &partition;
by Stefan Assmann Feb. 3, 2009

Feb. 3, 2009

Subject: ppc correctly replace &device; and &partition; This patch correctly replaces the variables &device; and &partition; with firmware values thus allowing to boot from different partitions. Signed-off-by: Stefan Assmann <sassmann(a)suse.de> Index: arch/ppc/qemu/main.c =================================================================== --- arch/ppc/qemu/main.c (revision 439) +++ arch/ppc/qemu/main.c (working copy) @@ -154,9 +154,9 @@ static void try_bootinfo(const char *path) { - int fd; - char tagbuf[256], bootscript[256], c, *left, *right; - int len, tag, taglen, script, scriptlen; + int fd, len, tag, taglen, script, scriptlen; + char tagbuf[256], bootscript[256], c; + char *buf, *partition; snprintf(bootscript, sizeof(bootscript), "%s,ppc\\bootinfo.txt", path); ELF_DPRINTF("Trying %s\n", bootscript); @@ -195,22 +195,33 @@ bootscript[scriptlen++] = c; } } while (1); - ELF_DPRINTF("got bootscript %s\n", bootscript); - // Replace &device;: with original path - push_str(bootscript); - PUSH('&'); - fword("left-split"); - fword("2swap"); - PUSH(':'); - fword("left-split"); - fword("2drop"); - right = pop_fstr_copy(); - left = pop_fstr_copy(); - while (right[0] != '\\' && right[0] != '\0') - right++; - snprintf(bootscript, sizeof(bootscript), "%s%s,%s", left, path, right); + /* replace &device; and &partition; */ + if ( (buf = strstr(bootscript, (const char *) "&device;")) != NULL ) { + buf[0] = '\0'; + buf += strlen("&device;"); + snprintf(bootscript, sizeof(bootscript), "%s%s%s", bootscript, path, buf); + } + if ( (partition = strchr(path, ':')) != NULL ) { + *partition = '\0'; + partition++; + if ( (buf = strstr(bootscript, (const char *) "&partition;")) != NULL ) { + *buf = '\0'; + buf += strlen("&partition;"); + snprintf(bootscript, sizeof(bootscript), "%s%s%s", bootscript, partition, buf); + } else { + /* FIXME: allow booting of SUSE media with following layout (fails without this workaround) + * Number Start End Size File system Name Flags + * 1 512B 1535B 1024B Apple , , , , , , , , , , , , type=Apple_partition_map + * 2 8192B 4126MB 4126MB SU1110.001 , , , , , , , , , , , , type=Apple_HFS + */ + if ( (buf = strstr(bootscript, (const char *) "1,\\suseboot\\yaboot.ibm")) != NULL ) { + *buf = *partition; + ELF_DPRINTF("SUSE bootscript hack %s\n", bootscript); + } + } + } ELF_DPRINTF("fixed bootscript %s\n", bootscript); feval(bootscript); Stefan -- Stefan Assmann | SUSE LINUX Products GmbH Software Engineer | Maxfeldstr. 5, D-90409 Nuernberg Mail: sassmann(a)suse.de | GF: Markus Rex, HRB 16746 (AG Nuernberg)

2 2

r440 - openbios-devel/modules
by svn＠openbios.org Feb. 3, 2009

Feb. 3, 2009

Author: laurent Date: 2009-02-03 21:33:37 +0100 (Tue, 03 Feb 2009) New Revision: 440 Modified: openbios-devel/modules/mac-parts.c Log: mac-parts: block-size returns value found in partition map Modified: openbios-devel/modules/mac-parts.c =================================================================== --- openbios-devel/modules/mac-parts.c 2009-02-02 17:40:29 UTC (rev 439) +++ openbios-devel/modules/mac-parts.c 2009-02-03 20:33:37 UTC (rev 440) @@ -29,6 +29,7 @@ typedef struct { ullong offs; ullong size; + uint blocksize; } macparts_info_t; DECLARE_NODE( macparts, INSTALL_OPEN, sizeof(macparts_info_t), "+/packages/mac-parts" ); @@ -90,6 +91,7 @@ if( par.pmSig != 0x504d /* 'PM' */ || !par.pmPartBlkCnt ) RET(0); + di->blocksize =(uint)bs; di->offs = (llong)par.pmPyPartStart * bs; di->size = (llong)par.pmPartBlkCnt * bs; @@ -119,9 +121,10 @@ } static void -macparts_block_size( __attribute__((unused))macparts_info_t *di ) +macparts_block_size( macparts_info_t *di ) { - PUSH(512); + DPRINTF("macparts_block_size = %x\n", di->blocksize); + PUSH(di->blocksize); } static void

1 0

r439 - in openbios-devel: drivers include/openbios
by svn＠openbios.org Feb. 2, 2009

Feb. 2, 2009

Author: blueswirl Date: 2009-02-02 18:40:29 +0100 (Mon, 02 Feb 2009) New Revision: 439 Modified: openbios-devel/drivers/pci.c openbios-devel/drivers/pci_database.c openbios-devel/include/openbios/pci.h Log: Add #defines for PCI classes and subclasses Modified: openbios-devel/drivers/pci.c =================================================================== --- openbios-devel/drivers/pci.c 2009-02-02 17:06:37 UTC (rev 438) +++ openbios-devel/drivers/pci.c 2009-02-02 17:40:29 UTC (rev 439) @@ -734,7 +734,9 @@ ob_pci_configure(addr, &config, mem_base, io_base); ob_pci_add_properties(addr, pci_dev, &config); - if (ccode == 0x0600 || ccode == 0x0604) { + if (class == PCI_BASE_CLASS_BRIDGE && + (subclass == PCI_SUBCLASS_BRIDGE_HOST || + subclass == PCI_SUBCLASS_BRIDGE_PCI)) { /* host or bridge */ free(*path); *path = strdup(config.path); Modified: openbios-devel/drivers/pci_database.c =================================================================== --- openbios-devel/drivers/pci_database.c 2009-02-02 17:06:37 UTC (rev 438) +++ openbios-devel/drivers/pci_database.c 2009-02-02 17:40:29 UTC (rev 439) @@ -63,35 +63,43 @@ static const pci_subclass_t mass_subclass[] = { { - 0x00, "SCSI bus controller", NULL, NULL, NULL, + PCI_SUBCLASS_STORAGE_SCSI, "SCSI bus controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x01, "IDE controller", "ide", ide_devices, NULL, + PCI_SUBCLASS_STORAGE_IDE, "IDE controller", + "ide", ide_devices, NULL, NULL, NULL, }, { - 0x02, "Floppy disk controller", NULL, NULL, NULL, + PCI_SUBCLASS_STORAGE_FLOPPY, "Floppy disk controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x03, "IPI bus controller", NULL, NULL, NULL, + PCI_SUBCLASS_STORAGE_IPI, "IPI bus controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x04, "RAID controller", NULL, NULL, NULL, + PCI_SUBCLASS_STORAGE_RAID, "RAID controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x05, "ATA controller", "ata", NULL, NULL, + PCI_SUBCLASS_STORAGE_ATA, "ATA controller", + "ata", NULL, NULL, NULL, NULL, }, { - 0x80, "misc mass-storage controller", NULL, NULL, NULL, + PCI_SUBCLASS_STORAGE_OTHER, "misc mass-storage controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; @@ -113,39 +121,48 @@ static const pci_subclass_t net_subclass[] = { { - 0x00, "ethernet controller", NULL, eth_devices, NULL, + PCI_SUBCLASS_NETWORK_ETHERNET, "ethernet controller", + NULL, eth_devices, NULL, eth_config_cb, "ethernet", }, { - 0x01, "token ring controller", NULL, NULL, NULL, + PCI_SUBCLASS_NETWORK_TOKEN_RING, "token ring controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "FDDI controller", NULL, NULL, NULL, + PCI_SUBCLASS_NETWORK_FDDI, "FDDI controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x03, "ATM controller", NULL, NULL, NULL, + PCI_SUBCLASS_NETWORK_ATM, "ATM controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x04, "ISDN controller", NULL, NULL, NULL, + PCI_SUBCLASS_NETWORK_ISDN, "ISDN controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x05, "WordFip controller", NULL, NULL, NULL, + PCI_SUBCLASS_NETWORK_WORDFIP, "WordFip controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x06, "PICMG 2.14 controller", NULL, NULL, NULL, + PCI_SUBCLASS_NETWORK_PICMG214, "PICMG 2.14 controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc network controller", NULL, NULL, NULL, + PCI_SUBCLASS_NETWORK_OTHER, "misc network controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; @@ -188,61 +205,74 @@ static const pci_subclass_t displ_subclass[] = { { - 0x00, "display controller", NULL, NULL, vga_iface, + PCI_SUBCLASS_DISPLAY_VGA, "display controller", + NULL, NULL, vga_iface, NULL, NULL, }, { - 0x01, "XGA display controller", NULL, NULL, NULL, + PCI_SUBCLASS_DISPLAY_XGA, "XGA display controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "3D display controller", NULL, NULL, NULL, + PCI_SUBCLASS_DISPLAY_3D, "3D display controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc display controller", NULL, NULL, NULL, + PCI_SUBCLASS_DISPLAY_OTHER, "misc display controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t media_subclass[] = { { - 0x00, "video device", NULL, NULL, NULL, + PCI_SUBCLASS_MULTIMEDIA_VIDEO, "video device", + NULL, NULL, NULL, NULL, NULL, }, { - 0x01, "audio device", NULL, NULL, NULL, + PCI_SUBCLASS_MULTIMEDIA_AUDIO, "audio device", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "computer telephony device", NULL, NULL, NULL, + PCI_SUBCLASS_MULTIMEDIA_PHONE, "computer telephony device", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc multimedia device", NULL, NULL, NULL, + PCI_SUBCLASS_MULTIMEDIA_OTHER, "misc multimedia device", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t mem_subclass[] = { { - 0x00, "RAM controller", NULL, NULL, NULL, + PCI_SUBCLASS_MEMORY_RAM, "RAM controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x01, "flash controller", NULL, NULL, NULL, + PCI_SUBCLASS_MEMORY_FLASH, "flash controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; @@ -331,55 +361,68 @@ static const pci_subclass_t bridg_subclass[] = { { - 0x00, "PCI host bridge", NULL, hbrg_devices, NULL, + PCI_SUBCLASS_BRIDGE_HOST, "PCI host bridge", + NULL, hbrg_devices, NULL, NULL, NULL, }, { - 0x01, "ISA bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_ISA, "ISA bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "EISA bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_EISA, "EISA bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x03, "MCA bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_MC, "MCA bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x04, "PCI-to-PCI bridge", NULL, PCIbrg_devices, NULL, + PCI_SUBCLASS_BRIDGE_PCI, "PCI-to-PCI bridge", + NULL, PCIbrg_devices, NULL, NULL, NULL, }, { - 0x05, "PCMCIA bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_PCMCIA, "PCMCIA bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x06, "NUBUS bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_NUBUS, "NUBUS bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x07, "cardbus bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_CARDBUS, "cardbus bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x08, "raceway bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_RACEWAY, "raceway bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x09, "semi-transparent PCI-to-PCI bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_PCI_SEMITP, "semi-transparent PCI-to-PCI bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x0A, "infiniband-to-PCI bridge", NULL, NULL, NULL, + PCI_SUBCLASS_BRIDGE_IB_PCI, "infiniband-to-PCI bridge", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc PCI bridge", NULL, miscbrg_devices, NULL, + PCI_SUBCLASS_BRIDGE_OTHER, "misc PCI bridge", + NULL, miscbrg_devices, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; @@ -475,35 +518,43 @@ static const pci_subclass_t comm_subclass[] = { { - 0x00, "serial controller", NULL, NULL, serial_iface, + PCI_SUBCLASS_COMMUNICATION_SERIAL, "serial controller", + NULL, NULL, serial_iface, NULL, NULL, }, { - 0x01, "parallel port", NULL, NULL, par_iface, + PCI_SUBCLASS_COMMUNICATION_PARALLEL, "parallel port", + NULL, NULL, par_iface, NULL, NULL, }, { - 0x02, "multiport serial controller", NULL, NULL, NULL, + PCI_SUBCLASS_COMMUNICATION_MULTISERIAL, "multiport serial controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x03, "modem", NULL, NULL, modem_iface, + PCI_SUBCLASS_COMMUNICATION_MODEM, "modem", + NULL, NULL, modem_iface, NULL, NULL, }, { - 0x04, "GPIB controller", NULL, NULL, NULL, + PCI_SUBCLASS_COMMUNICATION_GPIB, "GPIB controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x05, "smart card", NULL, NULL, NULL, + PCI_SUBCLASS_COMMUNICATION_SC, "smart card", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc communication device", NULL, NULL, NULL, + PCI_SUBCLASS_COMMUNICATION_OTHER, "misc communication device", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; @@ -613,112 +664,137 @@ static const pci_subclass_t sys_subclass[] = { { - 0x00, "PIC", NULL, NULL, pic_iface, + PCI_SUBCLASS_SYSTEM_PIC, "PIC", + NULL, NULL, pic_iface, NULL, NULL, }, { - 0x01, "DMA controller", NULL, NULL, dma_iface, + PCI_SUBCLASS_SYSTEM_DMA, "DMA controller", + NULL, NULL, dma_iface, NULL, NULL, }, { - 0x02, "system timer", NULL, NULL, tmr_iface, + PCI_SUBCLASS_SYSTEM_TIMER, "system timer", + NULL, NULL, tmr_iface, NULL, NULL, }, { - 0x03, "RTC controller", NULL, NULL, rtc_iface, + PCI_SUBCLASS_SYSTEM_RTC, "RTC controller", + NULL, NULL, rtc_iface, NULL, NULL, }, { - 0x04, "PCI hotplug controller", NULL, NULL, NULL, + PCI_SUBCLASS_SYSTEM_PCI_HOTPLUG, "PCI hotplug controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc system peripheral", NULL, sys_devices, NULL, + PCI_SUBCLASS_SYSTEM_OTHER, "misc system peripheral", + NULL, sys_devices, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t inp_subclass[] = { { - 0x00, "keyboard controller", NULL, NULL, NULL, + PCI_SUBCLASS_INPUT_KEYBOARD, "keyboard controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x01, "digitizer", NULL, NULL, NULL, + PCI_SUBCLASS_INPUT_PEN, "digitizer", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "mouse controller", NULL, NULL, NULL, + PCI_SUBCLASS_INPUT_MOUSE, "mouse controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x03, "scanner controller", NULL, NULL, NULL, + PCI_SUBCLASS_INPUT_SCANNER, "scanner controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x04, "gameport controller", NULL, NULL, NULL, + PCI_SUBCLASS_INPUT_GAMEPORT, "gameport controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc input device", NULL, NULL, NULL, + PCI_SUBCLASS_INPUT_OTHER, "misc input device", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t dock_subclass[] = { { - 0x00, "generic docking station", NULL, NULL, NULL, + PCI_SUBCLASS_DOCKING_GENERIC, "generic docking station", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc docking station", NULL, NULL, NULL, + PCI_SUBCLASS_DOCKING_OTHER, "misc docking station", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t cpu_subclass[] = { { - 0x00, "i386 processor", NULL, NULL, NULL, + PCI_SUBCLASS_PROCESSOR_386, "i386 processor", + NULL, NULL, NULL, NULL, NULL, }, { - 0x01, "i486 processor", NULL, NULL, NULL, + PCI_SUBCLASS_PROCESSOR_486, "i486 processor", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "pentium processor", NULL, NULL, NULL, + PCI_SUBCLASS_PROCESSOR_PENTIUM, "pentium processor", + NULL, NULL, NULL, NULL, NULL, }, { - 0x10, "alpha processor", NULL, NULL, NULL, + PCI_SUBCLASS_PROCESSOR_ALPHA, "alpha processor", + NULL, NULL, NULL, NULL, NULL, }, { - 0x20, "PowerPC processor", NULL, NULL, NULL, + PCI_SUBCLASS_PROCESSOR_POWERPC, "PowerPC processor", + NULL, NULL, NULL, NULL, NULL, }, { - 0x30, "MIPS processor", NULL, NULL, NULL, + PCI_SUBCLASS_PROCESSOR_MIPS, "MIPS processor", + NULL, NULL, NULL, NULL, NULL, }, { - 0x40, "co-processor", NULL, NULL, NULL, + PCI_SUBCLASS_PROCESSOR_CO, "co-processor", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; @@ -771,147 +847,181 @@ static const pci_subclass_t ser_subclass[] = { { - 0x00, "Firewire bus controller", "ieee1394", NULL, NULL, + PCI_SUBCLASS_SERIAL_FIREWIRE, "Firewire bus controller", + "ieee1394", NULL, NULL, NULL, NULL, }, { - 0x01, "ACCESS bus controller", NULL, NULL, NULL, + PCI_SUBCLASS_SERIAL_ACCESS, "ACCESS bus controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "SSA controller", NULL, NULL, NULL, + PCI_SUBCLASS_SERIAL_SSA, "SSA controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x03, "USB controller", "usb", NULL, usb_iface, + PCI_SUBCLASS_SERIAL_USB, "USB controller", + "usb", NULL, usb_iface, NULL, NULL, }, { - 0x04, "fibre channel controller", NULL, NULL, NULL, + PCI_SUBCLASS_SERIAL_FIBER, "fibre channel controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x05, "SMBus controller", NULL, NULL, NULL, + PCI_SUBCLASS_SERIAL_SMBUS, "SMBus controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x06, "InfiniBand controller", NULL, NULL, NULL, + PCI_SUBCLASS_SERIAL_IB, "InfiniBand controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x07, "IPMI interface", NULL, NULL, ipmi_iface, + PCI_SUBCLASS_SERIAL_IPMI, "IPMI interface", + NULL, NULL, ipmi_iface, NULL, NULL, }, { - 0x08, "SERCOS controller", NULL, NULL, ipmi_iface, + PCI_SUBCLASS_SERIAL_SERCOS, "SERCOS controller", + NULL, NULL, ipmi_iface, NULL, NULL, }, { - 0x09, "CANbus controller", NULL, NULL, ipmi_iface, + PCI_SUBCLASS_SERIAL_CANBUS, "CANbus controller", + NULL, NULL, ipmi_iface, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t wrl_subclass[] = { { - 0x00, "IRDA controller", NULL, NULL, NULL, + PCI_SUBCLASS_WIRELESS_IRDA, "IRDA controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x01, "consumer IR controller", NULL, NULL, NULL, + PCI_SUBCLASS_WIRELESS_CIR, "consumer IR controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x10, "RF controller", NULL, NULL, NULL, + PCI_SUBCLASS_WIRELESS_RF_CONTROLLER, "RF controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x11, "bluetooth controller", NULL, NULL, NULL, + PCI_SUBCLASS_WIRELESS_BLUETOOTH, "bluetooth controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x12, "broadband controller", NULL, NULL, NULL, + PCI_SUBCLASS_WIRELESS_BROADBAND, "broadband controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc wireless controller", NULL, NULL, NULL, + PCI_SUBCLASS_WIRELESS_OTHER, "misc wireless controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t sat_subclass[] = { { - 0x01, "satellite TV controller", NULL, NULL, NULL, + PCI_SUBCLASS_SATELLITE_TV, "satellite TV controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x02, "satellite audio controller", NULL, NULL, NULL, + PCI_SUBCLASS_SATELLITE_AUDIO, "satellite audio controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x03, "satellite voice controller", NULL, NULL, NULL, + PCI_SUBCLASS_SATELLITE_VOICE, "satellite voice controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x04, "satellite data controller", NULL, NULL, NULL, + PCI_SUBCLASS_SATELLITE_DATA, "satellite data controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t crypt_subclass[] = { { - 0x00, "cryptographic network controller", NULL, NULL, NULL, + PCI_SUBCLASS_CRYPT_NETWORK, "cryptographic network controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x10, "cryptographic entertainment controller", NULL, NULL, NULL, + PCI_SUBCLASS_CRYPT_ENTERTAINMENT, + "cryptographic entertainment controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc cryptographic controller", NULL, NULL, NULL, + PCI_SUBCLASS_CRYPT_OTHER, "misc cryptographic controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; static const pci_subclass_t spc_subclass[] = { { - 0x00, "DPIO module", NULL, NULL, NULL, + PCI_SUBCLASS_SP_DPIO, "DPIO module", + NULL, NULL, NULL, NULL, NULL, }, { - 0x01, "performances counters", NULL, NULL, NULL, + PCI_SUBCLASS_SP_PERF, "performances counters", + NULL, NULL, NULL, NULL, NULL, }, { - 0x10, "communication synchronisation", NULL, NULL, NULL, + PCI_SUBCLASS_SP_SYNCH, "communication synchronisation", + NULL, NULL, NULL, NULL, NULL, }, { - 0x20, "management card", NULL, NULL, NULL, + PCI_SUBCLASS_SP_MANAGEMENT, "management card", + NULL, NULL, NULL, NULL, NULL, }, { - 0x80, "misc signal processing controller", NULL, NULL, NULL, + PCI_SUBCLASS_SP_OTHER, "misc signal processing controller", + NULL, NULL, NULL, NULL, NULL, }, { - 0xFF, NULL, NULL, NULL, NULL, + 0xFF, NULL, + NULL, NULL, NULL, NULL, NULL, }, }; Modified: openbios-devel/include/openbios/pci.h =================================================================== --- openbios-devel/include/openbios/pci.h 2009-02-02 17:06:37 UTC (rev 438) +++ openbios-devel/include/openbios/pci.h 2009-02-02 17:40:29 UTC (rev 439) @@ -24,6 +24,138 @@ extern const pci_arch_t *arch; +/* Device classes and subclasses */ + +#define PCI_BASE_CLASS_STORAGE 0x01 +#define PCI_SUBCLASS_STORAGE_SCSI 0x00 +#define PCI_SUBCLASS_STORAGE_IDE 0x01 +#define PCI_SUBCLASS_STORAGE_FLOPPY 0x02 +#define PCI_SUBCLASS_STORAGE_IPI 0x03 +#define PCI_SUBCLASS_STORAGE_RAID 0x04 +#define PCI_SUBCLASS_STORAGE_ATA 0x05 +#define PCI_SUBCLASS_STORAGE_SAS 0x07 +#define PCI_SUBCLASS_STORAGE_OTHER 0x80 + +#define PCI_BASE_CLASS_NETWORK 0x02 +#define PCI_SUBCLASS_NETWORK_ETHERNET 0x00 +#define PCI_SUBCLASS_NETWORK_TOKEN_RING 0x01 +#define PCI_SUBCLASS_NETWORK_FDDI 0x02 +#define PCI_SUBCLASS_NETWORK_ATM 0x03 +#define PCI_SUBCLASS_NETWORK_ISDN 0x04 +#define PCI_SUBCLASS_NETWORK_WORDFIP 0x05 +#define PCI_SUBCLASS_NETWORK_PICMG214 0x06 +#define PCI_SUBCLASS_NETWORK_OTHER 0x80 + +#define PCI_BASE_CLASS_DISPLAY 0x03 +#define PCI_SUBCLASS_DISPLAY_VGA 0x00 +#define PCI_SUBCLASS_DISPLAY_XGA 0x01 +#define PCI_SUBCLASS_DISPLAY_3D 0x02 +#define PCI_SUBCLASS_DISPLAY_OTHER 0x80 + +#define PCI_BASE_CLASS_MULTIMEDIA 0x04 +#define PCI_SUBCLASS_MULTIMEDIA_VIDEO 0x00 +#define PCI_SUBCLASS_MULTIMEDIA_AUDIO 0x01 +#define PCI_SUBCLASS_MULTIMEDIA_PHONE 0x02 +#define PCI_SUBCLASS_MULTIMEDIA_OTHER 0x80 + +#define PCI_BASE_CLASS_MEMORY 0x05 +#define PCI_SUBCLASS_MEMORY_RAM 0x00 +#define PCI_SUBCLASS_MEMORY_FLASH 0x01 + +#define PCI_BASE_CLASS_BRIDGE 0x06 +#define PCI_SUBCLASS_BRIDGE_HOST 0x00 +#define PCI_SUBCLASS_BRIDGE_ISA 0x01 +#define PCI_SUBCLASS_BRIDGE_EISA 0x02 +#define PCI_SUBCLASS_BRIDGE_MC 0x03 +#define PCI_SUBCLASS_BRIDGE_PCI 0x04 +#define PCI_SUBCLASS_BRIDGE_PCMCIA 0x05 +#define PCI_SUBCLASS_BRIDGE_NUBUS 0x06 +#define PCI_SUBCLASS_BRIDGE_CARDBUS 0x07 +#define PCI_SUBCLASS_BRIDGE_RACEWAY 0x08 +#define PCI_SUBCLASS_BRIDGE_PCI_SEMITP 0x09 +#define PCI_SUBCLASS_BRIDGE_IB_PCI 0x0a +#define PCI_SUBCLASS_BRIDGE_OTHER 0x80 + +#define PCI_BASE_CLASS_COMMUNICATION 0x07 +#define PCI_SUBCLASS_COMMUNICATION_SERIAL 0x00 +#define PCI_SUBCLASS_COMMUNICATION_PARALLEL 0x01 +#define PCI_SUBCLASS_COMMUNICATION_MULTISERIAL 0x02 +#define PCI_SUBCLASS_COMMUNICATION_MODEM 0x03 +#define PCI_SUBCLASS_COMMUNICATION_GPIB 0x04 +#define PCI_SUBCLASS_COMMUNICATION_SC 0x05 +#define PCI_SUBCLASS_COMMUNICATION_OTHER 0x80 + +#define PCI_BASE_CLASS_SYSTEM 0x08 +#define PCI_SUBCLASS_SYSTEM_PIC 0x00 +#define PCI_SUBCLASS_SYSTEM_DMA 0x01 +#define PCI_SUBCLASS_SYSTEM_TIMER 0x02 +#define PCI_SUBCLASS_SYSTEM_RTC 0x03 +#define PCI_SUBCLASS_SYSTEM_PCI_HOTPLUG 0x04 +#define PCI_SUBCLASS_SYSTEM_OTHER 0x80 + +#define PCI_BASE_CLASS_INPUT 0x09 +#define PCI_SUBCLASS_INPUT_KEYBOARD 0x00 +#define PCI_SUBCLASS_INPUT_PEN 0x01 +#define PCI_SUBCLASS_INPUT_MOUSE 0x02 +#define PCI_SUBCLASS_INPUT_SCANNER 0x03 +#define PCI_SUBCLASS_INPUT_GAMEPORT 0x04 +#define PCI_SUBCLASS_INPUT_OTHER 0x80 + +#define PCI_BASE_CLASS_DOCKING 0x0a +#define PCI_SUBCLASS_DOCKING_GENERIC 0x00 +#define PCI_SUBCLASS_DOCKING_OTHER 0x80 + +#define PCI_BASE_CLASS_PROCESSOR 0x0b +#define PCI_SUBCLASS_PROCESSOR_386 0x00 +#define PCI_SUBCLASS_PROCESSOR_486 0x01 +#define PCI_SUBCLASS_PROCESSOR_PENTIUM 0x02 +#define PCI_SUBCLASS_PROCESSOR_ALPHA 0x10 +#define PCI_SUBCLASS_PROCESSOR_POWERPC 0x20 +#define PCI_SUBCLASS_PROCESSOR_MIPS 0x30 +#define PCI_SUBCLASS_PROCESSOR_CO 0x40 + +#define PCI_BASE_CLASS_SERIAL 0x0c +#define PCI_SUBCLASS_SERIAL_FIREWIRE 0x00 +#define PCI_SUBCLASS_SERIAL_ACCESS 0x01 +#define PCI_SUBCLASS_SERIAL_SSA 0x02 +#define PCI_SUBCLASS_SERIAL_USB 0x03 +#define PCI_SUBCLASS_SERIAL_FIBER 0x04 +#define PCI_SUBCLASS_SERIAL_SMBUS 0x05 +#define PCI_SUBCLASS_SERIAL_IB 0x06 +#define PCI_SUBCLASS_SERIAL_IPMI 0x07 +#define PCI_SUBCLASS_SERIAL_SERCOS 0x08 +#define PCI_SUBCLASS_SERIAL_CANBUS 0x09 + +#define PCI_BASE_CLASS_WIRELESS 0x0d +#define PCI_SUBCLASS_WIRELESS_IRDA 0x00 +#define PCI_SUBCLASS_WIRELESS_CIR 0x01 +#define PCI_SUBCLASS_WIRELESS_RF_CONTROLLER 0x10 +#define PCI_SUBCLASS_WIRELESS_BLUETOOTH 0x11 +#define PCI_SUBCLASS_WIRELESS_BROADBAND 0x12 +#define PCI_SUBCLASS_WIRELESS_OTHER 0x80 + +#define PCI_BASE_CLASS_SATELLITE 0x0f +#define PCI_SUBCLASS_SATELLITE_TV 0x00 +#define PCI_SUBCLASS_SATELLITE_AUDIO 0x01 +#define PCI_SUBCLASS_SATELLITE_VOICE 0x03 +#define PCI_SUBCLASS_SATELLITE_DATA 0x04 + +#define PCI_BASE_CLASS_CRYPT 0x10 +#define PCI_SUBCLASS_CRYPT_NETWORK 0x00 +#define PCI_SUBCLASS_CRYPT_ENTERTAINMENT 0x01 +#define PCI_SUBCLASS_CRYPT_OTHER 0x80 + +#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 +#define PCI_SUBCLASS_SP_DPIO 0x00 +#define PCI_SUBCLASS_SP_PERF 0x01 +#define PCI_SUBCLASS_SP_SYNCH 0x10 +#define PCI_SUBCLASS_SP_MANAGEMENT 0x20 +#define PCI_SUBCLASS_SP_OTHER 0x80 + +#define PCI_CLASS_OTHERS 0xff + +/* Vendors and devices. */ + #define PCI_VENDOR_ID_ATI 0x1002 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046

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r438 - openbios-devel/arch/x86
by svn＠openbios.org Feb. 2, 2009

Feb. 2, 2009

Author: blueswirl Date: 2009-02-02 18:06:37 +0100 (Mon, 02 Feb 2009) New Revision: 438 Modified: openbios-devel/arch/x86/openbios.c Log: Fix x86 PCI initialization Modified: openbios-devel/arch/x86/openbios.c =================================================================== --- openbios-devel/arch/x86/openbios.c 2009-02-01 11:25:16 UTC (rev 437) +++ openbios-devel/arch/x86/openbios.c 2009-02-02 17:06:37 UTC (rev 438) @@ -13,6 +13,7 @@ #include "openbios/kernel.h" #include "openbios/stack.h" #include "openbios/drivers.h" +#include "openbios/pci.h" #include "sys_info.h" #include "openbios.h" #include "relocate.h" @@ -21,6 +22,15 @@ static unsigned char intdict[256 * 1024]; +#ifdef CONFIG_DRIVER_PCI +static const pci_arch_t default_pci_host = { + .name = "Intel,i440FX", + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82441, + .io_base = 0x1000, +}; +#endif + static void init_memory(void) { /* push start and end of available memory to the stack @@ -41,6 +51,7 @@ modules_init(); #ifdef CONFIG_DRIVER_PCI + arch = &default_pci_host; ob_pci_init(); #endif #ifdef CONFIG_DRIVER_IDE

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Re: [OpenBIOS] Fix boot-script parsing for openSUSE ppc media
by laurent＠vivier.eu Feb. 2, 2009

Feb. 2, 2009

>> Fix boot-script parsing for openSUSE ppc media > >applied, thanks I've applied it, as it breaks nothing and allows to use Suse, but a better fix should be: - correctly parse the script to replace &device; by the boot device ("cd:", and not "cd:0", which is "&bootdevice;:&partition;") - correctly manage CD partition to be able to use ":1" instead of ":0" (in fact, for the moment, we use mac partition on CD and ":0" to use the entire disk). Regards, Laurent

3 2

r437 - in openbios-devel: arch/ppc/qemu arch/sparc64 drivers include/openbios
by svn＠openbios.org Feb. 1, 2009

Feb. 1, 2009

Author: blueswirl Date: 2009-02-01 12:25:16 +0100 (Sun, 01 Feb 2009) New Revision: 437 Modified: openbios-devel/arch/ppc/qemu/init.c openbios-devel/arch/sparc64/openbios.c openbios-devel/drivers/pci_database.c openbios-devel/include/openbios/pci.h Log: Add #defines for PCI vendor and device IDs for all devices, taken from Linux and pciids.sourceforge.net. Also fix a confusion between Sabre and Simba device IDs. Modified: openbios-devel/arch/ppc/qemu/init.c =================================================================== --- openbios-devel/arch/ppc/qemu/init.c 2009-01-31 16:42:01 UTC (rev 436) +++ openbios-devel/arch/ppc/qemu/init.c 2009-02-01 11:25:16 UTC (rev 437) @@ -75,17 +75,23 @@ } static const pci_arch_t known_arch[] = { - [ARCH_PREP] = { "PREP", 0x1057, 0x4801, 0x80800000, 0x800c0000, + [ARCH_PREP] = { "PREP", PCI_VENDOR_ID_MOTOROLA, + PCI_DEVICE_ID_MOTOROLA_RAVEN, + 0x80800000, 0x800c0000, 0x80000000, 0x00100000, 0xf0000000, 0x10000000, 0x80000000, 0x00010000, 0x00000000, 0x00400000, { 9, 11, 9, 11 } }, - [ARCH_MAC99] = { "MAC99", 0x106b, 0x001F, 0xf2800000, 0xf2c00000, + [ARCH_MAC99] = { "MAC99", PCI_VENDOR_ID_APPLE, + PCI_DEVICE_ID_APPLE_UNI_N_PCI, + 0xf2800000, 0xf2c00000, 0xf2000000, 0x02000000, 0x80000000, 0x10000000, 0xf2000000, 0x00800000, 0x00000000, 0x01000000, { 8, 9, 10, 11 } }, - [ARCH_HEATHROW] = { "HEATHROW", 0x1057, 0x0002, 0xfec00000, 0xfee00000, + [ARCH_HEATHROW] = { "HEATHROW", PCI_VENDOR_ID_MOTOROLA, + PCI_DEVICE_ID_MOTOROLA_MPC106, + 0xfec00000, 0xfee00000, 0x80000000, 0x7f000000, 0x80000000, 0x01000000, 0xfe000000, 0x00800000, 0xfd000000, 0x01000000, { 21, 22, 23, 24 } Modified: openbios-devel/arch/sparc64/openbios.c =================================================================== --- openbios-devel/arch/sparc64/openbios.c 2009-01-31 16:42:01 UTC (rev 436) +++ openbios-devel/arch/sparc64/openbios.c 2009-02-01 11:25:16 UTC (rev 437) @@ -61,8 +61,8 @@ { .pci = { .name = "SUNW,sabre", - .vendor_id = 0x108e, - .device_id = 0x5000, + .vendor_id = PCI_VENDOR_ID_SUN, + .device_id = PCI_DEVICE_ID_SUN_SABRE, .cfg_addr = APB_SPECIAL_BASE + 0x1000000ULL, .cfg_data = APB_MEM_BASE, .cfg_base = 0x80000000ULL, Modified: openbios-devel/drivers/pci_database.c =================================================================== --- openbios-devel/drivers/pci_database.c 2009-01-31 16:42:01 UTC (rev 436) +++ openbios-devel/drivers/pci_database.c 2009-02-01 11:25:16 UTC (rev 437) @@ -1,5 +1,6 @@ #include "openbios/config.h" #include "openbios/bindings.h" +#include "openbios/pci.h" #include "libc/vsprintf.h" #include "pci_database.h" @@ -46,7 +47,7 @@ static const pci_dev_t ide_devices[] = { { - 0x1095, 0x0646, /* CMD646 IDE controller */ + PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_646, /* CMD646 IDE controller */ "pci-ide", "pci-ata", NULL, "pci1095,646\0pci1095,646\0pciclass,01018f\0", 0, 0, 0, @@ -96,10 +97,11 @@ }; static const pci_dev_t eth_devices[] = { - { 0x10EC, 0x8029, - NULL, "NE2000", "NE2000 PCI", NULL, - 0, 0, 0, - NULL, "ethernet", + { + PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_RTL8029, + NULL, "NE2000", "NE2000 PCI", NULL, + 0, 0, 0, + NULL, "ethernet", }, { 0xFFFF, 0xFFFF, @@ -150,13 +152,13 @@ static const pci_dev_t vga_devices[] = { { - 0x1002, 0x5046, + PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PF, NULL, "ATY", "ATY Rage128", "VGA\0", 0, 0, 0, NULL, NULL, }, { - 0x1234, 0x1111, + PCI_VENDOR_ID_QEMU, PCI_DEVICE_ID_QEMU_VGA, NULL, "QEMU,VGA", "Qemu VGA", "VGA\0", 0, 0, 0, NULL, NULL, @@ -248,38 +250,38 @@ static const pci_dev_t hbrg_devices[] = { { - 0x106B, 0x0020, NULL, + PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_AGP, NULL, "pci", "AAPL,UniNorth", "uni-north\0", 3, 2, 1, NULL, NULL }, { - 0x106B, 0x001F, NULL, + PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI, NULL, "pci", "AAPL,UniNorth", "uni-north\0", 3, 2, 1, NULL, NULL }, { - 0x106B, 0x001E, NULL, + PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI, NULL, "pci", "AAPL,UniNorth", "uni-north\0", 3, 2, 1, NULL, NULL }, { - 0x1057, 0x0002, "pci", + PCI_VENDOR_ID_MOTOROLA, PCI_DEVICE_ID_MOTOROLA_MPC106, "pci", "pci", "MOT,MPC106", "grackle\0", 3, 2, 1, host_config_cb, NULL }, { - 0x1057, 0x4801, NULL, + PCI_VENDOR_ID_MOTOROLA, PCI_DEVICE_ID_MOTOROLA_RAVEN, NULL, "pci-bridge", "PREP Host PCI Bridge - Motorola Raven", NULL, 3, 2, 1, NULL, NULL, }, { - 0x108e, 0xa000, NULL, - "pci", "SUNW,simba", "pci108e,a000\0pciclass,0\0", + PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SABRE, NULL, + "pci", "SUNW,sabre", "pci108e,a000\0pciclass,0\0", 3, 2, 1, host_config_cb, NULL, }, @@ -293,14 +295,14 @@ static const pci_dev_t PCIbrg_devices[] = { { - 0x1011, 0x0026, NULL, + PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21154, NULL, "pci-bridge", "DEV,21154", "DEV,21154\0pci-bridge\0", 3, 2, 1, bridge_config_cb, NULL, }, { - 0x108e, 0x5000, NULL, - "pci", "SUNW,sabre", "pci108e,5000\0pciclass,060400\0", + PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA, NULL, + "pci", "SUNW,simba", "pci108e,5000\0pciclass,060400\0", 3, 2, 1, bridge_config_cb, NULL, }, @@ -314,7 +316,7 @@ static const pci_dev_t miscbrg_devices[] = { { - 0x108e, 0x1000, NULL, + PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, NULL, "ebus", "ebus", "pci108e,1000\0pciclass,068000\0", 3, 2, 1, ebus_config_cb, NULL, @@ -589,14 +591,14 @@ static const pci_dev_t sys_devices[] = { /* IBM MPIC controller */ { - 0x1014, 0x0002, + PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OPENPIC, "open-pic", "MPIC", NULL, "chrp,open-pic\0", 0, 0, 2, NULL, NULL, }, /* IBM MPIC2 controller */ { - 0x1014, 0xFFFF, + PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OPENPIC2, "open-pic", "MPIC2", NULL, "chrp,open-pic\0", 0, 0, 2, NULL, NULL, @@ -956,21 +958,21 @@ static const pci_dev_t misc_pci[] = { /* Heathrow Mac I/O */ { - 0x106B, 0x0010, + PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1201, "mac-io", "mac-io", "AAPL,343S1201", "heathrow\0", 1, 1, 1, &macio_config_cb, NULL, }, /* Paddington Mac I/O */ { - 0x106B, 0x0017, + PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1211, "mac-io", "mac-io", "AAPL,343S1211", "paddington\0heathrow\0", 1, 1, 1, &macio_config_cb, NULL, }, /* KeyLargo Mac I/O */ { - 0x106B, 0x0022, + PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, "mac-io", "mac-io", "AAPL,Keylargo", "Keylargo\0", 1, 1, 2, &macio_config_cb, NULL, Modified: openbios-devel/include/openbios/pci.h =================================================================== --- openbios-devel/include/openbios/pci.h 2009-01-31 16:42:01 UTC (rev 436) +++ openbios-devel/include/openbios/pci.h 2009-02-01 11:25:16 UTC (rev 437) @@ -24,4 +24,44 @@ extern const pci_arch_t *arch; +#define PCI_VENDOR_ID_ATI 0x1002 +#define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046 + +#define PCI_VENDOR_ID_DEC 0x1011 +#define PCI_DEVICE_ID_DEC_21154 0x0026 + +#define PCI_VENDOR_ID_IBM 0x1014 +#define PCI_DEVICE_ID_IBM_OPENPIC 0x0002 +#define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff + +#define PCI_VENDOR_ID_MOTOROLA 0x1057 +#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 +#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 + +#define PCI_VENDOR_ID_APPLE 0x106b +#define PCI_DEVICE_ID_APPLE_343S1201 0x0010 +#define PCI_DEVICE_ID_APPLE_343S1211 0x0017 +#define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e +#define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f +#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 +#define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022 + +#define PCI_VENDOR_ID_SUN 0x108e +#define PCI_DEVICE_ID_SUN_EBUS 0x1000 +#define PCI_DEVICE_ID_SUN_SIMBA 0x5000 +#define PCI_DEVICE_ID_SUN_PBM 0x8000 +#define PCI_DEVICE_ID_SUN_SABRE 0xa000 + +#define PCI_VENDOR_ID_CMD 0x1095 +#define PCI_DEVICE_ID_CMD_646 0x0646 + +#define PCI_VENDOR_ID_REALTEK 0x10ec +#define PCI_DEVICE_ID_REALTEK_RTL8029 0x8029 + +#define PCI_VENDOR_ID_QEMU 0x1234 +#define PCI_DEVICE_ID_QEMU_VGA 0x1111 + +#define PCI_VENDOR_ID_INTEL 0x8086 +#define PCI_DEVICE_ID_INTEL_82441 0x1237 + #endif /* _H_PCI */

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