Questions regarding Easy project and GSoC
Hello there, I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom. I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this? As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it? Thank you for looking into this for me. Sincerely, Aarya Chaumal
Hello Aarya, Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes. Thanks! On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :) On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
Aarya, Thank you so much for your patches, awesome work! Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge. It can also happen that you get another iteration of comments: but don't worry this is a normal process! From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :) It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be. Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare? A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run flashrom -h which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file. So you can read about "erase" operation and then explore the code which implements it. Meanwhile, just to check, have you read official resources from gsoc? These ones: Student Guidelines https://google.github.io/gsocguides/student/ Rules https://summerofcode.withgoogle.com/rules (especially p.7) And timeline https://developers.google.com/open-source/gsoc/timeline Anastasia. On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and
someone replied, was that your question?
Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya
Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite
initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I
started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
-- Anastasia.
Hi Aarya, nice progress! I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well: As written to Hui Xiang: As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well (https://www.flashrom.org/Supported_programmers). In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter. There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this: * Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase). * When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions. * Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used. * Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest) Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know. Regards, Simon Von: Anastasia Klimchuk <aklm@chromium.org> Gesendet: Sonntag, 13. März 2022 07:45 An: flashrom@flashrom.org; Aarya Chaumal <aarya.chaumal@gmail.com> Betreff: [flashrom] Re: Questions regarding Easy project and GSoC Aarya, Thank you so much for your patches, awesome work! Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge. It can also happen that you get another iteration of comments: but don't worry this is a normal process! From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :) It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be. Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare? A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run flashrom -h which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file. So you can read about "erase" operation and then explore the code which implements it. Meanwhile, just to check, have you read official resources from gsoc? These ones: Student Guidelines https://google.github.io/gsocguides/student/ Rules https://summerofcode.withgoogle.com/rules (especially p.7) And timeline https://developers.google.com/open-source/gsoc/timeline Anastasia. On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote: As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :) On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org<mailto:flashrom@flashrom.org> To unsubscribe send an email to flashrom-leave@flashrom.org<mailto:flashrom-leave@flashrom.org>
-- Anastasia.
-- Anastasia.
Hi Simon, Thanks for the response. I have built and ran Flashrom on my system and am trying to get familiar with it. I am also reading the code for the erase function. Also as you suggested I am planning to buy a CH341A Programmer, W25Q64 8MB flash and the adapter. Hope these would be sufficient. Can we run Flashrom on gdb? It might help me to get a better understanding of the code flow. Regards Aarya On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
nice progress!
I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well:
As written to Hui Xiang:
As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well (https://www.flashrom.org/Supported_programmers).
In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter.
There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects
A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this:
* Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase).
* When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions.
* Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used.
* Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest)
Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know.
Regards,
Simon
Von: Anastasia Klimchuk <aklm@chromium.org> Gesendet: Sonntag, 13. März 2022 07:45 An: flashrom@flashrom.org; Aarya Chaumal <aarya.chaumal@gmail.com> Betreff: [flashrom] Re: Questions regarding Easy project and GSoC
Aarya,
Thank you so much for your patches, awesome work!
Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge.
It can also happen that you get another iteration of comments: but don't worry this is a normal process!
From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :)
It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be.
Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare?
A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run
flashrom -h
which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file.
So you can read about "erase" operation and then explore the code which implements it.
Meanwhile, just to check, have you read official resources from gsoc? These ones:
Student Guidelines https://google.github.io/gsocguides/student/
Rules https://summerofcode.withgoogle.com/rules (especially p.7)
And timeline https://developers.google.com/open-source/gsoc/timeline
Anastasia.
On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
--
Anastasia.
Hi Simon, I got my hardware yesterday and I played around with it and flashrom. I also studied the code flow for the erase functions. I saw that flashrom tries different erase functions given in the flashctx->chip->block_erasers[] by iterating through the list. Assuming these functions are in order of the length (number of sectors) they erase, the first one would get selected most of the time as it erases the smallest length. But this would be inefficient as the function which erases more length would do the job faster although it might not give the required granularity. A better approach could be to use the latter (if necessary) until the remaining length is less than the length that this function can erase. Aarya On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
nice progress!
I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well:
As written to Hui Xiang:
As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well ( https://www.flashrom.org/Supported_programmers).
In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter.
There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects
A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this:
* Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase).
* When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions.
* Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used.
* Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest)
Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know.
Regards,
Simon
*Von:* Anastasia Klimchuk <aklm@chromium.org> *Gesendet:* Sonntag, 13. März 2022 07:45 *An:* flashrom@flashrom.org; Aarya Chaumal <aarya.chaumal@gmail.com> *Betreff:* [flashrom] Re: Questions regarding Easy project and GSoC
Aarya,
Thank you so much for your patches, awesome work!
Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge.
It can also happen that you get another iteration of comments: but don't worry this is a normal process!
From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :)
It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be.
Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare?
A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run
flashrom -h
which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file.
So you can read about "erase" operation and then explore the code which implements it.
Meanwhile, just to check, have you read official resources from gsoc? These ones:
Student Guidelines https://google.github.io/gsocguides/student/
Rules https://summerofcode.withgoogle.com/rules (especially p.7)
And timeline https://developers.google.com/open-source/gsoc/timeline
Anastasia.
On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and
someone replied, was that your question?
Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya
Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite
initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I
started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
--
Anastasia.
Hi Aarya, sounds great. Very good that you got the programmer. And very good that you already dived into the code. AFAICS you now have a good understanding of the problem to be solved. ☺ The details of how to implement a better solution is part of the project. I think there is not much to do before the project starts (you understand the problem + you have got hardware to test = you are quite ready to start). However if you are curious and want to do some more steps you are very welcome to do the following steps: * Have a look at https://review.coreboot.org/c/flashrom/+/58467 , the comments will give you a deeper understanding of the problem and possible starting points (and by the way will show you that there are people willing to help kindly ☺ ). I think we are running into something like using a look-ahead algorithm to determine which erase-function to use. * Get familiar with writing only certain regions of a flash (i.e. using a layout file) for better understanding of all the use cases Just let us know if you got any further questions or ideas. Regards, Simon Von: Aarya Chaumal <aarya.chaumal@gmail.com> Gesendet: Montag, 21. März 2022 22:16 An: Buhrow, Simon <simon.buhrow@sieb-meyer.de> Cc: Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org Betreff: Re: [flashrom] Re: Questions regarding Easy project and GSoC Hi Simon, I got my hardware yesterday and I played around with it and flashrom. I also studied the code flow for the erase functions. I saw that flashrom tries different erase functions given in the flashctx->chip->block_erasers[] by iterating through the list. Assuming these functions are in order of the length (number of sectors) they erase, the first one would get selected most of the time as it erases the smallest length. But this would be inefficient as the function which erases more length would do the job faster although it might not give the required granularity. A better approach could be to use the latter (if necessary) until the remaining length is less than the length that this function can erase. Aarya On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> wrote: Hi Aarya, nice progress! I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well: As written to Hui Xiang: As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well (https://www.flashrom.org/Supported_programmers). In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter. There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this: * Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase). * When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions. * Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used. * Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest) Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know. Regards, Simon Von: Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>> Gesendet: Sonntag, 13. März 2022 07:45 An: flashrom@flashrom.org<mailto:flashrom@flashrom.org>; Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> Betreff: [flashrom] Re: Questions regarding Easy project and GSoC Aarya, Thank you so much for your patches, awesome work! Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge. It can also happen that you get another iteration of comments: but don't worry this is a normal process! From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :) It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be. Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare? A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run flashrom -h which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file. So you can read about "erase" operation and then explore the code which implements it. Meanwhile, just to check, have you read official resources from gsoc? These ones: Student Guidelines https://google.github.io/gsocguides/student/ Rules https://summerofcode.withgoogle.com/rules (especially p.7) And timeline https://developers.google.com/open-source/gsoc/timeline Anastasia. On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote: As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :) On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org<mailto:flashrom@flashrom.org> To unsubscribe send an email to flashrom-leave@flashrom.org<mailto:flashrom-leave@flashrom.org>
-- Anastasia.
-- Anastasia.
Hi Aarya, I fully agree with Simon, you are doing great! I have just submitted the first one out of your patches, congrats! Well done :) Few more of them seem to be almost ready, just some comments about commit messages need to be resolved. Don't be surprised that you are getting so many comments about commit messages. The reason is, once a patch is submitted, commit message stays in history forever and it cannot be changed. So it is very important to get it right. Sometimes one need to go through the history of commits, to understand why some code was written as is - and commit message should be able to explain why. On the project side, read our project proposal template <https://docs.google.com/document/d/1DSg1FykuI7Z3JDY1Qtk8C6JjvpsYISMEwyV4932j...> (if you haven't already) and see if you have any questions about it. Also you can prepare questions that you would ask the Mentor. -- Anastasia.
Hi Anastasia, Thanks for the merge (Feel great contributing to flashrom). Thanks for helping me better understand flashrom and the projects for GSoC. As I said before I am interested in "Optimize Erase-Function Selection" and "Fix Endianness Issues" (I still cant decide which one to choose, kinda wanna do both if possible). I have understood what is the aim of the projects and also have some idea as to how to go about it. I have read the proposal template and have some questions: In the project info section, do I have to write the same as given in the projects idea list, or do I write what I have understood (in the short and long descriptions)? Also, what is expected in the project breakdown? Will I be doing the project alone or the mentor(s) will be guiding me? I have completed a rough draft for my proposal, can someone review it? Aarya. On Fri, Mar 25, 2022 at 7:10 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hi Aarya,
I fully agree with Simon, you are doing great!
I have just submitted the first one out of your patches, congrats! Well done :) Few more of them seem to be almost ready, just some comments about commit messages need to be resolved.
Don't be surprised that you are getting so many comments about commit messages. The reason is, once a patch is submitted, commit message stays in history forever and it cannot be changed. So it is very important to get it right. Sometimes one need to go through the history of commits, to understand why some code was written as is - and commit message should be able to explain why.
On the project side, read our project proposal template <https://docs.google.com/document/d/1DSg1FykuI7Z3JDY1Qtk8C6JjvpsYISMEwyV4932j...> (if you haven't already) and see if you have any questions about it. Also you can prepare questions that you would ask the Mentor.
-- Anastasia.
On Sat, 2022-03-26 at 10:57 +0530, Aarya Chaumal wrote: [...]
As I said before I am interested in "Optimize Erase-Function Selection" and "Fix Endianness Issues" (I still cant decide which one to choose, kinda wanna do both if possible).
Glad you like them! Though, you can't do both during GSoC, since each of them will be a significant time commitment for you. But if you are still motivated after GSoC, you can do the other one later if it is still available :)
I have understood what is the aim of the projects and also have some idea as to how to go about it.
I have read the proposal template and have some questions: In the project info section, do I have to write the same as given in the projects idea list, or do I write what I have understood (in the short and long descriptions)?
That point is more related to the project proposal. Seems like we mixed it up with the application template :) However, we expect our applicants to describe the project they want to do in their own words to see if they understood it.
Also, what is expected in the project breakdown?
We would like to see that our applicants made realistic and serious thoughts about their projects. So we expect you give an overview about your work schedule. You should define small steps and elaborate them weekly or fortnightly. For example: Week 1: First, I will start with reworking thing XY and ... Week 2: When cleaning up thing XY is finished, then I will work on another thing. Week 3: Depending on how the another thing was solved, I will do this or that. Of course this schedule won't fixed and this doesn't have to be perfect, because new problems can appear or you might get a better idea for something. We just want to see that you made thoughts about the project and that you have a somewhat realistic schedule on how to do it. Also, this helps you to keep track of your own work and your schedule before and during GSoC. The past showed that people underestimated their projects or the workload per week and then it got stressful for them.
Will I be doing the project alone or the mentor(s) will be guiding me?
You will have at least one mentor on your side guiding you and you will have weekly meetings with them. So if you have any questions, problems or anything you would like to discuss, then they are your contact persons.
I have completed a rough draft for my proposal, can someone review it?
Well, we can answer questions related to the project or help understanding what hasn't been understood yet, but we won't review your application :) // Felix
I can add a few bits from me. You can only do one project as gsoc, because the rules say so: https://summerofcode.withgoogle.com/rules See 7.3.b The rules also say that you can submit up to 3 proposals, but only one of them we can select. In theory, you can write 2 proposals for 2 projects that you like, and submit both, but we will choose only one anyway. In any case writing a proposal is an effort, and writing two of them is double of that effort. Yes, a project will have a Mentor guiding it, and you will be talking to Mentor regularly. But also, in case you have some generic questions (about the process for example), you can also ask me or Felix, we take care that everything is running.
I have completed a rough draft for my proposal, can someone review it?
I am actually thinking about it, maybe it's ok? Let me think about it and check the rules :) I assume you are talking about a draft for a project proposal (by our template). Importantly, your actual application you will be submitting *not to us directly*, but to gsoc website. It will go through the system and then come to us, but not from your hands directly. Make sure you read official guidelines on how to submit the application! :) On Sat, Mar 26, 2022 at 6:36 PM Felix Singer <felixsinger@posteo.net> wrote:
On Sat, 2022-03-26 at 10:57 +0530, Aarya Chaumal wrote: [...]
As I said before I am interested in "Optimize Erase-Function Selection" and "Fix Endianness Issues" (I still cant decide which one to choose, kinda wanna do both if possible).
Glad you like them! Though, you can't do both during GSoC, since each of them will be a significant time commitment for you. But if you are still motivated after GSoC, you can do the other one later if it is still available :)
I have understood what is the aim of the projects and also have some idea as to how to go about it.
I have read the proposal template and have some questions: In the project info section, do I have to write the same as given in the projects idea list, or do I write what I have understood (in the short and long descriptions)?
That point is more related to the project proposal. Seems like we mixed it up with the application template :)
However, we expect our applicants to describe the project they want to do in their own words to see if they understood it.
Also, what is expected in the project breakdown?
We would like to see that our applicants made realistic and serious thoughts about their projects. So we expect you give an overview about your work schedule. You should define small steps and elaborate them weekly or fortnightly.
For example:
Week 1: First, I will start with reworking thing XY and ... Week 2: When cleaning up thing XY is finished, then I will work on another thing. Week 3: Depending on how the another thing was solved, I will do this or that.
Of course this schedule won't fixed and this doesn't have to be perfect, because new problems can appear or you might get a better idea for something. We just want to see that you made thoughts about the project and that you have a somewhat realistic schedule on how to do it.
Also, this helps you to keep track of your own work and your schedule before and during GSoC. The past showed that people underestimated their projects or the workload per week and then it got stressful for them.
Will I be doing the project alone or the mentor(s) will be guiding me?
You will have at least one mentor on your side guiding you and you will have weekly meetings with them. So if you have any questions, problems or anything you would like to discuss, then they are your contact persons.
I have completed a rough draft for my proposal, can someone review it?
Well, we can answer questions related to the project or help understanding what hasn't been understood yet, but we won't review your application :)
// Felix
-- Anastasia.
Anastasia, Thanks for the clarifications. I'll be writing the proposals for both the projects and leave it up to you to decide which one I should do :) A few more questions: How much minimum time do you expect to be put into the project(daily, weekly)? Currently, I feel I can give 5 hours every day. Idk if that's appropriate. Although I am willing to put up to 7 hours if need be. Who will be the mentors for "Optimize Erase-Function Selection" and "Fix Endianness Issues"? I think they are Simon and Thomas respectively, but still just confirming. What happens if the project is not completed within 175 or 350 hours? Is it a strict deadline or flexible? Aarya. On Sun, Mar 27, 2022 at 1:40 PM Anastasia Klimchuk <aklm@chromium.org> wrote:
I can add a few bits from me.
You can only do one project as gsoc, because the rules say so: https://summerofcode.withgoogle.com/rules See 7.3.b
The rules also say that you can submit up to 3 proposals, but only one of them we can select. In theory, you can write 2 proposals for 2 projects that you like, and submit both, but we will choose only one anyway. In any case writing a proposal is an effort, and writing two of them is double of that effort.
Yes, a project will have a Mentor guiding it, and you will be talking to Mentor regularly. But also, in case you have some generic questions (about the process for example), you can also ask me or Felix, we take care that everything is running.
I have completed a rough draft for my proposal, can someone review it?
I am actually thinking about it, maybe it's ok? Let me think about it and check the rules :) I assume you are talking about a draft for a project proposal (by our template).
Importantly, your actual application you will be submitting *not to us directly*, but to gsoc website. It will go through the system and then come to us, but not from your hands directly. Make sure you read official guidelines on how to submit the application! :)
On Sat, Mar 26, 2022 at 6:36 PM Felix Singer <felixsinger@posteo.net> wrote:
On Sat, 2022-03-26 at 10:57 +0530, Aarya Chaumal wrote: [...]
As I said before I am interested in "Optimize Erase-Function Selection" and "Fix Endianness Issues" (I still cant decide which one to choose, kinda wanna do both if possible).
Glad you like them! Though, you can't do both during GSoC, since each of them will be a significant time commitment for you. But if you are still motivated after GSoC, you can do the other one later if it is still available :)
I have understood what is the aim of the projects and also have some idea as to how to go about it.
I have read the proposal template and have some questions: In the project info section, do I have to write the same as given in the projects idea list, or do I write what I have understood (in the short and long descriptions)?
That point is more related to the project proposal. Seems like we mixed it up with the application template :)
However, we expect our applicants to describe the project they want to do in their own words to see if they understood it.
Also, what is expected in the project breakdown?
We would like to see that our applicants made realistic and serious thoughts about their projects. So we expect you give an overview about your work schedule. You should define small steps and elaborate them weekly or fortnightly.
For example:
Week 1: First, I will start with reworking thing XY and ... Week 2: When cleaning up thing XY is finished, then I will work on another thing. Week 3: Depending on how the another thing was solved, I will do this or that.
Of course this schedule won't fixed and this doesn't have to be perfect, because new problems can appear or you might get a better idea for something. We just want to see that you made thoughts about the project and that you have a somewhat realistic schedule on how to do it.
Also, this helps you to keep track of your own work and your schedule before and during GSoC. The past showed that people underestimated their projects or the workload per week and then it got stressful for them.
Will I be doing the project alone or the mentor(s) will be guiding me?
You will have at least one mentor on your side guiding you and you will have weekly meetings with them. So if you have any questions, problems or anything you would like to discuss, then they are your contact persons.
I have completed a rough draft for my proposal, can someone review it?
Well, we can answer questions related to the project or help understanding what hasn't been understood yet, but we won't review your application :)
// Felix
-- Anastasia.
On Mon, 2022-03-28 at 10:49 +0530, Aarya Chaumal wrote:
Anastasia,
Thanks for the clarifications. I'll be writing the proposals for both the projects and leave it up to you to decide which one I should do :)
That's good anyway. If we give project x to someone else, then you still have project y as plan b ;) Please mention in your applications that you are applying for both and what your preferred project is. We try to assign that one to you :)
A few more questions: How much minimum time do you expect to be put into the project(daily, weekly)? Currently, I feel I can give 5 hours every day. Idk if that's appropriate. Although I am willing to put up to 7 hours if need be.
Both projects are estimated to take ~175 hours. The "standard" project time are 12 weeks. So ~14.5 hours per week or ~2 hours per day. Of course it's up to you when you work on the project. So if you are planning with 4 hours per day, this should be totally fine. Then you have some space for doing research and similar things.
Who will be the mentors for "Optimize Erase-Function Selection" and "Fix Endianness Issues"? I think they are Simon and Thomas respectively, but still just confirming.
That's not decided yet, since it depends on which projects will be done. We can tell more during the application phase.
What happens if the project is not completed within 175 or 350 hours? Is it a strict deadline or flexible?
Since this year, you can extend the project time from 12 weeks up to 22 weeks, in case of you have exams or if you want to go on vacation, but your mentor has to agree on that. // Felix
Hi Simon, I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? Also, I'm not sure what a look ahead algorithm means. A brief search tells me it evaluates the effect of the procedure before doing it. Not sure how it is to be implemented. I have the following approach in my mind. Keep using the largest erase function which erases just less than the region to be erased. For example, if we have to erase 200kB and have erase functions for 4kB,32kB,64kB. We would use the 64kB eraser three times first. Then the region left to be erased would be 8kB. Then we would use the 4kB eraser twice. Is this what you mean by look-ahead algorithm? Aarya On Thu, Mar 24, 2022 at 3:36 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
sounds great. Very good that you got the programmer. And very good that you already dived into the code.
AFAICS you now have a good understanding of the problem to be solved. J The details of how to implement a better solution is part of the project.
I think there is not much to do before the project starts (you understand the problem + you have got hardware to test = you are quite ready to start). However if you are curious and want to do some more steps you are very welcome to do the following steps:
* Have a look at https://review.coreboot.org/c/flashrom/+/58467 , the comments will give you a deeper understanding of the problem and possible starting points (and by the way will show you that there are people willing to help kindly J ). I think we are running into something like using a look-ahead algorithm to determine which erase-function to use.
* Get familiar with writing only certain regions of a flash (i.e. using a layout file) for better understanding of all the use cases
Just let us know if you got any further questions or ideas.
Regards,
Simon
*Von:* Aarya Chaumal <aarya.chaumal@gmail.com> *Gesendet:* Montag, 21. März 2022 22:16 *An:* Buhrow, Simon <simon.buhrow@sieb-meyer.de> *Cc:* Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org *Betreff:* Re: [flashrom] Re: Questions regarding Easy project and GSoC
Hi Simon,
I got my hardware yesterday and I played around with it and flashrom. I also studied the code flow for the erase functions. I saw that flashrom tries different erase functions given in the flashctx->chip->block_erasers[] by iterating through the list. Assuming these functions are in order of the length (number of sectors) they erase, the first one would get selected most of the time as it erases the smallest length. But this would be inefficient as the function which erases more length would do the job faster although it might not give the required granularity. A better approach could be to use the latter (if necessary) until the remaining length is less than the length that this function can erase.
Aarya
On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
nice progress!
I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well:
As written to Hui Xiang:
As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well ( https://www.flashrom.org/Supported_programmers).
In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter.
There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects
A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this:
* Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase).
* When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions.
* Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used.
* Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest)
Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know.
Regards,
Simon
*Von:* Anastasia Klimchuk <aklm@chromium.org> *Gesendet:* Sonntag, 13. März 2022 07:45 *An:* flashrom@flashrom.org; Aarya Chaumal <aarya.chaumal@gmail.com> *Betreff:* [flashrom] Re: Questions regarding Easy project and GSoC
Aarya,
Thank you so much for your patches, awesome work!
Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge.
It can also happen that you get another iteration of comments: but don't worry this is a normal process!
From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :)
It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be.
Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare?
A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run
flashrom -h
which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file.
So you can read about "erase" operation and then explore the code which implements it.
Meanwhile, just to check, have you read official resources from gsoc? These ones:
Student Guidelines https://google.github.io/gsocguides/student/
Rules https://summerofcode.withgoogle.com/rules (especially p.7)
And timeline https://developers.google.com/open-source/gsoc/timeline
Anastasia.
On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and
someone replied, was that your question?
Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya
Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite
initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I
started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
--
Anastasia.
Hi Aarya, so you are curious and went on. Very good. To be honest, I do not know how overlapping regions would behave (I have never worked with layout files as this was not necessary for us yet). If you want just give it a try. Operations like this shouldn´t damage anything (if flashrom allows this at all). Sorry, I´m not a native speaker, that´s why I´m not sure if “a look ahead algorithm” is a good choice of word. However you got it very right. What you have proposed is exactly what I wanted to say. ☺ This might sound like an easy task. However the current structure does not give much advantage to implement such thing, why the task results to be harder than it might look now. It´s very good how far you got now. At the moment I do not have much more to say. Nevertheless if you have any further questions or discussions just let us know. Regards, Simon Von: Aarya Chaumal <aarya.chaumal@gmail.com> Gesendet: Samstag, 26. März 2022 06:45 An: Buhrow, Simon <simon.buhrow@sieb-meyer.de> Cc: Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org Betreff: Re: [flashrom] Re: Questions regarding Easy project and GSoC Hi Simon, I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? Also, I'm not sure what a look ahead algorithm means. A brief search tells me it evaluates the effect of the procedure before doing it. Not sure how it is to be implemented. I have the following approach in my mind. Keep using the largest erase function which erases just less than the region to be erased. For example, if we have to erase 200kB and have erase functions for 4kB,32kB,64kB. We would use the 64kB eraser three times first. Then the region left to be erased would be 8kB. Then we would use the 4kB eraser twice. Is this what you mean by look-ahead algorithm? Aarya On Thu, Mar 24, 2022 at 3:36 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> wrote: Hi Aarya, sounds great. Very good that you got the programmer. And very good that you already dived into the code. AFAICS you now have a good understanding of the problem to be solved. ☺ The details of how to implement a better solution is part of the project. I think there is not much to do before the project starts (you understand the problem + you have got hardware to test = you are quite ready to start). However if you are curious and want to do some more steps you are very welcome to do the following steps: * Have a look at https://review.coreboot.org/c/flashrom/+/58467 , the comments will give you a deeper understanding of the problem and possible starting points (and by the way will show you that there are people willing to help kindly ☺ ). I think we are running into something like using a look-ahead algorithm to determine which erase-function to use. * Get familiar with writing only certain regions of a flash (i.e. using a layout file) for better understanding of all the use cases Just let us know if you got any further questions or ideas. Regards, Simon Von: Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> Gesendet: Montag, 21. März 2022 22:16 An: Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> Cc: Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>>; flashrom@flashrom.org<mailto:flashrom@flashrom.org> Betreff: Re: [flashrom] Re: Questions regarding Easy project and GSoC Hi Simon, I got my hardware yesterday and I played around with it and flashrom. I also studied the code flow for the erase functions. I saw that flashrom tries different erase functions given in the flashctx->chip->block_erasers[] by iterating through the list. Assuming these functions are in order of the length (number of sectors) they erase, the first one would get selected most of the time as it erases the smallest length. But this would be inefficient as the function which erases more length would do the job faster although it might not give the required granularity. A better approach could be to use the latter (if necessary) until the remaining length is less than the length that this function can erase. Aarya On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> wrote: Hi Aarya, nice progress! I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well: As written to Hui Xiang: As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well (https://www.flashrom.org/Supported_programmers). In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter. There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this: * Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase). * When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions. * Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used. * Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest) Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know. Regards, Simon Von: Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>> Gesendet: Sonntag, 13. März 2022 07:45 An: flashrom@flashrom.org<mailto:flashrom@flashrom.org>; Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> Betreff: [flashrom] Re: Questions regarding Easy project and GSoC Aarya, Thank you so much for your patches, awesome work! Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge. It can also happen that you get another iteration of comments: but don't worry this is a normal process! From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :) It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be. Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare? A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run flashrom -h which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file. So you can read about "erase" operation and then explore the code which implements it. Meanwhile, just to check, have you read official resources from gsoc? These ones: Student Guidelines https://google.github.io/gsocguides/student/ Rules https://summerofcode.withgoogle.com/rules (especially p.7) And timeline https://developers.google.com/open-source/gsoc/timeline Anastasia. On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote: As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :) On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org<mailto:flashrom@flashrom.org> To unsubscribe send an email to flashrom-leave@flashrom.org<mailto:flashrom-leave@flashrom.org>
-- Anastasia.
-- Anastasia.
Hi Simon, I tried to change the selection of the erase function to make it use the erase whole chip function and performed the erase operation for the whole chip. It still felt a bit slow not as slow as before (didn't feel a significant reduction in time). Is this normal? For the "Optimise erase functions" project how are we supposed to measure the efficiency of the algorithm? Also are there any other approaches that we can consider to optimize the erase operations? Aarya. On Tue, Mar 29, 2022 at 11:52 AM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
so you are curious and went on. Very good.
To be honest, I do not know how overlapping regions would behave (I have never worked with layout files as this was not necessary for us yet). If you want just give it a try. Operations like this shouldn´t damage anything (if flashrom allows this at all).
Sorry, I´m not a native speaker, that´s why I´m not sure if “a look ahead algorithm” is a good choice of word. However you got it very right. What you have proposed is exactly what I wanted to say. J This might sound like an easy task. However the current structure does not give much advantage to implement such thing, why the task results to be harder than it might look now.
It´s very good how far you got now. At the moment I do not have much more to say. Nevertheless if you have any further questions or discussions just let us know.
Regards,
Simon
*Von:* Aarya Chaumal <aarya.chaumal@gmail.com> *Gesendet:* Samstag, 26. März 2022 06:45 *An:* Buhrow, Simon <simon.buhrow@sieb-meyer.de> *Cc:* Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org *Betreff:* Re: [flashrom] Re: Questions regarding Easy project and GSoC
Hi Simon,
I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap?
Also, I'm not sure what a look ahead algorithm means. A brief search tells me it evaluates the effect of the procedure before doing it. Not sure how it is to be implemented.
I have the following approach in my mind. Keep using the largest erase function which erases just less than the region to be erased. For example, if we have to erase 200kB and have erase functions for 4kB,32kB,64kB. We would use the 64kB eraser three times first. Then the region left to be erased would be 8kB. Then we would use the 4kB eraser twice. Is this what you mean by look-ahead algorithm?
Aarya
On Thu, Mar 24, 2022 at 3:36 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
sounds great. Very good that you got the programmer. And very good that you already dived into the code.
AFAICS you now have a good understanding of the problem to be solved. J The details of how to implement a better solution is part of the project.
I think there is not much to do before the project starts (you understand the problem + you have got hardware to test = you are quite ready to start). However if you are curious and want to do some more steps you are very welcome to do the following steps:
* Have a look at https://review.coreboot.org/c/flashrom/+/58467 , the comments will give you a deeper understanding of the problem and possible starting points (and by the way will show you that there are people willing to help kindly J ). I think we are running into something like using a look-ahead algorithm to determine which erase-function to use.
* Get familiar with writing only certain regions of a flash (i.e. using a layout file) for better understanding of all the use cases
Just let us know if you got any further questions or ideas.
Regards,
Simon
*Von:* Aarya Chaumal <aarya.chaumal@gmail.com> *Gesendet:* Montag, 21. März 2022 22:16 *An:* Buhrow, Simon <simon.buhrow@sieb-meyer.de> *Cc:* Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org *Betreff:* Re: [flashrom] Re: Questions regarding Easy project and GSoC
Hi Simon,
I got my hardware yesterday and I played around with it and flashrom. I also studied the code flow for the erase functions. I saw that flashrom tries different erase functions given in the flashctx->chip->block_erasers[] by iterating through the list. Assuming these functions are in order of the length (number of sectors) they erase, the first one would get selected most of the time as it erases the smallest length. But this would be inefficient as the function which erases more length would do the job faster although it might not give the required granularity. A better approach could be to use the latter (if necessary) until the remaining length is less than the length that this function can erase.
Aarya
On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
nice progress!
I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well:
As written to Hui Xiang:
As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well ( https://www.flashrom.org/Supported_programmers).
In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter.
There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects
A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this:
* Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase).
* When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions.
* Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used.
* Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest)
Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know.
Regards,
Simon
*Von:* Anastasia Klimchuk <aklm@chromium.org> *Gesendet:* Sonntag, 13. März 2022 07:45 *An:* flashrom@flashrom.org; Aarya Chaumal <aarya.chaumal@gmail.com> *Betreff:* [flashrom] Re: Questions regarding Easy project and GSoC
Aarya,
Thank you so much for your patches, awesome work!
Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge.
It can also happen that you get another iteration of comments: but don't worry this is a normal process!
From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :)
It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be.
Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare?
A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run
flashrom -h
which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file.
So you can read about "erase" operation and then explore the code which implements it.
Meanwhile, just to check, have you read official resources from gsoc? These ones:
Student Guidelines https://google.github.io/gsocguides/student/
Rules https://summerofcode.withgoogle.com/rules (especially p.7)
And timeline https://developers.google.com/open-source/gsoc/timeline
Anastasia.
On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and
someone replied, was that your question?
Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya
Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite
initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I
started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
--
Anastasia.
Hi Aarya,
still felt a bit slow not as slow as before
Better than feeling is measuring ☺ . You could insert it into your code (https://review.coreboot.org/c/flashrom/+/47805) or you can just run https://linux.die.net/man/1/time .
make it use the erase whole chip function and performed the erase operation for the whole chip.
Check comments on https://review.coreboot.org/c/flashrom/+/58467 for some information about run time (see “random data”, this effects much the run time, depending on how many “FF” are present).
For the "Optimise erase functions" project how are we supposed to measure the efficiency of the algorithm?
Well with a given flash (and it´s erase times), a given state of flash and given data to be written a possible minimum run time can be calculated. However my understanding of this project is not to get the very last 1% in run time saving but the 10-30% for certain use cases. Furthermore it will be a trade-off efficiency vs. good code. So we have to discuss this in detail during the project. I think one hard request will be:: There should be no use case where the new algorithm yields increased run time.
Also are there any other approaches that we can consider to optimize the erase operations?
Not discussed yet (but there might be in some people mind). However feel free to think about other ways. But just have in mind that before putting too much effort on a solution discuss it to avoid disappointment. But for more detailed discussion we should wait until project starts (sorry to make you wait – I appreciate your curiosity! - , but this does not make much sense if finally there is no match you and the project). Regards, Simon Von: Aarya Chaumal <aarya.chaumal@gmail.com> Gesendet: Donnerstag, 31. März 2022 23:00 An: Buhrow, Simon <simon.buhrow@sieb-meyer.de> Cc: Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org Betreff: Re: [flashrom] Re: Questions regarding Easy project and GSoC Hi Simon, I tried to change the selection of the erase function to make it use the erase whole chip function and performed the erase operation for the whole chip. It still felt a bit slow not as slow as before (didn't feel a significant reduction in time). Is this normal? For the "Optimise erase functions" project how are we supposed to measure the efficiency of the algorithm? Also are there any other approaches that we can consider to optimize the erase operations? Aarya. On Tue, Mar 29, 2022 at 11:52 AM Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> wrote: Hi Aarya, so you are curious and went on. Very good. To be honest, I do not know how overlapping regions would behave (I have never worked with layout files as this was not necessary for us yet). If you want just give it a try. Operations like this shouldn´t damage anything (if flashrom allows this at all). Sorry, I´m not a native speaker, that´s why I´m not sure if “a look ahead algorithm” is a good choice of word. However you got it very right. What you have proposed is exactly what I wanted to say. ☺ This might sound like an easy task. However the current structure does not give much advantage to implement such thing, why the task results to be harder than it might look now. It´s very good how far you got now. At the moment I do not have much more to say. Nevertheless if you have any further questions or discussions just let us know. Regards, Simon Von: Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> Gesendet: Samstag, 26. März 2022 06:45 An: Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> Cc: Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>>; flashrom@flashrom.org<mailto:flashrom@flashrom.org> Betreff: Re: [flashrom] Re: Questions regarding Easy project and GSoC Hi Simon, I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? Also, I'm not sure what a look ahead algorithm means. A brief search tells me it evaluates the effect of the procedure before doing it. Not sure how it is to be implemented. I have the following approach in my mind. Keep using the largest erase function which erases just less than the region to be erased. For example, if we have to erase 200kB and have erase functions for 4kB,32kB,64kB. We would use the 64kB eraser three times first. Then the region left to be erased would be 8kB. Then we would use the 4kB eraser twice. Is this what you mean by look-ahead algorithm? Aarya On Thu, Mar 24, 2022 at 3:36 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> wrote: Hi Aarya, sounds great. Very good that you got the programmer. And very good that you already dived into the code. AFAICS you now have a good understanding of the problem to be solved. ☺ The details of how to implement a better solution is part of the project. I think there is not much to do before the project starts (you understand the problem + you have got hardware to test = you are quite ready to start). However if you are curious and want to do some more steps you are very welcome to do the following steps: * Have a look at https://review.coreboot.org/c/flashrom/+/58467 , the comments will give you a deeper understanding of the problem and possible starting points (and by the way will show you that there are people willing to help kindly ☺ ). I think we are running into something like using a look-ahead algorithm to determine which erase-function to use. * Get familiar with writing only certain regions of a flash (i.e. using a layout file) for better understanding of all the use cases Just let us know if you got any further questions or ideas. Regards, Simon Von: Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> Gesendet: Montag, 21. März 2022 22:16 An: Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> Cc: Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>>; flashrom@flashrom.org<mailto:flashrom@flashrom.org> Betreff: Re: [flashrom] Re: Questions regarding Easy project and GSoC Hi Simon, I got my hardware yesterday and I played around with it and flashrom. I also studied the code flow for the erase functions. I saw that flashrom tries different erase functions given in the flashctx->chip->block_erasers[] by iterating through the list. Assuming these functions are in order of the length (number of sectors) they erase, the first one would get selected most of the time as it erases the smallest length. But this would be inefficient as the function which erases more length would do the job faster although it might not give the required granularity. A better approach could be to use the latter (if necessary) until the remaining length is less than the length that this function can erase. Aarya On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de<mailto:simon.buhrow@sieb-meyer.de>> wrote: Hi Aarya, nice progress! I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well: As written to Hui Xiang: As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well (https://www.flashrom.org/Supported_programmers). In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter. There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this: * Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase). * When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions. * Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used. * Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest) Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know. Regards, Simon Von: Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>> Gesendet: Sonntag, 13. März 2022 07:45 An: flashrom@flashrom.org<mailto:flashrom@flashrom.org>; Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> Betreff: [flashrom] Re: Questions regarding Easy project and GSoC Aarya, Thank you so much for your patches, awesome work! Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge. It can also happen that you get another iteration of comments: but don't worry this is a normal process! From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :) It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be. Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare? A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run flashrom -h which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file. So you can read about "erase" operation and then explore the code which implements it. Meanwhile, just to check, have you read official resources from gsoc? These ones: Student Guidelines https://google.github.io/gsocguides/student/ Rules https://summerofcode.withgoogle.com/rules (especially p.7) And timeline https://developers.google.com/open-source/gsoc/timeline Anastasia. On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote: As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :) On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org<mailto:aklm@chromium.org>> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com<mailto:aarya.chaumal@gmail.com>> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org<mailto:flashrom@flashrom.org> To unsubscribe send an email to flashrom-leave@flashrom.org<mailto:flashrom-leave@flashrom.org>
-- Anastasia.
-- Anastasia.
Hi Simon, In the "Optimizing Erase Function Selection" project what is considered a minimum level of success. I think it should be that the resulting average erase time should be similar to the theoretical value based on the implemented algorithm and less than the current erase time. Are there any other objectives that need to be achieved for the project? Also what stretch objectives could be there for the project? Aarya. On Fri, Apr 1, 2022 at 12:09 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
still felt a bit slow not as slow as before
Better than feeling is measuring J . You could insert it into your code ( https://review.coreboot.org/c/flashrom/+/47805) or you can just run https://linux.die.net/man/1/time .
make it use the erase whole chip function and performed the erase operation for the whole chip.
Check comments on https://review.coreboot.org/c/flashrom/+/58467 for some information about run time (see “random data”, this effects much the run time, depending on how many “FF” are present).
For the "Optimise erase functions" project how are we supposed to measure the efficiency of the algorithm?
Well with a given flash (and it´s erase times), a given state of flash and given data to be written a possible minimum run time can be calculated. However my understanding of this project is not to get the very last 1% in run time saving but the 10-30% for certain use cases. Furthermore it will be a trade-off efficiency vs. good code. So we have to discuss this in detail during the project. I think one hard request will be:: There should be no use case where the new algorithm yields increased run time.
Also are there any other approaches that we can consider to optimize the erase operations?
Not discussed yet (but there might be in some people mind). However feel free to think about other ways. But just have in mind that before putting too much effort on a solution discuss it to avoid disappointment. But for more detailed discussion we should wait until project starts (sorry to make you wait – I appreciate your curiosity! - , but this does not make much sense if finally there is no match you and the project).
Regards,
Simon
*Von:* Aarya Chaumal <aarya.chaumal@gmail.com> *Gesendet:* Donnerstag, 31. März 2022 23:00 *An:* Buhrow, Simon <simon.buhrow@sieb-meyer.de> *Cc:* Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org *Betreff:* Re: [flashrom] Re: Questions regarding Easy project and GSoC
Hi Simon,
I tried to change the selection of the erase function to make it use the erase whole chip function and performed the erase operation for the whole chip. It still felt a bit slow not as slow as before (didn't feel a significant reduction in time). Is this normal?
For the "Optimise erase functions" project how are we supposed to measure the efficiency of the algorithm?
Also are there any other approaches that we can consider to optimize the erase operations?
Aarya.
On Tue, Mar 29, 2022 at 11:52 AM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
so you are curious and went on. Very good.
To be honest, I do not know how overlapping regions would behave (I have never worked with layout files as this was not necessary for us yet). If you want just give it a try. Operations like this shouldn´t damage anything (if flashrom allows this at all).
Sorry, I´m not a native speaker, that´s why I´m not sure if “a look ahead algorithm” is a good choice of word. However you got it very right. What you have proposed is exactly what I wanted to say. J This might sound like an easy task. However the current structure does not give much advantage to implement such thing, why the task results to be harder than it might look now.
It´s very good how far you got now. At the moment I do not have much more to say. Nevertheless if you have any further questions or discussions just let us know.
Regards,
Simon
*Von:* Aarya Chaumal <aarya.chaumal@gmail.com> *Gesendet:* Samstag, 26. März 2022 06:45 *An:* Buhrow, Simon <simon.buhrow@sieb-meyer.de> *Cc:* Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org *Betreff:* Re: [flashrom] Re: Questions regarding Easy project and GSoC
Hi Simon,
I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap?
Also, I'm not sure what a look ahead algorithm means. A brief search tells me it evaluates the effect of the procedure before doing it. Not sure how it is to be implemented.
I have the following approach in my mind. Keep using the largest erase function which erases just less than the region to be erased. For example, if we have to erase 200kB and have erase functions for 4kB,32kB,64kB. We would use the 64kB eraser three times first. Then the region left to be erased would be 8kB. Then we would use the 4kB eraser twice. Is this what you mean by look-ahead algorithm?
Aarya
On Thu, Mar 24, 2022 at 3:36 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
sounds great. Very good that you got the programmer. And very good that you already dived into the code.
AFAICS you now have a good understanding of the problem to be solved. J The details of how to implement a better solution is part of the project.
I think there is not much to do before the project starts (you understand the problem + you have got hardware to test = you are quite ready to start). However if you are curious and want to do some more steps you are very welcome to do the following steps:
* Have a look at https://review.coreboot.org/c/flashrom/+/58467 , the comments will give you a deeper understanding of the problem and possible starting points (and by the way will show you that there are people willing to help kindly J ). I think we are running into something like using a look-ahead algorithm to determine which erase-function to use.
* Get familiar with writing only certain regions of a flash (i.e. using a layout file) for better understanding of all the use cases
Just let us know if you got any further questions or ideas.
Regards,
Simon
*Von:* Aarya Chaumal <aarya.chaumal@gmail.com> *Gesendet:* Montag, 21. März 2022 22:16 *An:* Buhrow, Simon <simon.buhrow@sieb-meyer.de> *Cc:* Anastasia Klimchuk <aklm@chromium.org>; flashrom@flashrom.org *Betreff:* Re: [flashrom] Re: Questions regarding Easy project and GSoC
Hi Simon,
I got my hardware yesterday and I played around with it and flashrom. I also studied the code flow for the erase functions. I saw that flashrom tries different erase functions given in the flashctx->chip->block_erasers[] by iterating through the list. Assuming these functions are in order of the length (number of sectors) they erase, the first one would get selected most of the time as it erases the smallest length. But this would be inefficient as the function which erases more length would do the job faster although it might not give the required granularity. A better approach could be to use the latter (if necessary) until the remaining length is less than the length that this function can erase.
Aarya
On Wed, Mar 16, 2022 at 4:45 PM Buhrow, Simon <simon.buhrow@sieb-meyer.de> wrote:
Hi Aarya,
nice progress!
I´m writing having "optimizing erase-function" in mint. However the following might apply fully or in parts to the other topic(s) as well:
As written to Hui Xiang:
As it´s never a good idea to experiment with the workhorse itself, I would recommend to do tests on extra hardware. (There might be some things you can test with software dummies, someone else must tell you about that). A very cheap programmer often mentioned here is the CH341A Programmer, however there are many other affordable programmers with ftdi chips, the raspberry pi and other manufactures as well ( https://www.flashrom.org/Supported_programmers).
In addition you would need any supported Flash in a DIP package or a in SO-Package plus DIP-adapter.
There are several examples along the internet using flashrom and a programmer plus flash or target board with a soldered flash. Just pick any and start with that.
Can you suggest some tasks so that I can know more about these projects
A question from me: have you tried to build and run flashrom from your local repo source code?
Building flashrom is a good start. Furthermore possible steps to play a bit around would be this:
* Read a good article (e.g. wikipedia) about flash memory technology and understand why there are “block erase” functions (instead of byte wise erase).
* When you have done so and have any supported programmer plus flash at your hands (see above), take the datasheet of the flash and explore the parts about the different erase functions.
* Then try running erase (parts of or the entire) flash memory. Check (via debugging/print messages/verbose output) which block erase function is used.
* Compare the result with the best theoretical option derived from datasheet values. (“best” = fastest)
Hope this helps and you´ve got some dollars for the hardware. If anyone else has some thoughts about making progress without proposing a purchase, just let Aarya know.
Regards,
Simon
*Von:* Anastasia Klimchuk <aklm@chromium.org> *Gesendet:* Sonntag, 13. März 2022 07:45 *An:* flashrom@flashrom.org; Aarya Chaumal <aarya.chaumal@gmail.com> *Betreff:* [flashrom] Re: Questions regarding Easy project and GSoC
Aarya,
Thank you so much for your patches, awesome work!
Don't worry about merging for now. Merging almost never happens immediately. Reviewers will come back to the patches, check that everything is fine, all the comments are resolved etc. If everything is alright, reviewers will approve and then at some point merge.
It can also happen that you get another iteration of comments: but don't worry this is a normal process!
From your side, you always (for now, and for future) need to understand all the comments, resolve and reply - once this is done, it is the Reviewer's turn :)
It is very good that you identified two projects that are interesting for you. You will discuss a project in more detail with someone who plans to be Mentor for the project. Let me check who that will be.
Also, if someone who plans to be a Mentor for "optimizing erase-function" or "fixing endianness issues" is reading this, you can just reply :) What would be the best next steps for Aarya to prepare?
A question from me: have you tried to build and run flashrom from your local repo source code? To begin with you can run
flashrom -h
which is help information. It tells you all command line operations and arguments. It is served by cli_classic.c file.
So you can read about "erase" operation and then explore the code which implements it.
Meanwhile, just to check, have you read official resources from gsoc? These ones:
Student Guidelines https://google.github.io/gsocguides/student/
Rules https://summerofcode.withgoogle.com/rules (especially p.7)
And timeline https://developers.google.com/open-source/gsoc/timeline
Anastasia.
On Sun, Mar 13, 2022 at 1:44 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and
someone replied, was that your question?
Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya
Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite
initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I
started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
--
Anastasia.
Hi Aarya, On 11.04.22 13:46, Aarya Chaumal wrote:
In the "Optimizing Erase Function Selection" project what is considered a minimum level of success. I think it should be that the resulting average erase time should be similar to the theoretical value based on the implemented algorithm and less than the current erase time.
theoretical values are hard to get right. Beside the documented delays of a flash chip, we have delays in the programmer and in case of external programmers round-trip delays on the bus where they are attached (e.g. USB, UART). As the current code is implicitly optimized for smaller changes, I would define basic success as reducing the programming time for a full flash-chip write (could be tested by writing random data) without increasing the time for a small change (e.g. write random data with a layout region of 4KiB).
Are there any other objectives that need to be achieved for the project?
IIRC, the description mentioned a prerequisite: We need to know in advance if the programmer will be able to execute a specific erase command. This is very important so we can get rid of the current fallback strategy that simply tries the next command if one fails. The fallback strategy is somewhat controversial anyway: If the programmer rejects a command, it's reasonable to try another. However if an erase fails due to hardware trouble (transfer failure or even the flash chip failing), trying again with a bigger erase block size can make things worse.
Also what stretch objectives could be there for the project?
Maybe optimization for more write patterns (re-writing a full flash doesn't happen very often). However, we'll have to see if that is possible/necessary. Maybe one could take the indi- vidual erase times of a flash chip into account. For instance if a 4KiB erase takes x ms and a 64KiB erase takes 10*x, then it might speed things up to use the bigger erase block even if it wouldn't have to be fully erased. Nico
Anastasia and Felix, I submitted my proposal for "optimize erase function selection" yesterday after which I received an acknowledgment mail saying "Your project proposal for GSoC 2022 to Flashrom has been submitted. Mentors will review your proposal and possibly contact you with questions." Just wanted to ask if you have any questions or suggestions regarding it. Also, I have decided not to write a proposal for the other project I was interested in i.e. "Fix endianness issues" as writing a proposal already takes a lot of time and effort that I can't give more due to my college exams. Although, I would love to do it after GSOC if the project remains available then. Aarya. On Mon, Apr 11, 2022 at 5:45 PM Nico Huber <nico.h@gmx.de> wrote:
Hi Aarya,
On 11.04.22 13:46, Aarya Chaumal wrote:
In the "Optimizing Erase Function Selection" project what is considered a minimum level of success. I think it should be that the resulting average erase time should be similar to the theoretical value based on the implemented algorithm and less than the current erase time.
theoretical values are hard to get right. Beside the documented delays of a flash chip, we have delays in the programmer and in case of external programmers round-trip delays on the bus where they are attached (e.g. USB, UART).
As the current code is implicitly optimized for smaller changes, I would define basic success as reducing the programming time for a full flash-chip write (could be tested by writing random data) without increasing the time for a small change (e.g. write random data with a layout region of 4KiB).
Are there any other objectives that need to be achieved for the project?
IIRC, the description mentioned a prerequisite: We need to know in advance if the programmer will be able to execute a specific erase command. This is very important so we can get rid of the current fallback strategy that simply tries the next command if one fails.
The fallback strategy is somewhat controversial anyway: If the programmer rejects a command, it's reasonable to try another. However if an erase fails due to hardware trouble (transfer failure or even the flash chip failing), trying again with a bigger erase block size can make things worse.
Also what stretch objectives could be there for the project?
Maybe optimization for more write patterns (re-writing a full flash doesn't happen very often). However, we'll have to see if that is possible/necessary. Maybe one could take the indi- vidual erase times of a flash chip into account. For instance if a 4KiB erase takes x ms and a 64KiB erase takes 10*x, then it might speed things up to use the bigger erase block even if it wouldn't have to be fully erased.
Nico
Hi Aarya, On Sat, 2022-04-16 at 00:52 +0530, Aarya Chaumal wrote:
I submitted my proposal for "optimize erase function selection" yesterday after which I received an acknowledgment mail saying "Your project proposal for GSoC 2022 to Flashrom has been submitted. Mentors will review your proposal and possibly contact you with questions." Just wanted to ask if you have any questions or suggestions regarding it.
Awesome and congrats! Nice to have you on board :) I just took a quick look over it and it looks good to me. I will read it in detail later (it's already late here).
Also, I have decided not to write a proposal for the other project I was interested in i.e. "Fix endianness issues" as writing a proposal already takes a lot of time and effort that I can't give more due to my college exams. Although, I would love to do it after GSOC if the project remains available then.
Sure! // Felix
Aarya, This is amazing news, I am super happy to get your project proposal! It is nice to have you with us :) We have long public holidays here (in AU), but I had a quick look and the proposal looks fine. Once the holidays are over, we, together with mentor(s), will go through the proposal carefully, define next steps, and of course will inform you on how things are going. For now, you did everything right, and submitted the project proposal at the right time. Thanks! :) On Sat, Apr 16, 2022 at 5:22 AM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Anastasia and Felix,
I submitted my proposal for "optimize erase function selection" yesterday after which I received an acknowledgment mail saying "Your project proposal for GSoC 2022 to Flashrom has been submitted. Mentors will review your proposal and possibly contact you with questions." Just wanted to ask if you have any questions or suggestions regarding it. Also, I have decided not to write a proposal for the other project I was interested in i.e. "Fix endianness issues" as writing a proposal already takes a lot of time and effort that I can't give more due to my college exams. Although, I would love to do it after GSOC if the project remains available then.
Aarya.
On Mon, Apr 11, 2022 at 5:45 PM Nico Huber <nico.h@gmx.de> wrote:
Hi Aarya,
On 11.04.22 13:46, Aarya Chaumal wrote:
In the "Optimizing Erase Function Selection" project what is considered a minimum level of success. I think it should be that the resulting average erase time should be similar to the theoretical value based on the implemented algorithm and less than the current erase time.
theoretical values are hard to get right. Beside the documented delays of a flash chip, we have delays in the programmer and in case of external programmers round-trip delays on the bus where they are attached (e.g. USB, UART).
As the current code is implicitly optimized for smaller changes, I would define basic success as reducing the programming time for a full flash-chip write (could be tested by writing random data) without increasing the time for a small change (e.g. write random data with a layout region of 4KiB).
Are there any other objectives that need to be achieved for the project?
IIRC, the description mentioned a prerequisite: We need to know in advance if the programmer will be able to execute a specific erase command. This is very important so we can get rid of the current fallback strategy that simply tries the next command if one fails.
The fallback strategy is somewhat controversial anyway: If the programmer rejects a command, it's reasonable to try another. However if an erase fails due to hardware trouble (transfer failure or even the flash chip failing), trying again with a bigger erase block size can make things worse.
Also what stretch objectives could be there for the project?
Maybe optimization for more write patterns (re-writing a full flash doesn't happen very often). However, we'll have to see if that is possible/necessary. Maybe one could take the indi- vidual erase times of a flash chip into account. For instance if a 4KiB erase takes x ms and a 64KiB erase takes 10*x, then it might speed things up to use the bigger erase block even if it wouldn't have to be fully erased.
Nico
-- Anastasia.
Hi, Just wanted to know how things are going with the GSOC selection process. Sorry if I'm being too eager :) Aarya. On Sun, Apr 17, 2022 at 2:47 PM Anastasia Klimchuk <aklm@chromium.org> wrote:
Aarya,
This is amazing news, I am super happy to get your project proposal! It is nice to have you with us :)
We have long public holidays here (in AU), but I had a quick look and the proposal looks fine.
Once the holidays are over, we, together with mentor(s), will go through the proposal carefully, define next steps, and of course will inform you on how things are going. For now, you did everything right, and submitted the project proposal at the right time. Thanks! :)
On Sat, Apr 16, 2022 at 5:22 AM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Anastasia and Felix,
I submitted my proposal for "optimize erase function selection"
yesterday after which I received an acknowledgment mail saying "Your project proposal for GSoC 2022 to Flashrom has been submitted. Mentors will review your proposal and possibly contact you with questions." Just wanted to ask if you have any questions or suggestions regarding it.
Also, I have decided not to write a proposal for the other project I was interested in i.e. "Fix endianness issues" as writing a proposal already takes a lot of time and effort that I can't give more due to my college exams. Although, I would love to do it after GSOC if the project remains available then.
Aarya.
On Mon, Apr 11, 2022 at 5:45 PM Nico Huber <nico.h@gmx.de> wrote:
Hi Aarya,
On 11.04.22 13:46, Aarya Chaumal wrote:
In the "Optimizing Erase Function Selection" project what is
considered a
minimum level of success. I think it should be that the resulting average erase time should be similar to the theoretical value based on the implemented algorithm and less than the current erase time.
theoretical values are hard to get right. Beside the documented delays of a flash chip, we have delays in the programmer and in case of external programmers round-trip delays on the bus where they are attached (e.g. USB, UART).
As the current code is implicitly optimized for smaller changes, I would define basic success as reducing the programming time for a full flash-chip write (could be tested by writing random data) without increasing the time for a small change (e.g. write random data with a layout region of 4KiB).
Are there any other objectives that need to be achieved for the project?
IIRC, the description mentioned a prerequisite: We need to know in advance if the programmer will be able to execute a specific erase command. This is very important so we can get rid of the current fallback strategy that simply tries the next command if one fails.
The fallback strategy is somewhat controversial anyway: If the programmer rejects a command, it's reasonable to try another. However if an erase fails due to hardware trouble (transfer failure or even the flash chip failing), trying again with a bigger erase block size can make things worse.
Also what stretch objectives could be there for the project?
Maybe optimization for more write patterns (re-writing a full flash doesn't happen very often). However, we'll have to see if that is possible/necessary. Maybe one could take the indi- vidual erase times of a flash chip into account. For instance if a 4KiB erase takes x ms and a 64KiB erase takes 10*x, then it might speed things up to use the bigger erase block even if it wouldn't have to be fully erased.
Nico
-- Anastasia.
Hi Aarya, On 16.05.22 13:40, Aarya Chaumal wrote:
Just wanted to know how things are going with the GSOC selection process. Sorry if I'm being too eager :)
it's not up to us right now ;) Google will announce the accepted projects on May 20 [1]. Nico [1] https://developers.google.com/open-source/gsoc/timeline
Hi Aarya, Things are going well, we (Org Admins) have submitted all the "paperwork" for the projects and are now waiting for the official announcement! Nico is absolutely correct, announcement will be on May 20. We are waiting for it as much as you ;) -- Anastasia.
On 26 March 2022 05:44:56 WET, Aarya Chaumal <aarya.chaumal@gmail.com> wrote: Hi Aarya,
I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? A flashrom layout region is just a name with a start and end address. There are no checks for overlapping regions. The parsing of a layout file is done by layout_from_file() in layout.c
-- Thomas
I realised one thing that I need to answer:
I have completed a rough draft for my proposal, can someone review it?
So just to be very very clear: the answer is no, we won't be pre-reviewing your proposal(s). You will submit them to the gsoc website, they will go through the system and then will come to us. And we will read all the proposals! :) Felix answered this correctly, but I see that my message was vague, so I decided to clarify. You are welcome to ask questions, if you have any about the project, so that you can write the proposal yourself. Good luck! On Tue, Mar 29, 2022 at 8:18 PM Thomas Heijligen <src@posteo.de> wrote:
On 26 March 2022 05:44:56 WET, Aarya Chaumal <aarya.chaumal@gmail.com> wrote: Hi Aarya,
I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? A flashrom layout region is just a name with a start and end address. There are no checks for overlapping regions. The parsing of a layout file is done by layout_from_file() in layout.c
-- Thomas
-- Anastasia.
Hi Anastasia, Thanks for the clarification :) Aarya. On Thu, Mar 31, 2022 at 12:32 PM Anastasia Klimchuk <aklm@chromium.org> wrote:
I realised one thing that I need to answer:
I have completed a rough draft for my proposal, can someone review it?
So just to be very very clear: the answer is no, we won't be pre-reviewing your proposal(s). You will submit them to the gsoc website, they will go through the system and then will come to us. And we will read all the proposals! :)
Felix answered this correctly, but I see that my message was vague, so I decided to clarify.
You are welcome to ask questions, if you have any about the project, so that you can write the proposal yourself. Good luck!
On Tue, Mar 29, 2022 at 8:18 PM Thomas Heijligen <src@posteo.de> wrote:
On 26 March 2022 05:44:56 WET, Aarya Chaumal <aarya.chaumal@gmail.com>
wrote:
Hi Aarya,
I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? A flashrom layout region is just a name with a start and end address. There are no checks for overlapping regions. The parsing of a layout file is done by layout_from_file() in layout.c
-- Thomas
-- Anastasia.
Hi Thomas, Can overlapping regions in the layout file cause problems or lead to ambiguous results. If yes, then I think we should do the checks. Aarya. On Tue, Mar 29, 2022 at 2:48 PM Thomas Heijligen <src@posteo.de> wrote:
On 26 March 2022 05:44:56 WET, Aarya Chaumal <aarya.chaumal@gmail.com> wrote: Hi Aarya,
I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? A flashrom layout region is just a name with a start and end address. There are no checks for overlapping regions. The parsing of a layout file is done by layout_from_file() in layout.c
-- Thomas
Hi Aarya, in most scenarios you operate only on one region of the layout. Then overlapping regions doesn't matter. Also overlapping regions can be useful when dealing with nested structures. E.g. an Intel IFD image and the BIOS region contains a coreboot fmap. All in all the user of the layout function is responsible for taking the right actions. -- Thomas On 31 March 2022 21:51:40 WEST, Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hi Thomas,
Can overlapping regions in the layout file cause problems or lead to ambiguous results. If yes, then I think we should do the checks.
Aarya.
On Tue, Mar 29, 2022 at 2:48 PM Thomas Heijligen <src@posteo.de> wrote:
On 26 March 2022 05:44:56 WET, Aarya Chaumal <aarya.chaumal@gmail.com> wrote: Hi Aarya,
I performed (read, write, erase) on specific regions of the flash using the layout file. Do the regions in the layout file have to be exclusive or they can overlap? A flashrom layout region is just a name with a start and end address. There are no checks for overlapping regions. The parsing of a layout file is done by layout_from_file() in layout.c
-- Thomas
Hi Aarya, Thank you for contributing to flashrom. The merge of a patch sometimes needs just time, even if it has +2. The topic "fixing endianness issues" consists of tasks to rewrite code that assumes a specific endianness. For example, the flashrom fmap parser just maps packed c structs onto the memory. This works only when flashrom runs on a CPU with the same endian as fmap defines. We have two macros, __FLASHROM_LITTLE_ENDIAN__ and __FLASHROM_BIG_ENDIAN__ which handle code that works only on one endian. In the GSoC project, we want to make this code run on little and big endian systems. Besides that, we may find additional parts in the code which are endian specific. -- Thomas On Sun, 2022-03-13 at 08:13 +0530, Aarya Chaumal wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
_______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
Hi Aarya, Thank you for contributing to flashrom. The merge of a patch sometimes needs just time, even if it has +2. The topic "fixing endianness issues" consists of tasks to rewrite code that assumes a specific endianness. For example, the flashrom fmap parser just maps packed c structs onto the memory. This works only when flashrom runs on a CPU with the same endian as fmap defines. We have two macros, __FLASHROM_LITTLE_ENDIAN__ and __FLASHROM_BIG_ENDIAN__ which handle code that works only on one endian. In the GSoC project, we want to make this code run on little and big endian systems. Besides that, we may find additional parts in the code which are endian specific. -- Thomas On Sun, 2022-03-13 at 08:13 +0530, Aarya Chaumal wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
_______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
Hi Thomas, Thank you for your quick reply on the "fixing endianness issues" project. I saw that in the code that functions flashrom_layout_read_from_* only work for little-endian machines and return an error code otherwise. Also, the function flashrom_layout_parse_fmap is defined for little-endian machines. So maybe we can have a function to convert the data into the endianness of the machine before parsing/reading it. Macros are defined for up to 64bit endianness conversion in hwaccess.h but they are not used anywhere. Doing this much should make the code run on both types of machines. This logic might also work in other parts of the code which are endian specific (currently not sure which parts are these) Furthermore, I think we should give the user the specify in which endian he wants to write/read the data. Aarya. On Fri, Mar 18, 2022 at 2:54 AM Thomas Heijligen <src@posteo.de> wrote:
Hi Aarya,
Thank you for contributing to flashrom. The merge of a patch sometimes needs just time, even if it has +2.
The topic "fixing endianness issues" consists of tasks to rewrite code that assumes a specific endianness. For example, the flashrom fmap parser just maps packed c structs onto the memory. This works only when flashrom runs on a CPU with the same endian as fmap defines. We have two macros, __FLASHROM_LITTLE_ENDIAN__ and __FLASHROM_BIG_ENDIAN__ which handle code that works only on one endian. In the GSoC project, we want to make this code run on little and big endian systems. Besides that, we may find additional parts in the code which are endian specific.
-- Thomas
On Sun, 2022-03-13 at 08:13 +0530, Aarya Chaumal wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan-build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
_______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
Hi Aarya, Yes, that is the plan. There is an open patch[1] in Gerrit to add deserialization functions for endian specific encoding. Parsing data to a struct can then look like this: struct data { uint16_t a; uint32_t b; }; void* buffer; struct data my_data; my_data.a = read_le16(bufer); my_data.b = read_le32(buffer + 2); The endian independent layout parsing is the main component for this project. But we are glad of every closed issue. For the fmap parsing I've stated an attempt last year but got deviated by other tasks. The code is far from working, but you may want to have a look. The first version on Gerrit [2] and a copy of my private working tree [3]. Most data flashrom reads are just passed to the user. The user should know how to handle it. This is not the job of flashrom. Only when flashrom itself needs to interpret some data, like layout information of the chip, we need to care about it. [1] https://review.coreboot.org/c/flashrom/+/31016/12 [2] https://review.coreboot.org/c/flashrom/+/57265/4 [3] https://gist.github.com/heijligen/8828cec759f552549b201bdf35976f39 -- Thomas On Sat, 2022-03-19 at 19:08 +0530, Aarya Chaumal wrote:
Hi Thomas,
Thank you for your quick reply on the "fixing endianness issues" project. I saw that in the code that functions flashrom_layout_read_from_* only work for little-endian machines and return an error code otherwise. Also, the function flashrom_layout_parse_fmap is defined for little-endian machines. So maybe we can have a function to convert the data into the endianness of the machine before parsing/reading it. Macros are defined for up to 64bit endianness conversion in hwaccess.h but they are not used anywhere. Doing this much should make the code run on both types of machines. This logic might also work in other parts of the code which are endian specific (currently not sure which parts are these)
Furthermore, I think we should give the user the specify in which endian he wants to write/read the data.
Aarya.
On Fri, Mar 18, 2022 at 2:54 AM Thomas Heijligen <src@posteo.de> wrote:
Hi Aarya,
Thank you for contributing to flashrom. The merge of a patch sometimes needs just time, even if it has +2.
The topic "fixing endianness issues" consists of tasks to rewrite code that assumes a specific endianness. For example, the flashrom fmap parser just maps packed c structs onto the memory. This works only when flashrom runs on a CPU with the same endian as fmap defines. We have two macros, __FLASHROM_LITTLE_ENDIAN__ and __FLASHROM_BIG_ENDIAN__ which handle code that works only on one endian. In the GSoC project, we want to make this code run on little and big endian systems. Besides that, we may find additional parts in the code which are endian specific.
-- Thomas
On Sun, 2022-03-13 at 08:13 +0530, Aarya Chaumal wrote:
As suggested, I have been doing some of the easy projects till now and I have enjoyed it. I have submitted a few patches till now and some of them have gotten +2 code-reviews but still, they were not merged. Is there anything that is required to get the changes to be merged? Also, I have fixed most of the issues I got by running scan- build, only 2 classes of issues were remaining which I feel are false positives (showing underflow error but those cases won't occur or are handled seprately) created by the tool and can be ignored. As was going through your proposed projects for GSoC, I found "optimizing erase-function" and "fixing endianness issues" interesting and would like to do that in the summer. Can you suggest some tasks so that I can know more about these projects and get an idea of how to write my proposal for GSoC for doing this project? Thanks :)
On Thu, Mar 10, 2022 at 10:45 AM Anastasia Klimchuk <aklm@chromium.org> wrote:
Hello Aarya,
Nice to meet you! I think I saw your question on the IRC channel, and someone replied, was that your question? Do you still need more info? Let us know if yes.
Thanks!
On Wed, Mar 9, 2022 at 2:42 PM Aarya Chaumal <aarya.chaumal@gmail.com> wrote:
Hello there,
I hope you are well today when you receive this email. I am Aarya Chaumal, a Computer Engineering student at the College of Engineering Pune, India. While going through organizations for this year's Google's Summer of Code I came across your organization, Flashrom.
I am a part of onboard computers subsystem at my college's satellite initiative. Through this, I have closely worked on Atmel SAM E70 XPLAINED board. Also, I have strong knowledge about C/C++ and assembly language. From your list of GSoC project ideas, I liked the idea of “Remove global state from flashrom” and "Optimize Erase-Function Selection", although I am not quite sure which one is more suitable for me. Can you guide me through this?
As mentioned in your Contributor commitments and requirements, I started to do one of the easy projects - Add new flash chip definitions. For this, I read the relevant datasheets, one from the unlisted chips and another of a listed one (for reference) but still, I am not getting the information about some fields for the structure in the datasheet, namely the feature_bits, probe_timing. Also, do I have to write the probe, read, write and erase functions for the chip separately? Also, how do I test if my code is working as I don't have relevant hardware with me? Can you help me with this? Also what resources should I use to learn more about it?
Thank you for looking into this for me. Sincerely, Aarya Chaumal _______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
-- Anastasia.
_______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-leave@flashrom.org
participants (7)
-
Aarya Chaumal -
Anastasia Klimchuk -
Buhrow, Simon -
Felix Singer -
Nico Huber -
Thomas Heijligen -
Thomas Heijligen