July 2026 - flashrom - mail.coreboot.org

cleanup of old patches in gerrit
by Anastasia Klimchuk Aug. 29, 2026

Aug. 29, 2026

Hello everyone, I plan to do a cleanup of old patches that are still hanging in Gerrit in "open" status. Specifically, everything that has not been modified since 1st January 2025. This means, everything that has not been updated for the last 1.5 years. The plan for these patches is to 1) add to them hashtag "cleanup-08-2026" 2) mark them as Abandoned (not deleting) Patches with status Abandoned can still be accessed by the same direct link, they also can be searched in Gerrit (by owner, reviewer, date etc), you just need to add "is:abandoned" to the search. And they can be restored if needed. Hashtag "cleanup-08-2026" allows to view all patches by hashtag, if needed. Here is the way to view all of them: https://review.coreboot.org/q/status:open+project:flashrom+before:2024-12-31 (currently 280) If you would like to keep one of those patches active, you can rebase it on the latest head, make sure it builds and tests pass, and upload a new patchset. This would update the modification date, and the patch will disappear from the search above. I plan to do cleanup by the end of August. There are two main reasons: 1) Make the view of open patches realistic, and reflect the actual work in review. At the moment the view https://review.coreboot.org/q/status:open+project:flashrom shows as if we have 300+ changes in review, which is not true. 2) Make "merge conflicts" section inside the individual patch useful. At the moment it often shows 10 merge conflicts, but then you look, and all those "conflicts" are forgotten years ago. -- Anastasia.

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release v1.8.0 and timeline
by Anastasia Klimchuk Aug. 16, 2026

Aug. 16, 2026

Good day everyone, We are planning to release v1.8.0 by the end of August. Planned dates are: 7th August: tagging v1.8.0-rc1 28th August: tagging the release v1.8.0 Between 7th and 28th Aug we are doing testing and bugfixing. Any help with this is very welcome and appreciated: https://flashrom.org/how_to_support_flashrom.html#building-and-testing New features won't be merged during this time, but pushing the patch for review is still fine. Just keep in mind that, even if reviewed, new features won't be merged until after the 28th. Full document about release process is here: https://flashrom.org/dev_guide/release_process.html This document will contain full information about what is included in the release (at the moment it is not complete, but will be in a week): https://flashrom.org/release_notes/devel.html It is also possible to inspect all commits since previous release in GitHub UI: https://github.com/flashrom/flashrom/commits/main/?since=2026-03-02 Importantly: we plan to drop some of the old programmers, and v1.8.0 will be the last release to contain them. More details in this post "Dropping old programmers": https://mail.coreboot.org/archives/list/flashrom@flashrom.org/thread/2GOOX2… -- Anastasia.

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failed: thinkpad t430
by nyangela＠tuta.io July 31, 2026

July 31, 2026

p.s. i havent rebooted yet so idk if its bricked or not anvil@t430:~ $ sudo ./Downloads/skulls-1.1.3/skulls.sh -b t430 [sudo] password for anvil: Sorry, try again. [sudo] password for anvil: 1) ./t430_coreboot_seabios_free_4931b978d9_top.rom 2) Quit file not specified. Please select a file to flash. Please read the README for details about the differences: 1 t430_coreboot_seabios_free_4931b978d9_top.rom: OK Flash the BIOS now? y/N: y flashrom 1.4.0 on Linux 7.0.14-2-liquorix-amd64 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using region: "bios". Found chipset "Intel QM77". Enabling flash write... SPI Configuration is locked down. FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only. FREG1: BIOS region (0x00500000-0x00bfffff) is read-write. FREG2: Management Engine region (0x00003000-0x004fffff) is locked. FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. PR1: Warning: 0x00b40000-0x00bfffff is read-only. PR2: Warning: 0x00b10000-0x00b10fff is read-only. PR3: Warning: 0x00ad0000-0x00adefff is read-only. PR4: Warning: 0x00800000-0x00aaffff is read-only. At least some flash regions are read protected. You have to use a flash layout and include only accessible regions. For write operations, you'll additionally need the --noverify-all switch. See manpage for more details. Enabling hardware sequencing due to multiple flash chips detected. OK. Multiple flash components detected, skipping flash identification. Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific) on internal. Reading old flash chip contents... done. Transaction error between offset 0x00800000 and 0x00800000 (= 0x00800000 + 0)! Erase/write done from 800000 to bfffff Write Failed!Uh oh. Erase/write failed. Your flash chip is in an unknown state. Get help on IRC (see https://www.flashrom.org/Contact) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"!------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF!

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Dropping old programmers
by Anastasia Klimchuk July 30, 2026

July 30, 2026

Hello everyone, We made a list of old programmers that are candidates for being dropped in v2.0.0 (Jan 2027). The reason is that they work on old devices which only support old flashrom versions. The release this year, v1.8.0, will be the last to have all of the programmers. Starting from v2.0.0 next year, they planned to be dropped. The list of candidates: rayer_spi atavia atapromise nic3com gfxnvidia satasii nicrealtek nicnatsemi satamv drkaiser atahpt it8212 developerbox_spi Proposed commits to delete them can be all viewed by the tag "delete-prog-in-v2.0.0", the link: https://review.coreboot.org/q/topic:%22delete-prog-in-v2.0.0%22 Thanks so much to Abdelkader, he did all the work, and the research, and added details in each commit message! If you would like to keep one of the programmers on the list, you can send a rescue helicopter like this: 1) double-check which version of flashrom you plan to use this programmer, because they will only be deleted after v1.8.0. any version earlier than that will have all the programmers. 2) commit yourself to be a maintainer for this programmer. create a patch to add yourself to MAINTAINERS file for the programmer. The commitment is only to keep the programmer in working condition (no other duties) 3) after 2) there is time until the end of this year to verify the programmer works on the latest flashrom head. If you have any suggestions on the idea, or questions, now is the good time to say that. If the suggestion is to keep the programmer, the instructions for what to do are above. -- Anastasia.

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Need help with Pinephone - Wondering if can reflash FW to board
by ari.kendall July 29, 2026

July 29, 2026

Hello, Strange Q. I have a pinephone that seems to be power bugged. If I know the board design well enough, theres the AXP on the SOC for OS power, but theres an external IC that does BMC management. However, the IC waits for the AXP to say go. Does anyone know of any way to at minimum reset the board or at most reflash it? Its been a pain in my butt. TX Aremis of X8X

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W25Q128.V flash failure: "Block protection could not be disabled!"
by duc01k＠disroot.org July 25, 2026

July 25, 2026

Hi, I was trying to flash a modded dump back to the W25Q128.V BIOS chip of a Lenovo ThinkPad T470 but it failed and left my chip in an unusable state. I tested using SPI through two different devices - a ch341a and a Raspberry Pi - and with two different versions of flashrom - 1.4.0 and 1.8.0-devel (git:v1.7.0-48-g0b14d50a). The strange thing is that I've already successfully flashed a dump to this chip once before, to set the HAP bit. I was using the same devices and version of flashrom. The only thing that changed since then is I updated the laptop's firmware, from 1.78 to 1.79. Hope you guys can help because the laptop won't turn on now, pressing the power button does absolutely nothing. Here's the output from flashrom 1.4.0: ``` $ flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -c W25Q128.V -w ./modified_dump.bin flashrom 1.4.0 on Linux 6.18.33+rpt-rpi-v7 (armv7l) flashrom is free software, get the source code at https://flashrom.org Found Winbond flash chip "W25Q128.V" (16384 kB, SPI) on linux_spi. Failed to unlock flash status reg with wp support. Block protection could not be disabled! Reading old flash chip contents... done. FAILED at 0x00000c00! Expected=0xff, Found=0xd9, failed byte count from 0x00000000-0x0000ffff: 0x1bcb Erase/write done from 0 to ffffff Write Failed!Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... done. Apparently at least some data has changed. Your flash chip is in an unknown state. Please report this to the mailing list at flashrom(a)flashrom.org or on IRC (see https://www.flashrom.org/Contact for details), thanks! ``` Here's the verbose output from 1.8.0-devel (git:v1.7.0-48-g0b14d50a): ``` $ ./flashrom -V -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -c W25Q128.V -w ./modified_dump.bin flashrom v1.8.0-devel (git:v1.7.0-48-g0b14d50a) on Linux 6.18.33+rpt-rpi-v7 (armv7l) flashrom is free software, get the source code at https://flashrom.org flashrom was built with GCC 14.2.0, little endian Command line (7 args): ./flashrom -V -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -c W25Q128.V -w /home/flashing/Downloads/T470_Dump_2026-05-28_to-flash.bin Initializing linux_spi programmer Using device /dev/spidev0.0 Using 1000kHz clock get_max_kernel_buf_size: Using value from /sys/module/spidev/parameters/bufsiz as max buffer size. linux_spi_init: max_kernel_buf_size: 4096 The following protocols are supported: SPI. Probing for Winbond W25Q128.V, 16384 kB: compare_id: id1 0xef, id2 0x4018 Added layout entry 00000000 - 00ffffff named complete flash Found Winbond flash chip "W25Q128.V" (16384 kB, SPI) on linux_spi. Chip status register is 0xf8. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is set Chip status register: Sector Protect Size (SEC) is 4 KB Chip status register: Top/Bottom (TB) is bottom Chip status register: Block Protect 2 (BP2) is set Chip status register: Block Protect 1 (BP1) is set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Chip status register 2 is NOT decoded! This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). write_wp_bits: wp_verify failed: reg:1 actual:0xf8 expected:0x80 Failed to unlock flash status reg with wp support. Some block protection in effect, disabling... Block protection could not be disabled! Chip status register is 0xf8. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is set Chip status register: Sector Protect Size (SEC) is 4 KB Chip status register: Top/Bottom (TB) is bottom Chip status register: Block Protect 2 (BP2) is set Chip status register: Block Protect 1 (BP1) is set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Chip status register 2 is NOT decoded! can_change_target_regions: cannot fully update complete flash region (00000000..0xffffff) due to chip's write-protection. At least one target region is not fully writable. Aborting. Error: some of the required checks to prepare flash access failed. Earlier messages should give more details. Write operation has not started. restoring chip status (0xf8) write_wp_bits: wp_verify failed: reg:1 actual:0xf8 expected:0xf0 Runtime from programmer init to shutdown: 0min 0sec ```

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[REPORT] Winbond W25Q32FVSIG on ch341a_spi (mainboard: HP 15-g010la / Compal ZSO51, LA-A996P Rev 1.0) — read/erase/write/verify OK, WP subsystem not exercised
by Emmanuel Nicolás Velásquez Muñoz July 19, 2026

July 19, 2026

Hi, I'm Emmanuel Velásquez, a Computer & Information Systems Engineering Student at Universidad de Magallanes, writing to send the report flashrom asked for during my tests: "This flash part has status UNTESTED for operations: WP [...] please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip." Context: I was trying to safely revive an inventoried laptop that my university lent me for study (an HP 15-g010la with a Compal ZSO51 / LA-A996P Rev 1.0 mainboard) that would not boot. Before attempting any repair I wanted to use a safe, verifiable approach on Linux rather than Windows flashing tools, so I used flashrom with an external CH341A SPI programmer, without touching the chip until I had a verified backup. Good news: thanks to flashrom, the laptop is alive again. The dump showed a single corrupted bit inside the compressed DXE volume (everything else on the chip — EC firmware, DMI, NVRAM, Secure Boot keys, boot block — was intact). I corrected that single bit in the backup, reflashed it with flashrom -w, and verified the write with a full read-back (matching SHA-256). The board's original factory data — serial number, UUID, SKU — was preserved throughout, since the write only touched the corrupted sector. No data loss, no need to reprogram DMI/NVRAM by hand. Chip: Winbond W25Q32FVSIG, 4096 kB, SOP-8, in-circuit via CH341A. flashrom -p ch341a_spi identifies the chip as "W25Q32.V" and reports the initial status register as: Chip status register is 0x14. Results of my tests, all verified afterwards via SHA-256: - READ (-r): two full, independent reads, byte-for-byte identical (cmp showed no differences), exact size 4194304 bytes. -> WORKS CORRECTLY. - WRITE (-w) of a repaired image (original backup with a single bit corrected) with an implicit prior sector ERASE: flashrom reported "Erasing and writing flash chip... Erase/write done." and "Verifying flash... VERIFIED." I then read the whole chip back and the SHA-256 matched the written image exactly. -> ERASE and WRITE WORK CORRECTLY. - WP (Write Protect): the chip did come from the factory with block protection active — the initial status register (0x14) has bits BP0 and BP2 set. flashrom detected this itself and handled it transparently: Chip status register is 0x14. ... Some block protection in effect, disabling... disabled. Reading flash... done. So flashrom cleared the block-protect bits in the status register on its own before reading, and the subsequent erase/write on this chip completed and verified with no issues and no manual intervention on my end. That said, I did not invoke flashrom's dedicated WP subsystem (--wp-status / --wp-enable / --wp-disable / --wp-range), so I can't confidently report the WP operation itself as a full pass — only that the automatic block-protection handling that read/erase/write rely on worked correctly for this chip. Attached is the full log of a read operation generated with flashrom's own -o option (file flashrom_log.txt), as requested in the documentation. Environment: - flashrom 1.3.0 (Debian/Ubuntu package, "flashrom is free software") - Kernel: Linux 6.17.0-35-generic x86_64 - Programmer: CH341A Pro (USB ID 1a86:5512), ch341a_spi mode - Mainboard: HP 15-g010la, Compal ZSO51 board, board number LA-A996P Rev. 1.0 (Insyde H2O BIOS, version F.48) Thanks for flashrom — it was key to getting a verified backup before attempting any repair. *Remite:* Emmanuel Velásquez Estudiante de Ingeniería Civil en Computación e Informática UMAG, sede Punta Arenas violin1man(a)gmail.com [Personal account] -- NOTA DE CONFIDENCIALIDAD: Este correo electrónico es confidencial y para uso exclusivo de la(s) persona(s) a quien(es) se dirige y su contenido es de propiedad intelectual de la Universidad de Magallanes. Si el lector de esta transmisión electrónica no es el destinatario, se le notifica que cualquier distribución o copia de la misma está estrictamente prohibida. Si ha recibido este correo por error le solicitamos notificar inmediatamente a la persona que lo envió y borrarlo definitivamente de su sistema. CONFIDENTIALITY NOTE: This email is confidential and for the exclusive use of the person (s) to whom it is addressed and its content is the intellectual property of the University of Magallanes. If the reader of this electronic transmission is not the intended recipient, you are hereby notified that any distribution or copy thereof is strictly prohibited. If you have received this email by mistake we ask you to immediately notify the person who sent it and delete it permanently from your system.

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All Chips Lead to Flashrom
by Abdelkader Boudih July 19, 2026

July 19, 2026

Hi everyone, A few months ago I ordered a batch of SPI flash chips from AliExpress for my own projects. After all, one does not simply order one flash chip. The seller accepts custom orders for parts that are not listed. He asked me which chips I wanted. My answer was simply: Everything. I want 3-10 samples of everything. Apparently everything in China is… a lot of chips. One thing I did appreciate at the time is that the seller is a trader, not a manufacturer. He spent several months sourcing the requested parts before shipping them. Since I had bought from him before, he simply assumed this was another one of my 'buy samples of everything' requests. By the time everything had been collected, there was no way I was going to leave him holding the bag. Fast forward a few months, and I now have roughly $3k worth of SPI flash devices. Thanks to the recent flash memory price increase, they are probably worth more today (around 10K in Mouser). Still a more honest ROI than NFTs. Nobody got rug-pulled. The practical consequence is that, over the coming months, I expect to submit a steady stream of verified chips to flashrom. For each device I will collect the datasheet, verify the identification, and group variants by JEDEC ID, voltage variants, etc. The main thing I need to watch out for is avoiding duplicate testing, because many of the same SKUs arrived in four or five different packages (DIP, SOIC, TSOP …). Some of these parts are already EOL or out of stock worldwide. That does not make them useless, though. Someone repairing or recovering an older device may still run into them. I also do not regret paying for the lot. The cost of the chips is small compared to the amount of human time it should save. Instead of multiple people wondering whether flashrom really supports a device, reviewers rechecking the same datasheets, or users waiting several release cycles for someone to eventually verify a chip, that work can simply be done once and upstreamed. This email is mostly a heads-up. If you start seeing chip verification patches arriving like a broken cron job, nothing unusual is happening. I am simply working through a very large pile of flash chips. Some people buy 48 GB of VRAM. I bought 48 GB of SPI flash. Veni, Vidi, Verified. (Repeated 1000 times.) Abdelkader Boudih

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Flashrom, Gigabyte Aorus B450m Elite, ch341a_spi (Devuan).
by VICTOR HUGO DE CASTRO DUTRA July 6, 2026

July 6, 2026

Good Day, Peace and Good! I tried the flashrom in my motherboard and at the final i get success. But this waht a long three weeks journey, and so i will post the succes at first. root@OrbitalStation:/home/dvtra/Public/Bios/mb_bios_b450m-aorus-elite_8a16bg0j_f69a# sudo flashrom -p ch341a_spi -w B450MAORUSELITE.F69a flashrom unknown on Linux 6.1.0-49-686-pae (i686) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found Winbond flash chip "W25Q128.W" (16384 kB, SPI) on ch341a_spi. === This flash part has status UNTESTED for operations: WP The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. Four weeks before i decided to try and delete the Bios Certifieds in manner to correct the error -22 in linux machines (Debian 13 and Devuan 6). So The motherboard still getting energy, but doesnt gives image. Searching this problem, i dicover that the new models need the certificates to work, not only get a AC/DC current. Beyond the true problem of the Programed Obsolescence i buy a ch341a driver in manner to try recover the Bios, and so at the first moment i get the error of < sudo rmmod ch341a > wich i discover is not a problem. and them discover the chip name with < sudo flashrom -p ch341a_spi > where i get the name of chip "W25Q128.W" in a message, wich as a the first part of the message ahead. But in this first attempt i get a fail in Verifying flash... So i shut off the machine and whem i turn on again i cannot find the chip, so i cut 1mm of the of the "pinça jacaré" (i believe the english term is SOIC8, SOP8 Test CLIP, SOIC8 Clamp or Flash BIOS Clip, i know this is a clip,but putting end in doubt manners i wrote the names that i found) to get more contact, only to discover other programes in chip as : sudo flashrom -p ch341a_spi flashrom unknown on Linux 6.1.0-49-686-pae (i686) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI) on ch341a_spi. === This flash part has status NOT WORKING for operations: PROBE READ ERASE WRITE This flash part has status UNTESTED for operations: WP The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! No operations were specified. By the way, even reading the message i try... sudo flashrom -p ch341a_spi -c "unknown SPI chip (RDID)" -E flashrom unknown on Linux 6.1.0-49-686-pae (i686) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI) on ch341a_spi. === This flash part has status NOT WORKING for operations: PROBE READ ERASE WRITE This flash part has status UNTESTED for operations: WP The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! Read is not working on this chip. Aborting. Your flash chip is in an unknown state. Please report this to the mailing list at flashrom(a)flashrom.org or on IRC (see https://www.flashrom.org/Contact for details), thanks! Or: sudo flashrom -p ch341a_spi -c "unknown SPI chip (RDID)" -w B450MAORUSELITE_F69a.bin flashrom unknown on Linux 6.1.0-49-686-pae (i686) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI) on ch341a_spi. === This flash part has status NOT WORKING for operations: PROBE READ ERASE WRITE This flash part has status UNTESTED for operations: WP The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! Error: Image size (16777216 B) doesn't match the expected size (0 B)! So i try erase and write ( -w; sudo flashrom -p ch341a_spi -c "unknown SPI chip (RDID)" -w B450MAORUSELITE_F69a.bin ; sudo flashrom -p ch341a_spi --wp-disable ) too, without success. And after that i cut a litle more the plastic contact of clip and puch some the copper connections to bottom to increase the range and contact with chip, and i got other lecture: sudo flashrom -p ch341a_spi flashrom unknown on Linux 6.1.0-49-686-pae (i686) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found Generic flash chip "unknown SPI chip (REMS)" (0 kB, SPI) on ch341a_spi. === This flash part has status NOT WORKING for operations: PROBE READ ERASE WRITE This flash part has status UNTESTED for operations: WP The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! No operations were specified. Again i tried to -E (erase) and -W (write) even knowing the need of space, and off course without success. So i buy a pack of new clips (pinça jacaré), wait two weeks and four days and tried again. And i get the success in this work. And as the message wrotes i m sending my success to the base. And to describe all in the details, Im install flashrom into my 32 bits, intel i915 i686, Devuan 5 (Daedalus) and make the operations im my dual boot Gigabyte Aorus B450m Elite - AMD Ryzen 7 3700x GTX 1050 TI - Devuan 6 (Excalibur) in SSD and Windows 11 in HD, to recovering procedure. Without no more at now, i desire to thank you for the software and wish the best regards!

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[RFC] flashrom 2.0: roadmap and release plan
by Abdelkader Boudih July 4, 2026

July 4, 2026

Hi all, I've been thinking about what flashrom 2.0.0 should look like, and I’d like to start the conversation now so we can work toward a 2.0 release early next year. My napkin plan: Between now and the release - Keep refactoring, improving documentation, and paying down technical debt. - Prepare the eviction of few programmers that only exist in museums or drive long-retired technology (rayer_spi is already in review as the first). These drivers are effectively untested; a refactor may incidentally touch them, but no one is validating them on real hardware. - Cut a 1.9.0 before January with any pending bug fixes, so we have a clean, stable base to branch 2.0 from. (Retired programmers may get fixes as a side effect of refactoring, but again.. untested.) Yes i skipped 1.8.0 for 2 reason: - skipping a version is basically the software equivalent of 'last call before 2.0.' - 1.9.0 to 2.0.0 is natural .. some software don't use double digit minor (1.10.0) ** The chip-testing push* A few months ago I ordered thousands of SKUs from China. The trader spent nearly three months contacting warehouses to source every SPI flash chip he could find. Some went out of stock immediately after I ordered them, so I may have been the last customer for a few of those parts. By the time collection finished, the same order would cost five figures thanks to the memory price spike. Once the packages finish arriving, I'll spend a few weekends testing every currently-unverified chip. The goal is that, by the 2.0 release, unknown-chip warnings should primarily be limited to devices released after flashrom itself. Manufacturers can also help by testing devices and mailing samples to maintainers for cross-checking. SPI flash chips are small enough to ship in a regular envelope. I see we have Winbond, nvidia and qualcomm and mcst contributors that have access to to new chips or non consumers facing chips. They can help with the catalog. This would make flashrom the largest open-source database of actually tested SPI flash devices. Plenty of closed-source tools claim 40k+ chips, but most are untested or hallucinated(the programmer offer a package the manufacturer never offered)! I have personally had to swap between 2–3 programmers just to read something that wasn't garbage. ** libflashrom as the reference layer* I would like libflashrom to become the de-facto low-level library that other projects build on, instead of everyone re-deriving the same chip data: - https://github.com/ArthurHeymans/rflasher - https://github.com/seuros/flashcat - https://gitlab.com/DavidGriffith/minipro None of these projects (flashrom included) has the funding or manpower to do everything. Sharing a well-tested chip database helps all of us. ** After 2.0* In 2.0 I’d like the focus to shift from architectural churn toward testing, new chip support, maintenance and polish. The one thing that could reopen major development is NAND support, but that's a whole new infrastructure (ECC, bad-block management, OOB) and deserves its own discussion. (I willhave the chips) ** Proposed release date:* 2027-01-29 (a Friday), exactly 25 years since Ron Minnich’s 'Dammit' commit, which is essentially where the project began. A project only gets one 25th anniversary. Missing that date would be like launching Voyager after the planetary alignment had passed. It would be pretty epic if Ron himself did the final version bump. Thoughts welcome, especially on the eviction list and the 1.9.0 cut. Already in review - rayer_spi - parallel-port SPI bit-banging (CB:93706) Legacy PCI option/boot-ROM flashers (par_master, raw x86 port I/O or PCI BAR) - nic3com - 3Com PCI NIC boot ROM - nicrealtek - Realtek/SMC 1211 NIC boot ROM - nicnatsemi - National Semiconductor DP838* NIC boot ROM - gfxnvidia - old NVIDIA graphics-card flash - drkaiser - Dr. Kaiser PC-Waechter PCI card - satasii - Silicon Image SATA/IDE controller - satamv - Marvell SATA controller - atahpt - HighPoint ATA/RAID controller - atapromise - Promise PDC2026x ATA/RAID controller - atavia - VIA VT6421A SATA controller - it8212 - ITE IT8212F ATA/RAID controller Orphaned / EOL hardware - developerbox_spi - Socionext SynQuacer DeveloperBox Thanks, Abdelkader Boudih

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