July 2024 - flashrom - mail.coreboot.org

Verification after write vs erase operations
by Anastasia Klimchuk Aug. 10, 2025

Aug. 10, 2025

Hello everyone, I want to bring into discussion a topic of verification of chip content which is performed after write or erase operations. Also for context prior discussion in this ticket: https://ticket.coreboot.org/issues/520 Currently we have a flag `-n` or `dont_verify_it` which is false by default. What the flag is doing is deciding whether verification needs to be performed after writing. The flag is false by default, so by default verification is happening after writing (which makes sense). Now the flag is only controlling write operation, and has no effect on erase operation. So for erase, the flag is ignored and verification is performed always. Just for context, it has always been like this. So for write operation we have a power option to say "ignore verification", and since it's false by default, the idea is, if you set it true then you know what you are doing. There is no such option for erase which seems a bit unfair. The two potential options to introduce equivalent option for erase are: 1) Add new flag `dont_verify_erase` (or some similar name) As a support for this option, it does not affect any existing use cases/scripts, and can be added any time. 2) Add coverage for erase operation under existing flag `-n` or `dont_verify_it` As a support for this option, erase operation can be seen as a variant of writing, since it does modify content of the chip, and so the fact it's not covered by the existing flag can be treated as a bug. What do people think about it? -- Anastasia.

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Re: Support for GD25LR512ME flash chip.
by Anastasia Klimchuk Nov. 1, 2024

Nov. 1, 2024

Victor, Thank you so much for the datasheets! I did a review of the pending patch, and now it will be possible to finally finish the patch from 2021 and get the chips submitted. Also thank you for attaching the log. Not sure if the log is complete? It ends at the start of the reading operation, but there is no final message of SUCCESS or FAIL. However, importantly, I could see in the beginning of the log which platform was detected, and it is Promontory. Which means... Avinash, Most likely you are hitting a known issue, you can read more details here: https://ticket.coreboot.org/issues/370 The issue is for Promontory, and also for chips larger than 16Mbyte: which is exactly what you have. I was actually trying to get help from AMD with this issue, so it's really good to have you here on the mailing list! Maybe you can help? Someone from AMD would be in the best position to fix Promontory, you have all the datasheets available, and all the hardware. Thank you! On Sat, May 11, 2024 at 9:40 PM Vlim <vlim(a)gigadevice.com> wrote: > > Hi, Anastasia, > > Please find the attached datasheet for GD25LR256E and GD25LR512ME. > > There are actually two issues. > > the released flashrom does not support GD25LR256E and GD25LR512ME. > With my patch, the dediprog programmer works for GD25LR512ME. But the AMD internal programmer for Birman Plus Board does not work. Output file attached. > > > This is the comment about Birman Plus Board > > Now, Flashrom can detect the flash chip. > Using dediprog programmer I can read/write the flash chip successfully. > Whereas with using the internal programmer i.e. "-p internal" the read/write is failing. I am attaching the log here. > Please give your input on this. > > > Regards, > > Victor > > > ________________________________ > From: Anastasia Klimchuk <aklm(a)chromium.org> > Sent: Saturday, May 11, 2024 17:59 > To: Vlim <vlim(a)gigadevice.com>; Munduru, Avinash <avinash.munduru(a)amd.com> > Cc: flashrom(a)flashrom.org <flashrom(a)flashrom.org> > Subject: Re: [flashrom] Re: Support for GD25LR512ME flash chip. > > 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息 > This is an external email, beware of phishing emails. Please pay close attention to whether the email contains sensitive information > > There is another thing, in addition to my previous message. > > I looked into the patch which adds chip definitions (this one > https://apc01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.co…) and the reason it is > pending is there are no links to datasheets (old links are not working > anymore). > It is unfortunate that the patch is pending since 2021, but I want to > try to fix the situation now, in the year 2024. > > Victor, maybe you know, is it possible to find datasheets for > GD25LR256E and GD251R512ME? I could finish the old patch and get chips > into the tree. > > This is a separate question to Avinash's issue with internal > programmer, but for this we need the very verbose log (which is log > with -VVV option on command line). > > Thank you! > > On Thu, May 9, 2024 at 11:03 PM Anastasia Klimchuk <aklm(a)chromium.org> wrote: > > > > Avinash, I read the thread and I see you are saying "I am attaching > > the log here" but I don't see the log? maybe you can re-send it again, > > now with the mailing list? (perhaps you sent it to Victor only?) > > Yes it is also important to know your board, since you are saying the > > chip worked successfully with dediprog, but not with the internal > > programmer. > > > > Victor, thank you so much for helping! > > > > > > On Mon, May 6, 2024 at 6:42 PM Vlim <vlim(a)gigadevice.com> wrote: > > > > > > Thanks, Avinash, > > > > > > Can you advise which board are you using? > > > I have tested this patch with the USB programmer only since I do not have access to the motherboard. > > > > > > Hi, Flashrom team, > > > Can you also help on this? > > > > > > > > > Regards, > > > > > > Victor Lim > > > FAE Director > > > GigaDevice Semiconductor > > > 4088833856 > > > vlim(a)gigadevice.com > > > > > > ________________________________ > > > From: Munduru, Avinash <Avinash.Munduru(a)amd.com> > > > Sent: Monday, May 6, 2024 16:24 > > > To: Vlim <vlim(a)gigadevice.com>; flashrom(a)flashrom.org <flashrom(a)flashrom.org> > > > Subject: Re: Support for GD25LR512ME flash chip. > > > > > > You don't often get email from avinash.munduru(a)amd.com. Learn why this is important > > > 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息 > > > This is an external email, beware of phishing emails. Please pay close attention to whether the email contains sensitive information > > > > > > [AMD Official Use Only - General] > > > > > > > > > Hi Victor, > > > > > > Thanks for sharing the patch. Here is an update after trying the shared patch. > > > > > > Now, Flashrom can detect the flash chip. > > > Using dediprog programmer I can read/write the flash chip successfully. > > > Whereas with using the internal programmer i.e. "-p internal" the read/write is failing. I am attaching the log here. > > > Please give your input on this. > > > > > > Once again! Thanks for your help! > > > > > > > > > ________________________________ > > > From: Vlim <vlim(a)gigadevice.com> > > > Sent: Sunday, May 5, 2024 1:54 PM > > > To: flashrom(a)flashrom.org <flashrom(a)flashrom.org>; Munduru, Avinash <Avinash.Munduru(a)amd.com> > > > Subject: Re: Support for GD25LR512ME flash chip. > > > > > > Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. > > > > > > Hi, Avinash, > > > > > > Sorry that I am working on adding this part to Flashrom, but has not completed the entire process. > > > > > > Can you please use the attached flashchips.c and flashshchips.h and replace that in flashrom distribution? > > > > > > This is the process. > > > > > > git clone "https://apc01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.co…" > > > > > > meson setup builddir > > > meson compile -C builddir > > > meson test -C builddir > > > meson install -C builddir > > > > > > > > > Please also refer to the following link for compilation of the code. > > > https://apc01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fflashrom.… > > > > > > I have a compiled version for Ubuntu Linux, if that will help, I can share with you. > > > > > > Regards, > > > > > > Victor Lim > > > GigaDevice Semiconductors Inc. > > > 4088833856 > > > vlim(a)gigadevice.com > > > > > > > > > ________________________________ > > > From: Munduru, Avinash via flashrom <flashrom(a)flashrom.org> > > > Sent: Tuesday, April 30, 2024 16:54 > > > To: flashrom(a)flashrom.org <flashrom(a)flashrom.org> > > > Subject: [flashrom] Re: Support for GD25LR512ME flash chip. > > > > > > 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息 > > > This is an external email, beware of phishing emails. Please pay close attention to whether the email contains sensitive information > > > > > > [AMD Official Use Only - General] > > > > > > > > > + attaching the output log > > > > > > ________________________________ > > > From: Munduru, Avinash > > > Sent: Tuesday, April 30, 2024 2:04 PM > > > To: flashrom(a)flashrom.org <flashrom(a)flashrom.org> > > > Subject: Support for GD25LR512ME flash chip. > > > > > > Hi, > > > > > > Currently, flash chip support for GD25LR512ME is not supported in flashrom utility. > > > Please share a patch if it is already available. If not let me know how I can modify it. > > > > > > _______________________________________________ > > > flashrom mailing list -- flashrom(a)flashrom.org > > > To unsubscribe send an email to flashrom-leave(a)flashrom.org > > > > > > > > -- > > Anastasia. > > > > -- > Anastasia. -- Anastasia.

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Makefile removal is imminent
by Peter Marheine July 30, 2024

July 30, 2024

Hi everyone, As was described in the release notes for version 1.4, I plan to remove the Makefile soon and make Meson the only supported buildsystem for flashrom: the proposed change is https://review.coreboot.org/c/flashrom/+/83673 If you haven't tried using meson before, now would be a good time to try and ensure your preferred workflow is still supported. If something you depend on doesn't work with meson, I'd love to hear about it so we can try to continue supporting it. Otherwise, I expect we'll be merging the above change within a few weeks to make good on our promise of removing support for building with make.

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Flash Report
by Wei Cheng July 26, 2024

July 26, 2024

weicheng@weicheng-Z3-Air-Series-GM5TGEO:~$ sudo flashrom -p raiden_debug_spi:target=AP -w stock-firmware-CROTA-20240723.rom --ifd -i bios flashrom unknown on Linux 6.8.0-39-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Raiden target: 2 Raiden: Unexpected packet id = 1 Raiden: Read response failed protocol = 2 write count = 1 read count = 3 received bytes = 0 write attempt = 1 read attempt = 1 status = 0x11001 Raiden: Unexpected packet id = 1 Raiden: Read response failed protocol = 2 write count = 1 read count = 3 received bytes = 0 write attempt = 1 read attempt = 2 status = 0x11001 Raiden: Unexpected packet id = 1 Raiden: Read response failed protocol = 2 write count = 1 read count = 3 received bytes = 0 write attempt = 1 read attempt = 3 status = 0x11001 Raiden: Unexpected start packet id = 5 Raiden: Read response failed protocol = 2 write count = 1 read count = 4 received bytes = 3 write attempt = 1 read attempt = 1 status = 0x11001 Raiden: Unexpected start packet id = 5 Raiden: Read response failed protocol = 2 write count = 1 read count = 4 received bytes = 3 write attempt = 1 read attempt = 2 status = 0x11001 Raiden: Receive packet overflowed bytes_in_buffer = 4 max_read_length = 2 receive_index = 2 receive_size = 0 Raiden: Read response failed protocol = 2 write count = 1 read count = 2 received bytes = 0 write attempt = 1 read attempt = 1 status = 0x11003 Raiden: Receive packet overflowed bytes_in_buffer = 4 max_read_length = 2 receive_index = 2 receive_size = 0 Raiden: Read response failed protocol = 2 write count = 1 read count = 2 received bytes = 0 write attempt = 1 read attempt = 2 status = 0x11003 Raiden: Unexpected start packet id = 5 Raiden: Read response failed protocol = 2 write count = 1 read count = 3 received bytes = 2 write attempt = 1 read attempt = 1 status = 0x11001 Raiden: Receive packet overflowed bytes_in_buffer = 3 max_read_length = 2 receive_index = 2 receive_size = 0 Raiden: Read response failed protocol = 2 write count = 4 read count = 2 received bytes = 0 write attempt = 1 read attempt = 1 status = 0x11003 Raiden: Unexpected start packet id = 5 Raiden: Read response failed protocol = 2 write count = 1 read count = 3 received bytes = 2 write attempt = 1 read attempt = 1 status = 0x11001 Found Winbond flash chip "W25Q256JV_M" (32768 kB, SPI) on raiden_debug_spi. === This flash part has status UNTESTED for operations: WP The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! Reading ich descriptor... done. Peculiar flash descriptor, assuming 100 series compatibility. The flash descriptor looks like a Skylake/Sunrise Point descriptor. However, the read frequency isn't set to 17MHz (the only valid value). Please report this message, the output of `ich_descriptors_tool` for your descriptor and the output of `lspci -nn` to flashrom(a)flashrom.org Using region: "bios". Reading old flash chip contents... done. Erasing and writing flash chip... FAILED at 0x01c04000! Expected=0xff, Found=0x00, failed byte count from 0x01c04000-0x01c04fff: 0x1000 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. FAILED at 0x0051c000! Expected=0xff, Found=0x00, failed byte count from 0x0051c000-0x0051cfff: 0x1000 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. FAILED at 0x00510000! Expected=0xff, Found=0x00, failed byte count from 0x00510000-0x00517fff: 0x7788 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. FAILED at 0x00510000! Expected=0xff, Found=0x00, failed byte count from 0x00510000-0x0051ffff: 0xa758 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. FAILED at 0x00520000! Expected=0xff, Found=0x00, failed byte count from 0x00520000-0x0052ffff: 0x9f60 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Erase/write done. Verifying flash... FAILED at 0x00000110! Expected=0x1f, Found=0x0f, failed byte count from 0x00000000-0x01ffffff: 0x9f5a8d Your flash chip is in an unknown state. Please report this to the mailing list at flashrom(a)flashrom.org or on IRC (see https://www.flashrom.org/Contact for details), thanks!

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Flashroom Info - Attempt to read ROM from Asus ROG Zenith II Extreme
by ujqpwyztbiswjvwv July 25, 2024

July 25, 2024

Hi Flashrom Developers, I’m curiious about the BIOS on my motherboard, and am hoping to snoop around to figure out if it’s possible to replace with correboot. My motherboard is a Asus ROG Zenith II Extreme, which has an AMD TRX40 Chipset. I’m guessing I need to use a hardware programmer. Are there any that you reccomend? I’ve looked through https://flashrom.org/supported_hw/supported_prog/index.html and https://github.com/flashrom/flashrom/blob/main/programmer_table.c I have a J-Link right now, so that may be the easiest route for me. I attempted to use flashrom and it failed. Per the instructions, here is the output: flashrom unknown on Linux 6.1.0-21-amd64 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "AMD FP4". Enabling flash write... FCH device found but SMBus revision 0x61 does not match known values. Please report this to flashrom(a)flashrom.org and include this log and the output of lspci -nnvx, thanks!. Could not determine chipset generation.PROBLEMS, continuing anyway No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Thanks, Isaac

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flashrom release v1.4.0 is out
by Anastasia Klimchuk July 25, 2024

July 25, 2024

Good day everyone, flashrom release v1.4.0 is out! Tarball: https://download.flashrom.org/releases/flashrom-1.4.0.tar.xz Signature: https://download.flashrom.org/releases/flashrom-1.4.0.tar.xz.asc Fingerprint: 6E6E F9A0 BA47 8006 E277 6E4C C037 BB41 3134 D111 Checkout from git repository: by the tag v1.4.0 on the main branch. Release notes published: https://flashrom.org/release_notes/v_1_4.html Since the previous v1.3.0 we got 438 commits from 73 authors. Thank you all so much! Many thanks to all our amazing contributors, reviewers, developers, maintainers, and everyone who supports flashrom in any way <3 All the patches that have been ready and waiting, will be submitted very soon. We return back to the normal development process. -- Anastasia.

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FAILED: <Lantis>
by Abhinav Thulung July 24, 2024

July 24, 2024

Hello flashrom, I was trying to disable WP with you software and decided to type “flashrom —erase” It now says: “Transaction error between offset 0x00bca000 and 0x00bca000 (= 0x00bca000 + 0)! ERASE_FALIED FAILED! Your flash chip is in an unknown state.” It then shows some ways to seek help, the it says: “DO NOT REBOOT OR POWEROFF! FAILED” What should I do? I can’t leave this like that forever. Please respond, I know you guys are busy people, but I would be forever grateful if you help me. Thanks. P.S: I have no ch341a USB or soldering items on me, I have no idea what I’m doing.

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HELPPPP
by Anonymous July 23, 2024

July 23, 2024

hello people, i want to restore my chromebook to its original state after installing windows. i booted it into a live ubuntu usb and i connected it into the internet, i installed curl and then i ran this command: cd ~; curl -L -O https://coolstar.org/chromebook/setup... && sudo bash setup-firmware.sh it gave me an error cuz they removed the file so i downloaded an archived one using the wayback machine. then i did sudo bash setup-firmware.sh and it gave me this error: Getting device/system info... Unable to read current firmware; cannot continue. Either add 'iomem=relaxed' to your kernel parameters, or trying running from a Live USB with a more permissive kernel (eg, Ubuntu). See https://www.flashrom.org/FAQ for more info

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Could not read internal BIOS/UEFI FW chip on ASRock B450M Pro4 R2.0
by Jacob G July 22, 2024

July 22, 2024

Hello - I was told to email by flashrom :) I tried to read the BIOS chip in my ASRock B450M Pro4 R2.0, with UEFI firmware version 10.20 (recently released - less than a month old) with flashrom and it failed: [nix-shell:~]$ sudo flashrom -p internal -r asrock-b450mpro4-efifw.rom [sudo] password for jrg: flashrom v1.3.0 on Linux 6.6.39 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "AMD FP4". Enabling flash write... FCH device found but SMBus revision 0x51 does not match known values. Please report this to flashrom(a)flashrom.org and include this log and the output of lspci -nnvx, thanks!. Could not determine chipset generation.PROBLEMS, continuing anyway No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Here is your requested information. The output of lspci -nnvx is in the attached .log file.

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release v1.4.0 plan and timeline
by Anastasia Klimchuk July 10, 2024

July 10, 2024

Good day everyone, We are preparing to do v1.4.0 release and below is the plan and timeline. TLDR: The release will be from the main branch. Testing and bug fixing window is from 28 June to 26 July, any help is highly appreciated! https://flashrom.org/how_to_support_flashrom.html#building-and-testing Known issue: https://ticket.coreboot.org/issues/370 More details: #1 In two weeks, on 28 June, we update the VERSION file to 1.4.0-rc1 and put a tag v1.4.0-rc1 (which means the first release candidate). From that moment, we open a 4-weeks window for testing and bugfixing. That is from 28 June to 26 July. During this window, bug fixes will be reviewed and submitted, but things like new features/refactorings etc will need to wait until 26 July. Just to be clear, any patch with new feature can be pushed and reviewed, it just won't be submitted until 26 July. Any help is very much appreciated during this time. #2 If needed, we can create v1.4.0-rc2 during the window #3 On 26 July, we update the VERSION file to 1.4.0 and put a tag v1.4.0 Then, there will be an announcement about the release, with the link to full release notes. After all that, VERSION file will be updated to 1.5.0-devel, all the patches that are ready and have been waiting, will be submitted, and everything gets back to normal. If later a point release is needed, it will be branched from v1.4.0 tag. Also, we plan to do another release later this year. So everything that didn't get submitted until 28 June (and by this didn't get into 1.4), can get into 1.5 later this year. Note there is a known issue: https://ticket.coreboot.org/issues/370 -- Anastasia.

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