December 2024 - flashrom - mail.coreboot.org

HP 11MK G9EE - M44236-001 - "W25Q64JW...M"
by Tim Tech Oct. 20, 2025

Oct. 20, 2025

Hello, attached are two text documents: output from --wp-disable and output from erase/write - let me know if any other information is needed. Chip in question is "W25Q64JW...M" Thanks, Tim

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Verification after write vs erase operations
by Anastasia Klimchuk Aug. 10, 2025

Aug. 10, 2025

Hello everyone, I want to bring into discussion a topic of verification of chip content which is performed after write or erase operations. Also for context prior discussion in this ticket: https://ticket.coreboot.org/issues/520 Currently we have a flag `-n` or `dont_verify_it` which is false by default. What the flag is doing is deciding whether verification needs to be performed after writing. The flag is false by default, so by default verification is happening after writing (which makes sense). Now the flag is only controlling write operation, and has no effect on erase operation. So for erase, the flag is ignored and verification is performed always. Just for context, it has always been like this. So for write operation we have a power option to say "ignore verification", and since it's false by default, the idea is, if you set it true then you know what you are doing. There is no such option for erase which seems a bit unfair. The two potential options to introduce equivalent option for erase are: 1) Add new flag `dont_verify_erase` (or some similar name) As a support for this option, it does not affect any existing use cases/scripts, and can be added any time. 2) Add coverage for erase operation under existing flag `-n` or `dont_verify_it` As a support for this option, erase operation can be seen as a variant of writing, since it does modify content of the chip, and so the fact it's not covered by the existing flag can be treated as a bug. What do people think about it? -- Anastasia.

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FAILED: Swanky Baytrail
by Chris Andrew Jan. 8, 2025

Jan. 8, 2025

Hi, guys. I'm trying to update the firmware for my Toshiba Swanky. I've done this several times before, without issue, but have got an error, this time. Can you tell me what you may need, to help troubleshoot this? *My machine:* System: Host: swanky Kernel: 6.12.4-arch1-1 arch: x86_64 bits: 64 Desktop: Xfce v: 4.18.1 Distro: EndeavourOS Machine: Type: Laptop System: GOOGLE product: Swanky v: 1.0 serial: 5F239563C Mobo: GOOGLE model: Swanky v: 1.0 serial: N/A UEFI: coreboot v: MrChromebox-4.22.4 date: 04/16/2024 Battery: ID-1: BAT0 charge: 33.1 Wh (97.6%) condition: 33.9/44.2 Wh (76.7%) CPU: Info: dual core model: Intel Celeron N2840 bits: 64 type: MCP cache: L2: 1024 KiB *The command I used, today:* [chris@swanky ~]$ cd; curl -LO mrchromebox.tech/firmware-util.sh && sudo bash firmware-util.sh *Some of the output:* This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). Skipping writeprotect-based unlocking for read/verify operations. Block protection is disabled. Reading ich descriptor... read_flash: region (00000000..0x7fffff) is readable, reading range (00000000..0x000fff). done. Assuming chipset 'Baytrail'. Added layout entry 00000000 - 00000fff named fd Added layout entry 00200000 - 007fffff named bios Added layout entry 00001000 - 001fffff named me Using region: "bios". coreboot last image size (not ROM size) is 8388608 bytes. Manufacturer: Google Mainboard ID: Swanky This coreboot image matches this mainboard. spi_read_register: read from register 2 not supported by programmer I hope this helps, Chris (chris_debian)

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flashrom
by rik Hendrickx Dec. 29, 2024

Dec. 29, 2024

hi, i work together for a school in Gambia, now we got some older chrome laptops and i installed other OS on it but with only one i need some other flash program to succeed , meaby Flasrom can do it ? laptop specs HP Chromebook 14 Nyan blaze 32 bit ARM where can i download flashrom ? Or can you give me advice or links ? Best Regards Rik

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flashrom point release v1.5.1 is out
by Anastasia Klimchuk Dec. 22, 2024

Dec. 22, 2024

Good day everyone, We have one more release this year (this is the last one of this year, for sure :)). It contains one bug fix for the bug which was introduced in v1.5.0. Bug fix is also merged into the main branch, so building from the latest source works too. Details: Users with older Intel-based platforms (Broadwell/Braswell and earlier) flashing using the internal programmer option might encounter an ‘Invalid OPCODE’ error when erasing/writing which would lead to an incomplete flash and potentially a bricked device. External flashing was not affected at all. Ticket: https://ticket.coreboot.org/issues/573 Patch: https://review.coreboot.org/c/flashrom/+/85612 Release notes: https://flashrom.org/release_notes/v_1_5.html#version-v1-5-1 Git tag: v1.5.1 (in branch 1.5.x) Tarball: https://download.flashrom.org/releases/flashrom-v1.5.1.tar.xz Signature: https://download.flashrom.org/releases/flashrom-v1.5.1.tar.xz.asc Fingerprint: 6E6E F9A0 BA47 8006 E277 6E4C C037 BB41 3134 D111 Thanks heaps to people who helped to do v1.5.1 to get it ready before holidays break! <3 I wish everyone a nice and happy holidays time. -- Anastasia.

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Reg:libmtd: error!: MEMERASE64 ioctl failed for eraseblocks (mtd0)
by Arvind GP Dec. 15, 2024

Dec. 15, 2024

Hi All, We are trying to implement the flashrom tool utility on the x86 Elkhart Lake(LEC-EL) platform. In this case, we are facing an issue when trying to erase the BIOS device MTD0. There are 4096 erase blocks available in the mtd0 device, but only 1791 erase blocks we can erase; the remaining blocks are throwing errors, and it shows MEMERASE64 IOCTL FAILED. Please see the below error message and MTD0 device info for your reference. NOTE: Sometimes it works; we can erase the MTD0 device without any error, and we can upgrade/downgrade the BIOS. ERROR MESSAGAE: #sudo flash_erase /dev/mtd0 0 0 Erasing 16384 Kibyte @ 0 -- 0 % complete libmtd: error!: MEMERASE64 ioctl failed for eraseblock 0 (mtd0) error 524 (Unknown error 524) flash_erase: error!: Entering into mtd_erase_multi flash_erase: error!: /dev/mtd0: MTD Erase entire chip failureTrying one by one each sector. error 524 (Unknown error 524) Erasing 4 Kibyte @ 700000 -- 43 % complete libmtd: error!: MEMERASE64 ioctl failed for eraseblock 1792 (mtd0) error 5 (Input/output error) flash_erase: error!: /dev/mtd0: MTD Erase failure error 5 (Input/output error) Erasing 4 Kibyte @ 700000 -- 43 % complete cnt 4096 MTD0 INFO:(sudo mtdinfo /dev/mtd0) Name: BIOS Туре: nor Eraseblock size: 4096 bytes, 4.0 KiB Amount of eraseblocks: 4096 (16777216 bytes, 16.0 MB) Minimum input/output unit size: 1 byte Sub-page size: 1 byte Character device major/minor: 90:0 Bad blocks are allowed: false Device is writable: true Please share your inputs on this. Thanks & Regards, Arvind G P.

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request for support programmer with ch341b
by S. Dec. 13, 2024

Dec. 13, 2024

flashrom supports only programmers with ch341a, but many programmers sold now have ch341b onboard, pid:vid is then 1a86:5523 tnx in advance Stephan

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Winbond25q128jvsm2120
by Mohammed Hazim Dec. 12, 2024

Dec. 12, 2024

Hi can you help me please? I have hp chrome book c1030 elite it have bios Winbond25q128jvsm2120 i need to install windows on it and it’s just taking chrome os .how can I install windows on it?

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Splitting flashchips.c
by Anastasia Klimchuk Dec. 5, 2024

Dec. 5, 2024

Good day, I wanted to confirm that we are splitting flashchips.c file into separate files per vendor. flashchips.c will still stay in the source code but it will be much smaller and will only contain "generic" chip entries. The patch is here: https://review.coreboot.org/c/flashrom/+/83307 , it will be submitted after v1.5.0 tag is done. The patch will not be included in v1.5.0 release. There will be no changes to the usage, and everything that's supported stays the same. If you are a flashrom user who does not look into source code: this does not affect you at all. If you are working on adding support for a chip model: when the patch is submitted (I will post again) you will need to copy your code from flashchips.c into a vendor-specific file. Thank you! -- Anastasia.

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flashrom release v1.5.0 is out
by Anastasia Klimchuk Dec. 5, 2024

Dec. 5, 2024

Good day everyone, flashrom release v1.5.0 is out! Tarball: https://download.flashrom.org/releases/flashrom-v1.5.0.tar.xz Signature: https://download.flashrom.org/releases/flashrom-v1.5.0.tar.xz.asc Fingerprint: 6E6E F9A0 BA47 8006 E277 6E4C C037 BB41 3134 D111 Checkout from git repository at https://review.coreboot.org/flashrom.git (tag v1.5.0) Release notes published: https://flashrom.org/release_notes/v_1_5.html It has been only 4 months since previous v1.4.0, and yet we have 91 commits made by 24 authors! Release notes explain the details of what was done, and thanks heaps to all the people who did it, reviewed it, and helped in any way <3 All the patches that have been ready and waiting, will be submitted very soon. -- Anastasia.

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